mirror of https://github.com/PCSX2/pcsx2.git
ee-fpu: upgrade the FPU to 3.0
properly return reserved register Fix FCR test :)
This commit is contained in:
parent
cf993c2a36
commit
eaa211212d
|
@ -223,8 +223,12 @@ void C_LT() {
|
|||
}
|
||||
|
||||
void CFC1() {
|
||||
if ( !_Rt_ || ( (_Fs_ != 0) && (_Fs_ != 31) ) ) return;
|
||||
cpuRegs.GPR.r[_Rt_].SD[0] = (s32)fpuRegs.fprc[_Fs_]; // force sign extension to 64 bit
|
||||
if ( !_Rt_ ) return;
|
||||
|
||||
if (_Fs_ >= 16)
|
||||
cpuRegs.GPR.r[_Rt_].SD[0] = (s32)fpuRegs.fprc[31]; // force sign extension to 64 bit
|
||||
else
|
||||
cpuRegs.GPR.r[_Rt_].SD[0] = (s32)fpuRegs.fprc[0]; // force sign extension to 64 bit
|
||||
}
|
||||
|
||||
void CTC1() {
|
||||
|
|
|
@ -13,7 +13,7 @@
|
|||
* If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#include "PrecompiledHeader.h"
|
||||
#include "Common.h"
|
||||
|
||||
|
@ -72,7 +72,7 @@ void cpuReset()
|
|||
cpuRegs.CP0.n.Config = 0x440;
|
||||
cpuRegs.CP0.n.Status.val= 0x70400004; //0x10900000 <-- wrong; // COP0 enabled | BEV = 1 | TS = 1
|
||||
cpuRegs.CP0.n.PRid = 0x00002e20; // PRevID = Revision ID, same as R5900
|
||||
fpuRegs.fprc[0] = 0x00002e00; // fpu Revision..
|
||||
fpuRegs.fprc[0] = 0x00002e30; // fpu Revision..
|
||||
fpuRegs.fprc[31] = 0x01000001; // fpu Status/Control
|
||||
|
||||
g_nextEventCycle = cpuRegs.cycle + 4;
|
||||
|
@ -82,7 +82,7 @@ void cpuReset()
|
|||
hwReset();
|
||||
rcntInit();
|
||||
psxReset();
|
||||
|
||||
|
||||
extern void Deci2Reset(); // lazy, no good header for it yet.
|
||||
Deci2Reset();
|
||||
|
||||
|
|
|
@ -114,15 +114,18 @@ static const __aligned16 u32 s_pos[4] = { 0x7fffffff, 0xffffffff, 0xffffffff, 0x
|
|||
//------------------------------------------------------------------
|
||||
void recCFC1(void)
|
||||
{
|
||||
if ( !_Rt_ || ( (_Fs_ != 0) && (_Fs_ != 31) ) ) return;
|
||||
if ( !_Rt_ ) return;
|
||||
EE::Profiler.EmitOp(eeOpcode::CFC1);
|
||||
|
||||
_eeOnWriteReg(_Rt_, 1);
|
||||
|
||||
xMOV(eax, ptr[&fpuRegs.fprc[ _Fs_ ] ]);
|
||||
if (_Fs_ >= 16)
|
||||
xMOV(eax, ptr[&fpuRegs.fprc[31] ]);
|
||||
else
|
||||
xMOV(eax, ptr[&fpuRegs.fprc[0] ]);
|
||||
_deleteEEreg(_Rt_, 0);
|
||||
|
||||
if (_Fs_ == 31)
|
||||
if (_Fs_ >= 16)
|
||||
{
|
||||
xAND(eax, 0x0083c078); //remove always-zero bits
|
||||
xOR(eax, 0x01000001); //set always-one bits
|
||||
|
|
|
@ -48,6 +48,8 @@ sub help {
|
|||
EnableVU1=disabled : Use VU1 interpreter
|
||||
FPU.Roundmode=3 : EE FPU round mode
|
||||
VU.Roundmode=3 : VU round mode
|
||||
fpuExtraOverflow=enabled : Full EE FPU
|
||||
fpuFullMode=enabled : Full EE FPU
|
||||
|
||||
EOS
|
||||
print $msg;
|
||||
|
@ -152,7 +154,6 @@ if ($o_regression or $o_bad) {
|
|||
$blacklist{"arithmetic"} = 1;
|
||||
$blacklist{"branchdelay"} = 1;
|
||||
$blacklist{"compare"} = 1;
|
||||
$blacklist{"fcr"} = 1;
|
||||
$blacklist{"muldiv"} = 1;
|
||||
$blacklist{"sqrt"} = 1;
|
||||
# IOP
|
||||
|
|
Loading…
Reference in New Issue