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Added a minor hack to MFIFO interrupt timing. Fixes FF7 DoC. 

Long interrupt delays are always bad, no matter how true it is to actual console behavior.
(Issue with running code in block slices.)
Also removed outdated hacks for Devil May Cry PAL :p

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3629 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
ramapcsx2 2010-08-10 10:04:17 +00:00
parent fa793cca25
commit e97c68e832
3 changed files with 13 additions and 16 deletions
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11
bin/GameIndex.dbf
View File

@ -29985,16 +29985,7 @@ Region = PAL-Unk
Serial = SLES-50358 Serial = SLES-50358
Name = Devil May Cry Name = Devil May Cry
Region = PAL-E Region = PAL-E
Compat = 3 Compat = 5
[patches = 7D8F539A]
//Skip Videos
patch=0,EE,0015BC78,word,00000000
patch=0,EE,001CE340,word,03E00008
patch=0,EE,001CE344,word,00000000
patch=0,EE,001CE8EC,word,70001428
[/patches]
--------------------------------------------- ---------------------------------------------
Serial = SLES-50362 Serial = SLES-50362
Name = Jonny Moseley Mad Trix Name = Jonny Moseley Mad Trix

16
pcsx2/Vif1_MFIFO.cpp
View File

@ -142,9 +142,12 @@ void mfifoVIF1transfer(int qwc)
if (vif1.inprogress & 0x10) if (vif1.inprogress & 0x10)
{ {
if (vif1ch->madr >= dmacRegs->rbor.ADDR && vif1ch->madr <= (dmacRegs->rbor.ADDR + dmacRegs->rbsr.RMSK)) if (vif1ch->madr >= dmacRegs->rbor.ADDR && vif1ch->madr <= (dmacRegs->rbor.ADDR + dmacRegs->rbsr.RMSK))
CPU_INT(DMAC_MFIFO_VIF, 0); CPU_INT(DMAC_MFIFO_VIF, 1);
else else
CPU_INT(DMAC_MFIFO_VIF, vif1ch->qwc * BIAS); {
// Minor hack. Please ask before removal (rama) (FF7 Dirge of Cerberus)
CPU_INT(DMAC_MFIFO_VIF, min( 386, (int)(vif1ch->qwc * BIAS) ) );
}
vif1Regs->stat.FQC = 0x10; // FQC=16 vif1Regs->stat.FQC = 0x10; // FQC=16
} }
@ -293,15 +296,18 @@ void vifMFIFOInterrupt()
mfifoVIF1transfer(0); mfifoVIF1transfer(0);
if ((vif1ch->madr >= dmacRegs->rbor.ADDR) && (vif1ch->madr <= (dmacRegs->rbor.ADDR + dmacRegs->rbsr.RMSK))) if ((vif1ch->madr >= dmacRegs->rbor.ADDR) && (vif1ch->madr <= (dmacRegs->rbor.ADDR + dmacRegs->rbsr.RMSK)))
CPU_INT(DMAC_MFIFO_VIF, 0); CPU_INT(DMAC_MFIFO_VIF, 1);
else else
CPU_INT(DMAC_MFIFO_VIF, vif1ch->qwc * BIAS); {
// Minor hack. Please ask before removal (rama) (FF7 Dirge of Cerberus)
CPU_INT(DMAC_MFIFO_VIF, min( 386, (int)(vif1ch->qwc * BIAS) ) );
}
return; return;
case 1: //Transfer data case 1: //Transfer data
mfifo_VIF1chain(); mfifo_VIF1chain();
CPU_INT(DMAC_MFIFO_VIF, 0); CPU_INT(DMAC_MFIFO_VIF, 1);
return; return;
} }
return; return;

2
pcsx2/x86/microVU_Misc.h
View File

@ -301,7 +301,7 @@ typedef u32 (__fastcall *mVUCall)(void*, void*);
#define mVUcacheCheck(ptr, start, limit) { \ #define mVUcacheCheck(ptr, start, limit) { \
uptr diff = ptr - start; \ uptr diff = ptr - start; \
if (diff >= limit) { \ if (diff >= limit) { \
Console.WriteLn("microVU%d: Program cache limit reached. Size = 0x%x", mVU->index, diff); \ DevCon.WriteLn("microVU%d: Program cache limit reached. Size = 0x%x", mVU->index, diff); \
mVUresizeCache(mVU, mVU->cacheSize + mVUcacheGrowBy); \ mVUresizeCache(mVU, mVU->cacheSize + mVUcacheGrowBy); \
} \ } \
} }