diff --git a/pcsx2/x86/microVU.h b/pcsx2/x86/microVU.h
index 9dcbc0d1f5..ecf728a65e 100644
--- a/pcsx2/x86/microVU.h
+++ b/pcsx2/x86/microVU.h
@@ -17,8 +17,8 @@
  */
 
 #pragma once
-#define mVUdebug	// Prints Extra Info to Console
-#define mVUlogProg	// Dumps MicroPrograms into microVU0.txt/microVU1.txt
+//#define mVUdebug	// Prints Extra Info to Console
+//#define mVUlogProg	// Dumps MicroPrograms into microVU0.txt/microVU1.txt
 #include "Common.h"
 #include "VU.h"
 #include "GS.h"
@@ -74,7 +74,7 @@ struct microProgram {
 	microAllocInfo<progSize> allocInfo;
 };
 
-#define mMaxProg 16 // The amount of Micro Programs Recs will 'remember' (For n = 1, 2, 4, 8, 16, etc...)
+#define mMaxProg 32 // The amount of Micro Programs Recs will 'remember' (For n = 1, 2, 4, 8, 16, etc...)
 template<u32 pSize>
 struct microProgManager {
 	microProgram<pSize>	prog[mMaxProg];	// Store MicroPrograms in memory
diff --git a/pcsx2/x86/microVU_Compile.inl b/pcsx2/x86/microVU_Compile.inl
index eb047e97da..6bf8f65dc4 100644
--- a/pcsx2/x86/microVU_Compile.inl
+++ b/pcsx2/x86/microVU_Compile.inl
@@ -30,7 +30,7 @@
 	incPC2(1);																\
 	bBlock = mVUblocks[iPC/2]->search((microRegInfo*)&mVUregs);				\
 	incPC2(-1);																\
-	if (bBlock)	{ nJMPcc((uptr)pBlock->x86ptrStart - ((uptr)x86Ptr + 6)); }	\
+	if (bBlock)	{ nJMPcc((uptr)bBlock->x86ptrStart - ((uptr)x86Ptr + 6)); }	\
 	else		{ ajmp = JMPcc((uptr)0); }									\
 	break
 
@@ -347,12 +347,12 @@ microVUt(void*) __fastcall mVUcompile(u32 startPC, uptr pState) {
 			microBlock* bBlock = NULL;
 			u32* ajmp = 0;
 			switch (mVUbranch) {
-				case 3: branchCase(JZ32,  JNZ32);	// IBEQ
+				case 3: branchCase(JE32,  JNE32);	// IBEQ
 				case 4: branchCase(JGE32, JNGE32);	// IBGEZ
 				case 5: branchCase(JG32,  JNG32);	// IBGTZ
 				case 6: branchCase(JLE32, JNLE32);	// IBLEQ
 				case 7: branchCase(JL32,  JNL32);	// IBLTZ
-				case 8: branchCase(JNZ32, JZ32);	// IBNEQ
+				case 8: branchCase(JNE32, JE32);	// IBNEQ
 				case 1: case 2: // B/BAL
 
 					mVUprint("mVUcompile B/BAL");
diff --git a/pcsx2/x86/microVU_Execute.inl b/pcsx2/x86/microVU_Execute.inl
index a8f4ab45af..a96647fbbd 100644
--- a/pcsx2/x86/microVU_Execute.inl
+++ b/pcsx2/x86/microVU_Execute.inl
@@ -82,10 +82,6 @@ microVUt(void) mVUdispatcherB() {
 	microVU* mVU = mVUx;
 	mVU->exitFunct = x86Ptr;
 
-	// __fastcall = The first two DWORD or smaller arguments are passed in ECX and EDX registers; all other arguments are passed right to left.
-	if (!vuIndex) { CALLFunc((uptr)mVUcleanUpVU0); }
-	else		  { CALLFunc((uptr)mVUcleanUpVU1); }
-
 	// Load EE's MXCSR state
 	eeMXCSR = g_sseMXCSR;
 	SSE_LDMXCSR((uptr)&eeMXCSR);
@@ -98,15 +94,16 @@ microVUt(void) mVUdispatcherB() {
 	MOV32RtoM((uptr)&mVU->regs->VI[REG_STATUS_FLAG].UL,	gprT1);
 	MOV32RtoM((uptr)&mVU->regs->VI[REG_MAC_FLAG].UL,	gprF0);
 	
-	for (int i = 0; i < 8; i++) {
-		
-	}
 	for (int i = 1; i < 16; i++) {
 		if (isMMX(i)) { MOVDMMXtoM((uptr)&mVU->regs->VI[i].UL, mmVI(i)); }
 	}
 
 	SSE_MOVAPS_XMM_to_M128((uptr)&mVU->regs->ACC.UL[0], xmmACC);
 
+	// __fastcall = The first two DWORD or smaller arguments are passed in ECX and EDX registers; all other arguments are passed right to left.
+	if (!vuIndex) { CALLFunc((uptr)mVUcleanUpVU0); }
+	else		  { CALLFunc((uptr)mVUcleanUpVU1); }
+
 	// Restore cpu state
 	POP32R(EDI);
 	POP32R(ESI);
diff --git a/pcsx2/x86/microVU_Misc.h b/pcsx2/x86/microVU_Misc.h
index 01ea81e287..07cef16dbc 100644
--- a/pcsx2/x86/microVU_Misc.h
+++ b/pcsx2/x86/microVU_Misc.h
@@ -195,7 +195,6 @@ declareAllVariables
 #define _fvmInstance (3<<16) // Mac		Read Instance (at T-stage for lower instruction)
 #define _fvsInstance (3<<18) // Status	Read Instance (at T-stage for lower instruction)
 #define _fvcInstance (3<<20) // Clip	Read Instance (at T-stage for lower instruction)
-#define _noWriteVF	 (1<<21) // Don't write back the result of a lower op to VF reg if upper op writes to same reg (or if VF = 0)
 #define _backupVI	 (1<<22) // Backup VI reg to memory if modified before branch (branch uses old VI value unless opcode is ILW or ILWR)
 #define _memReadIs	 (1<<23) // Read Is (VI reg) from memory (used by branches)
 #define _memReadIt	 (1<<24) // Read If (VI reg) from memory (used by branches)
@@ -204,6 +203,8 @@ declareAllVariables
 #define _isFSSET	 (1<<27) // Cur Instruction is FSSET
 #define _doDivFlag	 (1<<28) // Transfer Div flag to Status Flag
 #define _doClip		 (1<<29)
+#define _noWriteVF	 (1<<30) // Don't write back the result of a lower op to VF reg if upper op writes to same reg (or if VF = 0)
+
 
 #define isNOP		 (mVUinfo & (1<<0))
 #define isBranch	 (mVUinfo & (1<<1))
@@ -225,7 +226,6 @@ declareAllVariables
 #define fvmInstance	((mVUinfo >> 16) & 3)
 #define fvsInstance	((mVUinfo >> 18) & 3)
 #define fvcInstance	((mVUinfo >> 20) & 3)
-#define noWriteVF	 (mVUinfo & (1<<21))
 #define backupVI	 (mVUinfo & (1<<22))
 #define memReadIs	 (mVUinfo & (1<<23))
 #define memReadIt	 (mVUinfo & (1<<24))
@@ -234,6 +234,7 @@ declareAllVariables
 #define isFSSET		 (mVUinfo & (1<<27))
 #define doDivFlag	 (mVUinfo & (1<<28))
 #define doClip		 (mVUinfo & (1<<29))
+#define noWriteVF	 (mVUinfo & (1<<30))
 
 #define isMMX(_VIreg_)	0//(_VIreg_ >= 1 && _VIreg_ <=8)
 #define mmVI(_VIreg_)	(_VIreg_ - 1)