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debug: 'ostr' is used as parameter and destination in s[n]printf().

This commit is contained in:
Gregory Hainaut 2015-11-06 22:15:30 +01:00
parent 7c6d2361af
commit e4e68a6179
2 changed files with 46 additions and 42 deletions
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34
pcsx2/DebugTools/DisVU0Micro.cpp
View File

@ -19,6 +19,7 @@
#include "Debug.h" #include "Debug.h"
static char ostr[1024]; static char ostr[1024];
static char ostr_tmp[32];
// Type deffinition of our functions // Type deffinition of our functions
#define DisFInterface (u32 code, u32 pc) #define DisFInterface (u32 code, u32 pc)
@ -30,8 +31,9 @@ typedef char* (*TdisR5900F)DisFInterface;
// These macros are used to assemble the disassembler functions // These macros are used to assemble the disassembler functions
#define MakeDisF(fn, b) \ #define MakeDisF(fn, b) \
char* fn DisFInterface { \ char* fn DisFInterface { \
sprintf (ostr, "%8.8x %8.8x:", pc, code); \ sprintf (ostr_tmp, "%8.8x %8.8x:", pc, code); \
b; /*ostr[(strlen(ostr) - 1)] = 0;*/ return ostr; \ b; \
return ostr; \
} }
//Lower/Upper instructions can use that.. //Lower/Upper instructions can use that..
@ -42,22 +44,22 @@ typedef char* (*TdisR5900F)DisFInterface;
#define _Is_ (_Fs_ & 15) #define _Is_ (_Fs_ & 15)
#define _Id_ (_Fd_ & 15) #define _Id_ (_Fd_ & 15)
#define dName(i) sprintf(ostr, "%s %-7s,", ostr, i) #define dName(i) sprintf(ostr, "%s %-7s,", ostr_tmp, i)
#define dNameU(i) { char op[256]; sprintf(op, "%s.%s%s%s%s", i, _X ? "x" : "", _Y ? "y" : "", _Z ? "z" : "", _W ? "w" : ""); sprintf(ostr, "%s %-7s,", ostr, op); } #define dNameU(i) { char op[256]; sprintf(op, "%s.%s%s%s%s", i, _X ? "x" : "", _Y ? "y" : "", _Z ? "z" : "", _W ? "w" : ""); sprintf(ostr, "%s %-7s,", ostr_tmp, op); }
#define dCP2128f(i) sprintf(ostr, "%s w=%f z=%f y=%f x=%f (%s),", ostr, VU0.VF[i].f.w, VU0.VF[i].f.z, VU0.VF[i].f.y, VU0.VF[i].f.x, R5900::COP2_REG_FP[i]) #define dCP2128f(i) sprintf(ostr, "%s w=%f z=%f y=%f x=%f (%s),", ostr_tmp, VU0.VF[i].f.w, VU0.VF[i].f.z, VU0.VF[i].f.y, VU0.VF[i].f.x, R5900::COP2_REG_FP[i])
#define dCP232x(i) sprintf(ostr, "%s x=%f (%s),", ostr, VU0.VF[i].f.x, R5900::COP2_REG_FP[i]) #define dCP232x(i) sprintf(ostr, "%s x=%f (%s),", ostr_tmp, VU0.VF[i].f.x, R5900::COP2_REG_FP[i])
#define dCP232y(i) sprintf(ostr, "%s y=%f (%s),", ostr, VU0.VF[i].f.y, R5900::COP2_REG_FP[i]) #define dCP232y(i) sprintf(ostr, "%s y=%f (%s),", ostr_tmp, VU0.VF[i].f.y, R5900::COP2_REG_FP[i])
#define dCP232z(i) sprintf(ostr, "%s z=%f (%s),", ostr, VU0.VF[i].f.z, R5900::COP2_REG_FP[i]) #define dCP232z(i) sprintf(ostr, "%s z=%f (%s),", ostr_tmp, VU0.VF[i].f.z, R5900::COP2_REG_FP[i])
#define dCP232w(i) sprintf(ostr, "%s w=%f (%s),", ostr, VU0.VF[i].f.w, R5900::COP2_REG_FP[i]) #define dCP232w(i) sprintf(ostr, "%s w=%f (%s),", ostr_tmp, VU0.VF[i].f.w, R5900::COP2_REG_FP[i])
#define dCP2ACCf() sprintf(ostr, "%s w=%f z=%f y=%f x=%f (ACC),", ostr, VU0.ACC.f.w, VU0.ACC.f.z, VU0.ACC.f.y, VU0.ACC.f.x) #define dCP2ACCf() sprintf(ostr, "%s w=%f z=%f y=%f x=%f (ACC),", ostr_tmp, VU0.ACC.f.w, VU0.ACC.f.z, VU0.ACC.f.y, VU0.ACC.f.x)
#define dCP232i(i) sprintf(ostr, "%s %8.8x (%s),", ostr, VU0.VI[i].UL, R5900::COP2_REG_CTL[i]) #define dCP232i(i) sprintf(ostr, "%s %8.8x (%s),", ostr_tmp, VU0.VI[i].UL, R5900::COP2_REG_CTL[i])
#define dCP232iF(i) sprintf(ostr, "%s %f (%s),", ostr, VU0.VI[i].F, R5900::COP2_REG_CTL[i]) #define dCP232iF(i) sprintf(ostr, "%s %f (%s),", ostr_tmp, VU0.VI[i].F, R5900::COP2_REG_CTL[i])
#define dCP232f(i, j) sprintf(ostr, "%s Q %s=%f (%s),", ostr, R5900::COP2_VFnames[j], VU0.VF[i].F[j], R5900::COP2_REG_FP[i]) #define dCP232f(i, j) sprintf(ostr, "%s Q %s=%f (%s),", ostr_tmp, R5900::COP2_VFnames[j], VU0.VF[i].F[j], R5900::COP2_REG_FP[i])
#define dImm5() sprintf(ostr, "%s %d,", ostr, (code >> 6) & 0x1f) #define dImm5() sprintf(ostr, "%s %d,", ostr_tmp, (code >> 6) & 0x1f)
#define dImm11() sprintf(ostr, "%s %d,", ostr, code & 0x7ff) #define dImm11() sprintf(ostr, "%s %d,", ostr_tmp, code & 0x7ff)
#define dImm15() sprintf(ostr, "%s %d,", ostr, ( ( code >> 10 ) & 0x7800 ) | ( code & 0x7ff )) #define dImm15() sprintf(ostr, "%s %d,", ostr_tmp, ( ( code >> 10 ) & 0x7800 ) | ( code & 0x7ff ))
#define _X ((code>>24) & 0x1) #define _X ((code>>24) & 0x1)
#define _Y ((code>>23) & 0x1) #define _Y ((code>>23) & 0x1)

54
pcsx2/DebugTools/DisVU1Micro.cpp
View File

@ -20,6 +20,7 @@
#include "VUmicro.h" #include "VUmicro.h"
static char ostr[1024]; static char ostr[1024];
static char ostr_tmp[32];
// Type deffinition of our functions // Type deffinition of our functions
#define DisFInterface (u32 code, u32 pc) #define DisFInterface (u32 code, u32 pc)
@ -31,9 +32,10 @@ typedef char* (*TdisR5900F)DisFInterface;
// These macros are used to assemble the disassembler functions // These macros are used to assemble the disassembler functions
#define MakeDisF(fn, b) \ #define MakeDisF(fn, b) \
char* fn DisFInterface { \ char* fn DisFInterface { \
if( !!CpuVU1->IsInterpreter ) sprintf (ostr, "%8.8x %8.8x:", pc, code); \ if( !!CpuVU1->IsInterpreter ) sprintf (ostr_tmp, "%8.8x %8.8x:", pc, code); \
else ostr[0] = 0; \ else ostr_tmp[0] = 0; \
b; /*ostr[(strlen(ostr) - 1)] = 0;*/ return ostr; \ b; \
return ostr; \
} }
//Lower/Upper instructions can use that.. //Lower/Upper instructions can use that..
@ -44,61 +46,61 @@ typedef char* (*TdisR5900F)DisFInterface;
#define _Is_ (_Fs_ & 15) #define _Is_ (_Fs_ & 15)
#define _Id_ (_Fd_ & 15) #define _Id_ (_Fd_ & 15)
#define dName(i) sprintf(ostr, "%s %-12s", ostr, i); \ #define dName(i) sprintf(ostr, "%s %-12s", ostr_tmp, i); \
#define dNameU(i) { \ #define dNameU(i) { \
char op[256]; sprintf(op, "%s.%s%s%s%s", i, _X ? "x" : "", _Y ? "y" : "", _Z ? "z" : "", _W ? "w" : ""); \ char op[256]; sprintf(op, "%s.%s%s%s%s", i, _X ? "x" : "", _Y ? "y" : "", _Z ? "z" : "", _W ? "w" : ""); \
sprintf(ostr, "%s %-12s", ostr, op); \ sprintf(ostr, "%s %-12s", ostr_tmp, op); \
} }
#define dCP2128f(i) { \ #define dCP2128f(i) { \
if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr, R5900::COP2_REG_FP[i]); \ if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr_tmp, R5900::COP2_REG_FP[i]); \
else sprintf(ostr, "%s w=%f (%8.8x) z=%f (%8.8x) y=%f (%8.8xl) x=%f (%8.8x) (%s),", ostr, VU1.VF[i].f.w, VU1.VF[i].UL[3], VU1.VF[i].f.z, VU1.VF[i].UL[2], VU1.VF[i].f.y, VU1.VF[i].UL[1], VU1.VF[i].f.x, VU1.VF[i].UL[0], R5900::COP2_REG_FP[i]); \ else sprintf(ostr, "%s w=%f (%8.8x) z=%f (%8.8x) y=%f (%8.8xl) x=%f (%8.8x) (%s),", ostr_tmp, VU1.VF[i].f.w, VU1.VF[i].UL[3], VU1.VF[i].f.z, VU1.VF[i].UL[2], VU1.VF[i].f.y, VU1.VF[i].UL[1], VU1.VF[i].f.x, VU1.VF[i].UL[0], R5900::COP2_REG_FP[i]); \
} \ } \
#define dCP232x(i) { \ #define dCP232x(i) { \
if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr, R5900::COP2_REG_FP[i]); \ if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr_tmp, R5900::COP2_REG_FP[i]); \
else sprintf(ostr, "%s x=%f (%s),", ostr, VU1.VF[i].f.x, R5900::COP2_REG_FP[i]); \ else sprintf(ostr, "%s x=%f (%s),", ostr_tmp, VU1.VF[i].f.x, R5900::COP2_REG_FP[i]); \
} \ } \
#define dCP232y(i) { \ #define dCP232y(i) { \
if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr, R5900::COP2_REG_FP[i]); \ if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr_tmp, R5900::COP2_REG_FP[i]); \
else sprintf(ostr, "%s y=%f (%s),", ostr, VU1.VF[i].f.y, R5900::COP2_REG_FP[i]); \ else sprintf(ostr, "%s y=%f (%s),", ostr_tmp, VU1.VF[i].f.y, R5900::COP2_REG_FP[i]); \
} \ } \
#define dCP232z(i) { \ #define dCP232z(i) { \
if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr, R5900::COP2_REG_FP[i]); \ if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr_tmp, R5900::COP2_REG_FP[i]); \
else sprintf(ostr, "%s z=%f (%s),", ostr, VU1.VF[i].f.z, R5900::COP2_REG_FP[i]); \ else sprintf(ostr, "%s z=%f (%s),", ostr_tmp, VU1.VF[i].f.z, R5900::COP2_REG_FP[i]); \
} }
#define dCP232w(i) { \ #define dCP232w(i) { \
if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr, R5900::COP2_REG_FP[i]); \ if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr_tmp, R5900::COP2_REG_FP[i]); \
else sprintf(ostr, "%s w=%f (%s),", ostr, VU1.VF[i].f.w, R5900::COP2_REG_FP[i]); \ else sprintf(ostr, "%s w=%f (%s),", ostr_tmp, VU1.VF[i].f.w, R5900::COP2_REG_FP[i]); \
} }
#define dCP2ACCf() { \ #define dCP2ACCf() { \
if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s ACC,", ostr); \ if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s ACC,", ostr_tmp); \
else sprintf(ostr, "%s w=%f z=%f y=%f x=%f (ACC),", ostr, VU1.ACC.f.w, VU1.ACC.f.z, VU1.ACC.f.y, VU1.ACC.f.x); \ else sprintf(ostr, "%s w=%f z=%f y=%f x=%f (ACC),", ostr_tmp, VU1.ACC.f.w, VU1.ACC.f.z, VU1.ACC.f.y, VU1.ACC.f.x); \
} \ } \
#define dCP232i(i) { \ #define dCP232i(i) { \
if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr, R5900::COP2_REG_CTL[i]); \ if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr_tmp, R5900::COP2_REG_CTL[i]); \
else sprintf(ostr, "%s %8.8x (%s),", ostr, VU1.VI[i].UL, R5900::COP2_REG_CTL[i]); \ else sprintf(ostr, "%s %8.8x (%s),", ostr_tmp, VU1.VI[i].UL, R5900::COP2_REG_CTL[i]); \
} }
#define dCP232iF(i) { \ #define dCP232iF(i) { \
if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr, R5900::COP2_REG_CTL[i]); \ if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr_tmp, R5900::COP2_REG_CTL[i]); \
else sprintf(ostr, "%s %f (%s),", ostr, VU1.VI[i].F, R5900::COP2_REG_CTL[i]); \ else sprintf(ostr, "%s %f (%s),", ostr_tmp, VU1.VI[i].F, R5900::COP2_REG_CTL[i]); \
} }
#define dCP232f(i, j) { \ #define dCP232f(i, j) { \
if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s%s,", ostr, R5900::COP2_REG_FP[i], R5900::COP2_VFnames[j]); \ if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s%s,", ostr_tmp, R5900::COP2_REG_FP[i], R5900::COP2_VFnames[j]); \
else sprintf(ostr, "%s %s=%f (%s),", ostr, R5900::COP2_VFnames[j], VU1.VF[i].F[j], R5900::COP2_REG_FP[i]); \ else sprintf(ostr, "%s %s=%f (%s),", ostr_tmp, R5900::COP2_VFnames[j], VU1.VF[i].F[j], R5900::COP2_REG_FP[i]); \
} }
#define dImm5() sprintf(ostr, "%s %d,", ostr, (s16)((code >> 6) & 0x10 ? 0xfff0 | ((code >> 6) & 0xf) : (code >> 6) & 0xf)) #define dImm5() sprintf(ostr, "%s %d,", ostr_tmp, (s16)((code >> 6) & 0x10 ? 0xfff0 | ((code >> 6) & 0xf) : (code >> 6) & 0xf))
#define dImm11() sprintf(ostr, "%s %d,", ostr, (s16)(code & 0x400 ? 0xfc00 | (code & 0x3ff) : code & 0x3ff)) #define dImm11() sprintf(ostr, "%s %d,", ostr_tmp, (s16)(code & 0x400 ? 0xfc00 | (code & 0x3ff) : code & 0x3ff))
#define dImm15() sprintf(ostr, "%s %d,", ostr, ( ( code >> 10 ) & 0x7800 ) | ( code & 0x7ff )) #define dImm15() sprintf(ostr, "%s %d,", ostr_tmp, ( ( code >> 10 ) & 0x7800 ) | ( code & 0x7ff ))
#define _X ((code>>24) & 0x1) #define _X ((code>>24) & 0x1)
#define _Y ((code>>23) & 0x1) #define _Y ((code>>23) & 0x1)