mirror of https://github.com/PCSX2/pcsx2.git
debug: 'ostr' is used as parameter and destination in s[n]printf().
This commit is contained in:
Gregory Hainaut
parent
7c6d2361af
commit
e4e68a6179
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@ -19,6 +19,7 @@
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#include "Debug.h"
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static char ostr[1024];
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static char ostr_tmp[32];
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// Type deffinition of our functions
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#define DisFInterface (u32 code, u32 pc)
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@ -30,8 +31,9 @@ typedef char* (*TdisR5900F)DisFInterface;
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// These macros are used to assemble the disassembler functions
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#define MakeDisF(fn, b) \
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char* fn DisFInterface { \
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sprintf (ostr, "%8.8x %8.8x:", pc, code); \
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b; /*ostr[(strlen(ostr) - 1)] = 0;*/ return ostr; \
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sprintf (ostr_tmp, "%8.8x %8.8x:", pc, code); \
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b; \
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return ostr; \
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}
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//Lower/Upper instructions can use that..
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@ -42,22 +44,22 @@ typedef char* (*TdisR5900F)DisFInterface;
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#define _Is_ (_Fs_ & 15)
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#define _Id_ (_Fd_ & 15)
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#define dName(i) sprintf(ostr, "%s %-7s,", ostr, i)
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#define dNameU(i) { char op[256]; sprintf(op, "%s.%s%s%s%s", i, _X ? "x" : "", _Y ? "y" : "", _Z ? "z" : "", _W ? "w" : ""); sprintf(ostr, "%s %-7s,", ostr, op); }
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#define dName(i) sprintf(ostr, "%s %-7s,", ostr_tmp, i)
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#define dNameU(i) { char op[256]; sprintf(op, "%s.%s%s%s%s", i, _X ? "x" : "", _Y ? "y" : "", _Z ? "z" : "", _W ? "w" : ""); sprintf(ostr, "%s %-7s,", ostr_tmp, op); }
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#define dCP2128f(i) sprintf(ostr, "%s w=%f z=%f y=%f x=%f (%s),", ostr, VU0.VF[i].f.w, VU0.VF[i].f.z, VU0.VF[i].f.y, VU0.VF[i].f.x, R5900::COP2_REG_FP[i])
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#define dCP232x(i) sprintf(ostr, "%s x=%f (%s),", ostr, VU0.VF[i].f.x, R5900::COP2_REG_FP[i])
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#define dCP232y(i) sprintf(ostr, "%s y=%f (%s),", ostr, VU0.VF[i].f.y, R5900::COP2_REG_FP[i])
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#define dCP232z(i) sprintf(ostr, "%s z=%f (%s),", ostr, VU0.VF[i].f.z, R5900::COP2_REG_FP[i])
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#define dCP232w(i) sprintf(ostr, "%s w=%f (%s),", ostr, VU0.VF[i].f.w, R5900::COP2_REG_FP[i])
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#define dCP2ACCf() sprintf(ostr, "%s w=%f z=%f y=%f x=%f (ACC),", ostr, VU0.ACC.f.w, VU0.ACC.f.z, VU0.ACC.f.y, VU0.ACC.f.x)
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#define dCP232i(i) sprintf(ostr, "%s %8.8x (%s),", ostr, VU0.VI[i].UL, R5900::COP2_REG_CTL[i])
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#define dCP232iF(i) sprintf(ostr, "%s %f (%s),", ostr, VU0.VI[i].F, R5900::COP2_REG_CTL[i])
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#define dCP232f(i, j) sprintf(ostr, "%s Q %s=%f (%s),", ostr, R5900::COP2_VFnames[j], VU0.VF[i].F[j], R5900::COP2_REG_FP[i])
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#define dImm5() sprintf(ostr, "%s %d,", ostr, (code >> 6) & 0x1f)
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#define dImm11() sprintf(ostr, "%s %d,", ostr, code & 0x7ff)
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#define dImm15() sprintf(ostr, "%s %d,", ostr, ( ( code >> 10 ) & 0x7800 ) | ( code & 0x7ff ))
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#define dCP2128f(i) sprintf(ostr, "%s w=%f z=%f y=%f x=%f (%s),", ostr_tmp, VU0.VF[i].f.w, VU0.VF[i].f.z, VU0.VF[i].f.y, VU0.VF[i].f.x, R5900::COP2_REG_FP[i])
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#define dCP232x(i) sprintf(ostr, "%s x=%f (%s),", ostr_tmp, VU0.VF[i].f.x, R5900::COP2_REG_FP[i])
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#define dCP232y(i) sprintf(ostr, "%s y=%f (%s),", ostr_tmp, VU0.VF[i].f.y, R5900::COP2_REG_FP[i])
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#define dCP232z(i) sprintf(ostr, "%s z=%f (%s),", ostr_tmp, VU0.VF[i].f.z, R5900::COP2_REG_FP[i])
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#define dCP232w(i) sprintf(ostr, "%s w=%f (%s),", ostr_tmp, VU0.VF[i].f.w, R5900::COP2_REG_FP[i])
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#define dCP2ACCf() sprintf(ostr, "%s w=%f z=%f y=%f x=%f (ACC),", ostr_tmp, VU0.ACC.f.w, VU0.ACC.f.z, VU0.ACC.f.y, VU0.ACC.f.x)
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#define dCP232i(i) sprintf(ostr, "%s %8.8x (%s),", ostr_tmp, VU0.VI[i].UL, R5900::COP2_REG_CTL[i])
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#define dCP232iF(i) sprintf(ostr, "%s %f (%s),", ostr_tmp, VU0.VI[i].F, R5900::COP2_REG_CTL[i])
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#define dCP232f(i, j) sprintf(ostr, "%s Q %s=%f (%s),", ostr_tmp, R5900::COP2_VFnames[j], VU0.VF[i].F[j], R5900::COP2_REG_FP[i])
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#define dImm5() sprintf(ostr, "%s %d,", ostr_tmp, (code >> 6) & 0x1f)
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#define dImm11() sprintf(ostr, "%s %d,", ostr_tmp, code & 0x7ff)
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#define dImm15() sprintf(ostr, "%s %d,", ostr_tmp, ( ( code >> 10 ) & 0x7800 ) | ( code & 0x7ff ))
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#define _X ((code>>24) & 0x1)
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#define _Y ((code>>23) & 0x1)
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@ -20,6 +20,7 @@
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#include "VUmicro.h"
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static char ostr[1024];
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static char ostr_tmp[32];
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// Type deffinition of our functions
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#define DisFInterface (u32 code, u32 pc)
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@ -31,9 +32,10 @@ typedef char* (*TdisR5900F)DisFInterface;
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// These macros are used to assemble the disassembler functions
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#define MakeDisF(fn, b) \
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char* fn DisFInterface { \
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if( !!CpuVU1->IsInterpreter ) sprintf (ostr, "%8.8x %8.8x:", pc, code); \
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else ostr[0] = 0; \
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b; /*ostr[(strlen(ostr) - 1)] = 0;*/ return ostr; \
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if( !!CpuVU1->IsInterpreter ) sprintf (ostr_tmp, "%8.8x %8.8x:", pc, code); \
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else ostr_tmp[0] = 0; \
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b; \
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return ostr; \
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}
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//Lower/Upper instructions can use that..
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@ -44,61 +46,61 @@ typedef char* (*TdisR5900F)DisFInterface;
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#define _Is_ (_Fs_ & 15)
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#define _Id_ (_Fd_ & 15)
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#define dName(i) sprintf(ostr, "%s %-12s", ostr, i); \
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#define dName(i) sprintf(ostr, "%s %-12s", ostr_tmp, i); \
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#define dNameU(i) { \
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char op[256]; sprintf(op, "%s.%s%s%s%s", i, _X ? "x" : "", _Y ? "y" : "", _Z ? "z" : "", _W ? "w" : ""); \
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sprintf(ostr, "%s %-12s", ostr, op); \
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sprintf(ostr, "%s %-12s", ostr_tmp, op); \
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}
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#define dCP2128f(i) { \
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if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr, R5900::COP2_REG_FP[i]); \
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else sprintf(ostr, "%s w=%f (%8.8x) z=%f (%8.8x) y=%f (%8.8xl) x=%f (%8.8x) (%s),", ostr, VU1.VF[i].f.w, VU1.VF[i].UL[3], VU1.VF[i].f.z, VU1.VF[i].UL[2], VU1.VF[i].f.y, VU1.VF[i].UL[1], VU1.VF[i].f.x, VU1.VF[i].UL[0], R5900::COP2_REG_FP[i]); \
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if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr_tmp, R5900::COP2_REG_FP[i]); \
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else sprintf(ostr, "%s w=%f (%8.8x) z=%f (%8.8x) y=%f (%8.8xl) x=%f (%8.8x) (%s),", ostr_tmp, VU1.VF[i].f.w, VU1.VF[i].UL[3], VU1.VF[i].f.z, VU1.VF[i].UL[2], VU1.VF[i].f.y, VU1.VF[i].UL[1], VU1.VF[i].f.x, VU1.VF[i].UL[0], R5900::COP2_REG_FP[i]); \
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} \
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#define dCP232x(i) { \
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if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr, R5900::COP2_REG_FP[i]); \
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else sprintf(ostr, "%s x=%f (%s),", ostr, VU1.VF[i].f.x, R5900::COP2_REG_FP[i]); \
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if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr_tmp, R5900::COP2_REG_FP[i]); \
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else sprintf(ostr, "%s x=%f (%s),", ostr_tmp, VU1.VF[i].f.x, R5900::COP2_REG_FP[i]); \
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} \
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#define dCP232y(i) { \
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if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr, R5900::COP2_REG_FP[i]); \
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else sprintf(ostr, "%s y=%f (%s),", ostr, VU1.VF[i].f.y, R5900::COP2_REG_FP[i]); \
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if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr_tmp, R5900::COP2_REG_FP[i]); \
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else sprintf(ostr, "%s y=%f (%s),", ostr_tmp, VU1.VF[i].f.y, R5900::COP2_REG_FP[i]); \
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} \
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#define dCP232z(i) { \
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if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr, R5900::COP2_REG_FP[i]); \
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else sprintf(ostr, "%s z=%f (%s),", ostr, VU1.VF[i].f.z, R5900::COP2_REG_FP[i]); \
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if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr_tmp, R5900::COP2_REG_FP[i]); \
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else sprintf(ostr, "%s z=%f (%s),", ostr_tmp, VU1.VF[i].f.z, R5900::COP2_REG_FP[i]); \
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}
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#define dCP232w(i) { \
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if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr, R5900::COP2_REG_FP[i]); \
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else sprintf(ostr, "%s w=%f (%s),", ostr, VU1.VF[i].f.w, R5900::COP2_REG_FP[i]); \
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if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr_tmp, R5900::COP2_REG_FP[i]); \
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else sprintf(ostr, "%s w=%f (%s),", ostr_tmp, VU1.VF[i].f.w, R5900::COP2_REG_FP[i]); \
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}
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#define dCP2ACCf() { \
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if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s ACC,", ostr); \
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else sprintf(ostr, "%s w=%f z=%f y=%f x=%f (ACC),", ostr, VU1.ACC.f.w, VU1.ACC.f.z, VU1.ACC.f.y, VU1.ACC.f.x); \
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if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s ACC,", ostr_tmp); \
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else sprintf(ostr, "%s w=%f z=%f y=%f x=%f (ACC),", ostr_tmp, VU1.ACC.f.w, VU1.ACC.f.z, VU1.ACC.f.y, VU1.ACC.f.x); \
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} \
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#define dCP232i(i) { \
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if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr, R5900::COP2_REG_CTL[i]); \
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else sprintf(ostr, "%s %8.8x (%s),", ostr, VU1.VI[i].UL, R5900::COP2_REG_CTL[i]); \
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if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr_tmp, R5900::COP2_REG_CTL[i]); \
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else sprintf(ostr, "%s %8.8x (%s),", ostr_tmp, VU1.VI[i].UL, R5900::COP2_REG_CTL[i]); \
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}
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#define dCP232iF(i) { \
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if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr, R5900::COP2_REG_CTL[i]); \
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else sprintf(ostr, "%s %f (%s),", ostr, VU1.VI[i].F, R5900::COP2_REG_CTL[i]); \
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if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr_tmp, R5900::COP2_REG_CTL[i]); \
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else sprintf(ostr, "%s %f (%s),", ostr_tmp, VU1.VI[i].F, R5900::COP2_REG_CTL[i]); \
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}
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#define dCP232f(i, j) { \
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if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s%s,", ostr, R5900::COP2_REG_FP[i], R5900::COP2_VFnames[j]); \
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else sprintf(ostr, "%s %s=%f (%s),", ostr, R5900::COP2_VFnames[j], VU1.VF[i].F[j], R5900::COP2_REG_FP[i]); \
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if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s%s,", ostr_tmp, R5900::COP2_REG_FP[i], R5900::COP2_VFnames[j]); \
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else sprintf(ostr, "%s %s=%f (%s),", ostr_tmp, R5900::COP2_VFnames[j], VU1.VF[i].F[j], R5900::COP2_REG_FP[i]); \
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}
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#define dImm5() sprintf(ostr, "%s %d,", ostr, (s16)((code >> 6) & 0x10 ? 0xfff0 | ((code >> 6) & 0xf) : (code >> 6) & 0xf))
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#define dImm11() sprintf(ostr, "%s %d,", ostr, (s16)(code & 0x400 ? 0xfc00 | (code & 0x3ff) : code & 0x3ff))
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#define dImm15() sprintf(ostr, "%s %d,", ostr, ( ( code >> 10 ) & 0x7800 ) | ( code & 0x7ff ))
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#define dImm5() sprintf(ostr, "%s %d,", ostr_tmp, (s16)((code >> 6) & 0x10 ? 0xfff0 | ((code >> 6) & 0xf) : (code >> 6) & 0xf))
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#define dImm11() sprintf(ostr, "%s %d,", ostr_tmp, (s16)(code & 0x400 ? 0xfc00 | (code & 0x3ff) : code & 0x3ff))
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#define dImm15() sprintf(ostr, "%s %d,", ostr_tmp, ( ( code >> 10 ) & 0x7800 ) | ( code & 0x7ff ))
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#define _X ((code>>24) & 0x1)
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#define _Y ((code>>23) & 0x1)
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