diff --git a/pcsx2/VU0microInterp.cpp b/pcsx2/VU0microInterp.cpp
index eaf7b9b05f..cf70894bd1 100644
--- a/pcsx2/VU0microInterp.cpp
+++ b/pcsx2/VU0microInterp.cpp
@@ -76,14 +76,12 @@ static void _vu0Exec(VURegs* VU)
 			VU0.VI[REG_VPU_STAT].UL|= 0x2;
 			hwIntcIrq(INTC_VU0);
 		}
-		VU->ebit = 1;
 	}
 	if (ptr[1] & 0x08000000) { /* T flag */
 		if (VU0.VI[REG_FBRST].UL & 0x8) {
 			VU0.VI[REG_VPU_STAT].UL|= 0x4;
 			hwIntcIrq(INTC_VU0);
 		}
-		VU->ebit = 1;
 	}
 
 	VU->code = ptr[1]; 
diff --git a/pcsx2/VU1microInterp.cpp b/pcsx2/VU1microInterp.cpp
index fe2028475e..fc8f7f793a 100644
--- a/pcsx2/VU1microInterp.cpp
+++ b/pcsx2/VU1microInterp.cpp
@@ -71,14 +71,12 @@ static void _vu1Exec(VURegs* VU)
 			VU0.VI[REG_VPU_STAT].UL|= 0x200;
 			hwIntcIrq(INTC_VU1);
 		}
-		VU->ebit = 1;
 	}
 	if (ptr[1] & 0x08000000) { /* T flag */
 		if (VU0.VI[REG_FBRST].UL & 0x800) {
 			VU0.VI[REG_VPU_STAT].UL|= 0x400;
 			hwIntcIrq(INTC_VU1);
 		}
-		VU->ebit = 1;
 	}
 
 	VUM_LOG("VU->cycle = %d (flags st=%x;mac=%x;clip=%x,q=%f)", VU->cycle, VU->statusflag, VU->macflag, VU->clipflag, VU->q.F);
diff --git a/pcsx2/x86/iVUmicro.cpp b/pcsx2/x86/iVUmicro.cpp
index e4ff05e8f9..2422e5ad10 100644
--- a/pcsx2/x86/iVUmicro.cpp
+++ b/pcsx2/x86/iVUmicro.cpp
@@ -473,10 +473,6 @@ void SuperVUAnalyzeOp(VURegs *VU, _vuopinfo *info, _VURegsNum* pCodeRegs)
 
 	if (ptr[1] & 0x40000000) { // EOP
 		branch |= 8; 
-	} 
-	
-	if (ptr[1] & 0x18000000) { // T/D flags
-		branch |= 16 | 8; //stop right after this instruction
 	}
 
 	VU->code = ptr[1];
diff --git a/pcsx2/x86/iVUzerorec.cpp b/pcsx2/x86/iVUzerorec.cpp
index 4337b2c607..db9ff78fbb 100644
--- a/pcsx2/x86/iVUzerorec.cpp
+++ b/pcsx2/x86/iVUzerorec.cpp
@@ -1246,7 +1246,7 @@ static VuBaseBlock* SuperVUBuildBlocks(VuBaseBlock* parent, u32 startpc, const V
 		if( pinst->info.p&VUOP_WRITE )
 			pinst->pqcycles = PWaitTimes[pinst->info.pqinst]+1;
 
-		if( prevbranch || (branch & 16)) {
+		if( prevbranch ) {
 			break;
 		}