mirror of https://github.com/PCSX2/pcsx2.git
x86emitter: shift: extend it to 64 bits type
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@ -32,13 +32,12 @@ struct xImpl_DwordShift
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{
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u16 OpcodeBase;
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void operator()( const xRegister32& to, const xRegister32& from, const xRegisterCL& clreg ) const;
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void operator()( const xRegister16& to, const xRegister16& from, const xRegisterCL& clreg ) const;
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void operator()( const xRegister32& to, const xRegister32& from, u8 shiftcnt ) const;
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void operator()( const xRegister16& to, const xRegister16& from, u8 shiftcnt ) const;
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void operator()( const xRegister16or32or64& to, const xRegister16or32or64& from, const xRegisterCL& clreg ) const;
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void operator()( const xIndirectVoid& dest,const xRegister16or32& from, const xRegisterCL& clreg ) const;
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void operator()( const xIndirectVoid& dest,const xRegister16or32& from, u8 shiftcnt ) const;
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void operator()( const xRegister16or32or64& to, const xRegister16or32or64& from, u8 shiftcnt ) const;
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void operator()( const xIndirectVoid& dest,const xRegister16or32or64& from, const xRegisterCL& clreg ) const;
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void operator()( const xIndirectVoid& dest,const xRegister16or32or64& from, u8 shiftcnt ) const;
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};
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} // End namespace x86Emitter
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@ -991,28 +991,27 @@ void xImpl_IncDec::operator()( const xIndirect32orLess& to ) const
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EmitSibMagic( isDec ? 1 : 0, to );
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}
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void xImpl_DwordShift::operator()( const xRegister32& to, const xRegister32& from, const xRegisterCL& /* clreg */ ) const { xOpWrite0F( OpcodeBase+1, to, from ); }
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void xImpl_DwordShift::operator()( const xRegister16& to, const xRegister16& from, const xRegisterCL& /* clreg */ ) const { xOpWrite0F( 0x66, OpcodeBase+1, to, from ); }
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void xImpl_DwordShift::operator()( const xRegister32& to, const xRegister32& from, u8 shiftcnt ) const
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{
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if( shiftcnt != 0 )
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xOpWrite0F( OpcodeBase, to, from, shiftcnt );
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}
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void xImpl_DwordShift::operator()( const xRegister16& to, const xRegister16& from, u8 shiftcnt ) const
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{
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if( shiftcnt != 0 )
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xOpWrite0F( 0x66, OpcodeBase, to, from, shiftcnt );
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void xImpl_DwordShift::operator()( const xRegister16or32or64& to, const xRegister16or32or64& from, const xRegisterCL& /* clreg */ ) const {
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pxAssert( to->GetOperandSize() == from->GetOperandSize() );
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xOpWrite0F( from->GetPrefix16(), OpcodeBase+1, to, from );
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}
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void xImpl_DwordShift::operator()( const xIndirectVoid& dest, const xRegister16or32& from, const xRegisterCL& /* clreg */ ) const
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void xImpl_DwordShift::operator()( const xRegister16or32or64& to, const xRegister16or32or64& from, u8 shiftcnt ) const
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{
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xOpWrite0F( (from->GetOperandSize() == 2) ? 0x66 : 0x00, OpcodeBase + 1, from, dest );
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pxAssert( to->GetOperandSize() == from->GetOperandSize() );
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if( shiftcnt != 0 )
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xOpWrite0F( from->GetPrefix16(), OpcodeBase, to, from, shiftcnt );
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}
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void xImpl_DwordShift::operator()( const xIndirectVoid& dest, const xRegister16or32& from, u8 shiftcnt ) const
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void xImpl_DwordShift::operator()( const xIndirectVoid& dest, const xRegister16or32or64& from, const xRegisterCL& /* clreg */ ) const
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{
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xOpWrite0F( from->GetPrefix16(), OpcodeBase + 1, from, dest );
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}
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void xImpl_DwordShift::operator()( const xIndirectVoid& dest, const xRegister16or32or64& from, u8 shiftcnt ) const
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{
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if( shiftcnt != 0 )
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xOpWrite0F( (from->GetOperandSize() == 2) ? 0x66 : 0x00, OpcodeBase, from, dest, shiftcnt );
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xOpWrite0F( from->GetPrefix16(), OpcodeBase, from, dest, shiftcnt );
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}
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const xImpl_Test xTEST = { };
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