mirror of https://github.com/PCSX2/pcsx2.git
R5900 recompiler: more compact code generation for QFSRV and PADDSW, removed a little redundant code. Big difference in the opening fatal frame fmv for me, but this is probably cache related. Don't expect anything.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3057 96395faa-99c1-11dd-bbfe-3dabce05a288
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sudonim1
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460728393a
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e272080354
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@ -26,6 +26,8 @@
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#include "iR5900.h"
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#include "iMMI.h"
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using namespace x86Emitter;
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namespace Interp = R5900::Interpreter::OpcodeImpl::MMI;
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namespace R5900 {
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@ -787,8 +789,6 @@ void recPADDSW( void )
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// get sign bit
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SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_S);
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SSEX_MOVDQA_XMM_to_XMM(t1reg, EEREC_T);
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SSE2_PSRLD_I8_to_XMM(t0reg, 31);
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SSE2_PSRLD_I8_to_XMM(t1reg, 31);
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// normal addition
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if( EEREC_D == EEREC_S ) SSE2_PADDD_XMM_to_XMM(EEREC_D, EEREC_T);
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@ -798,22 +798,20 @@ void recPADDSW( void )
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SSE2_PADDD_XMM_to_XMM(EEREC_D, EEREC_T);
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}
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// overflow check
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// t2reg = 0xffffffff if overflow, else 0
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SSEX_MOVDQA_XMM_to_XMM(t2reg, EEREC_D);
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SSE2_PSRLD_I8_to_XMM(t2reg, 31);
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SSE2_PCMPEQD_XMM_to_XMM(t1reg, t0reg); // Sign(Rs) == Sign(Rt)
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SSE2_PCMPEQD_XMM_to_XMM(t2reg, t0reg); // Sign(Rs) == Sign(Rd)
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SSE2_PANDN_XMM_to_XMM(t2reg, t1reg); // (Sign(Rs) == Sign(Rt)) & ~(Sign(Rs) == Sign(Rd))
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SSE2_PCMPEQD_XMM_to_XMM(t1reg, t1reg);
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SSE2_PSRLD_I8_to_XMM(t1reg, 1); // 0x7fffffff
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SSE2_PADDD_XMM_to_XMM(t1reg, t0reg); // t1reg = (Rs < 0) ? 0x80000000 : 0x7fffffff
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SSE2_PXOR_XMM_to_XMM(t1reg, t0reg); // Sign(Rs) != Sign(Rt)
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SSE2_PXOR_XMM_to_XMM(t0reg, EEREC_D); // Sign(Rs) != Sign(Rd)
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SSE2_PANDN_XMM_to_XMM(t0reg, t1reg); // (Sign(Rs) == Sign(Rt)) & (Sign(Rs) != Sign(Rd))
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SSE2_PSRAD_I8_to_XMM(t0reg, 31);
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// saturation
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SSE2_PAND_XMM_to_XMM(t1reg, t2reg);
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SSE2_PANDN_XMM_to_XMM(t2reg, EEREC_D);
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SSE2_POR_XMM_to_XMM(t1reg, t2reg);
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SSEX_MOVDQA_XMM_to_XMM(EEREC_D, t1reg);
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SSE2_PCMPEQD_XMM_to_XMM(t1reg, t1reg);
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SSE2_PSLLD_I8_to_XMM(t1reg, 31); // 0x80000000
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SSEX_MOVDQA_XMM_to_XMM(t2reg, EEREC_D);
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SSE2_PSRAD_I8_to_XMM(t2reg, 31);
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SSE2_PXOR_XMM_to_XMM(t2reg, t1reg); // t2reg = (Rd < 0) ? 0x80000000 : 0x7fffffff
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SSE2_PAND_XMM_to_XMM(t2reg, t0reg);
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SSE2_PANDN_XMM_to_XMM(EEREC_D, t0reg);
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SSE2_POR_XMM_to_XMM(EEREC_D, t2reg);
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_freeXMMreg(t0reg);
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_freeXMMreg(t1reg);
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@ -1464,58 +1462,29 @@ void recPEXTUH()
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_clearNeededXMMregs();
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}
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////////////////////////////////////////////////////
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// Both Macros are 16 bytes so we can use a shift instead of a Mul instruction
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#define QFSRVhelper0() { \
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ajmp[0] = JMP32(0); \
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x86Ptr += 11; \
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}
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#define QFSRVhelper(shift1, shift2) { \
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SSE2_PSRLDQ_I8_to_XMM(EEREC_D, shift1); \
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SSE2_PSLLDQ_I8_to_XMM(t0reg, shift2); \
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ajmp[shift1] = JMP32(0); \
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x86Ptr += 1; \
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}
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static __aligned16 u32 tempqw[8];
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void recQFSRV()
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{
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if ( !_Rd_ ) return;
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//Console.WriteLn("recQFSRV()");
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if (_Rs_ == _Rt_ + 1) {
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int info = eeRecompileCodeXMM(XMMINFO_WRITED);
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xMOV(eax, ptr32[&cpuRegs.sa]);
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_deleteGPRtoXMMreg(_Rs_, 1);
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_deleteGPRtoXMMreg(_Rt_, 1);
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xMOVDQU(xRegisterSSE(EEREC_D), ptr32[eax + &cpuRegs.GPR.r[_Rt_]]);
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return;
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}
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int info = eeRecompileCodeXMM( XMMINFO_READS | XMMINFO_READT | XMMINFO_WRITED );
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u32 *ajmp[16];
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int i, j;
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int t0reg = _allocTempXMMreg(XMMT_INT, -1);
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SSE2_MOVDQA_XMM_to_XMM(t0reg, EEREC_S);
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SSE2_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T);
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MOV32MtoR(EAX, (uptr)&cpuRegs.sa);
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SHL32ItoR(EAX, 4); // Multiply SA bytes by 16 bytes (the amount of bytes in QFSRVhelper() macros)
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AND32ItoR(EAX, 0xf0); // This can possibly be removed but keeping it incase theres garbage in SA (cottonvibes)
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ADD32ItoR(EAX, (uptr)x86Ptr + 7); // ADD32 = 5 bytes, JMPR = 2 bytes
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JMPR(EAX); // Jumps to a QFSRVhelper() case below (a total of 16 different cases)
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// Case 0:
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QFSRVhelper0();
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// Cases 1 to 15:
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for (i = 1, j = 15; i < 16; i++, j--) {
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QFSRVhelper(i, j);
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}
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// Set jump addresses for the JMP32's in QFSRVhelper()
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for (i = 1; i < 16; i++) {
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x86SetJ32(ajmp[i]);
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}
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// Concatenate the regs after appropriate shifts have been made
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SSE2_POR_XMM_to_XMM(EEREC_D, t0reg);
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x86SetJ32(ajmp[0]); // Case 0 jumps to here (to skip the POR)
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_freeXMMreg(t0reg);
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xMOV(eax, ptr32[&cpuRegs.sa]);
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xMOVDQA(ptr32[&tempqw[0]], xRegisterSSE(EEREC_T));
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xMOVDQA(ptr32[&tempqw[4]], xRegisterSSE(EEREC_S));
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xMOVDQU(xRegisterSSE(EEREC_D), ptr32[eax + &tempqw]);
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_clearNeededXMMregs();
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}
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@ -2763,13 +2732,9 @@ void recPOR( void )
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SSEX_POR_XMM_to_XMM(EEREC_D, EEREC_S);
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}
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else {
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if( _Rs_ == 0 ) SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T);
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else if( _Rt_ == 0 ) SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_S);
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else {
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SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T);
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if( EEREC_S != EEREC_T ) {
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SSEX_POR_XMM_to_XMM(EEREC_D, EEREC_S);
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}
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SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T);
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if( EEREC_S != EEREC_T ) {
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SSEX_POR_XMM_to_XMM(EEREC_D, EEREC_S);
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}
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}
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}
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