mirror of https://github.com/PCSX2/pcsx2.git
SPU2: Minor improvements to ADMA Timing
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c7267d3665
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e15807eff8
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@ -97,13 +97,13 @@ void V_Core::LogAutoDMA(FILE* fp)
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void V_Core::AutoDMAReadBuffer(int mode) //mode: 0= split stereo; 1 = do not split stereo
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{
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int spos = ActiveTSA & 0x100; // Starting position passed by TSA
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bool leftbuffer = !(ActiveTSA & 0x80);
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if (spos == (OutPos & 0x100))
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{
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//ConLog("Ignoring buffer update Pos %x OutPos %x\n", spos, OutPos);
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int spos = InputPosWrite & 0x100; // Starting position passed by TSA
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bool leftbuffer = !(InputPosWrite & 0x80);
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if (InputPosWrite == 0xFFFF) // Data request not made yet
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return;
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}
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AutoDMACtrl &= 0x3;
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int size = std::min(InputDataLeft, (u32)0x200);
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if (!leftbuffer)
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@ -117,7 +117,6 @@ void V_Core::AutoDMAReadBuffer(int mode) //mode: 0= split stereo; 1 = do not spl
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if (mode)
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{
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if (DMAPtr != nullptr)
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//memcpy((ADMATempBuffer+(spos<<1)),DMAPtr+InputDataProgress,0x400);
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memcpy(GetMemPtr(0x2000 + (Index << 10) + spos), DMAPtr + InputDataProgress, size);
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MADR += size;
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InputDataLeft -= 0x200;
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@ -131,20 +130,19 @@ void V_Core::AutoDMAReadBuffer(int mode) //mode: 0= split stereo; 1 = do not spl
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spos |= 0x200;
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else
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spos &= ~0x200;
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//ConLog("Filling %s buffer\n", leftbuffer ? "Left" : "Right");
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if (DMAPtr != nullptr)
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//memcpy((ADMATempBuffer+spos),DMAPtr+InputDataProgress,0x200);
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memcpy(GetMemPtr(0x2000 + (Index << 10) + spos), DMAPtr + InputDataProgress, 0x200);
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MADR += 0x200;
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InputDataLeft -= 0x100;
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InputDataProgress += 0x100;
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leftbuffer = !leftbuffer;
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size -= 0x100;
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ActiveTSA += 0x80;
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ActiveTSA &= ~0x200;
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TSA = ActiveTSA;
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InputPosWrite += 0x80;
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}
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}
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if (!(InputPosWrite & 0x80))
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InputPosWrite = 0xFFFF;
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}
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void V_Core::StartADMAWrite(u16* pMem, u32 sz)
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@ -159,6 +157,7 @@ void V_Core::StartADMAWrite(u16* pMem, u32 sz)
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GetDmaIndexChar(), size << 1, ActiveTSA, DMABits, AutoDMACtrl, (~Regs.ATTR) & 0xffff, OutPos);
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InputDataProgress = 0;
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TADR = MADR + (size << 1);
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if ((AutoDMACtrl & (Index + 1)) == 0)
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{
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ActiveTSA = 0x2000 + (Index << 10);
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@ -168,8 +167,7 @@ void V_Core::StartADMAWrite(u16* pMem, u32 sz)
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else if (size >= 256)
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{
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InputDataLeft = size;
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AutoDMACtrl &= 3;
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if (AdmaInProgress == 0)
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if (InputPosWrite != 0xFFFF)
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{
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#ifdef PCM24_S1_INTERLEAVE
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if ((Index == 1) && ((PlayMode & 8) == 8))
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@ -184,16 +182,15 @@ void V_Core::StartADMAWrite(u16* pMem, u32 sz)
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AutoDMAReadBuffer(0);
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#endif
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AdmaInProgress = 1;
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if (!InputDataLeft)
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{
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DMAICounter = size * 4;
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LastClock = *cyclePtr;
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AdmaInProgress = 0;
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AutoDMACtrl |= ~3;
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}
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}
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AdmaInProgress = 1;
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}
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else
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{
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@ -202,7 +199,6 @@ void V_Core::StartADMAWrite(u16* pMem, u32 sz)
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DMAICounter = size * 4;
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LastClock = *cyclePtr;
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}
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TADR = MADR + (size << 1);
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}
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void V_Core::PlainDMAWrite(u16* pMem, u32 size)
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@ -245,8 +241,6 @@ void V_Core::PlainDMAWrite(u16* pMem, u32 size)
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void V_Core::FinishDMAwrite()
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{
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if (ActiveTSA != TSA)
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ConLog("Write WTF TSA %x Active %x\n", TSA, ActiveTSA);
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if (Index == 0)
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DMA4LogWrite(DMAPtr, ReadSize << 1);
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else
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@ -70,7 +70,6 @@ StereoOut32 V_Core::ReadInput_HiFi()
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ConLog("WARNING: adma buffer didn't finish with a whole block!!\n");
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}
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}
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AdmaInProgress = 0;
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InputDataLeft = 0;
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DMAICounter = 0x200 * 4;
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LastClock = *cyclePtr;
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@ -100,21 +99,19 @@ StereoOut32 V_Core::ReadInput()
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DebugCores[Index].admaWaveformR[OutPos % 0x100] = retval.Right;
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#endif
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if (OutPos == 0xFF || OutPos == 0x1FF || OutPos == 0x7F || OutPos == 0x17F)
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if (OutPos == 0x100 || OutPos == 0x0 || OutPos == 0x80 || OutPos == 0x180)
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{
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if (OutPos == 0x100)
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InputPosWrite = 0;
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else if (OutPos == 0)
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InputPosWrite = 0x100;
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if (InputDataLeft >= 0x100)
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{
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//u8 k=InputDataLeft>=InputDataProgress;
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int oldOutPos = OutPos;
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OutPos = (OutPos + 1) & 0x1FF;
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AutoDMAReadBuffer(0);
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OutPos = oldOutPos;
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AdmaInProgress = 1;
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if (InputDataLeft < 0x100)
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{
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if ((AutoDMACtrl & (Index + 1)))
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AutoDMACtrl |= ~3;
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if (IsDevBuild)
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{
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FileLog("[%10d] AutoDMA%c block end.\n", Cycles, GetDmaIndexChar());
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@ -124,12 +121,15 @@ StereoOut32 V_Core::ReadInput()
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ConLog("WARNING: adma buffer didn't finish with a whole block!!\n");
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}
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}
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AdmaInProgress = 0;
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InputDataLeft = 0;
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DMAICounter = 0x200 * 4;
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LastClock = *cyclePtr;
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}
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}
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else
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if ((AutoDMACtrl & (Index + 1)))
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AutoDMACtrl |= ~3;
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}
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return retval;
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}
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@ -132,7 +132,8 @@ void SPU2writeDMA4Mem(u16* pMem, u32 size) // size now in 16bit units
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void SPU2interruptDMA4()
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{
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FileLog("[%10d] SPU2 interruptDMA4\n", Cycles);
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Cores[0].Regs.STATX |= 0x80;
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if(Cores[0].DmaMode)
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Cores[0].Regs.STATX |= 0x80;
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Cores[0].Regs.STATX &= ~0x400;
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Cores[0].TSA = Cores[0].ActiveTSA;
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}
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@ -140,7 +141,8 @@ void SPU2interruptDMA4()
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void SPU2interruptDMA7()
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{
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FileLog("[%10d] SPU2 interruptDMA7\n", Cycles);
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Cores[1].Regs.STATX |= 0x80;
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if (Cores[1].DmaMode)
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Cores[1].Regs.STATX |= 0x80;
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Cores[1].Regs.STATX &= ~0x400;
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Cores[1].TSA = Cores[1].ActiveTSA;
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}
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@ -438,7 +438,9 @@ __forceinline void TimeUpdate(u32 cClocks)
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const u32 amt = std::min(*cyclePtr - Cores[0].LastClock, (u32)Cores[0].DMAICounter);
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Cores[0].DMAICounter -= amt;
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Cores[0].LastClock = *cyclePtr;
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Cores[0].MADR += amt / 2;
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if(!Cores[0].AdmaInProgress)
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Cores[0].MADR += amt / 2;
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if (Cores[0].DMAICounter <= 0)
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{
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if (((Cores[0].AutoDMACtrl & 1) != 1) && Cores[0].ReadSize)
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@ -463,7 +465,7 @@ __forceinline void TimeUpdate(u32 cClocks)
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}
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}
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}
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if (!Cores[0].DMAICounter)
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if (Cores[0].DMAICounter <= 0)
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{
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Cores[0].MADR = Cores[0].TADR;
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if (!SPU2_dummy_callback)
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@ -493,7 +495,8 @@ __forceinline void TimeUpdate(u32 cClocks)
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const u32 amt = std::min(*cyclePtr - Cores[1].LastClock, (u32)Cores[1].DMAICounter);
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Cores[1].DMAICounter -= amt;
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Cores[1].LastClock = *cyclePtr;
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Cores[1].MADR += amt / 2;
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if (!Cores[1].AdmaInProgress)
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Cores[1].MADR += amt / 2;
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if (Cores[1].DMAICounter <= 0)
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{
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if (((Cores[1].AutoDMACtrl & 2) != 2) && Cores[1].ReadSize)
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@ -519,7 +522,7 @@ __forceinline void TimeUpdate(u32 cClocks)
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}
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}
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if (!Cores[1].DMAICounter)
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if (Cores[1].DMAICounter <= 0)
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{
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Cores[1].MADR = Cores[1].TADR;
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if (!SPU2_dummy_callback)
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@ -1521,11 +1524,12 @@ static void __fastcall RegWrite_Core(u16 value)
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return;
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}
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thiscore.AutoDMACtrl = value;
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if (value == 0 && thiscore.AdmaInProgress)
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if (!(value & 0x3) && thiscore.AdmaInProgress)
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{
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// Kill the current transfer so it doesn't continue
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thiscore.AdmaInProgress = 0;
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thiscore.InputDataLeft = 0;
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thiscore.DMAICounter = 0;
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}
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break;
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