mirror of https://github.com/PCSX2/pcsx2.git
VIF MSCAL instructions wait on VU T-Bit stop (#3539)
* VIF MSCAL instructions wait on VU T-Bit stop Fixes: The Sims Spiderman 3 Sharks Tale Maybe some bits of Over the Hedge * Removed Spiderman 3 patches * Fix VIF DMA resuming when stalled on tag * Remove warning which doesn't really need to be there anymore
This commit is contained in:
parent
105478aa6d
commit
e04d86ad39
|
@ -17082,20 +17082,10 @@ Serial = SLES-54723
|
|||
Name = Spider-Man 3
|
||||
Region = PAL-E
|
||||
Compat = 4
|
||||
[patches = 0C881B25]
|
||||
comment=Patch by Kozarovv
|
||||
// Fixes hang before loading level 2.
|
||||
patch=1,EE,0044bae4,word,000002ff
|
||||
[/patches]
|
||||
---------------------------------------------
|
||||
Serial = SLES-54724
|
||||
Name = Spider-Man 3
|
||||
Region = PAL-M4
|
||||
[patches = C529B0AD]
|
||||
comment=Patch by Kozarovv
|
||||
// Fixes hang before loading level 2.
|
||||
patch=1,EE,0044bae4,word,000002ff
|
||||
[/patches]
|
||||
---------------------------------------------
|
||||
Serial = SLES-54727
|
||||
Name = Naruto - Uzumaki Chronicles
|
||||
|
@ -19263,11 +19253,6 @@ Region = NTSC-K
|
|||
Serial = SLKA-25385
|
||||
Name = Spider-Man 3
|
||||
Region = NTSC-K
|
||||
[patches = B35F8AAE]
|
||||
comment=Patch by Kozarovv and Arapapa
|
||||
// Fixes hang before loading level 2.
|
||||
patch=1,EE,0044bc64,word,000002ff //400002ff
|
||||
[/patches]
|
||||
---------------------------------------------
|
||||
Serial = SLKA-25388
|
||||
Name = One Piece - Grand Adventure
|
||||
|
@ -34272,11 +34257,6 @@ Region = NTSC-J
|
|||
Serial = SLPS-25823
|
||||
Name = Spider-Man 3
|
||||
Region = NTSC-J
|
||||
[patches = 9295A3BE]
|
||||
comment=Patch by Kozarovv and Arapapa
|
||||
// Fixes hang before loading level 2.
|
||||
patch=1,EE,0044bde4,word,000002ff //400002ff
|
||||
[/patches]
|
||||
---------------------------------------------
|
||||
Serial = SLPS-25825
|
||||
Name = Zero no Tsukaima [Best Collection]
|
||||
|
@ -42254,11 +42234,6 @@ Serial = SLUS-21552
|
|||
Name = Spider-Man 3
|
||||
Region = NTSC-U
|
||||
Compat = 4
|
||||
[patches = 29873A0C]
|
||||
comment= Patch by Kozarovv
|
||||
// Fixes hang before loading level 2.
|
||||
patch=1,EE,0044bae4,word,000002ff
|
||||
[/patches]
|
||||
---------------------------------------------
|
||||
Serial = SLUS-21553
|
||||
Name = Lumines Plus
|
||||
|
|
|
@ -25,7 +25,7 @@ u32 g_vif0Cycles = 0;
|
|||
// because its vif stalling not the EE core...
|
||||
__fi void vif0FLUSH()
|
||||
{
|
||||
if(vif0Regs.stat.VEW)
|
||||
if (VU0.VI[REG_VPU_STAT].UL & 0x5) // T bit stop or Busy
|
||||
{
|
||||
vif0.waitforvu = true;
|
||||
vif0.vifstalled.enabled = VifStallEnable(vif0ch);
|
||||
|
@ -100,8 +100,8 @@ __fi void vif0SetupTransfer()
|
|||
}
|
||||
else
|
||||
{
|
||||
//Some games (like killzone) do Tags mid unpack, the nops will just write blank data
|
||||
//to the VU's, which breaks stuff, this is where the 128bit packet will fail, so we ignore the first 2 words
|
||||
// Some games (like killzone) do Tags mid unpack, the nops will just write blank data
|
||||
// to the VU's, which breaks stuff, this is where the 128bit packet will fail, so we ignore the first 2 words
|
||||
vif0.irqoffset.value = 2;
|
||||
vif0.irqoffset.enabled = true;
|
||||
ret = VIF0transfer((u32*)&masked_tag + 2, 2, true); //Transfer Tag
|
||||
|
@ -110,8 +110,9 @@ __fi void vif0SetupTransfer()
|
|||
|
||||
if (!ret && vif0.irqoffset.enabled)
|
||||
{
|
||||
vif0.inprogress = 0; //Better clear this so it has to do it again (Jak 1)
|
||||
return; //IRQ set by VIFTransfer
|
||||
vif0.inprogress = 0; // Better clear this so it has to do it again (Jak 1)
|
||||
vif0ch.qwc = 0; // Gumball 3000 pauses the DMA when the tag stalls so we need to reset the QWC, it'll be gotten again later
|
||||
return; // IRQ set by VIFTransfer
|
||||
|
||||
}
|
||||
}
|
||||
|
@ -134,6 +135,12 @@ __fi void vif0SetupTransfer()
|
|||
|
||||
__fi void vif0VUFinish()
|
||||
{
|
||||
if (VU0.VI[REG_VPU_STAT].UL & 0x4)
|
||||
{
|
||||
CPU_INT(VIF_VU0_FINISH, 128);
|
||||
return;
|
||||
}
|
||||
|
||||
if ((VU0.VI[REG_VPU_STAT].UL & 1))
|
||||
{
|
||||
int _cycles = VU0.cycle;
|
||||
|
@ -294,7 +301,6 @@ void dmaVIF0()
|
|||
}
|
||||
else
|
||||
{
|
||||
if (vif0.irqoffset.enabled && !vif0.done) DevCon.Warning("Warning! VIF0 starting a new Chain transfer with vif offset set (Possible force stop?)");
|
||||
vif0.dmamode = VIF_CHAIN_MODE;
|
||||
vif0.done = false;
|
||||
vif0.inprogress &= ~0x1;
|
||||
|
|
|
@ -25,7 +25,7 @@ u32 g_vif1Cycles = 0;
|
|||
|
||||
__fi void vif1FLUSH()
|
||||
{
|
||||
if(vif1Regs.stat.VEW)
|
||||
if (VU0.VI[REG_VPU_STAT].UL & 0x500) // T bit stop or Busy
|
||||
{
|
||||
vif1.waitforvu = true;
|
||||
vif1.vifstalled.enabled = VifStallEnable(vif1ch);
|
||||
|
@ -196,8 +196,8 @@ __fi void vif1SetupTransfer()
|
|||
}
|
||||
else
|
||||
{
|
||||
//Some games (like killzone) do Tags mid unpack, the nops will just write blank data
|
||||
//to the VU's, which breaks stuff, this is where the 128bit packet will fail, so we ignore the first 2 words
|
||||
// Some games (like killzone) do Tags mid unpack, the nops will just write blank data
|
||||
// to the VU's, which breaks stuff, this is where the 128bit packet will fail, so we ignore the first 2 words
|
||||
vif1.irqoffset.value = 2;
|
||||
vif1.irqoffset.enabled = true;
|
||||
ret = VIF1transfer((u32*)&masked_tag + 2, 2, true); //Transfer Tag
|
||||
|
@ -206,8 +206,9 @@ __fi void vif1SetupTransfer()
|
|||
|
||||
if (!ret && vif1.irqoffset.enabled)
|
||||
{
|
||||
vif1.inprogress &= ~1; //Better clear this so it has to do it again (Jak 1)
|
||||
return; //IRQ set by VIFTransfer
|
||||
vif1.inprogress &= ~1; // Better clear this so it has to do it again (Jak 1)
|
||||
vif1ch.qwc = 0; // Gumball 3000 pauses the DMA when the tag stalls so we need to reset the QWC, it'll be gotten again later
|
||||
return; // IRQ set by VIFTransfer
|
||||
}
|
||||
}
|
||||
vif1.irqoffset.value = 0;
|
||||
|
@ -230,6 +231,12 @@ __fi void vif1SetupTransfer()
|
|||
|
||||
__fi void vif1VUFinish()
|
||||
{
|
||||
if (VU0.VI[REG_VPU_STAT].UL & 0x400)
|
||||
{
|
||||
CPU_INT(VIF_VU1_FINISH, 128);
|
||||
return;
|
||||
}
|
||||
|
||||
if (VU0.VI[REG_VPU_STAT].UL & 0x100)
|
||||
{
|
||||
int _cycles = VU1.cycle;
|
||||
|
@ -471,10 +478,10 @@ void dmaVIF1()
|
|||
}
|
||||
else
|
||||
{
|
||||
if(vif1.irqoffset.enabled && !vif1.done) DevCon.Warning("Warning! VIF1 starting a new Chain transfer with vif offset set (Possible force stop?)");
|
||||
vif1.inprogress &= ~0x1;
|
||||
vif1.dmamode = VIF_CHAIN_MODE;
|
||||
vif1.done = false;
|
||||
vif1.inprogress &= ~0x1;
|
||||
|
||||
}
|
||||
|
||||
if (vif1ch.chcr.DIR) vif1Regs.stat.FQC = std::min((u16)0x10, vif1ch.qwc);
|
||||
|
|
Loading…
Reference in New Issue