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microVU: implemented CLIP instruction + minor changes... 

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@830 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
cottonvibes 2009-03-21 04:03:14 +00:00
parent 9528571ea3
commit df95ec6b87
4 changed files with 79 additions and 6 deletions
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6
pcsx2/x86/microVU_Alloc.h
View File

@ -64,6 +64,8 @@ struct microAllocInfo {
// bit 17
// bit 18 = Used with bit 19 to make a 2-bit key for status flag instance
// bit 19
// bit 20 = Read VI(Fs) from backup memory?
// bit 21 = Read VI(Ft) from backup memory?
// bit 20 = Used with bit 21 to make a 2-bit key for clip flag instance
// bit 21
// bit 22 = Read VI(Fs) from backup memory?
// bit 23 = Read VI(Ft) from backup memory?
};

40
pcsx2/x86/microVU_Alloc.inl
View File

@ -93,6 +93,22 @@ microVUt(void) mVUanalyzeFMAC3(int Fd, int Fs, int Ft) {
analyzeReg2(Fd);
}
//------------------------------------------------------------------
// FMAC4 - Clip FMAC Opcode
//------------------------------------------------------------------
#define analyzeReg4(reg) { \
if (reg) { mVal = aMax(mVal, aReg(reg).w); } \
}
microVUt(void) mVUanalyzeFMAC4(int Fs, int Ft) {
microVU* mVU = mVUx;
int mVal = 0;
analyzeReg1(Fs);
analyzeReg4(Ft);
incCycles(mVal);
}
//------------------------------------------------------------------
// Micro VU - recPass 1 Functions
//------------------------------------------------------------------
@ -146,7 +162,7 @@ microVUt(void) mVUallocFMAC2a(int& Fs, int& Ft) {
microVUt(void) mVUallocFMAC2b(int& Ft) {
microVU* mVU = mVUx;
if (!_Ft_) return;
if (!_Ft_) { SysPrintf("microVU: If a game does this, its retarded...\n"); return; }
//if (CHECK_VU_OVERFLOW) mVUclamp1<vuIndex>(Ft, xmmT1, _X_Y_Z_W);
mVUsaveReg<vuIndex>(Ft, (uptr)&mVU->regs->VF[_Ft_].UL[0], _X_Y_Z_W);
}
@ -564,6 +580,28 @@ microVUt(void) mVUallocFMAC16b(int& ACCw, int& ACCr) {
mVUallocFMAC14b<vuIndex>(ACCw, ACCr);
}
//------------------------------------------------------------------
// FMAC17 - CLIP FMAC Opcode
//------------------------------------------------------------------
#define getReg9(reg, _reg_) { \
mVUloadReg<vuIndex>(reg, (uptr)&mVU->regs->VF[_reg_].UL[0], 1); \
if (CHECK_VU_EXTRA_OVERFLOW) mVUclamp2<vuIndex>(reg, xmmT1, 1); \
mVUunpack_xyzw<vuIndex>(reg, reg, 3); \
}
microVUt(void) mVUallocFMAC17a(int& Fs, int& Ft) {
microVU* mVU = mVUx;
Fs = xmmFs;
Ft = xmmFt;
getReg6(Fs, _Fs_);
getReg9(Ft, _Ft_);
}
microVUt(void) mVUallocFMAC17b(int& ACC, int& Fs) {
//mVUallocFMAC4b<vuIndex>(ACC, Fs);
}
//------------------------------------------------------------------
// FMAC18 - OPMULA FMAC Opcode
//------------------------------------------------------------------

3
pcsx2/x86/microVU_Misc.h
View File

@ -183,9 +183,10 @@ declareAllVariables
#define fsInstance ((mVUinfo >> 12) & 3)
#define fpsInstance ((((mVUinfo>>12) & 3) - 1) & 0x3)
#define fcInstance ((mVUinfo >> 14) & 3)
#define fvcInstance ((mVUinfo >> 14) & 3)
#define fpcInstance ((((mVUinfo>>14) & 3) - 1) & 0x3)
#define fvmInstance ((mVUinfo >> 16) & 3)
#define fvsInstance ((mVUinfo >> 18) & 3)
#define fvcInstance ((mVUinfo >> 20) & 3)
//#define getFs (mVUinfo & (1<<13))
//#define getFt (mVUinfo & (1<<14))

36
pcsx2/x86/microVU_Upper.inl
View File

@ -447,7 +447,7 @@ microVUf(void) mVU_ABS() {
int Fs, Ft;
mVUallocFMAC2a<vuIndex>(Fs, Ft);
SSE_ANDPS_M128_to_XMM(Fs, (uptr)mVU_absclip);
mVUallocFMAC1b<vuIndex>(Ft);
mVUallocFMAC2b<vuIndex>(Ft);
}
}
microVUf(void) mVU_ADD() { mVU_FMAC1(ADD); }
@ -582,5 +582,37 @@ microVUf(void) mVU_ITOF0() { mVU_ITOFx<vuIndex, recPass>(0); }
microVUf(void) mVU_ITOF4() { mVU_ITOFx<vuIndex, recPass>((uptr)mVU_ITOF_4); }
microVUf(void) mVU_ITOF12() { mVU_ITOFx<vuIndex, recPass>((uptr)mVU_ITOF_12); }
microVUf(void) mVU_ITOF15() { mVU_ITOFx<vuIndex, recPass>((uptr)mVU_ITOF_15); }
microVUf(void) mVU_CLIP(){}
microVUf(void) mVU_CLIP() {
microVU* mVU = mVUx;
if (!recPass) { mVUanalyzeFMAC4<vuIndex>(_Fs_, _Ft_); }
else {
int Fs, Ft;
mVUallocFMAC17a<vuIndex>(Fs, Ft);
mVUallocCFLAGa<vuIndex>(gprT1, fpcInstance);
SHL32ItoR(gprT1, 6);
SSE_ANDPS_M128_to_XMM(Ft, (uptr)mVU_absclip);
SSE_MOVAPS_XMM_to_XMM(xmmT1, Ft);
SSE_ORPS_M128_to_XMM(xmmT1, (uptr)mVU_signbit);
SSE_CMPNLEPS_XMM_to_XMM(xmmT1, Fs); //-w, -z, -y, -x
SSE_CMPLTPS_XMM_to_XMM(Ft, Fs); //+w, +z, +y, +x
SSE_MOVAPS_XMM_to_XMM(Fs, Ft); //Fs = +w, +z, +y, +x
SSE_UNPCKLPS_XMM_to_XMM(Ft, xmmT1); //Ft = -y,+y,-x,+x
SSE_UNPCKHPS_XMM_to_XMM(Fs, xmmT1); //Fs = -w,+w,-z,+z
SSE_MOVMSKPS_XMM_to_R32(gprT2, Fs); // -w,+w,-z,+z
AND32ItoR(gprT2, 0x3);
SHL32ItoR(gprT2, 4);
OR32RtoR (gprT1, gprT2);
SSE_MOVMSKPS_XMM_to_R32(gprT2, Ft); // -y,+y,-x,+x
AND32ItoR(gprT2, 0xf);
OR32RtoR (gprT1, gprT2);
AND32ItoR(gprT1, 0xffffff);
mVUallocCFLAGb<vuIndex>(gprT1, fcInstance);
}
}
#endif //PCSX2_MICROVU