mirror of https://github.com/PCSX2/pcsx2.git
ZeroSpu2: Add some placeholders for new iop dma code.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@2574 96395faa-99c1-11dd-bbfe-3dabce05a288
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@ -155,7 +155,7 @@ int ADMASWrite(int core)
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return 1;
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}
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void CALLBACK SPU2writeDMAMem(u16* pMem, int size, int core)
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void SPU2writeDMAMem(u16* pMem, int size, int core)
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{
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u32 spuaddr;
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ADMA *Adma;
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@ -226,6 +226,27 @@ void CALLBACK SPU2writeDMAMem(u16* pMem, int size, int core)
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interrupt |= (1 << (core + 1));
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}
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void CALLBACK SPU2interruptDMA(int dma)
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{
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s32 core, offset;
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if (dma == 4)
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{
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core = 0;
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offset = 0;
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}
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else
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{
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core = 1;
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offset = 0x0400;
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}
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SPU2_LOG("SPU2 interruptDMA%d\n", dma);
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spu2Rs16(REG_C0_CTRL + offset) &= ~0x30;
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spu2Ru16(REG_C0_SPUSTAT + offset) |= 0x80;
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}
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#ifndef ENABLE_NEW_IOPDMA_SPU2
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void CALLBACK SPU2writeDMA4Mem(u16* pMem, int size)
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{
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LOG_CALLBACK("SPU2writeDMA4Mem()\n");
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@ -238,34 +259,33 @@ void CALLBACK SPU2writeDMA7Mem(u16* pMem, int size)
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SPU2writeDMAMem(pMem, size, 1);
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}
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void CALLBACK SPU2interruptDMA(int core)
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{
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s32 dma, offset;
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if (core == 0)
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{
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dma = 4;
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offset = 0;
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}
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else
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{
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dma = 7;
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offset = 0x0400;
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}
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SPU2_LOG("SPU2 interruptDMA%d\n", dma);
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spu2Rs16(REG_C0_CTRL + offset) &= ~0x30;
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spu2Ru16(REG_C0_SPUSTAT + offset) |= 0x80;
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}
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void CALLBACK SPU2interruptDMA4()
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{
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LOG_CALLBACK("SPU2interruptDMA4()\n");
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SPU2interruptDMA(0);
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SPU2interruptDMA(4);
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}
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void CALLBACK SPU2interruptDMA7()
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{
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LOG_CALLBACK("SPU2interruptDMA7()\n");
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SPU2interruptDMA(1);
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SPU2interruptDMA(7);
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}
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#else
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s32 CALLBACK SPU2dmaRead(s32 channel, u32* data, u32 bytesLeft, u32* bytesProcessed)
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{
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// Needs implementation.
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return 0;
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}
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s32 CALLBACK SPU2dmaWrite(s32 channel, u32* data, u32 bytesLeft, u32* bytesProcessed)
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{
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// Needs implementation.
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return 0;
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}
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void CALLBACK SPU2dmaInterrupt(s32 channel)
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{
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LOG_CALLBACK("SPU2dmaInterruptDMA()\n");
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SPU2interruptDMA(channel);
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}
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#endif
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