mirror of https://github.com/PCSX2/pcsx2.git
x86/iR5900: Always break rec blocks on SYSCALL/BREAK
In all cases except for GetOsdConfigParam/GetOsdConfigParam2 the HLE syscall handler will raise the CPU exception, changing the PC. So, there's no point compiling the rest of the block, especially when it may contain garbage code. No point checking the PC either, as in almost every case, it will have changed. So just go straight to the dispatcher. Note this will have a slight behavioral change - both SYSCALL/BREAK will check the cycle count for an event test now, whereas before only BREAK did. But I doubt this'll cause any issues.
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@ -756,15 +756,7 @@ void R5900::Dynarec::OpcodeImpl::recSYSCALL()
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EE::Profiler.EmitOp(eeOpcode::SYSCALL);
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recCall(R5900::Interpreter::OpcodeImpl::SYSCALL);
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xCMP(ptr32[&cpuRegs.pc], pc);
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j8Ptr[0] = JE8(0);
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xADD(ptr32[&cpuRegs.cycle], scaleblockcycles());
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// Note: technically the address is 0x8000_0180 (or 0x180)
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// (if CPU is booted)
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xJMP((void*)DispatcherReg);
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x86SetJ8(j8Ptr[0]);
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//g_branch = 2;
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g_branch = 2; // Indirect branch with event check.
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}
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////////////////////////////////////////////////////
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@ -773,13 +765,7 @@ void R5900::Dynarec::OpcodeImpl::recBREAK()
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EE::Profiler.EmitOp(eeOpcode::BREAK);
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recCall(R5900::Interpreter::OpcodeImpl::BREAK);
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xCMP(ptr32[&cpuRegs.pc], pc);
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j8Ptr[0] = JE8(0);
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xADD(ptr32[&cpuRegs.cycle], scaleblockcycles());
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xJMP((void*)DispatcherEvent);
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x86SetJ8(j8Ptr[0]);
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//g_branch = 2;
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g_branch = 2; // Indirect branch with event check.
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}
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// Size is in dwords (4 bytes)
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@ -2334,6 +2320,11 @@ static void recRecompile(const u32 startpc)
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s_nEndBlock = i + 8;
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goto StartRecomp;
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}
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else if (_Funct_ == 12 || _Funct_ == 13) // SYSCALL, BREAK
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{
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s_nEndBlock = i + 4; // No delay slot.
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goto StartRecomp;
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}
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break;
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case 1: // regimm
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