diff --git a/pcsx2/x86/microVU_Analyze.inl b/pcsx2/x86/microVU_Analyze.inl
index e6f64b47e1..ae637f2c8e 100644
--- a/pcsx2/x86/microVU_Analyze.inl
+++ b/pcsx2/x86/microVU_Analyze.inl
@@ -441,6 +441,7 @@ __ri int mVUbranchCheck(mV) {
 	if (!mVUcount) return 0;
 	incPC(-2);
 	if (mVUlow.branch) {
+		u32 branchType = mVUlow.branch;
 		if (doBranchInDelaySlot) {
 			mVUlow.badBranch  = 1;
 			incPC(2);
@@ -450,13 +451,15 @@ __ri int mVUbranchCheck(mV) {
 			mVUregs.flagInfo   = 0;
 			mVUregs.fullFlags0 = 0;
 			mVUregs.fullFlags1 = 0;
-			DevCon.Warning("microVU%d Warning: Branch in Branch delay slot! [%04x]", mVU.index, xPC);
+			DevCon.Warning("microVU%d Warning: Branch[%d] in Branch[%d] delay slot! [%04x]",
+							mVU.index, branchType, mVUlow.branch, xPC);
 			return 1;
 		}
 		else {
 			incPC(2);
 			mVUlow.isNOP = 1;
-			DevCon.Warning("microVU%d Warning: Branch in Branch delay slot! [%04x]", mVU.index, xPC);
+			DevCon.Warning("microVU%d Warning: Branch[%d] in Branch[%d] delay slot! [%04x]",
+							mVU.index, branchType, mVUlow.branch, xPC);
 			return 0;
 		}
 	}
@@ -489,8 +492,8 @@ __fi void mVUanalyzeNormBranch(mV, int It, bool isBAL) {
 }
 
 __ri void mVUanalyzeJump(mV, int Is, int It, bool isJALR) {
-	mVUbranchCheck(mVU);
 	mVUlow.branch = (isJALR) ? 10 : 9;
+	mVUbranchCheck(mVU);
 	if (mVUconstReg[Is].isValid && doConstProp) {
 		mVUlow.constJump.isValid  = 1;
 		mVUlow.constJump.regValue = mVUconstReg[Is].regValue;
diff --git a/pcsx2/x86/microVU_Compile.inl b/pcsx2/x86/microVU_Compile.inl
index b2070ff462..fc9029b6cc 100644
--- a/pcsx2/x86/microVU_Compile.inl
+++ b/pcsx2/x86/microVU_Compile.inl
@@ -435,19 +435,19 @@ void* mVUcompile(microVU& mVU, u32 startPC, uptr pState) {
 		mVUincCycles(mVU, 1);
 		mVUopU(mVU, 0);
 		mVUcheckBadOp(mVU);
-		if (curI & _Ebit_)	  { eBitPass1(mVU, branch); }
-		if (curI & _DTbit_)	  { branch = 4; }
-		if (curI & _Mbit_)	  { mVUup.mBit = 1; }
-		if (curI & _Ibit_)	  { mVUlow.isNOP = 1; mVUup.iBit = 1; }
-		else				  { incPC(-1); mVUopL(mVU, 0); incPC(1); }
+		if (curI & _Ebit_)  { eBitPass1(mVU, branch); }
+		if (curI & _DTbit_) { branch = 4; }
+		if (curI & _Mbit_)  { mVUup.mBit = 1; }
+		if (curI & _Ibit_)  { mVUlow.isNOP = 1; mVUup.iBit = 1; }
+		else			    { incPC(-1); mVUopL(mVU, 0); incPC(1); }
 		mVUsetCycles(mVU);
 		mVUinfo.readQ  =  mVU.q;
 		mVUinfo.writeQ = !mVU.q;
 		mVUinfo.readP  =  mVU.p;
 		mVUinfo.writeP = !mVU.p;
-		if		(branch >= 2) { mVUinfo.isEOB = 1; if (branch == 3) { mVUinfo.isBdelay = 1; } mVUcount++; branchWarning(mVU); break; }
-		else if (branch == 1) { branch = 2; }
-		if		(mVUbranch)   { mVUsetFlagInfo(mVU); eBitWarning(mVU); branch = 3; mVUbranch = 0; }
+		if   (branch >= 2)  { mVUinfo.isEOB = 1; if (branch == 3) { mVUinfo.isBdelay = 1; } mVUcount++; branchWarning(mVU); break; }
+		elif (branch == 1)  { branch = 2; }
+		if   (mVUbranch)    { mVUsetFlagInfo(mVU); eBitWarning(mVU); branch = 3; mVUbranch = 0; }
 		incPC(1);
 	}
 
diff --git a/pcsx2/x86/microVU_Lower.inl b/pcsx2/x86/microVU_Lower.inl
index 5e91768525..72de277c98 100644
--- a/pcsx2/x86/microVU_Lower.inl
+++ b/pcsx2/x86/microVU_Lower.inl
@@ -1228,9 +1228,9 @@ void condEvilBranch(mV, int JMPcc) {
 		xMOV(ptr32[&mVU.badBranch], branchAddrN);
 		xCMP(gprT1b, 0);
 		xForwardJump8 cJMP((JccComparisonType)JMPcc);
-			incPC(4); // Branch Not Taken
+			incPC(6); // Branch Not Taken Addr + 8
 			xMOV(ptr32[&mVU.badBranch], xPC);
-			incPC(-4);
+			incPC(-6);
 		cJMP.SetTarget();
 		return;
 	}