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microVU: 

- Minor Changes/Cleanup

Super VU:
- Used the Linux SysMmapEx address for windows as well.

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1308 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
cottonvibes 2009-06-03 06:50:13 +00:00
parent 510a23f190
commit d8fb66f143
6 changed files with 22 additions and 23 deletions
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5
pcsx2/x86/iVUzerorec.cpp
View File

@ -343,12 +343,7 @@ void SuperVUAlloc(int vuindex)
{
// upper 4 bits must be zero!
// Changed "first try base" to 0xb800000, since 0x0c000000 liked to fail a lot. (air)
// With microVU as optional now, Linux fails with 0x0e000000, and prefers 0x0c000000. --arcum42
#ifdef __LINUX__
s_recVUMem = SysMmapEx(0x0c000000, VU_EXESIZE, 0x10000000, "SuperVUAlloc");
#else
s_recVUMem = SysMmapEx(0x0e000000, VU_EXESIZE, 0x10000000, "SuperVUAlloc");
#endif
if (s_recVUMem == NULL)
{

2
pcsx2/x86/microVU.h
View File

@ -116,7 +116,7 @@ struct microVU {
u8* exitFunct; // Ptr Function to the Exit code for recompiled programs
u32 code; // Contains the current Instruction
u32 divFlag; // 1 instance of I/D flags
u32 VIbackup[2]; // Holds a backup of a VI reg if modified before a branch
u32 VIbackup; // Holds a backup of a VI reg if modified before a branch
u32 VIxgkick; // Holds a backup of a VI reg used for xgkick-delays
u32 branch; // Holds branch compare result (IBxx) OR Holds address to Jump to (JALR/JR)
u32 p; // Holds current P instance index

7
pcsx2/x86/microVU_Alloc.inl
View File

@ -687,10 +687,9 @@ microVUt(void) mVUallocVIa(mV, int GPRreg, int _reg_) {
microVUt(void) mVUallocVIb(mV, int GPRreg, int _reg_) {
if (mVUlow.backupVI) { // Backs up reg to memory (used when VI is modified b4 a branch)
MOV32RtoM((uptr)&mVU->VIbackup[1], GPRreg);
mVUallocVIa(mVU, GPRreg, _reg_);
MOV32RtoM((uptr)&mVU->VIbackup[0], GPRreg);
MOV32MtoR(GPRreg, (uptr)&mVU->VIbackup[1]);
MOVZX32M16toR(gprR, (uptr)&mVU->regs->VI[_reg_].UL);
MOV32RtoM((uptr)&mVU->VIbackup, gprR);
MOV32ItoR(gprR, Roffset);
}
if (_reg_ == 0) { return; }
else if (isMMX(_reg_)) { MOVD32RtoMMX(mmVI(_reg_), GPRreg); }

14
pcsx2/x86/microVU_Analyze.inl
View File

@ -372,12 +372,12 @@ microVUt(void) mVUanalyzeXGkick(mV, int Fs, int xCycles) {
#define analyzeBranchVI(xReg, infoVar) { \
if (xReg) { \
int i; \
int iEnd = aMin(4, mVUcount); \
int iEnd = aMin(5, mVUcount); \
int bPC = iPC; \
for (i = 0; i < iEnd; i++) { \
incPC2(-2) \
if ((mVUlow.VI_write.reg == xReg) && mVUlow.VI_write.used) { \
if (mVUlow.readFlags) break; \
if (mVUlow.readFlags || i == 5) break; \
if (i == 0) continue; \
if (((mVUlow.VI_read[0].reg == xReg) && (mVUlow.VI_read[0].used)) \
|| ((mVUlow.VI_read[1].reg == xReg) && (mVUlow.VI_read[1].used))) \
@ -402,6 +402,12 @@ microVUt(void) mVUanalyzeBranch1(mV, int Is) {
}
microVUt(void) mVUanalyzeBranch2(mV, int Is, int It) {
if (mVUregs.VI[Is] || mVUregs.VI[It] || mVUstall) { analyzeVIreg1(Is, mVUlow.VI_read[0]); analyzeVIreg1(It, mVUlow.VI_read[1]); }
else { analyzeBranchVI(Is, mVUlow.memReadIs); analyzeBranchVI(It, mVUlow.memReadIt);}
if (mVUregs.VI[Is] || mVUregs.VI[It] || mVUstall) {
analyzeVIreg1(Is, mVUlow.VI_read[0]);
analyzeVIreg1(It, mVUlow.VI_read[1]);
}
else {
analyzeBranchVI(Is, mVUlow.memReadIs);
analyzeBranchVI(It, mVUlow.memReadIt);
}
}

1
pcsx2/x86/microVU_IR.h
View File

@ -98,7 +98,6 @@ struct microLowerOp {
bool backupVI; // Backup VI reg to memory if modified before branch (branch uses old VI value unless opcode is ILW or ILWR)
bool memReadIs; // Read Is (VI reg) from memory (used by branches)
bool memReadIt; // Read If (VI reg) from memory (used by branches)
bool writesVI; // Current Instruction writes to VI (used by branches; note that flag-modifying opcodes shouldn't set this)
bool readFlags; // Current Instruction reads Status, Mac, or Clip flags
};

16
pcsx2/x86/microVU_Lower.inl
View File

@ -1112,9 +1112,9 @@ mVUop(mVU_IBEQ) {
setBranchA(3, 0);
pass1 { mVUanalyzeBranch2(mVU, _Is_, _It_); }
pass2 {
if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup[0]);
if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup);
else mVUallocVIa(mVU, gprT1, _Is_);
if (mVUlow.memReadIt) XOR32MtoR(gprT1, (uptr)&mVU->VIbackup[0]);
if (mVUlow.memReadIt) XOR32MtoR(gprT1, (uptr)&mVU->VIbackup);
else { mVUallocVIa(mVU, gprT2, _It_); XOR32RtoR(gprT1, gprT2); }
MOV32RtoM((uptr)&mVU->branch, gprT1);
}
@ -1125,7 +1125,7 @@ mVUop(mVU_IBGEZ) {
setBranchA(4, 0);
pass1 { mVUanalyzeBranch1(mVU, _Is_); }
pass2 {
if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup[0]);
if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup);
else mVUallocVIa(mVU, gprT1, _Is_);
MOV32RtoM((uptr)&mVU->branch, gprT1);
}
@ -1136,7 +1136,7 @@ mVUop(mVU_IBGTZ) {
setBranchA(5, 0);
pass1 { mVUanalyzeBranch1(mVU, _Is_); }
pass2 {
if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup[0]);
if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup);
else mVUallocVIa(mVU, gprT1, _Is_);
MOV32RtoM((uptr)&mVU->branch, gprT1);
}
@ -1147,7 +1147,7 @@ mVUop(mVU_IBLEZ) {
setBranchA(6, 0);
pass1 { mVUanalyzeBranch1(mVU, _Is_); }
pass2 {
if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup[0]);
if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup);
else mVUallocVIa(mVU, gprT1, _Is_);
MOV32RtoM((uptr)&mVU->branch, gprT1);
}
@ -1158,7 +1158,7 @@ mVUop(mVU_IBLTZ) {
setBranchA(7, 0);
pass1 { mVUanalyzeBranch1(mVU, _Is_); }
pass2 {
if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup[0]);
if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup);
else mVUallocVIa(mVU, gprT1, _Is_);
MOV32RtoM((uptr)&mVU->branch, gprT1);
}
@ -1169,9 +1169,9 @@ mVUop(mVU_IBNE) {
setBranchA(8, 0);
pass1 { mVUanalyzeBranch2(mVU, _Is_, _It_); }
pass2 {
if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup[0]);
if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup);
else mVUallocVIa(mVU, gprT1, _Is_);
if (mVUlow.memReadIt) XOR32MtoR(gprT1, (uptr)&mVU->VIbackup[0]);
if (mVUlow.memReadIt) XOR32MtoR(gprT1, (uptr)&mVU->VIbackup);
else { mVUallocVIa(mVU, gprT2, _It_); XOR32RtoR(gprT1, gprT2); }
MOV32RtoM((uptr)&mVU->branch, gprT1);
}