mirror of https://github.com/PCSX2/pcsx2.git
formated and cleaned up counters.c a little bit.
git-svn-id: http://pcsx2-playground.googlecode.com/svn/trunk@182 a6443dda-0b58-4228-96e9-037be469359c
This commit is contained in:
cottonvibes
Gregory Hainaut
parent
706dc3689b
commit
d63edda5ca
299
pcsx2/Counters.c
299
pcsx2/Counters.c
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@ -62,31 +62,23 @@ void rcntSet() {
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for (i = 0; i < 4; i++) {
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if (!(counters[i].mode & 0x80) || (counters[i].mode & 0x3) == 0x3) continue; // Stopped
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c = ((0x10000 - counters[i].count) * counters[i].rate) - (cpuRegs.cycle - counters[i].sCycleT);
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if (c < nextCounter) {
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nextCounter = c;
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}
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// the + 10 is just in case of overflow
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//if(!(counters[i].mode & 0x100) || counters[i].target > 0xffff) continue;
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c = ((counters[i].target - counters[i].count) * counters[i].rate) - (cpuRegs.cycle - counters[i].sCycleT);
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if (c < nextCounter) {
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nextCounter = c;
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}
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c = ((0x10000 - counters[i].count) * counters[i].rate) - (cpuRegs.cycle - counters[i].sCycleT);
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if (c < nextCounter) nextCounter = c;
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//if(!(counters[i].mode & 0x100) || counters[i].target > 0xffff) continue;
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c = ((counters[i].target - counters[i].count) * counters[i].rate) - (cpuRegs.cycle - counters[i].sCycleT);
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if (c < nextCounter) nextCounter = c;
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}
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//Calculate HBlank
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c = counters[4].CycleT - (cpuRegs.cycle - counters[4].sCycleT);
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if (c < nextCounter) {
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nextCounter = c;
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}
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if (c < nextCounter) nextCounter = c;
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//if(nextCounter > 0x1000) SysPrintf("Nextcounter %x HBlank %x VBlank %x\n", nextCounter, c, counters[5].CycleT - (cpuRegs.cycle - counters[5].sCycleT));
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//Calculate VBlank
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c = counters[5].CycleT - (cpuRegs.cycle - counters[5].sCycleT);
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if (c < nextCounter) {
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nextCounter = c;
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}
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if (c < nextCounter) nextCounter = c;
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}
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void rcntInit() {
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@ -106,8 +98,6 @@ void rcntInit() {
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counters[4].mode = 0x3c0; // The VSync counter mode
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counters[5].mode = 0x3c0;
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UpdateVSyncRate();
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/*hblankend = 0;
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counters[5].mode &= ~0x10000;
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@ -166,16 +156,15 @@ void UpdateVSyncRate() {
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if (Config.PsxType & 1) {
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SysPrintf("PAL\n");
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counters[4].Cycle = 227000;
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/*if(Config.PsxType & 2)counters[5].rate = PS2VBLANK_PAL_INT;
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else counters[5].rate = PS2VBLANK_PAL;*/
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//if(Config.PsxType & 2)counters[5].rate = PS2VBLANK_PAL_INT;
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//else counters[5].rate = PS2VBLANK_PAL;
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counters[5].Cycle = 720;
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} else {
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}
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else {
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SysPrintf("NTSC\n");
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counters[4].Cycle = 227000;
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/*if(Config.PsxType & 2)counters[5].rate = PS2VBLANK_NTSC_INT;
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else counters[5].rate = PS2VBLANK_NTSC;*/
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//if(Config.PsxType & 2)counters[5].rate = PS2VBLANK_NTSC_INT;
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//else counters[5].rate = PS2VBLANK_NTSC;
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counters[5].Cycle = 720;
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}
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@ -190,39 +179,35 @@ void UpdateVSyncRate() {
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//rcntUpdTarget(4);
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//counters[4].CycleT = counters[4].rate;
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///rcntUpdTarget(5);
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/*counters[5].CycleT = counters[5].rate;
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counters[5].Cycle = PS2VBLANKEND;*/
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//rcntUpdTarget(5);
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//counters[5].CycleT = counters[5].rate;
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//counters[5].Cycle = PS2VBLANKEND;
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{
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if (Config.CustomFps > 0) {
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iTicks = GetTickFrequency() / Config.CustomFps;
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SysPrintf("Framelimiter rate updated (UpdateVSyncRate): %d fps\n", Config.CustomFps);
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}
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else if (Config.PsxType & 1) {
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iTicks = (GetTickFrequency() / 5000) * 100;
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SysPrintf("Framelimiter rate updated (UpdateVSyncRate): 50 fps\n");
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}
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else {
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iTicks = (GetTickFrequency() / 5994) * 100;
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SysPrintf("Framelimiter rate updated (UpdateVSyncRate): 59.94 fps\n");
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}
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if (Config.CustomFps > 0) {
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iTicks = GetTickFrequency() / Config.CustomFps;
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SysPrintf("Framelimiter rate updated (UpdateVSyncRate): %d fps\n", Config.CustomFps);
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}
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else if (Config.PsxType & 1) {
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iTicks = (GetTickFrequency() / 5000) * 100;
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SysPrintf("Framelimiter rate updated (UpdateVSyncRate): 50 fps\n");
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}
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else {
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iTicks = (GetTickFrequency() / 5994) * 100;
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SysPrintf("Framelimiter rate updated (UpdateVSyncRate): 59.94 fps\n");
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}
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rcntSet();
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}
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void FrameLimiter()
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{
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static u64 iStart=0, iEnd=0, iExpectedEnd=0;
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if(iStart==0) iStart = GetCPUTicks();
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if (iStart==0) iStart = GetCPUTicks();
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iExpectedEnd = iStart + iTicks;
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iEnd = GetCPUTicks();
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if(iEnd>=iExpectedEnd)
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{
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if (iEnd>=iExpectedEnd) {
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u64 diff = iEnd-iExpectedEnd;
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if((diff>>3)>iTicks) iExpectedEnd=iEnd;
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}
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@ -230,6 +215,7 @@ void FrameLimiter()
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Sleep(1);
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iEnd = GetCPUTicks();
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} while(iEnd<iExpectedEnd);
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iStart = iExpectedEnd; //remember the expected value frame. improves smoothness
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}
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@ -245,7 +231,6 @@ extern void DummyExecuteVU1Block(void);
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#include "VU.h"
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void VSync()
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{
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if (counters[5].mode & 0x10000) { // VSync End (22 hsyncs)
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// swap the vsync field
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@ -336,7 +321,6 @@ void VSync()
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}
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}
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} else { // VSync Start (240 hsyncs)
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//UpdateVSyncRateEnd();
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#ifdef EE_PROFILING
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if( (iFrame%20) == 0 ) {
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SysPrintf("Profiled Cycles at %d frames %d\n", iFrame, profile_totalticks);
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@ -344,15 +328,6 @@ void VSync()
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}
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#endif
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//SysPrintf("c: %x, %x\n", cpuRegs.cycle, *(u32*)&VU1.Micro[16]);
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//if( (iFrame%20) == 0 ) SysPrintf("svu time: %d\n", SuperVUGetRecTimes(1) * 100000 / lfreq.QuadPart);
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// if( (iFrame%10) == 0 ) {
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// SysPrintf("vu0 time: %d\n", vu0time);
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// vu0time = 0;
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// }
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#ifdef PCSX2_DEVBUILD
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if( g_TestRun.enabled && g_TestRun.frame > 0 ) {
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if( iFrame > g_TestRun.frame ) {
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@ -425,22 +400,13 @@ void VSync()
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}
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#endif
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//counters[5].mode&= ~0x10000;
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//UpdateVSyncRate();
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//SysPrintf("ctrs: %d %d %d %d\n", g_nCounters[0], g_nCounters[1], g_nCounters[2], g_nCounters[3]);
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//SysPrintf("vif: %d\n", (((LARGE_INTEGER*)g_nCounters)->QuadPart * 1000000) / lfreq.QuadPart);
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//memset(g_nCounters, 0, 16);
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counters[5].mode|= 0x10000;
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if ((CSRw & 0x8))
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GSCSRr|= 0x8;
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if (!(GSIMR&0x800) )
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gsIrq();
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counters[5].mode|= 0x10000;
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if ((CSRw & 0x8)) GSCSRr|= 0x8;
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if (!(GSIMR&0x800)) gsIrq();
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hwIntcIrq(2);
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psxVSyncStart();
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@ -448,55 +414,49 @@ void VSync()
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if(Config.Patch) applypatch(1);
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if(gates)rcntStartGate(0x8);
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// __Log("%u %u 0\n", cpuRegs.cycle-s_lastvsync[1], timeGetTime()-s_lastvsync[0]);
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// s_lastvsync[0] = timeGetTime();
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// s_lastvsync[1] = cpuRegs.cycle;
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//__Log("%u %u 0\n", cpuRegs.cycle-s_lastvsync[1], timeGetTime()-s_lastvsync[0]);
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//s_lastvsync[0] = timeGetTime();
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//s_lastvsync[1] = cpuRegs.cycle;
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}
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}
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void rcntUpdate()
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{
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int i;
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u32 change = 0;
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for (i=0; i<=3; i++) {
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if(gates & (1<<i) ){
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if(gates & (1<<i) ) {
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//SysPrintf("Stopped accidental update of ee counter %x when using a gate\n", i);
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continue;
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}
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if ((counters[i].mode & 0x80) && (counters[i].mode & 0x3) != 0x3){
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change = cpuRegs.cycle - counters[i].sCycleT;
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counters[i].count += (int)(change / counters[i].rate);
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change -= (change / counters[i].rate) * counters[i].rate;
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} else change = 0;
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}
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if ((counters[i].mode & 0x80) && (counters[i].mode & 0x3) != 0x3) {
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change = cpuRegs.cycle - counters[i].sCycleT;
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counters[i].count += (int)(change / counters[i].rate);
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change -= (change / counters[i].rate) * counters[i].rate;
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}
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else change = 0;
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counters[i].sCycleT = cpuRegs.cycle - change;
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//if(change > 0) SysPrintf("Change saved on %x = %x\n", i, change);
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}
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if ((u32)(cpuRegs.cycle - counters[4].sCycleT) >= (u32)counters[4].CycleT && hblankend == 1){
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if ((u32)(cpuRegs.cycle - counters[4].sCycleT) >= (u32)counters[4].CycleT && hblankend == 1) {
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if ((CSRw & 0x4))
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GSCSRr |= 4; // signal
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if (!(GSIMR&0x400) )
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gsIrq();
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if(gates)rcntEndGate(0);
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if(psxhblankgate)psxCheckEndGate(0);
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if (CSRw & 0x4) GSCSRr |= 4; // signal
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if (!(GSIMR&0x400)) gsIrq();
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if (gates) rcntEndGate(0);
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if (psxhblankgate) psxCheckEndGate(0);
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hblankend = 0;
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counters[4].CycleT = HBLANKCNT(counters[4].count);
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} else
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if ((u32)(cpuRegs.cycle - counters[4].sCycleT) >= (u32)counters[4].CycleT) {
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}
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else if ((u32)(cpuRegs.cycle - counters[4].sCycleT) >= (u32)counters[4].CycleT) {
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if(counters[4].count >= counters[4].Cycle){
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if(counters[4].count >= counters[4].Cycle) {
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//SysPrintf("%x of %x hblanks reorder in %x cycles cpuRegs.cycle = %x\n", counters[4].count, counters[4].Cycle, cpuRegs.cycle - counters[4].sCycleT, cpuRegs.cycle);
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counters[4].sCycleT += HBLANKCNT(counters[4].Cycle);
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counters[4].count -= counters[4].Cycle;
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}
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}
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//counters[4].sCycleT += HBLANKCNT(1);
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counters[4].count++;
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@ -509,94 +469,84 @@ void rcntUpdate()
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//SysPrintf("%x hsync done in %x cycles cpuRegs.cycle = %x next will happen on %x\n", counters[4].count, counters[4].CycleT, cpuRegs.cycle, (u32)(counters[4].sCycleT + counters[4].CycleT));
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}
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if((counters[5].mode & 0x10000)){
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if((counters[5].mode & 0x10000)) {
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if ((cpuRegs.cycle - counters[5].sCycleT) >= counters[5].CycleT){
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//counters[5].sCycleT = cpuRegs.cycle;
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counters[5].CycleT = VBLANKCNT(counters[5].count);
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VSync();
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}
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} else if ((cpuRegs.cycle - counters[5].sCycleT) >= counters[5].CycleT) {
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if(counters[5].count >= counters[5].Cycle){
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//SysPrintf("reset %x of %x frames done in %x cycles cpuRegs.cycle = %x\n", counters[5].count, counters[5].Cycle, cpuRegs.cycle - counters[5].sCycleT, cpuRegs.cycle);
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counters[5].sCycleT += VBLANKCNT(counters[5].Cycle);
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counters[5].count -= counters[5].Cycle;
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}
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counters[5].count++;
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//the line below brings back magna carta loading animation, but breaks vsyncs >< (rama)
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//counters[5].sCycleT += VBLANKCNT(1);
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counters[5].CycleT = VBLANKCNT(counters[5].count) - (VBLANKCNT(1)/2);
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//SysPrintf("%x frames done in %x cycles cpuRegs.cycle = %x cycletdiff %x\n", counters[5].Cycle, counters[5].sCycleT, cpuRegs.cycle, (counters[5].CycleT - VBLANKCNT(1)) - (cpuRegs.cycle - counters[5].sCycleT));
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//counters[5].sCycleT = cpuRegs.cycle;
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counters[5].CycleT = VBLANKCNT(counters[5].count);
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VSync();
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}
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}
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else if ((cpuRegs.cycle - counters[5].sCycleT) >= counters[5].CycleT) {
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if(counters[5].count >= counters[5].Cycle) {
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//SysPrintf("reset %x of %x frames done in %x cycles cpuRegs.cycle = %x\n", counters[5].count, counters[5].Cycle, cpuRegs.cycle - counters[5].sCycleT, cpuRegs.cycle);
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counters[5].sCycleT += VBLANKCNT(counters[5].Cycle);
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counters[5].count -= counters[5].Cycle;
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}
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counters[5].count++;
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//counters[5].sCycleT += VBLANKCNT(1); //this line brings back magna carta loading animation, but breaks vsyncs >< (rama)
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counters[5].CycleT = VBLANKCNT(counters[5].count) - (VBLANKCNT(1)/2);
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//SysPrintf("%x frames done in %x cycles cpuRegs.cycle = %x cycletdiff %x\n", counters[5].Cycle, counters[5].sCycleT, cpuRegs.cycle, (counters[5].CycleT - VBLANKCNT(1)) - (cpuRegs.cycle - counters[5].sCycleT));
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VSync();
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}
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for (i=0; i<=3; i++) {
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if (!(counters[i].mode & 0x80)) continue; // Stopped
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if ((s64)(counters[i].target - counters[i].count) <= 0 /*&& (counters[i].target & 0xffff) > 0*/) { // Target interrupt
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if((counters[i].target > 0xffff)) {
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//SysPrintf("EE Correcting target %x after reset on target\n", i);
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counters[i].target &= 0xffff;
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}
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//if((counters[i].target > 0xffff)) {
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//SysPrintf("EE Correcting target %x after reset on target\n", i);
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counters[i].target &= 0xffff;
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//}
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if(counters[i].mode & 0x100 ) {
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#ifdef EECNT_LOG
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EECNT_LOG("EE counter %d target reached mode %x count %x target %x\n", i, counters[i].mode, counters[i].count, counters[i].target);
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#endif
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EECNT_LOG("EE counter %d target reached mode %x count %x target %x\n", i, counters[i].mode, counters[i].count, counters[i].target);
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counters[i].mode|= 0x0400; // Target flag
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hwIntcIrq(counters[i].interrupt);
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if (counters[i].mode & 0x40) { //The PS2 only resets if the interrupt is enabled - Tested on PS2
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counters[i].count -= counters[i].target; // Reset on target
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}
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else counters[i].target += 0x10000000;
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} else counters[i].target += 0x10000000;
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}
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else counters[i].target += 0x10000000;
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}
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if (counters[i].count > 0xffff) {
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if (counters[i].mode & 0x0200) { // Overflow interrupt
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#ifdef EECNT_LOG
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EECNT_LOG("EE counter %d overflow mode %x count %x target %x\n", i, counters[i].mode, counters[i].count, counters[i].target);
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#endif
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EECNT_LOG("EE counter %d overflow mode %x count %x target %x\n", i, counters[i].mode, counters[i].count, counters[i].target);
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counters[i].mode|= 0x0800; // Overflow flag
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hwIntcIrq(counters[i].interrupt);
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//SysPrintf("counter[%d] overflow interrupt (%x)\n", i, cpuRegs.cycle);
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}
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counters[i].count -= 0x10000;
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if(counters[i].target > 0xffff) {
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//if(counters[i].target > 0xffff) {
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//SysPrintf("EE %x Correcting target on overflow\n", i);
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counters[i].target &= 0xffff;
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}
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//}
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}
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}
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rcntSet();
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}
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void rcntWcount(int index, u32 value) {
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u32 change = 0;
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#ifdef EECNT_LOG
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EECNT_LOG("EE count write %d count %x with %x target %x eecycle %x\n", index, counters[index].count, value, counters[index].target, cpuRegs.eCycle);
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#endif
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counters[index].count = value & 0xffff;
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if(counters[index].target > 0xffff) {
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counters[index].target &= 0xffff;
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//if(counters[index].target > 0xffff) {
|
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//SysPrintf("EE Counter %x count write, target > 0xffff\n", index);
|
||||
}
|
||||
counters[index].target &= 0xffff;
|
||||
//}
|
||||
//rcntUpd(index);
|
||||
if((counters[index].mode & 0x3) != 0x3){
|
||||
change = cpuRegs.cycle - counters[index].sCycleT;
|
||||
change -= (change / counters[index].rate) * counters[index].rate;
|
||||
counters[index].sCycleT = cpuRegs.cycle - change;
|
||||
}/* else {
|
||||
if((counters[index].mode & 0x3) != 0x3) {
|
||||
change = cpuRegs.cycle - counters[index].sCycleT;
|
||||
change -= (change / counters[index].rate) * counters[index].rate;
|
||||
counters[index].sCycleT = cpuRegs.cycle - change;
|
||||
}
|
||||
/* else {
|
||||
SysPrintf("EE Counter %x count write %x\n", index, value);
|
||||
}*/
|
||||
rcntSet();
|
||||
|
|
@ -606,12 +556,11 @@ void rcntWmode(int index, u32 value)
|
|||
{
|
||||
u32 change = 0;
|
||||
|
||||
|
||||
if (value & 0xc00) { //Clear status flags, the ps2 only clears what is given in the value
|
||||
counters[index].mode &= ~(value & 0xc00);
|
||||
}
|
||||
|
||||
if(counters[index].mode & 0x80){
|
||||
if(counters[index].mode & 0x80) {
|
||||
if((counters[index].mode & 0x3) != 0x3){
|
||||
change = cpuRegs.cycle - counters[index].sCycleT;
|
||||
counters[index].count += (int)(change / counters[index].rate);
|
||||
|
|
@ -623,27 +572,25 @@ void rcntWmode(int index, u32 value)
|
|||
#ifdef PCSX2_DEVBUILD
|
||||
if(!(value & 0x80)) SysPrintf("Stopping\n");
|
||||
#endif
|
||||
}
|
||||
}
|
||||
else {
|
||||
#ifdef PCSX2_DEVBUILD
|
||||
SysPrintf("Counter %d not running c%x s%x c%x\n", index, counters[index].count, counters[index].sCycleT, cpuRegs.cycle);
|
||||
if(value & 0x80) SysPrintf("Starting %d, v%x\n", index, value);
|
||||
#endif
|
||||
counters[index].sCycleT = cpuRegs.cycle;
|
||||
}
|
||||
//if((value & 0x80) && !(counters[index].mode & 0x80)) rcntUpd(index); //Counter wasnt started, so set the start cycle
|
||||
|
||||
counters[index].mode = (counters[index].mode & 0xc00) | (value & 0x3ff);
|
||||
}
|
||||
|
||||
#ifdef EECNT_LOG
|
||||
//if((value & 0x80) && !(counters[index].mode & 0x80)) rcntUpd(index); //Counter wasnt started, so set the start cycle
|
||||
counters[index].mode = (counters[index].mode & 0xc00) | (value & 0x3ff);
|
||||
EECNT_LOG("EE counter set %d mode %x count %x\n", index, counters[index].mode, rcntCycle(index));
|
||||
#endif
|
||||
|
||||
/*if((value & 0x3) && (counters[index].mode & 0x3) != 0x3){
|
||||
//SysPrintf("Syncing %d with HBLANK clock\n", index);
|
||||
counters[index].CycleT = counters[4].CycleT;
|
||||
}*/
|
||||
|
||||
switch (value & 0x3) { //Clock rate divisers *2, they use BUSCLK speed not PS2CLK
|
||||
switch (value & 0x3) { //Clock rate divisers *2, they use BUSCLK speed not PS2CLK
|
||||
case 0: counters[index].rate = 2; break;
|
||||
case 1: counters[index].rate = 32; break;
|
||||
case 2: counters[index].rate = 512; break;
|
||||
|
|
@ -653,8 +600,9 @@ void rcntWmode(int index, u32 value)
|
|||
if((counters[index].mode & 0xF) == 0x7) {
|
||||
gates &= ~(1<<index);
|
||||
SysPrintf("Gate Disabled\n");
|
||||
// counters[index].mode &= ~0x80;
|
||||
}else if(counters[index].mode & 0x4){
|
||||
//counters[index].mode &= ~0x80;
|
||||
}
|
||||
else if (counters[index].mode & 0x4) {
|
||||
// SysPrintf("Gate enable on counter %x mode %x\n", index, counters[index].mode);
|
||||
gates |= 1<<index;
|
||||
counters[index].mode &= ~0x80;
|
||||
|
|
@ -663,11 +611,11 @@ void rcntWmode(int index, u32 value)
|
|||
else gates &= ~(1<<index);
|
||||
|
||||
/*if((counters[index].target > 0xffff) && (counters[index].target & 0xffff) > rcntCycle(index)) {
|
||||
//SysPrintf("EE Correcting target %x after mode write\n", index);
|
||||
counters[index].target &= 0xffff;
|
||||
}*/
|
||||
rcntSet();
|
||||
//SysPrintf("EE Correcting target %x after mode write\n", index);
|
||||
counters[index].target &= 0xffff;
|
||||
}*/
|
||||
|
||||
rcntSet();
|
||||
}
|
||||
|
||||
void rcntStartGate(unsigned int mode){
|
||||
|
|
@ -679,11 +627,11 @@ void rcntStartGate(unsigned int mode){
|
|||
}
|
||||
}
|
||||
|
||||
for(i=0; i <=3; i++){ //Gates for counters
|
||||
for(i=0; i <=3; i++){ //Gates for counters
|
||||
if(!(gates & (1<<i))) continue;
|
||||
if ((counters[i].mode & 0x8) != mode) continue;
|
||||
//SysPrintf("Gate %d mode %d Start\n", i, (counters[i].mode & 0x30) >> 4);
|
||||
switch((counters[i].mode & 0x30) >> 4){
|
||||
switch((counters[i].mode & 0x30) >> 4) {
|
||||
case 0x0: //Count When Signal is low (off)
|
||||
counters[i].count = rcntRcount(i);
|
||||
rcntUpd(i);
|
||||
|
|
@ -708,10 +656,10 @@ void rcntStartGate(unsigned int mode){
|
|||
}
|
||||
}
|
||||
}
|
||||
void rcntEndGate(unsigned int mode){
|
||||
void rcntEndGate(unsigned int mode) {
|
||||
int i;
|
||||
|
||||
for(i=0; i <=3; i++){ //Gates for counters
|
||||
for(i=0; i <=3; i++) { //Gates for counters
|
||||
if(!(gates & (1<<i))) continue;
|
||||
if ((counters[i].mode & 0x8) != mode) continue;
|
||||
//SysPrintf("Gate %d mode %d End\n", i, (counters[i].mode & 0x30) >> 4);
|
||||
|
|
@ -741,45 +689,38 @@ void rcntEndGate(unsigned int mode){
|
|||
}
|
||||
void rcntWtarget(int index, u32 value) {
|
||||
|
||||
#ifdef EECNT_LOG
|
||||
EECNT_LOG("EE target write %d target %x value %x\n", index, counters[index].target, value);
|
||||
#endif
|
||||
counters[index].target = value & 0xffff;
|
||||
if(counters[index].target <= rcntCycle(index)/* && counters[index].target != 0*/) {
|
||||
//SysPrintf("EE Saving target %d from early trigger, target = %x, count = %x\n", index, counters[index].target, rcntCycle(index));
|
||||
counters[index].target += 0x10000000;
|
||||
}
|
||||
if (counters[index].target <= rcntCycle(index)/* && counters[index].target != 0*/) {
|
||||
//SysPrintf("EE Saving target %d from early trigger, target = %x, count = %x\n", index, counters[index].target, rcntCycle(index));
|
||||
counters[index].target += 0x10000000;
|
||||
}
|
||||
rcntSet();
|
||||
}
|
||||
|
||||
void rcntWhold(int index, u32 value) {
|
||||
#ifdef EECNT_LOG
|
||||
EECNT_LOG("EE hold write %d value %x\n", index, value);
|
||||
#endif
|
||||
counters[index].hold = value;
|
||||
}
|
||||
|
||||
u32 rcntRcount(int index) {
|
||||
u32 ret;
|
||||
|
||||
if ((counters[index].mode & 0x80)) {
|
||||
if ((counters[index].mode & 0x80))
|
||||
ret = counters[index].count + (int)((cpuRegs.cycle - counters[index].sCycleT) / counters[index].rate);
|
||||
}else{
|
||||
else
|
||||
ret = counters[index].count;
|
||||
}
|
||||
#ifdef EECNT_LOG
|
||||
|
||||
EECNT_LOG("EE count read %d value %x\n", index, ret);
|
||||
#endif
|
||||
return ret;
|
||||
}
|
||||
|
||||
u32 rcntCycle(int index) {
|
||||
|
||||
if ((counters[index].mode & 0x80)) {
|
||||
if ((counters[index].mode & 0x80))
|
||||
return (u32)counters[index].count + (int)((cpuRegs.cycle - counters[index].sCycleT) / counters[index].rate);
|
||||
}else{
|
||||
else
|
||||
return (u32)counters[index].count;
|
||||
}
|
||||
}
|
||||
|
||||
int rcntFreeze(gzFile f, int Mode) {
|
||||
|
|
|
|||
Loading…
Reference in New Issue