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R5900: track the program counter correctly for exception handling and debugging on instructions in delay slots and set the BD bit of the Cause register appropriately. 

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@2768 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
sudonim1 2010-03-26 01:08:15 +00:00
parent 5a6a1d5a01
commit d4bc1a6275
1 changed files with 23 additions and 5 deletions
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24
pcsx2/x86/ix86-32/iR5900-32.cpp
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@ -50,7 +50,7 @@ int branch; // set for branch
__aligned16 GPR_reg64 g_cpuConstRegs[32] = {0};
u32 g_cpuHasConstReg = 0, g_cpuFlushedConstReg = 0;
bool g_cpuFlushedPC;
bool g_cpuFlushedPC, g_recompilingDelaySlot, g_maySignalException;
////////////////////////////////////////////////////////////////
// Static Private Variables - R5900 Dynarec
@ -1018,8 +1018,11 @@ void iFlushCall(int flushtype)
}
if (flushtype & FLUSH_CODE)
xMOV(ptr32[&cpuRegs.code], cpuRegs.code);
if (flushtype & FLUSH_CAUSE)
; // TODO
if (flushtype & FLUSH_CAUSE) {
if (g_recompilingDelaySlot)
xOR(ptr32[&cpuRegs.CP0.n.Cause], 1 << 31); // BD
g_maySignalException = true;
}
if( flushtype & FLUSH_FREE_XMM )
_freeXMMregs();
@ -1202,8 +1205,13 @@ void recompileNextInstruction(int delayslot)
MOV32ItoR(EAX, pc); // acts as a tag for delimiting recompiled instructions when viewing x86 disasm.
cpuRegs.code = *(int *)s_pCode;
if (!delayslot) {
pc += 4;
g_cpuFlushedPC = false;
} else {
// increment after recompiling so that pc points to the branch during recompilation
g_recompilingDelaySlot = true;
}
g_pCurInstInfo++;
@ -1285,6 +1293,16 @@ void recompileNextInstruction(int delayslot)
// _flushCachedRegs();
// g_cpuHasConstReg = 1;
if (delayslot) {
pc += 4;
g_cpuFlushedPC = false;
if (g_maySignalException)
xAND(ptr32[&cpuRegs.CP0.n.Cause], ~(1 << 31)); // BD
g_recompilingDelaySlot = false;
}
g_maySignalException = false;
if (!delayslot && (xGetPtr() - recPtr > 0x1000) )
s_nEndBlock = pc;
}