mirror of https://github.com/PCSX2/pcsx2.git
minor change: some "vu overflow checks" were only being called when "disable extra vu flags" was disabled. the 2 speedhacks should be independent of each other.
git-svn-id: http://pcsx2-playground.googlecode.com/svn/trunk@136 a6443dda-0b58-4228-96e9-037be469359c
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@ -1432,7 +1432,6 @@ void recUpdateFlags(VURegs * VU, int reg, int info)
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SSE_CMPNEPS_XMM_to_XMM(EEREC_TEMP, reg); // If they're not equal, then overflow has occured
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SSE_MOVMSKPS_XMM_to_R32(x86newflag, EEREC_TEMP); // Move the sign bits of the previous calculation
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vuFloat2(reg, EEREC_TEMP, _X_Y_Z_W); // Clamp overflowed vectors that were modified
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AND32ItoR(x86newflag, 0x0f & _X_Y_Z_W ); // Grab "Has Overflowed" bits from the previous calculation (also make sure we're only grabbing from the XYZW being modified)
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pjmp = JZ8(0); // Skip if none are
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@ -1471,6 +1470,9 @@ void recUpdateFlags(VURegs * VU, int reg, int info)
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SSE_ORPS_XMM_to_XMM(reg, EEREC_TEMP);
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}
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}
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vuFloat2(reg, EEREC_TEMP, _X_Y_Z_W); // Clamp overflowed vectors that were modified
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//-------------------------Check for Signed flags------------------------------
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//SSE_ANDPS_M128_to_XMM(EEREC_TEMP, (uptr)&VU_Signed_Zero_Mask[ 0 ]);
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@ -1552,7 +1554,6 @@ void recUpdateFlags(VURegs * VU, int reg, int info)
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SSE_CMPNEPS_XMM_to_XMM(t1reg, reg); // If they're not equal, then overflow has occured
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SSE_MOVMSKPS_XMM_to_R32(x86newflag, t1reg); // Move the sign bits of the previous calculation
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vuFloat(info, reg, _X_Y_Z_W); // Clamp overflowed vectors that were modified
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AND32ItoR(x86newflag, 0x0f & _X_Y_Z_W ); // Grab "Has Overflowed" bits from the previous calculation (also make sure we're only grabbing from the XYZW being modified)
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pjmp = JZ8(0); // Skip if none are
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@ -1591,6 +1592,9 @@ void recUpdateFlags(VURegs * VU, int reg, int info)
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SSE_ORPS_XMM_to_XMM(reg, t1reg);
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}
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}
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vuFloat2(reg, t1reg, _X_Y_Z_W); // Clamp overflowed vectors that were modified
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//-------------------------Check for Signed flags------------------------------
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//SSE_ANDPS_M128_to_XMM(t1reg, (uptr)&VU_Signed_Zero_Mask[ 0 ]);
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