mirror of https://github.com/PCSX2/pcsx2.git
VIF: Fix for Donald Duck Quack Attack - vifcmd errors caused by VIF not stopping on reset. It would be nice to find out the actually 100% behaviour of FBRST, information is limited.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@4520 96395faa-99c1-11dd-bbfe-3dabce05a288
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@ -77,6 +77,7 @@ __fi void vif0FBRST(u32 value) {
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u128 SaveCol;
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u128 SaveRow;
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// if(vif0ch.chcr.STR == true) DevCon.Warning("FBRST While Vif0 active");
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//Must Preserve Row/Col registers! (Downhill Domination for testing)
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SaveCol._u64[0] = vif0.MaskCol._u64[0];
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SaveCol._u64[1] = vif0.MaskCol._u64[1];
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@ -88,16 +89,16 @@ __fi void vif0FBRST(u32 value) {
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vif0.MaskRow._u64[0] = SaveRow._u64[0];
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vif0.MaskRow._u64[1] = SaveRow._u64[1];
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vif0ch.qwc = 0; //?
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//cpuRegs.interrupt &= ~1; //Stop all vif0 DMA's
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cpuRegs.interrupt &= ~1; //Stop all vif0 DMA's
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psHu64(VIF0_FIFO) = 0;
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psHu64(VIF0_FIFO + 8) = 0;
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vif0.vifstalled = false;
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vif0.inprogress = 0;
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vif0.cmd = 0;
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//vif0.done = false;
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vif0.done = true;
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vif0ch.chcr.STR = false;
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vif0Regs.err.reset();
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vif0Regs.stat.clear_flags(VIF0_STAT_FQC | VIF0_STAT_INT | VIF0_STAT_VSS | VIF0_STAT_VIS | VIF0_STAT_VFS | VIF0_STAT_VPS); // FQC=0
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if(vif0ch.chcr.STR == true) CPU_INT(DMAC_VIF0, 4);
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}
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/* Fixme: Forcebreaks are pretty unknown for operation, presumption is it just stops it what its doing
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@ -151,6 +152,7 @@ __fi void vif1FBRST(u32 value) {
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{
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u128 SaveCol;
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u128 SaveRow;
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//if(vif1ch.chcr.STR == true) DevCon.Warning("FBRST While Vif1 active");
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//Must Preserve Row/Col registers! (Downhill Domination for testing) - Really shouldnt be part of the vifstruct.
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SaveCol._u64[0] = vif1.MaskCol._u64[0];
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SaveCol._u64[1] = vif1.MaskCol._u64[1];
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@ -161,13 +163,14 @@ __fi void vif1FBRST(u32 value) {
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vif1.MaskCol._u64[1] = SaveCol._u64[1];
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vif1.MaskRow._u64[0] = SaveRow._u64[0];
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vif1.MaskRow._u64[1] = SaveRow._u64[1];
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//cpuRegs.interrupt &= ~((1 << 1) | (1 << 10)); //Stop all vif1 DMA's
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//vif1ch.qwc -= min((int)vif1ch.qwc, 16); //not sure if the dma should stop, FFWDing could be tricky
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cpuRegs.interrupt &= ~((1 << 1) | (1 << 10)); //Stop all vif1 DMA's
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///vif1ch.qwc -= min((int)vif1ch.qwc, 16); //not sure if the dma should stop, FFWDing could be tricky
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vif1ch.qwc = 0;
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psHu64(VIF1_FIFO) = 0;
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psHu64(VIF1_FIFO + 8) = 0;
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//vif1.done = false;
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vif1.done = true;
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vif1ch.chcr.STR = false;
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//DevCon.Warning("VIF FBRST Reset MSK = %x", vif1Regs.mskpath3);
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if(vif1Regs.mskpath3 == 1 && GSTransferStatus.PTH3 == STOPPED_MODE && gifch.chcr.STR == true)
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@ -186,7 +189,6 @@ __fi void vif1FBRST(u32 value) {
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vif1.vifstalled = false;
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vif1Regs.stat.FQC = 0;
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vif1Regs.stat.clear_flags(VIF1_STAT_FDR | VIF1_STAT_INT | VIF1_STAT_VSS | VIF1_STAT_VIS | VIF1_STAT_VFS | VIF1_STAT_VPS);
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if(vif1ch.chcr.STR == true) CPU_INT(DMAC_VIF1, 4);
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}
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/* Fixme: Forcebreaks are pretty unknown for operation, presumption is it just stops it what its doing
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