diff --git a/3rdparty/SoundTouch/SoundTouch.vcproj b/3rdparty/SoundTouch/SoundTouch.vcproj index 08ae7e479d..b1cd6fa470 100644 --- a/3rdparty/SoundTouch/SoundTouch.vcproj +++ b/3rdparty/SoundTouch/SoundTouch.vcproj @@ -18,7 +18,7 @@ @@ -158,7 +157,7 @@ Optimization="2" EnableIntrinsicFunctions="true" RuntimeLibrary="0" - EnableFunctionLevelLinking="true" + BufferSecurityCheck="false" WarningLevel="3" DebugInformationFormat="3" /> diff --git a/3rdparty/bzip2/bzip2.vcproj b/3rdparty/bzip2/bzip2.vcproj index 5d36273f2a..b5734f234a 100644 --- a/3rdparty/bzip2/bzip2.vcproj +++ b/3rdparty/bzip2/bzip2.vcproj @@ -18,7 +18,7 @@ @@ -170,7 +169,6 @@ StringPooling="true" RuntimeLibrary="0" BufferSecurityCheck="false" - EnableFunctionLevelLinking="true" WarningLevel="3" DebugInformationFormat="3" /> diff --git a/3rdparty/w32pthreads/pthreads_2008.vcproj b/3rdparty/w32pthreads/pthreads_2008.vcproj index e9058a0ec6..5459698111 100644 --- a/3rdparty/w32pthreads/pthreads_2008.vcproj +++ b/3rdparty/w32pthreads/pthreads_2008.vcproj @@ -19,7 +19,7 @@ @@ -189,9 +186,7 @@ RuntimeLibrary="0" StructMemberAlignment="5" BufferSecurityCheck="false" - EnableFunctionLevelLinking="false" UsePrecompiledHeader="0" - BrowseInformation="1" WarningLevel="3" DebugInformationFormat="3" CompileAs="1" diff --git a/3rdparty/zlib/zlib.vcproj b/3rdparty/zlib/zlib.vcproj index aaf6e24de5..3701570d86 100644 --- a/3rdparty/zlib/zlib.vcproj +++ b/3rdparty/zlib/zlib.vcproj @@ -18,7 +18,7 @@ @@ -167,6 +166,7 @@ WholeProgramOptimization="false" StringPooling="true" RuntimeLibrary="0" + BufferSecurityCheck="false" WarningLevel="3" DebugInformationFormat="3" /> diff --git a/bin/.pixmaps/Thumbs.db b/bin/.pixmaps/Thumbs.db deleted file mode 100644 index 6f6a4c9440..0000000000 Binary files a/bin/.pixmaps/Thumbs.db and /dev/null differ diff --git a/bin/patches/8B0725D5.pnach b/bin/patches/8B0725D5.pnach new file mode 100644 index 0000000000..f4492a5864 --- /dev/null +++ b/bin/patches/8B0725D5.pnach @@ -0,0 +1,4 @@ +gametitle= Flinstones Bedrock Racing (SLES) +comment=Path 3 Hack +// Moved from Elfheader.cpp +patch=path3hack \ No newline at end of file diff --git a/bin/patches/A08C4057.pnach b/bin/patches/A08C4057.pnach new file mode 100644 index 0000000000..cb0c895995 --- /dev/null +++ b/bin/patches/A08C4057.pnach @@ -0,0 +1,4 @@ +gametitle= Sprint Cars (SLUS) +comment=Path 3 Hack +// Moved from Elfheader.cpp +patch=path3hack \ No newline at end of file diff --git a/common/include/PS2Edefs.h b/common/include/PS2Edefs.h index f5825d654a..edee168d9e 100644 --- a/common/include/PS2Edefs.h +++ b/common/include/PS2Edefs.h @@ -548,7 +548,9 @@ typedef void (CALLBACK* _PADgsDriverInfo)(GSdriverInfo *info); typedef void (CALLBACK* _PADconfigure)(); typedef s32 (CALLBACK* _PADtest)(); typedef void (CALLBACK* _PADabout)(); -typedef int (CALLBACK* _PADfreeze)(int mode, freezeData *data); +typedef int (CALLBACK* _PADfreeze)(int mode, freezeData *data); +typedef s32 (CALLBACK* _PADsetSlot)(u8 port, u8 slot); +typedef s32 (CALLBACK* _PADqueryMtap)(u8 port); // SIO typedef s32 (CALLBACK* _SIOinit)(u32 port, u32 slot, SIOchangeSlotCB f); @@ -734,6 +736,8 @@ extern _PADconfigure PAD1configure; extern _PADtest PAD1test; extern _PADabout PAD1about; extern _PADfreeze PAD1freeze; +extern _PADsetSlot PAD1setSlot; +extern _PADqueryMtap PAD1queryMtap; // PAD2 extern _PADinit PAD2init; @@ -751,6 +755,8 @@ extern _PADconfigure PAD2configure; extern _PADtest PAD2test; extern _PADabout PAD2about; extern _PADfreeze PAD2freeze; +extern _PADsetSlot PAD2setSlot; +extern _PADqueryMtap PAD2queryMtap; // SIO[2] extern _SIOinit SIOinit[2][9]; diff --git a/common/include/Pcsx2Api.h b/common/include/Pcsx2Api.h index 63b5f16755..8ddf55d933 100644 --- a/common/include/Pcsx2Api.h +++ b/common/include/Pcsx2Api.h @@ -52,6 +52,10 @@ EXPORT_C(char*) PS2EgetLibName(void); // Intended for them to get the ini and plugin paths, but could allow for other things as well. EXPORT_C_(void) PS2EpassConfig(PcsxConfig Config); +// Alternately, this function serves the same purpose, but would work for emulators outside +// of pcsx2. +EXPORT_C_(void) PS2EpassIniPath(const char *path); + // PS2EgetLibType returns (may be OR'd) enum { PS2E_LT_GS = 0x01, diff --git a/common/include/Pcsx2Config.h b/common/include/Pcsx2Config.h index c7fbdbea3b..8a71d245c4 100644 --- a/common/include/Pcsx2Config.h +++ b/common/include/Pcsx2Config.h @@ -66,6 +66,7 @@ extern SessionOverrideFlags g_Session; //------------ SPECIAL GAME FIXES!!! --------------- #define CHECK_VUADDSUBHACK (Config.GameFixes & 0x1) // Special Fix for Tri-ace games, they use an encryption algorithm that requires VU addi opcode to be bit-accurate. #define CHECK_FPUCOMPAREHACK (Config.GameFixes & 0x4) // Special Fix for Digimon Rumble Arena 2, fixes spinning/hanging on intro-menu. +#define CHECK_VUCLIPFLAGHACK (Config.GameFixes & 0x2) // Special Fix for Persona games, maybe others. It's to do with the VU clip flag (again). #define CHECK_FPUMULHACK (Config.GameFixes & 0x8) // Special Fix for Tales of Destiny hangs. //------------ Advanced Options!!! --------------- #define CHECK_VU_OVERFLOW (Config.vuOptions & 0x1) @@ -80,8 +81,8 @@ extern SessionOverrideFlags g_Session; #define DEFAULT_eeOptions 0x01 #define DEFAULT_vuOptions 0x01 //------------ DEFAULT sseMXCSR VALUES!!! --------------- -#define DEFAULT_sseMXCSR 0x7fc0 //FPU rounding, DaZ, "chop" - Note: Dont enable FtZ by default, it breaks games! E.g. Enthusia (Refraction) -#define DEFAULT_sseVUMXCSR 0x7fc0 //VU rounding, DaZ, "chop" +#define DEFAULT_sseMXCSR 0xffc0 //FPU rounding > DaZ, FtZ, "chop" +#define DEFAULT_sseVUMXCSR 0xffc0 //VU rounding > DaZ, FtZ, "chop" #define CHECK_FRAMELIMIT (Config.Options&PCSX2_FRAMELIMIT_MASK) diff --git a/common/include/PluginCallbacks.h b/common/include/PluginCallbacks.h index b6e65a131a..e7334820ee 100644 --- a/common/include/PluginCallbacks.h +++ b/common/include/PluginCallbacks.h @@ -27,6 +27,7 @@ typedef u32 (CALLBACK* _PS2EgetLibType)(void); typedef u32 (CALLBACK* _PS2EgetLibVersion2)(u32 type); typedef char*(CALLBACK* _PS2EgetLibName)(void); typedef void (CALLBACK* _PS2EpassConfig)(PcsxConfig *Config); +typedef void (CALLBACK* _PS2EpassIniPath)(const char *path); // GS // NOTE: GSreadFIFOX/GSwriteCSR functions CANNOT use XMM/MMX regs @@ -82,6 +83,8 @@ typedef s32 (CALLBACK* _PADfreeze)(u8 mode, freezeData *data); typedef void (CALLBACK* _PADconfigure)(); typedef s32 (CALLBACK* _PADtest)(); typedef void (CALLBACK* _PADabout)(); +typedef s32 (CALLBACK* _PADsetSlot)(u8 port, u8 slot); +typedef s32 (CALLBACK* _PADqueryMtap)(u8 port); // SIO typedef s32 (CALLBACK* _SIOinit)(int types, SIOchangeSlotCB f); diff --git a/common/include/api/PadApi.h b/common/include/api/PadApi.h index 34eafada87..06f0e11782 100644 --- a/common/include/api/PadApi.h +++ b/common/include/api/PadApi.h @@ -15,8 +15,8 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA */ - - + + #ifndef __PADAPI_H__ #define __PADAPI_H__ @@ -28,7 +28,7 @@ * shadowpcsx2@yahoo.gr, * and florinsasu@hotmail.com */ - + #include "Pcsx2Api.h" /* PAD plugin API */ @@ -60,7 +60,19 @@ EXPORT_C_(void) PADupdate(u8 pad); // Extended functions EXPORT_C_(void) PADgsDriverInfo(GSdriverInfo *info); -EXPORT_C_(s32) PADfreeze(u8 mode, freezeData *data); +EXPORT_C_(s32) PADfreeze(u8 mode, freezeData *data); + +// Returns 1 if the pad plugin wants a multitap on the specified port. +// 0 otherwise. +EXPORT_C_(s32) PADqueryMtap(u8 port); + +// Sets the active pad slot for the specified port. +// Both numbers are 1-based indices. Should return 0 if there's no +// pad on the specified slot. Even if PADqueryMtap(port) returns 0, +// should handle this properly for slot != 1, so emulator can allow +// Multitap to be enabled/disabled elsewhere. +EXPORT_C_(s32) PADsetSlot(u8 port, u8 slot); + EXPORT_C_(void) PADconfigure(); EXPORT_C_(void) PADabout(); EXPORT_C_(s32) PADtest(); diff --git a/common/vsprops/3rdpartyDeps.vsprops b/common/vsprops/3rdpartyDeps.vsprops index 6973130413..30fcba75b8 100644 --- a/common/vsprops/3rdpartyDeps.vsprops +++ b/common/vsprops/3rdpartyDeps.vsprops @@ -6,8 +6,7 @@ > diff --git a/common/vsprops/GlobalLinking.vsprops b/common/vsprops/GlobalLinking.vsprops new file mode 100644 index 0000000000..5bf8cd3a63 --- /dev/null +++ b/common/vsprops/GlobalLinking.vsprops @@ -0,0 +1,26 @@ + + + + + diff --git a/common/vsprops/IncrementalLinking.vsprops b/common/vsprops/IncrementalLinking.vsprops new file mode 100644 index 0000000000..c6dd809759 --- /dev/null +++ b/common/vsprops/IncrementalLinking.vsprops @@ -0,0 +1,20 @@ + + + + + diff --git a/common/vsprops/pthreads.vsprops b/common/vsprops/pthreads.vsprops index 0c9b8f93cb..a29230421c 100644 --- a/common/vsprops/pthreads.vsprops +++ b/common/vsprops/pthreads.vsprops @@ -5,6 +5,11 @@ Name="w32pthreads" > + diff --git a/common/vsprops/readme.txt b/common/vsprops/readme.txt new file mode 100644 index 0000000000..31b602561f --- /dev/null +++ b/common/vsprops/readme.txt @@ -0,0 +1,30 @@ + +Decriptions of Provided .vsprops Sheets +--------------------------------------- + + * plugin_svnroot - Provides a set of semi-standard user macros for plugins that + conform to an expected folder layout. Each user macro can be optionally overridden + by the plugin using its own property sheet, if needed. + + See the contents of plugin_svnroot for explanations of the User Macros used by all + other properties sheets lested below. + + + * 3rdPartyDeps - Adds the /deps folder to the linker search path. Does not add + any actual dependencies. You must add those manually. + + * pthreads - Adds the w32pthreads library to your project, along with the expected + compiler defines for correctly compiling and linking pthreads. + + * BaseProperties - Sets up standard Output and Intermediate directories, warning levels, + struct alignment, and other settings required for Pcsx2 and its libs to link in + a workable fashion. Adds standard preprocessor defines for: + __WIN32__;WIN32;_WINDOWS;_CRT_SECURE_NO_WARNINGS;_CRT_SECURE_NO_DEPRECATE + + * IncrementalLinking - Enables incremental linking, for use in devel/debug modes only. + Incremental linking force-disables Whole Program Optimization, but builds the result + .exe/.dll much quicker usually. + + * GlobalLinking - Enables full support for Whole Program Optimization, and force- + disables any conflicting incremental link settings. + \ No newline at end of file diff --git a/pcsx2/CDVD.cpp b/pcsx2/CDVD.cpp index 8f038abdda..0418ad4eff 100644 --- a/pcsx2/CDVD.cpp +++ b/pcsx2/CDVD.cpp @@ -254,7 +254,7 @@ FILE *_cdvdOpenMechaVer() { // if file doesnt exist, create empty one fd = fopen(file, "r+b"); if (fd == NULL) { - SysPrintf("MEC File Not Found , Creating Blank File\n"); + Console::Notice("MEC File Not Found , Creating Blank File"); fd = fopen(file, "wb"); if (fd == NULL) { Msgbox::Alert("_cdvdOpenMechaVer: Error creating %s", params file); @@ -299,7 +299,7 @@ FILE *_cdvdOpenNVM() { // if file doesnt exist, create empty one fd = fopen(file, "r+b"); if (fd == NULL) { - SysPrintf("NVM File Not Found , Creating Blank File\n"); + Console::Notice("NVM File Not Found , Creating Blank File"); fd = fopen(file, "wb"); if (fd == NULL) { Msgbox::Alert("_cdvdOpenNVM: Error creating %s", params file); @@ -565,7 +565,7 @@ s32 cdvdGetToc(void* toc) //the code below handles only CdGetToc! //if(cdvd.Param[0]==0x01) //{ - SysPrintf("CDGetToc Param[0]=%d, Param[1]=%d\n",cdvd.Param[0],cdvd.Param[1]); + Console::WriteLn("CDGetToc Param[0]=%d, Param[1]=%d", params cdvd.Param[0],cdvd.Param[1]); //} type = CDVDgetDiskType(); if (CDVDgetTN(&diskInfo) == -1) { diskInfo.etrack = 0;diskInfo.strack = 1; } @@ -831,11 +831,11 @@ void mechaDecryptBytes( u32 madr, int size ) int cdvdReadSector() { s32 bcr; - CDR_LOG("SECTOR %d (BCR %x;%x)\n", cdvd.Sector, HW_DMA3_BCR_H16, HW_DMA3_BCR_L16); + CDR_LOG("SECTOR %d (BCR %x;%x)", cdvd.Sector, HW_DMA3_BCR_H16, HW_DMA3_BCR_L16); bcr = (HW_DMA3_BCR_H16 * HW_DMA3_BCR_L16) *4; if (bcr < cdvd.BlockSize) { - CDR_LOG( "READBLOCK: bcr < cdvd.BlockSize; %x < %x\n", bcr, cdvd.BlockSize ); + CDR_LOG( "READBLOCK: bcr < cdvd.BlockSize; %x < %x", bcr, cdvd.BlockSize ); if (HW_DMA3_CHCR & 0x01000000) { HW_DMA3_CHCR &= ~0x01000000; psxDmaInterrupt(3); @@ -907,14 +907,13 @@ int cdvdReadSector() { } // decrypt sector's bytes - if( cdvd.decSet ) - mechaDecryptBytes( HW_DMA3_MADR, cdvd.BlockSize ); + if( cdvd.decSet ) mechaDecryptBytes( HW_DMA3_MADR, cdvd.BlockSize ); // Added a clear after memory write .. never seemed to be necessary before but *should* // be more correct. (air) psxCpu->Clear( HW_DMA3_MADR, cdvd.BlockSize/4 ); -// SysPrintf("sector %x;%x;%x\n", PSXMu8(madr+0), PSXMu8(madr+1), PSXMu8(madr+2)); +// Console::WriteLn("sector %x;%x;%x", params PSXMu8(madr+0), PSXMu8(madr+1), PSXMu8(madr+2)); HW_DMA3_BCR_H16-= (cdvd.BlockSize / (HW_DMA3_BCR_L16*4)); HW_DMA3_MADR+= cdvd.BlockSize; @@ -962,9 +961,9 @@ __forceinline void cdvdActionInterrupt() // inlined due to being referenced in only one place. __forceinline void cdvdReadInterrupt() { - //SysPrintf("cdvdReadInterrupt %x %x %x %x %x\n", cpuRegs.interrupt, cdvd.Readed, cdvd.Reading, cdvd.nSectors, (HW_DMA3_BCR_H16 * HW_DMA3_BCR_L16) *4); + //Console::WriteLn("cdvdReadInterrupt %x %x %x %x %x", params cpuRegs.interrupt, cdvd.Readed, cdvd.Reading, cdvd.nSectors, (HW_DMA3_BCR_H16 * HW_DMA3_BCR_L16) *4); - cdvd.Ready = 0x00; + cdvd.Ready = 0x00; if (cdvd.Readed == 0) { // Seeking finished. Process the track we requested before, and @@ -980,7 +979,7 @@ __forceinline void cdvdReadInterrupt() cdvd.Status = CDVD_STATUS_SEEK_COMPLETE; cdvd.Sector = cdvd.SeekToSector; - CDR_LOG( "Cdvd Seek Complete > Scheduling block read interrupt at iopcycle=%8.8x.\n", + CDR_LOG( "Cdvd Seek Complete > Scheduling block read interrupt at iopcycle=%8.8x.", psxRegs.cycle + cdvd.ReadTime ); CDVDREAD_INT(cdvd.ReadTime); @@ -1068,93 +1067,93 @@ void cdvdVsync() { u8 cdvdRead04(void) { // NCOMMAND - CDR_LOG("cdvdRead04(NCMD) %x\n", cdvd.nCommand); + CDR_LOG("cdvdRead04(NCMD) %x", cdvd.nCommand); return cdvd.nCommand; } u8 cdvdRead05(void) { // N-READY - CDR_LOG("cdvdRead05(NReady) %x\n", cdvd.Ready); + CDR_LOG("cdvdRead05(NReady) %x", cdvd.Ready); return cdvd.Ready; } u8 cdvdRead06(void) { // ERROR - CDR_LOG("cdvdRead06(Error) %x\n", cdvd.Error); + CDR_LOG("cdvdRead06(Error) %x", cdvd.Error); return cdvd.Error; } u8 cdvdRead07(void) { // BREAK - CDR_LOG("cdvdRead07(Break) %x\n", 0); + CDR_LOG("cdvdRead07(Break) %x", 0); return 0; } u8 cdvdRead08(void) { // INTR_STAT - CDR_LOG("cdvdRead08(IntrReason) %x\n", cdvd.PwOff); + CDR_LOG("cdvdRead08(IntrReason) %x", cdvd.PwOff); return cdvd.PwOff; } u8 cdvdRead0A(void) { // STATUS - CDR_LOG("cdvdRead0A(Status) %x\n", cdvd.Status); + CDR_LOG("cdvdRead0A(Status) %x", cdvd.Status); return cdvd.Status; } u8 cdvdRead0B(void) { // TRAY-STATE (if tray has been opened) u8 tray = cdvdGetTrayStatus(); - CDR_LOG("cdvdRead0B(Tray) %x\n", tray); + CDR_LOG("cdvdRead0B(Tray) %x", tray); return tray; } u8 cdvdRead0C(void) { // CRT MINUTE - CDR_LOG("cdvdRead0C(Min) %x\n", itob((u8)(cdvd.Sector/(60*75)))); + CDR_LOG("cdvdRead0C(Min) %x", itob((u8)(cdvd.Sector/(60*75)))); return itob((u8)(cdvd.Sector/(60*75))); } u8 cdvdRead0D(void) { // CRT SECOND - CDR_LOG("cdvdRead0D(Sec) %x\n", itob((u8)((cdvd.Sector/75)%60)+2)); + CDR_LOG("cdvdRead0D(Sec) %x", itob((u8)((cdvd.Sector/75)%60)+2)); return itob((u8)((cdvd.Sector/75)%60)+2); } u8 cdvdRead0E(void) { // CRT FRAME - CDR_LOG("cdvdRead0E(Frame) %x\n", itob((u8)(cdvd.Sector%75))); + CDR_LOG("cdvdRead0E(Frame) %x", itob((u8)(cdvd.Sector%75))); return itob((u8)(cdvd.Sector%75)); } u8 cdvdRead0F(void) // TYPE { - CDR_LOG("cdvdRead0F(Disc Type) %x\n", cdvd.Type); + CDR_LOG("cdvdRead0F(Disc Type) %x", cdvd.Type); cdvdGetDiskType(); return cdvd.Type; } u8 cdvdRead13(void) { // UNKNOWN - CDR_LOG("cdvdRead13(Unknown) %x\n", 4); + CDR_LOG("cdvdRead13(Unknown) %x", 4); return 4; } u8 cdvdRead15(void) { // RSV - CDR_LOG("cdvdRead15(RSV)\n"); + CDR_LOG("cdvdRead15(RSV)"); return 0x01; // | 0x80 for ATAPI mode } u8 cdvdRead16(void) { // SCOMMAND - CDR_LOG("cdvdRead16(SCMD) %x\n", cdvd.sCommand); + CDR_LOG("cdvdRead16(SCMD) %x", cdvd.sCommand); return cdvd.sCommand; } u8 cdvdRead17(void) { // SREADY - CDR_LOG("cdvdRead17(SReady) %x\n", cdvd.sDataIn); + CDR_LOG("cdvdRead17(SReady) %x", cdvd.sDataIn); return cdvd.sDataIn; } @@ -1169,54 +1168,54 @@ u8 cdvdRead18(void) { // SDATAOUT ret = cdvd.Result[cdvd.ResultP-1]; } } - CDR_LOG("cdvdRead18(SDataOut) %x (ResultC=%d, ResultP=%d)\n", ret, cdvd.ResultC, cdvd.ResultP); + CDR_LOG("cdvdRead18(SDataOut) %x (ResultC=%d, ResultP=%d)", ret, cdvd.ResultC, cdvd.ResultP); return ret; } u8 cdvdRead20(void) { - CDR_LOG("cdvdRead20(Key0) %x\n", cdvd.Key[0]); + CDR_LOG("cdvdRead20(Key0) %x", cdvd.Key[0]); return cdvd.Key[0]; } u8 cdvdRead21(void) { - CDR_LOG("cdvdRead21(Key1) %x\n", cdvd.Key[1]); + CDR_LOG("cdvdRead21(Key1) %x", cdvd.Key[1]); return cdvd.Key[1]; } u8 cdvdRead22(void) { - CDR_LOG("cdvdRead22(Key2) %x\n", cdvd.Key[2]); + CDR_LOG("cdvdRead22(Key2) %x", cdvd.Key[2]); return cdvd.Key[2]; } u8 cdvdRead23(void) { - CDR_LOG("cdvdRead23(Key3) %x\n", cdvd.Key[3]); + CDR_LOG("cdvdRead23(Key3) %x", cdvd.Key[3]); return cdvd.Key[3]; } u8 cdvdRead24(void) { - CDR_LOG("cdvdRead24(Key4) %x\n", cdvd.Key[4]); + CDR_LOG("cdvdRead24(Key4) %x", cdvd.Key[4]); return cdvd.Key[4]; } u8 cdvdRead28(void) { - CDR_LOG("cdvdRead28(Key5) %x\n", cdvd.Key[5]); + CDR_LOG("cdvdRead28(Key5) %x", cdvd.Key[5]); return cdvd.Key[5]; } u8 cdvdRead29(void) { - CDR_LOG("cdvdRead29(Key6) %x\n", cdvd.Key[6]); + CDR_LOG("cdvdRead29(Key6) %x", cdvd.Key[6]); return cdvd.Key[6]; } u8 cdvdRead2A(void) { - CDR_LOG("cdvdRead2A(Key7) %x\n", cdvd.Key[7]); + CDR_LOG("cdvdRead2A(Key7) %x", cdvd.Key[7]); return cdvd.Key[7]; } @@ -1228,57 +1227,57 @@ u8 cdvdRead2B(void) { } u8 cdvdRead2C(void) { - CDR_LOG("cdvdRead2C(Key9) %x\n", cdvd.Key[9]); + CDR_LOG("cdvdRead2C(Key9) %x", cdvd.Key[9]); return cdvd.Key[9]; } u8 cdvdRead30(void) { - CDR_LOG("cdvdRead30(Key10) %x\n", cdvd.Key[10]); + CDR_LOG("cdvdRead30(Key10) %x", cdvd.Key[10]); return cdvd.Key[10]; } u8 cdvdRead31(void) { - CDR_LOG("cdvdRead31(Key11) %x\n", cdvd.Key[11]); + CDR_LOG("cdvdRead31(Key11) %x", cdvd.Key[11]); return cdvd.Key[11]; } u8 cdvdRead32(void) { - CDR_LOG("cdvdRead32(Key12) %x\n", cdvd.Key[12]); + CDR_LOG("cdvdRead32(Key12) %x", cdvd.Key[12]); return cdvd.Key[12]; } u8 cdvdRead33(void) { - CDR_LOG("cdvdRead33(Key13) %x\n", cdvd.Key[13]); + CDR_LOG("cdvdRead33(Key13) %x", cdvd.Key[13]); return cdvd.Key[13]; } u8 cdvdRead34(void) { - CDR_LOG("cdvdRead34(Key14) %x\n", cdvd.Key[14]); + CDR_LOG("cdvdRead34(Key14) %x", cdvd.Key[14]); return cdvd.Key[14]; } u8 cdvdRead38(void) { // valid parts of key data (first and last are valid) - CDR_LOG("cdvdRead38(KeysValid) %x\n", cdvd.Key[15]); + CDR_LOG("cdvdRead38(KeysValid) %x", cdvd.Key[15]); return cdvd.Key[15]; } u8 cdvdRead39(void) { // KEY-XOR - CDR_LOG("cdvdRead39(KeyXor) %x\n", cdvd.KeyXor); + CDR_LOG("cdvdRead39(KeyXor) %x", cdvd.KeyXor); return cdvd.KeyXor; } u8 cdvdRead3A(void) { // DEC_SET - CDR_LOG("cdvdRead3A(DecSet) %x\n", cdvd.decSet); + CDR_LOG("cdvdRead3A(DecSet) %x", cdvd.decSet); - SysPrintf("DecSet Read: %02X\n", cdvd.decSet); + Console::WriteLn("DecSet Read: %02X", params cdvd.decSet); return cdvd.decSet; } @@ -1298,7 +1297,7 @@ static uint cdvdStartSeek( uint newsector, CDVD_MODE_TYPE mode ) if( !cdvd.Spinning ) { - CDR_LOG( "CdSpinUp > Simulating CdRom Spinup Time, and seek to sector %d\n", cdvd.SeekToSector ); + CDR_LOG( "CdSpinUp > Simulating CdRom Spinup Time, and seek to sector %d", cdvd.SeekToSector ); seektime = PSXCLK / 3; // 333ms delay cdvd.Spinning = true; } @@ -1309,18 +1308,18 @@ static uint cdvdStartSeek( uint newsector, CDVD_MODE_TYPE mode ) if( delta >= tbl_FastSeekDelta[mode] ) { // Full Seek - CDR_LOG( "CdSeek Begin > to sector %d, from %d - delta=%d [FULL]\n", cdvd.SeekToSector, cdvd.Sector, delta ); + CDR_LOG( "CdSeek Begin > to sector %d, from %d - delta=%d [FULL]", cdvd.SeekToSector, cdvd.Sector, delta ); seektime = Cdvd_FullSeek_Cycles; } else { - CDR_LOG( "CdSeek Begin > to sector %d, from %d - delta=%d [FAST]\n", cdvd.SeekToSector, cdvd.Sector, delta ); + CDR_LOG( "CdSeek Begin > to sector %d, from %d - delta=%d [FAST]", cdvd.SeekToSector, cdvd.Sector, delta ); seektime = Cdvd_FastSeek_Cycles; } } else { - CDR_LOG( "CdSeek Begin > Contiguous block without seek - delta=%d sectors\n", delta ); + CDR_LOG( "CdSeek Begin > Contiguous block without seek - delta=%d sectors", delta ); // seektime is the time it takes to read to the destination block: seektime = delta * cdvd.ReadTime; @@ -1342,7 +1341,7 @@ static uint cdvdStartSeek( uint newsector, CDVD_MODE_TYPE mode ) } void cdvdWrite04(u8 rt) { // NCOMMAND - CDR_LOG("cdvdWrite04: NCMD %s (%x) (ParamP = %x)\n", nCmdName[rt], rt, cdvd.ParamP); + CDR_LOG("cdvdWrite04: NCMD %s (%x) (ParamP = %x)", nCmdName[rt], rt, cdvd.ParamP); cdvd.nCommand = rt; cdvd.Status = CDVD_STATUS_NONE; @@ -1394,7 +1393,7 @@ void cdvdWrite04(u8 rt) { // NCOMMAND case 0: default: cdvd.ReadMode = CDVD_MODE_2048; cdvd.BlockSize = 2048; break; } - CDR_LOG( "CdRead > startSector=%d, nSectors=%d, RetryCnt=%x, Speed=%x(%x), ReadMode=%x(%x) (1074=%x)\n", + CDR_LOG( "CdRead > startSector=%d, nSectors=%d, RetryCnt=%x, Speed=%x(%x), ReadMode=%x(%x) (1074=%x)", cdvd.Sector, cdvd.nSectors, cdvd.RetryCnt, cdvd.Speed, cdvd.Param[9], cdvd.ReadMode, cdvd.Param[10], psxHu32(0x1074)); if( Config.cdvdPrint ) @@ -1435,7 +1434,7 @@ void cdvdWrite04(u8 rt) { // NCOMMAND case 0: cdvd.ReadMode = CDVD_MODE_2352; cdvd.BlockSize = 2352; break; } - CDR_LOG( "CdReadCDDA > startSector=%d, nSectors=%d, RetryCnt=%x, Speed=%xx(%x), ReadMode=%x(%x) (1074=%x)\n", + CDR_LOG( "CdReadCDDA > startSector=%d, nSectors=%d, RetryCnt=%x, Speed=%xx(%x), ReadMode=%x(%x) (1074=%x)", cdvd.Sector, cdvd.nSectors, cdvd.RetryCnt, cdvd.Speed, cdvd.Param[9], cdvd.ReadMode, cdvd.Param[10], psxHu32(0x1074)); if( Config.cdvdPrint ) @@ -1466,7 +1465,7 @@ void cdvdWrite04(u8 rt) { // NCOMMAND cdvd.ReadMode = CDVD_MODE_2048; cdvd.BlockSize = 2064; // Why oh why was it 2064 - CDR_LOG( "DvdRead > startSector=%d, nSectors=%d, RetryCnt=%x, Speed=%x(%x), ReadMode=%x(%x) (1074=%x)\n", + CDR_LOG( "DvdRead > startSector=%d, nSectors=%d, RetryCnt=%x, Speed=%x(%x), ReadMode=%x(%x) (1074=%x)", cdvd.Sector, cdvd.nSectors, cdvd.RetryCnt, cdvd.Speed, cdvd.Param[9], cdvd.ReadMode, cdvd.Param[10], psxHu32(0x1074)); if( Config.cdvdPrint ) @@ -1505,7 +1504,7 @@ void cdvdWrite04(u8 rt) { // NCOMMAND u8 arg0 = cdvd.Param[0]; u16 arg1 = cdvd.Param[1] | (cdvd.Param[2]<<8); u32 arg2 = cdvd.Param[3] | (cdvd.Param[4]<<8) | (cdvd.Param[5]<<16) | (cdvd.Param[6]<<24); - DevCon::WriteLn("cdvdReadKey(%d, %d, %d)\n", params arg0, arg1, arg2); + DevCon::WriteLn("cdvdReadKey(%d, %d, %d)", params arg0, arg1, arg2); cdvdReadKey(arg0, arg1, arg2, cdvd.Key); cdvd.KeyXor = 0x00; cdvdSetIrq(); @@ -1527,7 +1526,7 @@ void cdvdWrite04(u8 rt) { // NCOMMAND } void cdvdWrite05(u8 rt) { // NDATAIN - CDR_LOG("cdvdWrite05(NDataIn) %x\n", rt); + CDR_LOG("cdvdWrite05(NDataIn) %x", rt); if (cdvd.ParamP < 32) { cdvd.Param[cdvd.ParamP++] = rt; @@ -1536,13 +1535,13 @@ void cdvdWrite05(u8 rt) { // NDATAIN } void cdvdWrite06(u8 rt) { // HOWTO - CDR_LOG("cdvdWrite06(HowTo) %x\n", rt); + CDR_LOG("cdvdWrite06(HowTo) %x", rt); cdvd.HowTo = rt; } void cdvdWrite07(u8 rt) // BREAK { - CDR_LOG("cdvdWrite07(Break) %x\n", rt); + CDR_LOG("cdvdWrite07(Break) %x", rt); // If we're already in a Ready state or already Breaking, then do nothing: if( cdvd.Ready != 0 || cdvd.Action == cdvdAction_Break ) @@ -1566,24 +1565,24 @@ void cdvdWrite07(u8 rt) // BREAK } void cdvdWrite08(u8 rt) { // INTR_STAT - CDR_LOG("cdvdWrite08(IntrReason) = ACK(%x)\n", rt); + CDR_LOG("cdvdWrite08(IntrReason) = ACK(%x)", rt); cdvd.PwOff &= ~rt; } void cdvdWrite0A(u8 rt) { // STATUS - CDR_LOG("cdvdWrite0A(Status) %x\n", rt); + CDR_LOG("cdvdWrite0A(Status) %x", rt); } void cdvdWrite0F(u8 rt) { // TYPE - CDR_LOG("cdvdWrite0F(Type) %x\n", rt); - DevCon::WriteLn("*PCSX2*: CDVD TYPE %x\n", params rt); + CDR_LOG("cdvdWrite0F(Type) %x", rt); + DevCon::WriteLn("*PCSX2*: CDVD TYPE %x", params rt); } void cdvdWrite14(u8 rt) { // PS1 MODE?? u32 cycle = psxRegs.cycle; - if (rt == 0xFE) Console::Notice("*PCSX2*: go PS1 mode DISC SPEED = FAST\n"); - else Console::Notice("*PCSX2*: go PS1 mode DISC SPEED = %dX\n", params rt); + if (rt == 0xFE) Console::Notice("*PCSX2*: go PS1 mode DISC SPEED = FAST"); + else Console::Notice("*PCSX2*: go PS1 mode DISC SPEED = %dX", params rt); psxReset(); psxHu32(0x1f801450) = 0x8; @@ -1599,7 +1598,7 @@ void cdvdWrite16(u8 rt) // SCOMMAND int address; u8 tmp; - CDR_LOG("cdvdWrite16: SCMD %s (%x) (ParamP = %x)\n", sCmdName[rt], rt, cdvd.ParamP); + CDR_LOG("cdvdWrite16: SCMD %s (%x) (ParamP = %x)", sCmdName[rt], rt, cdvd.ParamP); cdvd.sCommand = rt; switch (rt) { @@ -1642,7 +1641,7 @@ void cdvdWrite16(u8 rt) // SCOMMAND } else { SetResultSize(1); cdvd.Result[0] = 0x80; - SysPrintf("*Unknown Mecacon Command param[0]=%02X\n", cdvd.Param[0]); + Console::WriteLn("*Unknown Mecacon Command param[0]=%02X", params cdvd.Param[0]); } break; @@ -1671,9 +1670,9 @@ void cdvdWrite16(u8 rt) // SCOMMAND if(cdvd.Result[3] <= 7) cdvd.Result[5] += 1; cdvd.Result[6] = itob(cdvd.RTC.month)+0x80; //Month cdvd.Result[7] = itob(cdvd.RTC.year); //Year - /*SysPrintf("RTC Read Sec %x Min %x Hr %x Day %x Month %x Year %x\n", cdvd.Result[1], cdvd.Result[2], + /*Console::WriteLn("RTC Read Sec %x Min %x Hr %x Day %x Month %x Year %x", params cdvd.Result[1], cdvd.Result[2], cdvd.Result[3], cdvd.Result[5], cdvd.Result[6], cdvd.Result[7]); - SysPrintf("RTC Read Real Sec %d Min %d Hr %d Day %d Month %d Year %d\n", cdvd.RTC.second, cdvd.RTC.minute, + Console::WriteLn("RTC Read Real Sec %d Min %d Hr %d Day %d Month %d Year %d", params cdvd.RTC.second, cdvd.RTC.minute, cdvd.RTC.hour, cdvd.RTC.day, cdvd.RTC.month, cdvd.RTC.year);*/ break; @@ -1690,9 +1689,9 @@ void cdvdWrite16(u8 rt) // SCOMMAND if(cdvd.Param[cdvd.ParamP-5] <= 7) cdvd.RTC.day -= 1; cdvd.RTC.month = btoi(cdvd.Param[cdvd.ParamP-2]-0x80); cdvd.RTC.year = btoi(cdvd.Param[cdvd.ParamP-1]); - /*SysPrintf("RTC write incomming Sec %x Min %x Hr %x Day %x Month %x Year %x\n", cdvd.Param[cdvd.ParamP-7], cdvd.Param[cdvd.ParamP-6], + /*Console::WriteLn("RTC write incomming Sec %x Min %x Hr %x Day %x Month %x Year %x", params cdvd.Param[cdvd.ParamP-7], cdvd.Param[cdvd.ParamP-6], cdvd.Param[cdvd.ParamP-5], cdvd.Param[cdvd.ParamP-3], cdvd.Param[cdvd.ParamP-2], cdvd.Param[cdvd.ParamP-1]); - SysPrintf("RTC Write Sec %d Min %d Hr %d Day %d Month %d Year %d\n", cdvd.RTC.second, cdvd.RTC.minute, + Console::WriteLn("RTC Write Sec %d Min %d Hr %d Day %d Month %d Year %d", params cdvd.RTC.second, cdvd.RTC.minute, cdvd.RTC.hour, cdvd.RTC.day, cdvd.RTC.month, cdvd.RTC.year);*/ //memcpy_fast((u8*)&cdvd.RTC, cdvd.Param, 7); SetResultSize(1); @@ -1753,7 +1752,7 @@ void cdvdWrite16(u8 rt) // SCOMMAND break; case 0x15: // sceCdForbidDVDP (0:1) - //SysPrintf("sceCdForbidDVDP\n"); + //Console::WriteLn("sceCdForbidDVDP"); SetResultSize(1); cdvd.Result[0] = 5; break; @@ -1778,7 +1777,7 @@ void cdvdWrite16(u8 rt) // SCOMMAND case 0x1A: // sceCdBootCertify (4:1)//(4:16 in psx?) SetResultSize(1);//on input there are 4 bytes: 1;?10;J;C for 18000; 1;60;E;C for 39002 from ROMVER - cdvd.Result[0]=1;//i guess that means okay + cdvd.Result[0] = 1;//i guess that means okay break; case 0x1B: // sceCdCancelPOffRdy (0:1) - Call73 from Xcdvdman (1:1) @@ -1886,7 +1885,7 @@ void cdvdWrite16(u8 rt) // SCOMMAND SetResultSize(15); cdvdGetMechaVer(&cdvd.Result[1]); cdvd.Result[0] = cdvdReadRegionParams(&cdvd.Result[3]);//size==8 - SysPrintf("REGION PARAMS = %s %s\n", mg_zones[cdvd.Result[1]], &cdvd.Result[3]); + Console::WriteLn("REGION PARAMS = %s %s", params mg_zones[cdvd.Result[1]], &cdvd.Result[3]); cdvd.Result[1] = 1 << cdvd.Result[1]; //encryption zone; see offset 0x1C in encrypted headers ////////////////////////////////////////// cdvd.Result[2] = 0; //?? @@ -2063,7 +2062,7 @@ void cdvdWrite16(u8 rt) // SCOMMAND if (cdvd.mg_buffer[bit_ofs+5] || cdvd.mg_buffer[bit_ofs+6] || cdvd.mg_buffer[bit_ofs+7])goto fail_pol_cal; if (cdvd.mg_buffer[bit_ofs+4] * 16 + bit_ofs + 8 + 16 != *(u16*)&cdvd.mg_buffer[0x14]){ fail_pol_cal: - SysPrintf("[MG] ERROR - Make sure the file is already decrypted!!!\n"); + Console::Error("[MG] ERROR - Make sure the file is already decrypted!!!"); cdvd.Result[0] = 0x80; break; } @@ -2074,7 +2073,7 @@ fail_pol_cal: case 0x90: // sceMgWriteHeaderStart cdvd.mg_size = 0; cdvd.mg_datatype = 1;//header data - SysPrintf("[MG] hcode=%d cnum=%d a2=%d length=0x%X\n", + Console::WriteLn("[MG] hcode=%d cnum=%d a2=%d length=0x%X", params cdvd.Param[0], cdvd.Param[3], cdvd.Param[4], cdvd.mg_maxsize = cdvd.Param[1] | (((int)cdvd.Param[2])<<8)); SetResultSize(1);//in:5 cdvd.Result[0] = 0; // 0 complete ; 1 busy ; 0x80 error @@ -2088,7 +2087,7 @@ fail_pol_cal: } cdvd.mg_maxsize = 0; // don't allow any write cdvd.mg_size = 8+16*cdvd.mg_buffer[4];//new offset, i just moved the data - SysPrintf("[MG] BIT count=%d\n", cdvd.mg_buffer[4]); + Console::WriteLn("[MG] BIT count=%d", params cdvd.mg_buffer[4]); cdvd.Result[0] = cdvd.mg_datatype==1 ? 0 : 0x80; // 0 complete ; 1 busy ; 0x80 error cdvd.Result[1] = (cdvd.mg_size >> 0) & 0xFF; @@ -2143,7 +2142,7 @@ fail_pol_cal: default: // fake a 'correct' command - SysPrintf("SCMD Unknown %x\n", rt); + Console::WriteLn("SCMD Unknown %x", params rt); SetResultSize(1); //in:0 cdvd.Result[0] = 0; // 0 complete ; 1 busy ; 0x80 error break; @@ -2153,7 +2152,7 @@ fail_pol_cal: } void cdvdWrite17(u8 rt) { // SDATAIN - CDR_LOG("cdvdWrite17(SDataIn) %x\n", rt); + CDR_LOG("cdvdWrite17(SDataIn) %x", rt); if (cdvd.ParamP < 32) { cdvd.Param[cdvd.ParamP++] = rt; @@ -2162,12 +2161,12 @@ void cdvdWrite17(u8 rt) { // SDATAIN } void cdvdWrite18(u8 rt) { // SDATAOUT - CDR_LOG("cdvdWrite18(SDataOut) %x\n", rt); - SysPrintf("*PCSX2* SDATAOUT\n"); + CDR_LOG("cdvdWrite18(SDataOut) %x", rt); + Console::WriteLn("*PCSX2* SDATAOUT"); } void cdvdWrite3A(u8 rt) { // DEC-SET - CDR_LOG("cdvdWrite3A(DecSet) %x\n", rt); + CDR_LOG("cdvdWrite3A(DecSet) %x", rt); cdvd.decSet = rt; - SysPrintf("DecSet Write: %02X\n", cdvd.decSet); + Console::WriteLn("DecSet Write: %02X", params cdvd.decSet); } \ No newline at end of file diff --git a/pcsx2/CDVDiso.cpp b/pcsx2/CDVDiso.cpp index fac7a3eb65..2eb1031d94 100644 --- a/pcsx2/CDVDiso.cpp +++ b/pcsx2/CDVDiso.cpp @@ -295,13 +295,13 @@ int CDVD_findfile(const char* fname, TocEntry* tocEntry){ // Find the TOC for a specific directory if (CDVD_GetVolumeDescriptor() != TRUE){ - RPC_LOG("Could not get CD Volume Descriptor\n"); + RPC_LOG("Could not get CD Volume Descriptor"); return -1; } // Read the TOC of the root directory if (CdRead(CDVolDesc.rootToc.tocLBA,1,toc,&cdReadMode) != TRUE){ - RPC_LOG("Couldn't Read from CD !\n"); + RPC_LOG("Couldn't Read from CD !"); return -1; } //CdSync(0x00); @@ -362,7 +362,7 @@ int CDVD_findfile(const char* fname, TocEntry* tocEntry){ current_sector++; if (CdRead(current_sector,1,toc,&cdReadMode) != TRUE) { - SysPrintf("Couldn't Read from CD !\n"); + Console::Error("Couldn't Read from CD !"); return -1; } // CdSync(0x00); @@ -422,7 +422,7 @@ int CDVD_findfile(const char* fname, TocEntry* tocEntry){ tocEntryPointer = (dirTocEntry*)((char*)tocEntryPointer + tocEntryPointer->length); } - RPC_LOG("[RPC:cdvd] findfile: found dir, now looking for file\n"); + RPC_LOG("[RPC:cdvd] findfile: found dir, now looking for file"); tocEntryPointer = (dirTocEntry*)toc; @@ -502,15 +502,15 @@ int CDVD_GetDir_RPC_request(char* pathname, char* extensions, unsigned int inc_d // Find the TOC for a specific directory if (CDVD_GetVolumeDescriptor() != TRUE){ - RPC_LOG("[RPC:cdvd] Could not get CD Volume Descriptor\n"); + RPC_LOG("[RPC:cdvd] Could not get CD Volume Descriptor"); return -1; } - RPC_LOG("[RPC:cdvd] Getting Directory Listing for: \"%s\"\n", pathname); + RPC_LOG("[RPC:cdvd] Getting Directory Listing for: \"%s\"", pathname); // Read the TOC of the root directory if (CdRead(CDVolDesc.rootToc.tocLBA,1,toc,&cdReadMode) != TRUE){ - RPC_LOG("[RPC: ] Couldn't Read from CD !\n"); + RPC_LOG("[RPC: ] Couldn't Read from CD !"); return -1; } //CdSync(0x00); @@ -551,7 +551,7 @@ int CDVD_GetDir_RPC_request(char* pathname, char* extensions, unsigned int inc_d current_sector++; if (CdRead(current_sector,1,toc,&cdReadMode) != TRUE){ - RPC_LOG("[RPC: ] Couldn't Read from CD !\n"); + RPC_LOG("[RPC: ] Couldn't Read from CD !"); return -1; } @@ -573,8 +573,8 @@ int CDVD_GetDir_RPC_request(char* pathname, char* extensions, unsigned int inc_d if (strcmp(dirname,localTocEntry.filename) == 0){ // if the name matches then we've found the directory found_dir = TRUE; - RPC_LOG("[RPC: ] Found directory %s in subdir at sector %d\n",dirname,current_sector); - RPC_LOG("[RPC: ] LBA of found subdirectory = %d\n",localTocEntry.fileLBA); + RPC_LOG("[RPC: ] Found directory %s in subdir at sector %d",dirname,current_sector); + RPC_LOG("[RPC: ] LBA of found subdirectory = %d",localTocEntry.fileLBA); break; } @@ -593,7 +593,7 @@ int CDVD_GetDir_RPC_request(char* pathname, char* extensions, unsigned int inc_d // Read the TOC of the found subdirectory if (CdRead(localTocEntry.fileLBA,1,toc,&cdReadMode) != TRUE){ - RPC_LOG("[RPC: ] Couldn't Read from CD !\n"); + RPC_LOG("[RPC: ] Couldn't Read from CD !"); return -1; } //CdSync(0x00); @@ -645,7 +645,7 @@ int CDVD_GetDir_RPC_request(char* pathname, char* extensions, unsigned int inc_d getDirTocData.current_sector++; if (CdRead(getDirTocData.current_sector,1,toc,&cdReadMode) != TRUE){ - RPC_LOG("[RPC: ] Couldn't Read from CD !\n"); + RPC_LOG("[RPC: ] Couldn't Read from CD !"); return -1; } //CdSync(0x00); @@ -710,7 +710,7 @@ int CDVD_GetDir_RPC_get_entries(TocEntry tocEntry[], int req_entries){ dirTocEntry* tocEntryPointer; if (CdRead(getDirTocData.current_sector,1,toc,&cdReadMode) != TRUE){ - RPC_LOG("[RPC:cdvd] Couldn't Read from CD !\n"); + RPC_LOG("[RPC:cdvd] Couldn't Read from CD !"); return -1; } //CdSync(0x00); @@ -741,7 +741,7 @@ int CDVD_GetDir_RPC_get_entries(TocEntry tocEntry[], int req_entries){ getDirTocData.current_sector++; if (CdRead(getDirTocData.current_sector,1,toc,&cdReadMode) != TRUE){ - RPC_LOG("[RPC:cdvd] Couldn't Read from CD !\n"); + RPC_LOG("[RPC:cdvd] Couldn't Read from CD !"); return -1; } //CdSync(0x00); diff --git a/pcsx2/CDVDisodrv.cpp b/pcsx2/CDVDisodrv.cpp index 98108d107b..aaf2dff0ef 100644 --- a/pcsx2/CDVDisodrv.cpp +++ b/pcsx2/CDVDisodrv.cpp @@ -52,9 +52,9 @@ void CDVDFS_init(){ if (inited) return;//might change in the future as a param; forceInit/Reset - RPC_LOG("[CDVDisodrv:init] CDVD Filesystem v1.00\n"); - RPC_LOG("[CDVDisodrv ] \tby A.Lee (aka Hiryu) & Nicholas Van Veen (aka Sjeep)\n"); - RPC_LOG("[CDVDisodrv ] Initializing '%s' file driver.\n", "cdfs"); + RPC_LOG("[CDVDisodrv:init] CDVD Filesystem v1.00"); + RPC_LOG("[CDVDisodrv ] \tby A.Lee (aka Hiryu) & Nicholas Van Veen (aka Sjeep)"); + RPC_LOG("[CDVDisodrv ] Initializing '%s' file driver.", "cdfs"); //CdInit(0); already called by plugin loading system ;) @@ -92,13 +92,13 @@ int CDVDFS_open(const char *name, int mode){ fd_used[j] = 1; files_open++; - RPC_LOG("[CDVDisodrv:open] internal fd=%d\n", j); + RPC_LOG("[CDVDisodrv:open] internal fd=%d", j); fd_table[j].fileSize = tocEntry.fileSize; fd_table[j].LBA = tocEntry.fileLBA; fd_table[j].filePos = 0; - RPC_LOG("[CDVDisodrv ] tocEntry.fileSize = %d\n",tocEntry.fileSize); + RPC_LOG("[CDVDisodrv ] tocEntry.fileSize = %d",tocEntry.fileSize); return j; } @@ -109,7 +109,7 @@ int CDVDFS_open(const char *name, int mode){ int CDVDFS_lseek(int fd, int offset, int whence){ if ((fd >= 16) || (fd_used[fd]==0)){ - RPC_LOG("[CDVDisodrv:lseek] ERROR: File does not appear to be open!\n"); + RPC_LOG("[CDVDisodrv:lseek] ERROR: File does not appear to be open!"); return -1; } @@ -155,7 +155,7 @@ int CDVDFS_read( int fd, char *buffer, int size ){ int ssize=0, asize, esize; if ((fd >= 16) || (fd_used[fd]==0)){ - RPC_LOG("[CDVDisodrv:read] ERROR: File does not appear to be open!\n"); + RPC_LOG("[CDVDisodrv:read] ERROR: File does not appear to be open!"); return -1; } @@ -181,22 +181,22 @@ int CDVDFS_read( int fd, char *buffer, int size ){ esector=asector + (asize >> 11); size += ssize; - RPC_LOG("[CDVDisodrv:read] read sectors 0x%08X to 0x%08X\n", ssector, esector-(esize==0)); + RPC_LOG("[CDVDisodrv:read] read sectors 0x%08X to 0x%08X", ssector, esector-(esize==0)); if (ssize){ if (CdRead(ssector, 1, lb, &cdReadMode) != TRUE){ - RPC_LOG("[CDVDisodrv: ] Couldn't Read from file for some reason\n"); + RPC_LOG("[CDVDisodrv: ] Couldn't Read from file for some reason"); return 0; } memcpy_fast(buffer, lb + off_sector, ssize); } if (asize) if (CdRead(asector, asize >> 11, buffer+ssize, &cdReadMode) != TRUE){ - RPC_LOG("[CDVDisodrv: ] Couldn't Read from file for some reason\n"); + RPC_LOG("[CDVDisodrv: ] Couldn't Read from file for some reason"); return 0; } if (esize){ if (CdRead(esector, 1, lb, &cdReadMode) != TRUE){ - RPC_LOG("[CDVDisodrv: ] Couldn't Read from file for some reason\n"); + RPC_LOG("[CDVDisodrv: ] Couldn't Read from file for some reason"); return 0; } memcpy_fast(buffer+ssize+asize, lb, esize); @@ -207,13 +207,13 @@ int CDVDFS_read( int fd, char *buffer, int size ){ off_sector = (fd_table[fd].filePos & 0x7FF); num_sectors = ((off_sector + size) >> 11) + 1; - RPC_LOG("[CDVDisodrv:read] read sectors 0x%08X to 0x%08X\n",start_sector,start_sector+num_sectors); + RPC_LOG("[CDVDisodrv:read] read sectors 0x%08X to 0x%08X",start_sector,start_sector+num_sectors); // Read the data (we only ever get 16KB max request at once) if (CdRead(start_sector, num_sectors, local_buffer, &cdReadMode) != TRUE){ - //RPC_LOG("sector = %d, start sector = %d\n",sector,start_sector); - RPC_LOG("[CDVDisodrv: ] Couldn't Read from file for some reason\n"); + //RPC_LOG("sector = %d, start sector = %d",sector,start_sector); + RPC_LOG("[CDVDisodrv: ] Couldn't Read from file for some reason"); return 0; } //CdSync(0); hm, a wait function maybe... @@ -242,10 +242,10 @@ int CDVDFS_write( int fd, char * buffer, int size ){ int CDVDFS_close( int fd){ if ((fd >= 16) || (fd_used[fd]==0)){ - RPC_LOG("[CDVDisodrv:close] ERROR: File does not appear to be open!\n"); + RPC_LOG("[CDVDisodrv:close] ERROR: File does not appear to be open!"); return -1; } - RPC_LOG("[CDVDisodrv:close] internal fd %d\n", fd); + RPC_LOG("[CDVDisodrv:close] internal fd %d", fd); fd_used[fd] = 0; files_open--; diff --git a/pcsx2/COP0.cpp b/pcsx2/COP0.cpp index cb863ba6a4..49e16e7ee8 100644 --- a/pcsx2/COP0.cpp +++ b/pcsx2/COP0.cpp @@ -25,15 +25,18 @@ u32 s_iLastCOP0Cycle = 0; u32 s_iLastPERFCycle[2] = { 0, 0 }; -void UpdateCP0Status() { - u32 value = cpuRegs.CP0.n.Status.val; +__releaseinline void UpdateCP0Status() { + //currently the 2 memory modes are not implemented. Given this function is called so much, + //it's commented out for now. Only the interrupt test is needed. (rama) - if (value & 0x06 || - (value & 0x18) == 0) { // Kernel Mode (KSU = 0 | EXL = 1 | ERL = 1)*/ - memSetKernelMode(); // Kernel memory always - } else { // User Mode - memSetUserMode(); - } + //u32 value = cpuRegs.CP0.n.Status.val; + + //if (value & 0x06 || + // (value & 0x18) == 0) { // Kernel Mode (KSU = 0 | EXL = 1 | ERL = 1)*/ + // memSetKernelMode(); // Kernel memory always + //} else { // User Mode + // memSetUserMode(); + //} cpuTestHwInts(); } @@ -87,7 +90,7 @@ void MapTLB(int i) void UnmapTLB(int i) { - //SysPrintf("Clear TLB %d: %08x-> [%08x %08x] S=%d G=%d ASID=%d Mask= %03X\n",i,tlb[i].VPN2,tlb[i].PFN0,tlb[i].PFN1,tlb[i].S,tlb[i].G,tlb[i].ASID,tlb[i].Mask); + //Console::WriteLn("Clear TLB %d: %08x-> [%08x %08x] S=%d G=%d ASID=%d Mask= %03X", params i,tlb[i].VPN2,tlb[i].PFN0,tlb[i].PFN1,tlb[i].S,tlb[i].G,tlb[i].ASID,tlb[i].Mask); u32 mask, addr; u32 saddr, eaddr; @@ -102,7 +105,7 @@ void UnmapTLB(int i) mask = ((~tlb[i].Mask) << 1) & 0xfffff; saddr = tlb[i].VPN2 >> 12; eaddr = saddr + tlb[i].Mask + 1; - // SysPrintf("Clear TLB: %08x ~ %08x\n",saddr,eaddr-1); + // Console::WriteLn("Clear TLB: %08x ~ %08x",params saddr,eaddr-1); for (addr=saddr; addr> 12) & mask)) { //match memClearPageAddr(addr << 12); @@ -115,7 +118,7 @@ void UnmapTLB(int i) mask = ((~tlb[i].Mask) << 1) & 0xfffff; saddr = (tlb[i].VPN2 >> 12) + tlb[i].Mask + 1; eaddr = saddr + tlb[i].Mask + 1; - // SysPrintf("Clear TLB: %08x ~ %08x\n",saddr,eaddr-1); + // Console::WriteLn("Clear TLB: %08x ~ %08x",params saddr,eaddr-1); for (addr=saddr; addr> 12) & mask)) { //match memClearPageAddr(addr << 12); @@ -306,9 +309,9 @@ void MFC0() { // Note on _Rd_ Condition 9: CP0.Count should be updated even if _Rt_ is 0. if( (_Rd_ != 9) && !_Rt_ ) return; - if(_Rd_ != 9) { COP0_LOG("%s\n", disR5900Current.getCString() ); } + if(_Rd_ != 9) { COP0_LOG("%s", disR5900Current.getCString() ); } - //if(bExecBIOS == FALSE && _Rd_ == 25) SysPrintf("MFC0 _Rd_ %x = %x\n", _Rd_, cpuRegs.CP0.r[_Rd_]); + //if(bExecBIOS == FALSE && _Rd_ == 25) Console::WriteLn("MFC0 _Rd_ %x = %x", params _Rd_, cpuRegs.CP0.r[_Rd_]); switch (_Rd_) { case 12: @@ -332,7 +335,7 @@ void MFC0() cpuRegs.GPR.r[_Rt_].SD[0] = (s32)cpuRegs.PERF.n.pcr1; break; } - /*SysPrintf("MFC0 PCCR = %x PCR0 = %x PCR1 = %x IMM= %x\n", + /*Console::WriteLn("MFC0 PCCR = %x PCR0 = %x PCR1 = %x IMM= %x", params cpuRegs.PERF.n.pccr, cpuRegs.PERF.n.pcr0, cpuRegs.PERF.n.pcr1, _Imm_ & 0x3F);*/ break; @@ -357,11 +360,24 @@ void MFC0() void MTC0() { COP0_LOG("%s\n", disR5900Current.getCString()); - //if(bExecBIOS == FALSE && _Rd_ == 25) SysPrintf("MTC0 _Rd_ %x = %x\n", _Rd_, cpuRegs.CP0.r[_Rd_]); + //if(bExecBIOS == FALSE && _Rd_ == 25) Console::WriteLn("MTC0 _Rd_ %x = %x", params _Rd_, cpuRegs.CP0.r[_Rd_]); switch (_Rd_) { + case 9: + s_iLastCOP0Cycle = cpuRegs.cycle; + cpuRegs.CP0.r[9] = cpuRegs.GPR.r[_Rt_].UL[0]; + break; + + case 12: + WriteCP0Status(cpuRegs.GPR.r[_Rt_].UL[0]); + break; + + case 24: + Console::WriteLn("MTC0 Breakpoint debug Registers code = %x", params cpuRegs.code & 0x3FF); + break; + case 25: - /*if(bExecBIOS == FALSE && _Rd_ == 25) SysPrintf("MTC0 PCCR = %x PCR0 = %x PCR1 = %x IMM= %x\n", + /*if(bExecBIOS == FALSE && _Rd_ == 25) Console::WriteLn("MTC0 PCCR = %x PCR0 = %x PCR1 = %x IMM= %x", params cpuRegs.PERF.n.pccr, cpuRegs.PERF.n.pcr0, cpuRegs.PERF.n.pcr1, _Imm_ & 0x3F);*/ switch(_Imm_ & 0x3F) { @@ -383,17 +399,7 @@ void MTC0() break; } break; - - case 24: - Console::WriteLn("MTC0 Breakpoint debug Registers code = %x", params cpuRegs.code & 0x3FF); - break; - - case 12: WriteCP0Status(cpuRegs.GPR.r[_Rt_].UL[0]); break; - case 9: - s_iLastCOP0Cycle = cpuRegs.cycle; - cpuRegs.CP0.r[9] = cpuRegs.GPR.r[_Rt_].UL[0]; - break; - + default: cpuRegs.CP0.r[_Rd_] = cpuRegs.GPR.r[_Rt_].UL[0]; break; diff --git a/pcsx2/COP2.cpp b/pcsx2/COP2.cpp index 65cf7f5678..d57df3915b 100644 --- a/pcsx2/COP2.cpp +++ b/pcsx2/COP2.cpp @@ -48,7 +48,7 @@ void BC2F() { if (CP2COND == 0) { - SysPrintf("VU0 Macro Branch \n"); + Console::WriteLn("VU0 Macro Branch"); intDoBranch(_BranchTarget_); } } @@ -56,7 +56,7 @@ void BC2T() { if (CP2COND == 1) { - SysPrintf("VU0 Macro Branch \n"); + Console::WriteLn("VU0 Macro Branch"); intDoBranch(_BranchTarget_); } } @@ -65,7 +65,7 @@ void BC2FL() { if (CP2COND == 0) { - SysPrintf("VU0 Macro Branch \n"); + Console::WriteLn("VU0 Macro Branch"); intDoBranch(_BranchTarget_); } else @@ -77,7 +77,7 @@ void BC2TL() { if (CP2COND == 1) { - SysPrintf("VU0 Macro Branch \n"); + Console::WriteLn("VU0 Macro Branch"); intDoBranch(_BranchTarget_); } else diff --git a/pcsx2/Cache.cpp b/pcsx2/Cache.cpp index ad101b7cb9..7a996a81f7 100644 --- a/pcsx2/Cache.cpp +++ b/pcsx2/Cache.cpp @@ -101,7 +101,7 @@ void writeCache8(u32 mem, u8 value) { int i, number; i = getFreeCache(mem,1,&number); -// CACHE_LOG("writeCache8 %8.8x adding to %d, way %d, value %x\n", mem, i,number,value); +// CACHE_LOG("writeCache8 %8.8x adding to %d, way %d, value %x", mem, i,number,value); pCache[i].data[number][(mem>>4) & 0x3].b8._8[(mem&0xf)] = value; } @@ -110,7 +110,7 @@ void writeCache16(u32 mem, u16 value) { int i, number; i = getFreeCache(mem,1,&number); -// CACHE_LOG("writeCache16 %8.8x adding to %d, way %d, value %x\n", mem, i,number,value); +// CACHE_LOG("writeCache16 %8.8x adding to %d, way %d, value %x", mem, i,number,value); *(u16*)(&pCache[i].data[number][(mem>>4) & 0x3].b8._8[(mem&0xf)]) = value; } @@ -119,7 +119,7 @@ void writeCache32(u32 mem, u32 value) { int i, number; i = getFreeCache(mem,1,&number); -// CACHE_LOG("writeCache32 %8.8x adding to %d, way %d, value %x\n", mem, i,number,value); +// CACHE_LOG("writeCache32 %8.8x adding to %d, way %d, value %x", mem, i,number,value); *(u32*)(&pCache[i].data[number][(mem>>4) & 0x3].b8._8[(mem&0xf)]) = value; } @@ -127,7 +127,7 @@ void writeCache64(u32 mem, u64 value) { int i, number; i = getFreeCache(mem,1,&number); -// CACHE_LOG("writeCache64 %8.8x adding to %d, way %d, value %x\n", mem, i,number,value); +// CACHE_LOG("writeCache64 %8.8x adding to %d, way %d, value %x", mem, i,number,value); *(u64*)(&pCache[i].data[number][(mem>>4) & 0x3].b8._8[(mem&0xf)]) = value; } @@ -135,7 +135,7 @@ void writeCache128(u32 mem, u64 *value) { int i, number; i = getFreeCache(mem,1,&number); -// CACHE_LOG("writeCache128 %8.8x adding to %d\n", mem, i); +// CACHE_LOG("writeCache128 %8.8x adding to %d", mem, i); ((u64*)pCache[i].data[number][(mem>>4) & 0x3].b8._8)[0] = value[0]; ((u64*)pCache[i].data[number][(mem>>4) & 0x3].b8._8)[1] = value[1]; } @@ -144,7 +144,7 @@ u8 *readCache(u32 mem) { int i, number; i = getFreeCache(mem,0,&number); -// CACHE_LOG("readCache %8.8x from %d, way %d\n", mem, i,number); +// CACHE_LOG("readCache %8.8x from %d, way %d", mem, i,number); return pCache[i].data[number][(mem>>4) & 0x3].b8._8; } @@ -180,7 +180,7 @@ void CACHE() { return; } - CACHE_LOG("CACHE DHIN addr %x, index %d, way %d, Flags %x\n",addr,index,way,pCache[index].tag[way] & 0x78); + CACHE_LOG("CACHE DHIN addr %x, index %d, way %d, Flags %x",addr,index,way,pCache[index].tag[way] & 0x78); pCache[index].tag[way] &= ~(0x6F); ((u64*)pCache[index].data[way][0].b8._8)[0] = 0; @@ -216,7 +216,7 @@ void CACHE() { return; } - CACHE_LOG("CACHE DHWBIN addr %x, index %d, way %d, Flags %x\n",addr,index,way,pCache[index].tag[way] & 0x78); + CACHE_LOG("CACHE DHWBIN addr %x, index %d, way %d, Flags %x",addr,index,way,pCache[index].tag[way] & 0x78); if(pCache[index].tag[way] & 0x60) // Valid Dirty { @@ -266,7 +266,7 @@ void CACHE() { { return; } - CACHE_LOG("CACHE DHWOIN addr %x, index %d, way %d, Flags %x\n",addr,index,way,pCache[index].tag[way] & 0x78); + CACHE_LOG("CACHE DHWOIN addr %x, index %d, way %d, Flags %x",addr,index,way,pCache[index].tag[way] & 0x78); if(pCache[index].tag[way] & 0x60) // Valid Dirty { @@ -311,7 +311,7 @@ void CACHE() { u8 * out = pCache[index].data[way][(addr>>4) & 0x3].b8._8; cpuRegs.CP0.r[28] = *(u32 *)(out+(addr&0xf)); - CACHE_LOG("CACHE DXLDT addr %x, index %d, way %d, DATA %x\n",addr,index,way,cpuRegs.CP0.r[28]); + CACHE_LOG("CACHE DXLDT addr %x, index %d, way %d, DATA %x",addr,index,way,cpuRegs.CP0.r[28]); break; } @@ -323,7 +323,7 @@ void CACHE() { cpuRegs.CP0.r[28] = 0; cpuRegs.CP0.r[28] = pCache[index].tag[way]; - CACHE_LOG("CACHE DXLTG addr %x, index %d, way %d, DATA %x\n",addr,index,way,cpuRegs.CP0.r[28]); + CACHE_LOG("CACHE DXLTG addr %x, index %d, way %d, DATA %x",addr,index,way,cpuRegs.CP0.r[28]); break; } @@ -334,7 +334,7 @@ void CACHE() { //u8 * out = pCache[index].data[way][(addr>>4) & 0x3].b8._8; *(u32*)(&pCache[index].data[way][(addr>>4) & 0x3].b8._8[(addr&0xf)]) = cpuRegs.CP0.r[28]; - CACHE_LOG("CACHE DXSDT addr %x, index %d, way %d, DATA %x\n",addr,index,way,cpuRegs.CP0.r[28]); + CACHE_LOG("CACHE DXSDT addr %x, index %d, way %d, DATA %x",addr,index,way,cpuRegs.CP0.r[28]); break; } @@ -344,7 +344,7 @@ void CACHE() { int way = addr & 0x1; pCache[index].tag[way] = cpuRegs.CP0.r[28]; - CACHE_LOG("CACHE DXSTG addr %x, index %d, way %d, DATA %x\n",addr,index,way,cpuRegs.CP0.r[28] & 0x6F); + CACHE_LOG("CACHE DXSTG addr %x, index %d, way %d, DATA %x",addr,index,way,cpuRegs.CP0.r[28] & 0x6F); break; } @@ -356,7 +356,7 @@ void CACHE() { int way = addr & 0x1; - CACHE_LOG("CACHE DXWBIN addr %x, index %d, way %d, Flags %x\n",addr,index,way,pCache[index].tag[way] & 0x78); + CACHE_LOG("CACHE DXWBIN addr %x, index %d, way %d, Flags %x",addr,index,way,pCache[index].tag[way] & 0x78); if(pCache[index].tag[way] & 0x60) // Dirty { diff --git a/pcsx2/CdRom.cpp b/pcsx2/CdRom.cpp index e6ba423d3d..e22160be77 100644 --- a/pcsx2/CdRom.cpp +++ b/pcsx2/CdRom.cpp @@ -140,7 +140,7 @@ void ReadTrack() { cdr.Prev[1] = itob(cdr.SetSector[1]); cdr.Prev[2] = itob(cdr.SetSector[2]); - CDR_LOG("KEY *** %x:%x:%x\n", cdr.Prev[0], cdr.Prev[1], cdr.Prev[2]); + CDR_LOG("KEY *** %x:%x:%x", cdr.Prev[0], cdr.Prev[1], cdr.Prev[2]); cdr.RErr = CDVDreadTrack(MSFtoLSN(cdr.SetSector), CDVD_MODE_2352); } @@ -529,7 +529,7 @@ void cdrReadInterrupt() { memcpy_fast(cdr.Transfer, buf+12, 2340); cdr.Stat = DataReady; - CDR_LOG(" %x:%x:%x\n", cdr.Transfer[0], cdr.Transfer[1], cdr.Transfer[2]); + CDR_LOG(" %x:%x:%x", cdr.Transfer[0], cdr.Transfer[1], cdr.Transfer[2]); cdr.SetSector[2]++; @@ -545,7 +545,7 @@ void cdrReadInterrupt() { cdr.Readed = 0; if ((cdr.Transfer[4+2] & 0x80) && (cdr.Mode & 0x2)) { // EOF - CDR_LOG("AutoPausing Read\n"); + CDR_LOG("AutoPausing Read"); AddIrqQueue(CdlPause, 0x800); } else { @@ -583,7 +583,7 @@ u8 cdrRead0(void) { // what means the 0x10 and the 0x08 bits? i only saw it used by the bios cdr.Ctrl|=0x18; - CDR_LOG("CD0 Read: %x\n", cdr.Ctrl); + CDR_LOG("CD0 Read: %x", cdr.Ctrl); return psxHu8(0x1800) = cdr.Ctrl; } @@ -593,7 +593,7 @@ cdrWrite0: */ void cdrWrite0(u8 rt) { - CDR_LOG("CD0 write: %x\n", rt); + CDR_LOG("CD0 write: %x", rt); cdr.Ctrl = rt | (cdr.Ctrl & ~0x3); @@ -612,14 +612,14 @@ u8 cdrRead1(void) { else psxHu8(0x1801) = 0; - CDR_LOG("CD1 Read: %x\n", psxHu8(0x1801)); + CDR_LOG("CD1 Read: %x", psxHu8(0x1801)); return psxHu8(0x1801); } void cdrWrite1(u8 rt) { int i; - CDR_LOG("CD1 write: %x (%s)\n", rt, CmdName[rt]); + CDR_LOG("CD1 write: %x (%s)", rt, CmdName[rt]); cdr.Cmd = rt; cdr.OCUP = 0; @@ -744,7 +744,7 @@ void cdrWrite1(u8 rt) { break; case CdlSetmode: - CDR_LOG("Setmode %x\n", cdr.Param[0]); + CDR_LOG("Setmode %x", cdr.Param[0]); cdr.Mode = cdr.Param[0]; cdr.Ctrl|= 0x80; @@ -839,12 +839,12 @@ u8 cdrRead2(void) { ret = *cdr.pTransfer++; } - CDR_LOG("CD2 Read: %x\n", ret); + CDR_LOG("CD2 Read: %x", ret); return ret; } void cdrWrite2(u8 rt) { - CDR_LOG("CD2 write: %x\n", rt); + CDR_LOG("CD2 write: %x", rt); if (cdr.Ctrl & 0x1) { switch (rt) { @@ -877,12 +877,12 @@ u8 cdrRead3(void) { psxHu8(0x1803) = 0xff; } else psxHu8(0x1803) = 0; - CDR_LOG("CD3 Read: %x\n", psxHu8(0x1803)); + CDR_LOG("CD3 Read: %x", psxHu8(0x1803)); return psxHu8(0x1803); } void cdrWrite3(u8 rt) { - CDR_LOG("CD3 write: %x\n", rt); + CDR_LOG("CD3 write: %x", rt); if (rt == 0x07 && cdr.Ctrl & 0x1) { cdr.Stat = 0; @@ -909,13 +909,13 @@ void cdrWrite3(u8 rt) { void psxDma3(u32 madr, u32 bcr, u32 chcr) { u32 cdsize; - CDR_LOG("*** DMA 3 *** %lx addr = %lx size = %lx\n", chcr, madr, bcr); + CDR_LOG("*** DMA 3 *** %lx addr = %lx size = %lx", chcr, madr, bcr); switch (chcr) { case 0x11000000: case 0x11400100: if (cdr.Readed == 0) { - CDR_LOG("*** DMA 3 *** NOT READY\n"); + CDR_LOG("*** DMA 3 *** NOT READY"); return; } @@ -930,7 +930,7 @@ void psxDma3(u32 madr, u32 bcr, u32 chcr) { return; default: - CDR_LOG("Unknown cddma %lx\n", chcr); + CDR_LOG("Unknown cddma %lx", chcr); break; } HW_DMA3_CHCR &= ~0x01000000; diff --git a/pcsx2/Counters.cpp b/pcsx2/Counters.cpp index cb148f8261..a58ec1d0a3 100644 --- a/pcsx2/Counters.cpp +++ b/pcsx2/Counters.cpp @@ -327,7 +327,7 @@ static __forceinline void frameLimit() static __forceinline void VSyncStart(u32 sCycle) { - EECNT_LOG( "///////// EE COUNTER VSYNC START \\\\\\\\\\\\\\\\\\\\ (frame: %d)\n", iFrame ); + EECNT_LOG( "///////// EE COUNTER VSYNC START \\\\\\\\\\\\\\\\\\\\ (frame: %d)", iFrame ); vSyncDebugStuff( iFrame ); // EE Profiling and Debug code if ((CSRw & 0x8)) GSCSRr|= 0x8; @@ -361,7 +361,7 @@ static __forceinline void VSyncStart(u32 sCycle) static __forceinline void VSyncEnd(u32 sCycle) { - EECNT_LOG( "///////// EE COUNTER VSYNC END \\\\\\\\\\\\\\\\\\\\ (frame: %d)\n", iFrame ); + EECNT_LOG( "///////// EE COUNTER VSYNC END \\\\\\\\\\\\\\\\\\\\ (frame: %d)", iFrame ); iFrame++; @@ -456,7 +456,7 @@ __forceinline bool rcntUpdate_vSync() if( vblankinc > 1 ) { if( hsc != vSyncInfo.hScanlinesPerFrame ) - SysPrintf( " ** vSync > Abnormal Scanline Count: %d\n", hsc ); + Console::WriteLn( " ** vSync > Abnormal Scanline Count: %d", params hsc ); hsc = 0; vblankinc = 0; } @@ -471,7 +471,7 @@ static __forceinline void __fastcall _cpuTestTarget( int i ) if(counters[i].mode.TargetInterrupt) { - EECNT_LOG("EE Counter[%d] TARGET reached - mode=%x, count=%x, target=%x\n", i, counters[i].mode, counters[i].count, counters[i].target); + EECNT_LOG("EE Counter[%d] TARGET reached - mode=%x, count=%x, target=%x", i, counters[i].mode, counters[i].count, counters[i].target); counters[i].mode.TargetReached = 1; hwIntcIrq(counters[i].interrupt); @@ -489,7 +489,7 @@ static __forceinline void _cpuTestOverflow( int i ) if (counters[i].count <= 0xffff) return; if (counters[i].mode.OverflowInterrupt) { - EECNT_LOG("EE Counter[%d] OVERFLOW - mode=%x, count=%x\n", i, counters[i].mode, counters[i].count); + EECNT_LOG("EE Counter[%d] OVERFLOW - mode=%x, count=%x", i, counters[i].mode, counters[i].count); counters[i].mode.OverflowReached = 1; hwIntcIrq(counters[i].interrupt); } @@ -547,7 +547,7 @@ static void _rcntSetGate( int index ) if( !(counters[index].mode.GateSource == 0 && counters[index].mode.ClockSource == 3) ) { - EECNT_LOG( "EE Counter[%d] Using Gate! Source=%s, Mode=%d.\n", + EECNT_LOG( "EE Counter[%d] Using Gate! Source=%s, Mode=%d.", index, counters[index].mode.GateSource ? "vblank" : "hblank", counters[index].mode.GateMode ); gates |= (1<= 0x10004000) && (mem < 0x10005000) ); - VIF_LOG("ReadFIFO/VIF0 0x%08X\n", mem); + VIF_LOG("ReadFIFO/VIF0 0x%08X", mem); //out[0] = psHu64(mem ); //out[1] = psHu64(mem+8); @@ -67,7 +67,7 @@ void __fastcall ReadFIFO_page_5(u32 mem, u64 *out) { jASSUME( (mem >= 0x10005000) && (mem < 0x10006000) ); - VIF_LOG("ReadFIFO/VIF1, addr=0x%08X\n", mem); + VIF_LOG("ReadFIFO/VIF1, addr=0x%08X", mem); if( vif1Regs->stat & (VIF1_STAT_INT|VIF1_STAT_VSS|VIF1_STAT_VIS|VIF1_STAT_VFS) ) DevCon::Notice( "Reading from vif1 fifo when stalled" ); @@ -127,7 +127,7 @@ void __fastcall WriteFIFO_page_4(u32 mem, const mem128_t *value) { jASSUME( (mem >= 0x10004000) && (mem < 0x10005000) ); - VIF_LOG("WriteFIFO/VIF0, addr=0x%08X\n", mem); + VIF_LOG("WriteFIFO/VIF0, addr=0x%08X", mem); //psHu64(mem ) = value[0]; //psHu64(mem+8) = value[1]; @@ -144,7 +144,7 @@ void __fastcall WriteFIFO_page_5(u32 mem, const mem128_t *value) { jASSUME( (mem >= 0x10005000) && (mem < 0x10006000) ); - VIF_LOG("WriteFIFO/VIF1, addr=0x%08X\n", mem); + VIF_LOG("WriteFIFO/VIF1, addr=0x%08X", mem); //psHu64(mem ) = value[0]; //psHu64(mem+8) = value[1]; @@ -165,7 +165,7 @@ void __fastcall WriteFIFO_page_5(u32 mem, const mem128_t *value) void __fastcall WriteFIFO_page_6(u32 mem, const mem128_t *value) { jASSUME( (mem >= 0x10006000) && (mem < 0x10007000) ); - GIF_LOG("WriteFIFO/GIF, addr=0x%08X\n", mem); + GIF_LOG("WriteFIFO/GIF, addr=0x%08X", mem); //psHu64(mem ) = value[0]; //psHu64(mem+8) = value[1]; @@ -197,7 +197,7 @@ void __fastcall WriteFIFO_page_7(u32 mem, const mem128_t *value) // All addresses in this page map to 0x7000 and 0x7010: mem &= 0x10; - IPU_LOG( "WriteFIFO/IPU, addr=0x%x\n", params mem ); + IPU_LOG( "WriteFIFO/IPU, addr=0x%x", params mem ); if( mem == 0 ) { @@ -206,7 +206,7 @@ void __fastcall WriteFIFO_page_7(u32 mem, const mem128_t *value) } else { - IPU_LOG("WriteFIFO IPU_in[%d] <- %8.8X_%8.8X_%8.8X_%8.8X\n", + IPU_LOG("WriteFIFO IPU_in[%d] <- %8.8X_%8.8X_%8.8X_%8.8X", mem/16, ((u32*)value)[3], ((u32*)value)[2], ((u32*)value)[1], ((u32*)value)[0]); //committing every 16 bytes diff --git a/pcsx2/GS.cpp b/pcsx2/GS.cpp index 2b1ce7ac02..8772c51056 100644 --- a/pcsx2/GS.cpp +++ b/pcsx2/GS.cpp @@ -32,16 +32,8 @@ using namespace std; using namespace R5900; -#ifdef DEBUG -#define MTGS_LOG SysPrintf -#else -#define MTGS_LOG 0&& -#endif - static bool m_gsOpened = false; -int g_FFXHack=0; - #ifdef PCSX2_DEVBUILD // GS Playback @@ -261,7 +253,7 @@ void gsReset() memzero_obj(g_RealGSMem); - Path3transfer = 0; + Path3transfer = FALSE; GSCSRr = 0x551B400F; // Set the FINISH bit to 1 for now GSIMR = 0x7f00; @@ -319,7 +311,7 @@ void gsCSRwrite(u32 value) // Our emulated GS has no FIFO... /*if( value & 0x100 ) { // FLUSH - //SysPrintf("GS_CSR FLUSH GS fifo: %x (CSRr=%x)\n", value, GSCSRr); + //Console::WriteLn("GS_CSR FLUSH GS fifo: %x (CSRr=%x)", params value, GSCSRr); }*/ if (value & 0x200) { // resetGS @@ -365,7 +357,7 @@ __forceinline void gsWrite8(u32 mem, u8 value) if( mtgsThread != NULL ) mtgsThread->SendSimplePacket(GS_RINGTYPE_MEMWRITE8, mem&0x13ff, value, 0); } - GIF_LOG("GS write 8 at %8.8lx with data %8.8lx\n", mem, value); + GIF_LOG("GS write 8 at %8.8lx with data %8.8lx", mem, value); } __forceinline void _gsSMODEwrite( u32 mem, u32 value ) @@ -390,7 +382,7 @@ __forceinline void _gsSMODEwrite( u32 mem, u32 value ) __forceinline void gsWrite16(u32 mem, u16 value) { - GIF_LOG("GS write 16 at %8.8lx with data %8.8lx\n", mem, value); + GIF_LOG("GS write 16 at %8.8lx with data %8.8lx", mem, value); _gsSMODEwrite( mem, value ); @@ -421,7 +413,7 @@ __forceinline void gsWrite16(u32 mem, u16 value) __forceinline void gsWrite32(u32 mem, u32 value) { jASSUME( (mem & 3) == 0 ); - GIF_LOG("GS write 32 at %8.8lx with data %8.8lx\n", mem, value); + GIF_LOG("GS write 32 at %8.8lx with data %8.8lx", mem, value); _gsSMODEwrite( mem, value ); @@ -470,7 +462,7 @@ void __fastcall gsWrite64_page_01( u32 mem, const mem64_t* value ) void __fastcall gsWrite64_generic( u32 mem, const mem64_t* value ) { const u32* const srcval32 = (u32*)value; - GIF_LOG("GS Write64 at %8.8lx with data %8.8x_%8.8x\n", mem, srcval32[1], srcval32[0]); + GIF_LOG("GS Write64 at %8.8lx with data %8.8x_%8.8x", mem, srcval32[1], srcval32[0]); *(u64*)PS2GS_BASE(mem) = *value; @@ -507,7 +499,7 @@ void __fastcall gsWrite128_generic( u32 mem, const mem128_t* value ) { const u32* const srcval32 = (u32*)value; - GIF_LOG("GS Write128 at %8.8lx with data %8.8x_%8.8x_%8.8x_%8.8x \n", mem, + GIF_LOG("GS Write128 at %8.8lx with data %8.8x_%8.8x_%8.8x_%8.8x", mem, srcval32[3], srcval32[2], srcval32[1], srcval32[0]); const uint masked_mem = mem & 0x13ff; @@ -527,7 +519,7 @@ void __fastcall gsWrite128_generic( u32 mem, const mem128_t* value ) // This function is left in for now for debugging/reference purposes. __forceinline void gsWrite64(u32 mem, u64 value) { - GIF_LOG("GS write 64 at %8.8lx with data %8.8lx_%8.8lx\n", mem, ((u32*)&value)[1], (u32)value); + GIF_LOG("GS write 64 at %8.8lx with data %8.8lx_%8.8lx", mem, ((u32*)&value)[1], (u32)value); switch (mem) { @@ -558,26 +550,26 @@ __forceinline void gsWrite64(u32 mem, u64 value) __forceinline u8 gsRead8(u32 mem) { - GIF_LOG("GS read 8 from %8.8lx value: %8.8lx\n", mem, *(u8*)PS2GS_BASE(mem)); + GIF_LOG("GS read 8 from %8.8lx value: %8.8lx", mem, *(u8*)PS2GS_BASE(mem)); return *(u8*)PS2GS_BASE(mem); } __forceinline u16 gsRead16(u32 mem) { - GIF_LOG("GS read 16 from %8.8lx value: %8.8lx\n", mem, *(u16*)PS2GS_BASE(mem)); + GIF_LOG("GS read 16 from %8.8lx value: %8.8lx", mem, *(u16*)PS2GS_BASE(mem)); return *(u16*)PS2GS_BASE(mem); } __forceinline u32 gsRead32(u32 mem) { - GIF_LOG("GS read 32 from %8.8lx value: %8.8lx\n", mem, *(u32*)PS2GS_BASE(mem)); + GIF_LOG("GS read 32 from %8.8lx value: %8.8lx", mem, *(u32*)PS2GS_BASE(mem)); return *(u32*)PS2GS_BASE(mem); } __forceinline u64 gsRead64(u32 mem) { // fixme - PS2GS_BASE(mem+4) = (g_RealGSMem+(mem + 4 & 0x13ff)) - GIF_LOG("GS read 64 from %8.8lx value: %8.8lx_%8.8lx\n", mem, *(u32*)PS2GS_BASE(mem+4), *(u32*)PS2GS_BASE(mem) ); + GIF_LOG("GS read 64 from %8.8lx value: %8.8lx_%8.8lx", mem, *(u32*)PS2GS_BASE(mem+4), *(u32*)PS2GS_BASE(mem) ); return *(u64*)PS2GS_BASE(mem); } @@ -593,7 +585,7 @@ void gsSyncLimiterLostTime( s32 deltaTime ) if( !m_StrictSkipping ) return; - //SysPrintf("LostTime on the EE!\n"); + //Console::WriteLn("LostTime on the EE!"); if( mtgsThread != NULL ) { @@ -749,7 +741,7 @@ __forceinline void gsFrameSkip( bool forceskip ) return; } - //SysPrintf( "Consecutive Frames -- Lateness: %d\n", (int)( sSlowDeltaTime / m_iSlowTicks ) ); + //Console::WriteLn( "Consecutive Frames -- Lateness: %d", params (int)( sSlowDeltaTime / m_iSlowTicks ) ); // -- Consecutive frames section -- // Force-render consecutive frames without skipping. diff --git a/pcsx2/GS.h b/pcsx2/GS.h index c9ee94f134..bdb84fd19a 100644 --- a/pcsx2/GS.h +++ b/pcsx2/GS.h @@ -146,8 +146,9 @@ class mtgsThreadObject : public Threading::Thread protected: // Size of the ringbuffer as a power of 2 -- size is a multiple of simd128s. // (actual size is 1<chcr & 0x100) == 0){ - //SysPrintf("Eh? why are you still interrupting! chcr %x, qwc %x, done = %x\n", gif->chcr, gif->qwc, done); + //Console::WriteLn("Eh? why are you still interrupting! chcr %x, qwc %x, done = %x", params gif->chcr, gif->qwc, done); return; } if(gif->qwc > 0 || gspath3done == 0) { @@ -52,7 +67,7 @@ __forceinline void gsInterrupt() { GIFdma(); #ifdef GSPATH3FIX - // re-reaise the IRQ as part of the mysterious Path3fix. + // re-raise the IRQ as part of the mysterious Path3fix. // fixme - this hack *should* have the gs_irq raised from the VIF, I think. It would be // more efficient and more correct. (air) /*if (!(vif1Regs->mskpath3 && (vif1ch->chcr & 0x100)) || (psHu32(GIF_MODE) & 0x1)) @@ -63,11 +78,10 @@ __forceinline void gsInterrupt() { gspath3done = 0; gscycles = 0; - Path3transfer = 0; + Path3transfer = FALSE; gif->chcr &= ~0x100; GSCSRr &= ~0xC000; //Clear FIFO stuff GSCSRr |= 0x4000; //FIFO empty - //psHu32(GIF_MODE)&= ~0x4; psHu32(GIF_STAT)&= ~0xE00; // OPH=0 | APATH=0 psHu32(GIF_STAT)&= ~0x1F000000; // QFC=0 hwDmacIrq(DMAC_GIF); @@ -78,8 +92,8 @@ static void WRITERING_DMA(u32 *pMem, u32 qwc) { psHu32(GIF_STAT) |= 0xE00; - // Path3 transfer will be set to zero by the GIFtag handler. - Path3transfer = 1; + // Path3 transfer will be set to false by the GIFtag handler. + Path3transfer = TRUE; if( mtgsThread != NULL ) { @@ -103,29 +117,25 @@ static void WRITERING_DMA(u32 *pMem, u32 qwc) else { GSGIFTRANSFER3(pMem, qwc); - if( GSgetLastTag != NULL ) + if (GSgetLastTag != NULL) { - GSgetLastTag(&s_gstag); - if( s_gstag == 1 ) - Path3transfer = 0; /* fixes SRS and others */ - } + GSgetLastTag(&s_gstag); + if (s_gstag == 1) Path3transfer = FALSE; /* fixes SRS and others */ + } } } int _GIFchain() { #ifdef GSPATH3FIX - u32 qwc = (psHu32(GIF_MODE) & 0x4 && vif1Regs->mskpath3) ? min(8, (int)gif->qwc) : gif->qwc; + u32 qwc = ((psHu32(GIF_MODE) & 0x4) && (vif1Regs->mskpath3)) ? min(8, (int)gif->qwc) : gif->qwc; #else u32 qwc = gif->qwc; #endif u32 *pMem; - //if (gif->qwc == 0) return 0; - pMem = (u32*)dmaGetAddr(gif->madr); if (pMem == NULL) { // reset path3, fixes dark cloud 2 - gsGIFSoftReset(4); //must increment madr and clear qwc, else it loops @@ -136,33 +146,50 @@ int _GIFchain() { } WRITERING_DMA(pMem, qwc); - //if((psHu32(GIF_MODE) & 0x4)) amount -= qwc; gif->madr+= qwc*16; gif->qwc -= qwc; return (qwc)*2; } -#define GIFchain() \ - if (gif->qwc) { \ - gscycles+= _GIFchain(); /* guessing */ \ - } +__forceinline void GIFchain() +{ + FreezeRegs(1); + if (gif->qwc) gscycles+= _GIFchain(); /* guessing */ + FreezeRegs(0); +} -int gscount = 0; -static int prevcycles = 0; +static __forceinline void dmaGIFend() +{ + if ((psHu32(GIF_MODE) & 0x4) && gif->qwc != 0) + CPU_INT(2, min( 8, (int)gif->qwc ) /** BIAS*/); + else + CPU_INT(2, gif->qwc /** BIAS*/); +} + +// These could probably be consolidated into one function, +// but I wasn't absolutely sure if there was a good reason +// not to do the gif->qwc != 0 check. --arcum42 +static __forceinline void GIFdmaEnd() +{ + if (psHu32(GIF_MODE) & 0x4) + CPU_INT(2, min( 8, (int)gif->qwc ) /** BIAS*/); + else + CPU_INT(2, gif->qwc /** BIAS*/); +} void GIFdma() { u32 *ptag; u32 id; - + gscycles= prevcycles ? prevcycles: gscycles; - if( (psHu32(GIF_CTRL) & 8) ) { // temporarily stop - SysPrintf("Gif dma temp paused?\n"); + if ((psHu32(GIF_CTRL) & 8)) { // temporarily stop + Console::WriteLn("Gif dma temp paused?"); return; } - GIF_LOG("dmaGIFstart chcr = %lx, madr = %lx, qwc = %lx\n tadr = %lx, asr0 = %lx, asr1 = %lx\n", gif->chcr, gif->madr, gif->qwc, gif->tadr, gif->asr0, gif->asr1); + GIF_LOG("dmaGIFstart chcr = %lx, madr = %lx, qwc = %lx\n tadr = %lx, asr0 = %lx, asr1 = %lx", gif->chcr, gif->madr, gif->qwc, gif->tadr, gif->asr0, gif->asr1); #ifndef GSPATH3FIX if ( !(psHu32(GIF_MODE) & 0x4) ) { @@ -176,7 +203,7 @@ void GIFdma() #endif if ((psHu32(DMAC_CTRL) & 0xC0) == 0x80 && prevcycles != 0) { // STD == GIF - SysPrintf("GS Stall Control Source = %x, Drain = %x\n MADR = %x, STADR = %x", (psHu32(0xe000) >> 4) & 0x3, (psHu32(0xe000) >> 6) & 0x3, gif->madr, psHu32(DMAC_STADR)); + Console::WriteLn("GS Stall Control Source = %x, Drain = %x\n MADR = %x, STADR = %x", params (psHu32(0xe000) >> 4) & 0x3, (psHu32(0xe000) >> 6) & 0x3, gif->madr, psHu32(DMAC_STADR)); if( gif->madr + (gif->qwc * 16) > psHu32(DMAC_STADR) ) { CPU_INT(2, gscycles); @@ -189,11 +216,10 @@ void GIFdma() GSCSRr &= ~0xC000; //Clear FIFO stuff GSCSRr |= 0x8000; //FIFO full - //psHu32(GIF_STAT)|= 0xE00; // OPH=1 | APATH=3 - psHu32(GIF_STAT)|= 0x10000000; // FQC=31, hack ;) + psHu32(GIF_STAT)|= 0x10000000; // FQC=31, hack ;) [ used to be 0xE00; // OPH=1 | APATH=3] #ifdef GSPATH3FIX - if (vif1Regs->mskpath3 || psHu32(GIF_MODE) & 0x1) { + if (vif1Regs->mskpath3 || (psHu32(GIF_MODE) & 0x1)) { if(gif->qwc == 0) { if((gif->chcr & 0x10e) == 0x104) { ptag = (u32*)dmaGetAddr(gif->tadr); //Set memory pointer to TADR @@ -204,15 +230,15 @@ void GIFdma() } gscycles += 2; gif->chcr = ( gif->chcr & 0xFFFF ) | ( (*ptag) & 0xFFFF0000 ); //Transfer upper part of tag to CHCR bits 31-15 - id = (ptag[0] >> 28) & 0x7; //ID for DmaChain copied from bit 28 of the tag + id = (ptag[0] >> 28) & 0x7; //ID for DmaChain copied from bit 28 of the tag gif->qwc = (u16)ptag[0]; //QWC set to lower 16bits of the tag gif->madr = ptag[1]; //MADR = ADDR field gspath3done = hwDmacSrcChainWithStack(gif, id); - GIF_LOG("PTH3 MASK gifdmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx\n", ptag[1], ptag[0], gif->qwc, id, gif->madr); + GIF_LOG("PTH3 MASK gifdmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx", ptag[1], ptag[0], gif->qwc, id, gif->madr); if ((gif->chcr & 0x80) && ptag[0] >> 31) { //Check TIE bit of CHCR and IRQ bit of tag - GIF_LOG("PATH3 MSK dmaIrq Set\n"); - SysPrintf("GIF TIE\n"); + GIF_LOG("PATH3 MSK dmaIrq Set"); + Console::WriteLn("GIF TIE"); gspath3done |= 1; } } @@ -220,18 +246,16 @@ void GIFdma() // When MTGS is enabled, Gifchain calls WRITERING_DMA, which calls GSRINGBUF_DONECOPY, which freezes // the registers inside of the FreezeXMMRegs calls here and in the other two below.. // I'm not really sure that is intentional. --arcum42 - FreezeRegs(1); GIFchain(); - FreezeRegs(0); // Theres a comment below that says not to unfreeze the xmm regs, so not sure about this. + // Theres a comment below that says not to unfreeze the xmm regs, so not sure about freezing and unfreezing in GIFchain. - if((gspath3done == 1 || (gif->chcr & 0xc) == 0) && gif->qwc == 0){ - if(gif->qwc > 0) SysPrintf("Hurray\n"); + if((gif->qwc == 0) && ((gspath3done == 1) || (gif->chcr & 0xc) == 0)){ + //if(gif->qwc > 0) Console::WriteLn("Hurray!"); // We *know* it is 0! gspath3done = 0; gif->chcr &= ~0x100; - //psHu32(GIF_MODE)&= ~0x4; GSCSRr &= ~0xC000; GSCSRr |= 0x4000; - Path3transfer = 0; + Path3transfer = FALSE; psHu32(GIF_STAT)&= ~0x1F000E00; // OPH=0 | APATH=0 | QFC=0 hwDmacIrq(DMAC_GIF); } @@ -239,29 +263,23 @@ void GIFdma() return; } #endif - //gscycles = 0; // Transfer Dn_QWC from Dn_MADR to GIF if ((gif->chcr & 0xc) == 0 || gif->qwc > 0) { // Normal Mode - //gscount++; - if ((psHu32(DMAC_CTRL) & 0xC0) == 0x80 && (gif->chcr & 0xc) == 0) { - SysPrintf("DMA Stall Control on GIF normal\n"); + if ((((psHu32(DMAC_CTRL) & 0xC0) == 0x80) && ((gif->chcr & 0xc) == 0))) { + Console::WriteLn("DMA Stall Control on GIF normal"); } - FreezeRegs(1); GIFchain(); //Transfers the data set by the switch - FreezeRegs(0); - if(gif->qwc == 0 && (gif->chcr & 0xc) == 0) gspath3done = 1; + + if (((gif->qwc == 0) && (gif->chcr & 0xc) == 0)) + gspath3done = 1; else - { - if(psHu32(GIF_MODE) & 0x4) - CPU_INT(2, min( 8, (int)gif->qwc )/** BIAS*/); - else - CPU_INT(2, gif->qwc/* * BIAS*/); - } + GIFdmaEnd(); return; + } else { // Chain Mode - while (gspath3done == 0 && gif->qwc == 0) { //Loop if the transfers aren't intermittent + while ((gspath3done == 0) && (gif->qwc == 0)) { //Loop if the transfers aren't intermittent ptag = (u32*)dmaGetAddr(gif->tadr); //Set memory pointer to TADR if (ptag == NULL) { //Is ptag empty? psHu32(DMAC_STAT)|= 1<<15; //If yes, set BEIS (BUSERR) in DMAC_STAT register @@ -269,30 +287,22 @@ void GIFdma() } gscycles+=2; // Add 1 cycles from the QW read for the tag - // Transfer dma tag if tte is set - if (gif->chcr & 0x40) { - //u32 temptag[4] = {0}; - //SysPrintf("GIF TTE: %x_%x\n", ptag[3], ptag[2]); + // We used to transfer dma tags if tte is set here - //temptag[0] = ptag[2]; - //temptag[1] = ptag[3]; - //GSGIFTRANSFER3(ptag, 1); - } - - gif->chcr = ( gif->chcr & 0xFFFF ) | ( (*ptag) & 0xFFFF0000 ); //Transfer upper part of tag to CHCR bits 31-15 + gif->chcr = ( gif->chcr & 0xFFFF ) | ((*ptag) & 0xFFFF0000); //Transfer upper part of tag to CHCR bits 31-15 - id = (ptag[0] >> 28) & 0x7; //ID for DmaChain copied from bit 28 of the tag + id = (ptag[0] >> 28) & 0x7; //ID for DmaChain copied from bit 28 of the tag gif->qwc = (u16)ptag[0]; //QWC set to lower 16bits of the tag gif->madr = ptag[1]; //MADR = ADDR field gspath3done = hwDmacSrcChainWithStack(gif, id); - GIF_LOG("gifdmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx\n", ptag[1], ptag[0], gif->qwc, id, gif->madr); + GIF_LOG("gifdmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx", ptag[1], ptag[0], gif->qwc, id, gif->madr); if ((psHu32(DMAC_CTRL) & 0xC0) == 0x80) { // STD == GIF // there are still bugs, need to also check if gif->madr +16*qwc >= stadr, if not, stall if(!gspath3done && gif->madr + (gif->qwc * 16) > psHu32(DMAC_STADR) && id == 4) { // stalled - SysPrintf("GS Stall Control Source = %x, Drain = %x\n MADR = %x, STADR = %x", (psHu32(0xe000) >> 4) & 0x3, (psHu32(0xe000) >> 6) & 0x3,gif->madr, psHu32(DMAC_STADR)); + Console::WriteLn("GS Stall Control Source = %x, Drain = %x\n MADR = %x, STADR = %x", params (psHu32(0xe000) >> 4) & 0x3, (psHu32(0xe000) >> 6) & 0x3,gif->madr, psHu32(DMAC_STADR)); prevcycles = gscycles; gif->tadr -= 16; hwDmacIrq(13); @@ -301,23 +311,20 @@ void GIFdma() return; } } - FreezeRegs(1); GIFchain(); //Transfers the data set by the switch - FreezeRegs(0); if ((gif->chcr & 0x80) && ptag[0] >> 31) { //Check TIE bit of CHCR and IRQ bit of tag - GIF_LOG("dmaIrq Set\n"); + GIF_LOG("dmaIrq Set"); gspath3done = 1; - //gif->qwc = 0; } } } prevcycles = 0; if (!(vif1Regs->mskpath3 || (psHu32(GIF_MODE) & 0x1))) { - if(gspath3done == 0) + if (gspath3done == 0) { - if((psHu32(GIF_MODE) & 0x4) && gif->qwc != 0) + if ((psHu32(GIF_MODE) & 0x4) && gif->qwc != 0) { CPU_INT(2, min( 8, (int)gif->qwc )/** BIAS*/); } @@ -327,31 +334,21 @@ void GIFdma() gif->qwc = (u16)ptag[0]; //QWC set to lower 16bits of the tag gif->chcr = ( gif->chcr & 0xFFFF ) | ( (*ptag) & 0xFFFF0000 ); //Transfer upper part of tag to CHCR bits 31-15 - if(psHu32(GIF_MODE) & 0x4) - CPU_INT(2, min( 8, (int)gif->qwc )/** BIAS*/); - else - CPU_INT(2, gif->qwc /** BIAS*/); - + GIFdmaEnd(); gif->qwc = 0; return; } } - //CPU_INT(2, gif->qwc /** BIAS*/); gscycles = 0; } } void dmaGIF() { - //if(vif1Regs->mskpath3 || (psHu32(GIF_MODE) & 0x1)){ - // CPU_INT(2, 48); //Wait time for the buffer to fill, fixes some timing problems in path 3 masking - //} //It takes the time of 24 QW for the BUS to become ready - The Punisher, And1 Streetball - //else + //We used to addd wait time for the buffer to fill here, fixing some timing problems in path 3 masking + //It takes the time of 24 QW for the BUS to become ready - The Punisher, And1 Streetball - - - if ((psHu32(DMAC_CTRL) & 0xC) == 0xC ) { // GIF MFIFO - SysPrintf("GIF MFIFO\n"); + Console::WriteLn("GIF MFIFO"); gifMFIFOInterrupt(); return; } @@ -360,78 +357,34 @@ void dmaGIF() { GSCSRr &= ~0xC000; //Clear FIFO stuff GSCSRr |= 0x8000; //FIFO full - //psHu32(GIF_STAT)|= 0xE00; // OPH=1 | APATH=3 - psHu32(GIF_STAT)|= 0x10000000; // FQC=31, hack ;) + psHu32(GIF_STAT)|= 0x10000000; // FQC=31, hack ;) [used to be 0xE00; // OPH=1 | APATH=3] - if ((gif->chcr & 0xc) != 0 && gif->qwc == 0){ + if ((gif->qwc == 0) && ((gif->chcr & 0xc) != 0)){ u32 *ptag; ptag = (u32*)dmaGetAddr(gif->tadr); gif->qwc = (u16)ptag[0]; //QWC set to lower 16bits of the tag gif->chcr = ( gif->chcr & 0xFFFF ) | ( (*ptag) & 0xFFFF0000 ); //Transfer upper part of tag to CHCR bits 31-15 - if((psHu32(GIF_MODE) & 0x4) && gif->qwc != 0) - { - CPU_INT(2, min( 8, (int)gif->qwc ) /** BIAS*/); - } - else - { - CPU_INT(2, gif->qwc /** BIAS*/); - } + + dmaGIFend(); gif->qwc = 0; return; } - if(gif->qwc > 0 && (gif->chcr & 0x4) == 0x4) { - //SysPrintf("HL Hack\n"); - gspath3done = 1; //Halflife sets a QWC amount in chain mode, no tadr set. - if((psHu32(GIF_MODE) & 0x4) && gif->qwc != 0) - { - CPU_INT(2, min( 8, (int)gif->qwc ) /** BIAS*/); - } - else - { - CPU_INT(2, gif->qwc /** BIAS*/); - } - return; - } - - - - //GIFdma(); - if((psHu32(GIF_MODE) & 0x4) && gif->qwc != 0) - { - CPU_INT(2, min( 8, (int)gif->qwc ) /** BIAS*/); - } - else - { - CPU_INT(2, gif->qwc /** BIAS*/); - } + //Halflife sets a QWC amount in chain mode, no tadr set. + if((gif->qwc > 0) && ((gif->chcr & 0x4) == 0x4)) gspath3done = 1; + dmaGIFend(); } -#define spr0 ((DMACh*)&PS2MEM_HW[0xD000]) - -enum gifstate_t -{ - GIF_STATE_EMPTY = 0, - GIF_STATE_STALL, - GIF_STATE_DONE -}; - -static unsigned int mfifocycles; -static unsigned int gifqwc = 0; - -// A three-way toggle used to determine if the GIF is stalling (transferring) or done (finished). -static gifstate_t gifstate = GIF_STATE_EMPTY; - // called from only one location, so forceinline it: static __forceinline int mfifoGIFrbTransfer() { u32 qwc = (psHu32(GIF_MODE) & 0x4 && vif1Regs->mskpath3) ? min(8, (int)gif->qwc) : gif->qwc; int mfifoqwc = min(gifqwc, qwc); u32 *src; - /* Check if the transfer should wrap around the ring buffer */ - if ((gif->madr+mfifoqwc*16) > (psHu32(DMAC_RBOR) + psHu32(DMAC_RBSR)+16)) { + if ((gif->madr+mfifoqwc*16) > (psHu32(DMAC_RBOR) + psHu32(DMAC_RBSR)+16)) + { int s1 = ((psHu32(DMAC_RBOR) + psHu32(DMAC_RBSR)+16) - gif->madr) >> 4; // fixme - I don't think these should use WRITERING_DMA, since our source @@ -447,7 +400,9 @@ static __forceinline int mfifoGIFrbTransfer() { if (src == NULL) return -1; WRITERING_DMA(src, (mfifoqwc - s1)); - } else { + } + else + { /* it doesn't, so just transfer 'qwc*16' words from 'gif->madr' to GS */ src = (u32*)PSM(gif->madr); @@ -461,7 +416,6 @@ static __forceinline int mfifoGIFrbTransfer() { gif->qwc -= mfifoqwc; gif->madr+= mfifoqwc*16; mfifocycles+= (mfifoqwc) * 2; /* guessing */ - return 0; } @@ -473,9 +427,12 @@ static __forceinline int mfifoGIFchain() { if (gif->qwc == 0) return 0; if (gif->madr >= psHu32(DMAC_RBOR) && - gif->madr <= (psHu32(DMAC_RBOR)+psHu32(DMAC_RBSR))) { + gif->madr <= (psHu32(DMAC_RBOR)+psHu32(DMAC_RBSR))) + { if (mfifoGIFrbTransfer() == -1) return -1; - } else { + } + else + { int mfifoqwc = (psHu32(GIF_MODE) & 0x4 && vif1Regs->mskpath3) ? min(8, (int)gif->qwc) : gif->qwc; u32 *pMem = (u32*)dmaGetAddr(gif->madr); if (pMem == NULL) return -1; @@ -488,7 +445,7 @@ static __forceinline int mfifoGIFchain() { return 0; } -int gifmfifoirq = 0; +bool gifmfifoirq = FALSE; void mfifoGIFtransfer(int qwc) { u32 *ptag; @@ -496,80 +453,77 @@ void mfifoGIFtransfer(int qwc) { u32 temp = 0; mfifocycles = 0; - gifmfifoirq = 0; + gifmfifoirq = FALSE; if(qwc > 0 ) { - gifqwc += qwc; - if(!(gif->chcr & 0x100))return; - if(gifstate == GIF_STATE_STALL) return; - } - SPR_LOG("mfifoGIFtransfer %x madr %x, tadr %x\n", gif->chcr, gif->madr, gif->tadr); - + gifqwc += qwc; + if(!(gif->chcr & 0x100))return; + if(gifstate == GIF_STATE_STALL) return; + } - + SPR_LOG("mfifoGIFtransfer %x madr %x, tadr %x", gif->chcr, gif->madr, gif->tadr); + if(gif->qwc == 0){ - if(gif->tadr == spr0->madr) { - #ifdef PCSX2_DEVBUILD - /*if( gifqwc > 1 ) - SysPrintf("gif mfifo tadr==madr but qwc = %d\n", gifqwc);*/ - #endif - //hwDmacIrq(14); - - return; - } - gif->tadr = psHu32(DMAC_RBOR) + (gif->tadr & psHu32(DMAC_RBSR)); - ptag = (u32*)dmaGetAddr(gif->tadr); + if(gif->tadr == spr0->madr) { + //if( gifqwc > 1 ) DevCon::WriteLn("gif mfifo tadr==madr but qwc = %d", params gifqwc); + //hwDmacIrq(14); - id = (ptag[0] >> 28) & 0x7; - gif->qwc = (ptag[0] & 0xffff); - gif->madr = ptag[1]; - mfifocycles += 2; + return; + } + gif->tadr = psHu32(DMAC_RBOR) + (gif->tadr & psHu32(DMAC_RBSR)); + ptag = (u32*)dmaGetAddr(gif->tadr); - gif->chcr = ( gif->chcr & 0xFFFF ) | ( (*ptag) & 0xFFFF0000 ); - SPR_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx mfifo qwc = %x spr0 madr = %x\n", - ptag[1], ptag[0], gif->qwc, id, gif->madr, gif->tadr, gifqwc, spr0->madr); + id = (ptag[0] >> 28) & 0x7; + gif->qwc = (ptag[0] & 0xffff); + gif->madr = ptag[1]; + mfifocycles += 2; + + gif->chcr = ( gif->chcr & 0xFFFF ) | ( (*ptag) & 0xFFFF0000 ); + SPR_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx mfifo qwc = %x spr0 madr = %x", + ptag[1], ptag[0], gif->qwc, id, gif->madr, gif->tadr, gifqwc, spr0->madr); - gifqwc--; - switch (id) { - case 0: // Refe - Transfer Packet According to ADDR field - gif->tadr = psHu32(DMAC_RBOR) + ((gif->tadr + 16) & psHu32(DMAC_RBSR)); - gifstate = GIF_STATE_DONE; //End Transfer - break; + gifqwc--; + switch (id) { + case 0: // Refe - Transfer Packet According to ADDR field + gif->tadr = psHu32(DMAC_RBOR) + ((gif->tadr + 16) & psHu32(DMAC_RBSR)); + gifstate = GIF_STATE_DONE; //End Transfer + break; - case 1: // CNT - Transfer QWC following the tag. - gif->madr = psHu32(DMAC_RBOR) + ((gif->tadr + 16) & psHu32(DMAC_RBSR)); //Set MADR to QW after Tag - gif->tadr = psHu32(DMAC_RBOR) + ((gif->madr + (gif->qwc << 4)) & psHu32(DMAC_RBSR)); //Set TADR to QW following the data - gifstate = GIF_STATE_EMPTY; - break; + case 1: // CNT - Transfer QWC following the tag. + gif->madr = psHu32(DMAC_RBOR) + ((gif->tadr + 16) & psHu32(DMAC_RBSR)); //Set MADR to QW after Tag + gif->tadr = psHu32(DMAC_RBOR) + ((gif->madr + (gif->qwc << 4)) & psHu32(DMAC_RBSR)); //Set TADR to QW following the data + gifstate = GIF_STATE_EMPTY; + break; - case 2: // Next - Transfer QWC following tag. TADR = ADDR - temp = gif->madr; //Temporarily Store ADDR - gif->madr = psHu32(DMAC_RBOR) + ((gif->tadr + 16) & psHu32(DMAC_RBSR)); //Set MADR to QW following the tag - gif->tadr = temp; //Copy temporarily stored ADDR to Tag - gifstate = GIF_STATE_EMPTY; - break; + case 2: // Next - Transfer QWC following tag. TADR = ADDR + temp = gif->madr; //Temporarily Store ADDR + gif->madr = psHu32(DMAC_RBOR) + ((gif->tadr + 16) & psHu32(DMAC_RBSR)); //Set MADR to QW following the tag + gif->tadr = temp; //Copy temporarily stored ADDR to Tag + gifstate = GIF_STATE_EMPTY; + break; - case 3: // Ref - Transfer QWC from ADDR field - case 4: // Refs - Transfer QWC from ADDR field (Stall Control) - gif->tadr = psHu32(DMAC_RBOR) + ((gif->tadr + 16) & psHu32(DMAC_RBSR)); //Set TADR to next tag - gifstate = GIF_STATE_EMPTY; - break; + case 3: // Ref - Transfer QWC from ADDR field + case 4: // Refs - Transfer QWC from ADDR field (Stall Control) + gif->tadr = psHu32(DMAC_RBOR) + ((gif->tadr + 16) & psHu32(DMAC_RBSR)); //Set TADR to next tag + gifstate = GIF_STATE_EMPTY; + break; - case 7: // End - Transfer QWC following the tag - gif->madr = psHu32(DMAC_RBOR) + ((gif->tadr + 16) & psHu32(DMAC_RBSR)); //Set MADR to data following the tag - gif->tadr = psHu32(DMAC_RBOR) + ((gif->madr + (gif->qwc << 4)) & psHu32(DMAC_RBSR)); //Set TADR to QW following the data - gifstate = GIF_STATE_DONE; //End Transfer - break; - } - if ((gif->chcr & 0x80) && (ptag[0] >> 31)) { - SPR_LOG("dmaIrq Set\n"); - gifstate = GIF_STATE_DONE; - gifmfifoirq = 1; + case 7: // End - Transfer QWC following the tag + gif->madr = psHu32(DMAC_RBOR) + ((gif->tadr + 16) & psHu32(DMAC_RBSR)); //Set MADR to data following the tag + gif->tadr = psHu32(DMAC_RBOR) + ((gif->madr + (gif->qwc << 4)) & psHu32(DMAC_RBSR)); //Set TADR to QW following the data + gifstate = GIF_STATE_DONE; //End Transfer + break; } + + if ((gif->chcr & 0x80) && (ptag[0] >> 31)) { + SPR_LOG("dmaIrq Set"); + gifstate = GIF_STATE_DONE; + gifmfifoirq = TRUE; + } } FreezeRegs(1); if (mfifoGIFchain() == -1) { - SysPrintf("GIF dmaChain error size=%d, madr=%lx, tadr=%lx\n", + Console::WriteLn("GIF dmaChain error size=%d, madr=%lx, tadr=%lx", params gif->qwc, gif->madr, gif->tadr); gifstate = GIF_STATE_STALL; } @@ -578,16 +532,20 @@ void mfifoGIFtransfer(int qwc) { if(gif->qwc == 0 && gifstate == GIF_STATE_DONE) gifstate = GIF_STATE_STALL; CPU_INT(11,mfifocycles); - SPR_LOG("mfifoGIFtransfer end %x madr %x, tadr %x\n", gif->chcr, gif->madr, gif->tadr); + SPR_LOG("mfifoGIFtransfer end %x madr %x, tadr %x", gif->chcr, gif->madr, gif->tadr); } void gifMFIFOInterrupt() { - if(!(gif->chcr & 0x100)) { SysPrintf("WTF GIFMFIFO\n");cpuRegs.interrupt &= ~(1 << 11); return ; } + if (!(gif->chcr & 0x100)) { + Console::WriteLn("WTF GIFMFIFO"); + cpuRegs.interrupt &= ~(1 << 11); + return ; + } if(gifstate != GIF_STATE_STALL) { if(gifqwc <= 0) { - //SysPrintf("Empty\n"); + //Console::WriteLn("Empty"); psHu32(GIF_STAT)&= ~0xE00; // OPH=0 | APATH=0 hwDmacIrq(14); return; @@ -601,14 +559,13 @@ void gifMFIFOInterrupt() return; } #endif - //if(gifqwc > 0)SysPrintf("GIF MFIFO ending with stuff in it %x\n", gifqwc); - if( gifmfifoirq == 0) gifqwc = 0; + //if(gifqwc > 0) Console::WriteLn("GIF MFIFO ending with stuff in it %x", params gifqwc); + if (!gifmfifoirq) gifqwc = 0; gifstate = GIF_STATE_EMPTY; gif->chcr &= ~0x100; hwDmacIrq(DMAC_GIF); GSCSRr &= ~0xC000; //Clear FIFO stuff GSCSRr |= 0x4000; //FIFO empty - //psHu32(GIF_MODE)&= ~0x4; psHu32(GIF_STAT)&= ~0xE00; // OPH=0 | APATH=0 psHu32(GIF_STAT)&= ~0x1F000000; // QFC=0 } diff --git a/pcsx2/Hw.cpp b/pcsx2/Hw.cpp index c3a520538d..1b34b55f05 100644 --- a/pcsx2/Hw.cpp +++ b/pcsx2/Hw.cpp @@ -81,7 +81,7 @@ __forceinline void intcInterrupt() } if ((psHu32(INTC_STAT) & psHu32(INTC_MASK)) == 0) return; - HW_LOG("intcInterrupt %x\n", psHu32(INTC_STAT) & psHu32(INTC_MASK)); + HW_LOG("intcInterrupt %x", psHu32(INTC_STAT) & psHu32(INTC_MASK)); if(psHu32(INTC_STAT) & 0x2){ counters[0].hold = rcntRcount(0); counters[1].hold = rcntRcount(1); @@ -99,7 +99,7 @@ __forceinline void dmacInterrupt() if((psHu32(DMAC_CTRL) & 0x1) == 0) return; - HW_LOG("dmacInterrupt %x\n", (psHu16(0xe012) & psHu16(0xe010) || + HW_LOG("dmacInterrupt %x", (psHu16(0xe012) & psHu16(0xe010) || psHu16(0xe010) & 0x8000)); cpuException(0x800, cpuRegs.branch); @@ -188,7 +188,7 @@ int hwDmacSrcChainWithStack(DMACh *dma, int id) { dma->chcr = (dma->chcr & 0xffffffcf) | 0x20; //2 Addresses in call stack dma->asr1 = dma->madr + (dma->qwc << 4); //If no store Succeeding tag in ASR1 }else { - SysPrintf("Call Stack Overflow (report if it fixes/breaks anything)\n"); + Console::Notice("Call Stack Overflow (report if it fixes/breaks anything)"); return 1; //Return done } dma->tadr = temp; //Set TADR to temporarily stored ADDR @@ -402,20 +402,20 @@ mem32_t __fastcall hwRead32(u32 mem) case D2_SADR: regName = "DMA2_SADDR"; break; } - HW_LOG( "Hardware Read32 at 0x%x (%s), value=0x%x\n", mem, regName, psHu32(mem) ); + HW_LOG( "Hardware Read32 at 0x%x (%s), value=0x%x", mem, regName, psHu32(mem) ); } break; case 0x0b: if( mem == D4_CHCR ) - HW_LOG("Hardware Read32 at 0x%x (IPU1:DMA4_CHCR), value=0x%x\n", mem, psHu32(mem)); + HW_LOG("Hardware Read32 at 0x%x (IPU1:DMA4_CHCR), value=0x%x", mem, psHu32(mem)); break; case 0x0c: case 0x0d: case 0x0e: if( mem == DMAC_STAT ) - HW_LOG("DMAC_STAT Read32, value=0x%x\n", psHu32(DMAC_STAT)); + HW_LOG("DMAC_STAT Read32, value=0x%x", psHu32(DMAC_STAT)); break; jNO_DEFAULT; @@ -465,7 +465,7 @@ __forceinline void __fastcall hwWrite32(u32 mem, u32 value) case 0x10001820: rcntWtarget(3, value); break; case GIF_CTRL: - //SysPrintf("GIF_CTRL write %x\n", value); + //Console::WriteLn("GIF_CTRL write %x", params value); psHu32(mem) = value & 0x8; if (value & 0x1) gsGIFReset(); else if( value & 8 ) psHu32(GIF_STAT) |= 8; @@ -482,167 +482,167 @@ __forceinline void __fastcall hwWrite32(u32 mem, u32 value) break; case GIF_STAT: // stat is readonly - SysPrintf("Gifstat write value = %x\n", value); + Console::WriteLn("Gifstat write value = %x", params value); return; case 0x10008000: // dma0 - vif0 - DMA_LOG("VIF0dma %lx\n", value); + DMA_LOG("VIF0dma %lx", value); DmaExec(dmaVIF0, mem, value); break; //------------------------------------------------------------------ case 0x10009000: // dma1 - vif1 - chcr - DMA_LOG("VIF1dma CHCR %lx\n", value); + DMA_LOG("VIF1dma CHCR %lx", value); DmaExec(dmaVIF1, mem, value); break; #ifdef PCSX2_DEVBUILD case 0x10009010: // dma1 - vif1 - madr - HW_LOG("VIF1dma Madr %lx\n", value); + HW_LOG("VIF1dma Madr %lx", value); psHu32(mem) = value;//dma1 madr break; case 0x10009020: // dma1 - vif1 - qwc - HW_LOG("VIF1dma QWC %lx\n", value); + HW_LOG("VIF1dma QWC %lx", value); psHu32(mem) = value;//dma1 qwc break; case 0x10009030: // dma1 - vif1 - tadr - HW_LOG("VIF1dma TADR %lx\n", value); + HW_LOG("VIF1dma TADR %lx", value); psHu32(mem) = value;//dma1 tadr break; case 0x10009040: // dma1 - vif1 - asr0 - HW_LOG("VIF1dma ASR0 %lx\n", value); + HW_LOG("VIF1dma ASR0 %lx", value); psHu32(mem) = value;//dma1 asr0 break; case 0x10009050: // dma1 - vif1 - asr1 - HW_LOG("VIF1dma ASR1 %lx\n", value); + HW_LOG("VIF1dma ASR1 %lx", value); psHu32(mem) = value;//dma1 asr1 break; case 0x10009080: // dma1 - vif1 - sadr - HW_LOG("VIF1dma SADR %lx\n", value); + HW_LOG("VIF1dma SADR %lx", value); psHu32(mem) = value;//dma1 sadr break; #endif //------------------------------------------------------------------ case 0x1000a000: // dma2 - gif - DMA_LOG("0x%8.8x hwWrite32: GSdma %lx\n", cpuRegs.cycle, value); + DMA_LOG("0x%8.8x hwWrite32: GSdma %lx", cpuRegs.cycle, value); DmaExec(dmaGIF, mem, value); break; #ifdef PCSX2_DEVBUILD case 0x1000a010: psHu32(mem) = value;//dma2 madr - HW_LOG("Hardware write DMA2_MADR 32bit at %x with value %x\n",mem,value); + HW_LOG("Hardware write DMA2_MADR 32bit at %x with value %x",mem,value); break; case 0x1000a020: psHu32(mem) = value;//dma2 qwc - HW_LOG("Hardware write DMA2_QWC 32bit at %x with value %x\n",mem,value); + HW_LOG("Hardware write DMA2_QWC 32bit at %x with value %x",mem,value); break; case 0x1000a030: psHu32(mem) = value;//dma2 taddr - HW_LOG("Hardware write DMA2_TADDR 32bit at %x with value %x\n",mem,value); + HW_LOG("Hardware write DMA2_TADDR 32bit at %x with value %x",mem,value); break; case 0x1000a040: psHu32(mem) = value;//dma2 asr0 - HW_LOG("Hardware write DMA2_ASR0 32bit at %x with value %x\n",mem,value); + HW_LOG("Hardware write DMA2_ASR0 32bit at %x with value %x",mem,value); break; case 0x1000a050: psHu32(mem) = value;//dma2 asr1 - HW_LOG("Hardware write DMA2_ASR1 32bit at %x with value %x\n",mem,value); + HW_LOG("Hardware write DMA2_ASR1 32bit at %x with value %x",mem,value); break; case 0x1000a080: psHu32(mem) = value;//dma2 saddr - HW_LOG("Hardware write DMA2_SADDR 32bit at %x with value %x\n",mem,value); + HW_LOG("Hardware write DMA2_SADDR 32bit at %x with value %x",mem,value); break; #endif //------------------------------------------------------------------ case 0x1000b000: // dma3 - fromIPU - DMA_LOG("IPU0dma %lx\n", value); + DMA_LOG("IPU0dma %lx", value); DmaExec(dmaIPU0, mem, value); break; //------------------------------------------------------------------ #ifdef PCSX2_DEVBUILD case 0x1000b010: psHu32(mem) = value;//dma2 madr - HW_LOG("Hardware write IPU0DMA_MADR 32bit at %x with value %x\n",mem,value); + HW_LOG("Hardware write IPU0DMA_MADR 32bit at %x with value %x",mem,value); break; case 0x1000b020: psHu32(mem) = value;//dma2 madr - HW_LOG("Hardware write IPU0DMA_QWC 32bit at %x with value %x\n",mem,value); + HW_LOG("Hardware write IPU0DMA_QWC 32bit at %x with value %x",mem,value); break; case 0x1000b030: psHu32(mem) = value;//dma2 tadr - HW_LOG("Hardware write IPU0DMA_TADR 32bit at %x with value %x\n",mem,value); + HW_LOG("Hardware write IPU0DMA_TADR 32bit at %x with value %x",mem,value); break; case 0x1000b080: psHu32(mem) = value;//dma2 saddr - HW_LOG("Hardware write IPU0DMA_SADDR 32bit at %x with value %x\n",mem,value); + HW_LOG("Hardware write IPU0DMA_SADDR 32bit at %x with value %x",mem,value); break; #endif //------------------------------------------------------------------ case 0x1000b400: // dma4 - toIPU - DMA_LOG("IPU1dma %lx\n", value); + DMA_LOG("IPU1dma %lx", value); DmaExec(dmaIPU1, mem, value); break; //------------------------------------------------------------------ #ifdef PCSX2_DEVBUILD case 0x1000b410: psHu32(mem) = value;//dma2 madr - HW_LOG("Hardware write IPU1DMA_MADR 32bit at %x with value %x\n",mem,value); + HW_LOG("Hardware write IPU1DMA_MADR 32bit at %x with value %x",mem,value); break; case 0x1000b420: psHu32(mem) = value;//dma2 madr - HW_LOG("Hardware write IPU1DMA_QWC 32bit at %x with value %x\n",mem,value); + HW_LOG("Hardware write IPU1DMA_QWC 32bit at %x with value %x",mem,value); break; case 0x1000b430: psHu32(mem) = value;//dma2 tadr - HW_LOG("Hardware write IPU1DMA_TADR 32bit at %x with value %x\n",mem,value); + HW_LOG("Hardware write IPU1DMA_TADR 32bit at %x with value %x",mem,value); break; case 0x1000b480: psHu32(mem) = value;//dma2 saddr - HW_LOG("Hardware write IPU1DMA_SADDR 32bit at %x with value %x\n",mem,value); + HW_LOG("Hardware write IPU1DMA_SADDR 32bit at %x with value %x",mem,value); break; #endif //------------------------------------------------------------------ case 0x1000c000: // dma5 - sif0 - DMA_LOG("SIF0dma %lx\n", value); + DMA_LOG("SIF0dma %lx", value); //if (value == 0) psxSu32(0x30) = 0x40000; DmaExec(dmaSIF0, mem, value); break; //------------------------------------------------------------------ case 0x1000c400: // dma6 - sif1 - DMA_LOG("SIF1dma %lx\n", value); + DMA_LOG("SIF1dma %lx", value); DmaExec(dmaSIF1, mem, value); break; #ifdef PCSX2_DEVBUILD case 0x1000c420: // dma6 - sif1 - qwc - HW_LOG("SIF1dma QWC = %lx\n", value); + HW_LOG("SIF1dma QWC = %lx", value); psHu32(mem) = value; break; case 0x1000c430: // dma6 - sif1 - tadr - HW_LOG("SIF1dma TADR = %lx\n", value); + HW_LOG("SIF1dma TADR = %lx", value); psHu32(mem) = value; break; #endif //------------------------------------------------------------------ case 0x1000c800: // dma7 - sif2 - DMA_LOG("SIF2dma %lx\n", value); + DMA_LOG("SIF2dma %lx", value); DmaExec(dmaSIF2, mem, value); break; //------------------------------------------------------------------ case 0x1000d000: // dma8 - fromSPR - DMA_LOG("fromSPRdma %lx\n", value); + DMA_LOG("fromSPRdma %lx", value); DmaExec(dmaSPR0, mem, value); break; //------------------------------------------------------------------ case 0x1000d400: // dma9 - toSPR - DMA_LOG("toSPRdma %lx\n", value); + DMA_LOG("toSPRdma %lx", value); DmaExec(dmaSPR1, mem, value); break; //------------------------------------------------------------------ case 0x1000e000: // DMAC_CTRL - HW_LOG("DMAC_CTRL Write 32bit %x\n", value); + HW_LOG("DMAC_CTRL Write 32bit %x", value); psHu32(0xe000) = value; break; case 0x1000e010: // DMAC_STAT - HW_LOG("DMAC_STAT Write 32bit %x\n", value); + HW_LOG("DMAC_STAT Write 32bit %x", value); psHu16(0xe010)&= ~(value & 0xffff); // clear on 1 psHu16(0xe012) ^= (u16)(value >> 16); @@ -650,13 +650,13 @@ __forceinline void __fastcall hwWrite32(u32 mem, u32 value) break; //------------------------------------------------------------------ case 0x1000f000: // INTC_STAT - HW_LOG("INTC_STAT Write 32bit %x\n", value); + HW_LOG("INTC_STAT Write 32bit %x", value); psHu32(0xf000)&=~value; //cpuTestINTCInts(); break; case 0x1000f010: // INTC_MASK - HW_LOG("INTC_MASK Write 32bit %x\n", value); + HW_LOG("INTC_MASK Write 32bit %x", value); psHu32(0xf010) ^= (u16)value; cpuTestINTCInts(); break; @@ -672,7 +672,7 @@ __forceinline void __fastcall hwWrite32(u32 mem, u32 value) break; //------------------------------------------------------------------ case 0x1000f590: // DMAC_ENABLEW - HW_LOG("DMAC_ENABLEW Write 32bit %lx\n", value); + HW_LOG("DMAC_ENABLEW Write 32bit %lx", value); psHu32(0xf590) = value; psHu32(0xf520) = value; return; @@ -698,12 +698,12 @@ __forceinline void __fastcall hwWrite32(u32 mem, u32 value) //------------------------------------------------------------------ case 0x1000f130: case 0x1000f410: - HW_LOG("Unknown Hardware write 32 at %x with value %x (%x)\n", mem, value, cpuRegs.CP0.n.Status.val); + HW_LOG("Unknown Hardware write 32 at %x with value %x (%x)", mem, value, cpuRegs.CP0.n.Status.val); break; //------------------------------------------------------------------ default: psHu32(mem) = value; - HW_LOG("Unknown Hardware write 32 at %x with value %x (%x)\n", mem, value, cpuRegs.CP0.n.Status.val); + HW_LOG("Unknown Hardware write 32 at %x with value %x (%x)", mem, value, cpuRegs.CP0.n.Status.val); break; } } @@ -745,7 +745,7 @@ __forceinline void hwWrite64(u32 mem, u64 value) case GIF_MODE: #ifdef GSPATH3FIX - Console::Status("GIFMODE64 %x\n", params value); + Console::Status("GIFMODE64 %x", params value); #endif psHu64(GIF_MODE) = value; if (value & 0x1) psHu32(GIF_STAT)|= 0x1; @@ -758,17 +758,17 @@ __forceinline void hwWrite64(u32 mem, u64 value) return; case 0x1000a000: // dma2 - gif - DMA_LOG("0x%8.8x hwWrite64: GSdma %lx\n", cpuRegs.cycle, value); + DMA_LOG("0x%8.8x hwWrite64: GSdma %lx", cpuRegs.cycle, value); DmaExec(dmaGIF, mem, value); break; case 0x1000e000: // DMAC_CTRL - HW_LOG("DMAC_CTRL Write 64bit %x\n", value); + HW_LOG("DMAC_CTRL Write 64bit %x", value); psHu64(mem) = value; break; case 0x1000e010: // DMAC_STAT - HW_LOG("DMAC_STAT Write 64bit %x\n", value); + HW_LOG("DMAC_STAT Write 64bit %x", value); val32 = (u32)value; psHu16(0xe010)&= ~(val32 & 0xffff); // clear on 1 val32 = val32 >> 16; @@ -789,13 +789,13 @@ __forceinline void hwWrite64(u32 mem, u64 value) break; case 0x1000f000: // INTC_STAT - HW_LOG("INTC_STAT Write 64bit %x\n", value); + HW_LOG("INTC_STAT Write 64bit %x", value); psHu32(INTC_STAT)&=~value; cpuTestINTCInts(); break; case 0x1000f010: // INTC_MASK - HW_LOG("INTC_MASK Write 32bit %x\n", value); + HW_LOG("INTC_MASK Write 32bit %x", value); for (i=0; i<16; i++) { // reverse on 1 const int s = (1<>12 ].aPFNs == NULL ) { - SysPrintf("dmaGetAddr: memLUT PFN warning\n"); + Console::WriteLn("dmaGetAddr: memLUT PFN warning"); return NULL;//p; } pbase = (u8*)memLUT[ (p-PS2MEM_BASE)>>12 ].aVFNs[0]; - if( pbase != NULL ) - p = pbase + ((u32)p&0xfff); + if( pbase != NULL ) p = pbase + ((u32)p&0xfff); #endif return p; @@ -348,7 +347,7 @@ static __forceinline u8* dmaGetAddr(u32 mem) static __forceinline void *dmaGetAddr(u32 addr) { u8 *ptr; -// if (addr & 0xf) { DMA_LOG("*PCSX2*: DMA address not 128bit aligned: %8.8x\n", addr); } +// if (addr & 0xf) { DMA_LOG("*PCSX2*: DMA address not 128bit aligned: %8.8x", addr); } if (addr & 0x80000000) { // teh sux why the f00k 0xE0000000 return (void*)&psS[addr & 0x3ff0]; diff --git a/pcsx2/HwRead.cpp b/pcsx2/HwRead.cpp index 87cfda6934..cf86b7cbbb 100644 --- a/pcsx2/HwRead.cpp +++ b/pcsx2/HwRead.cpp @@ -106,7 +106,7 @@ __forceinline u8 hwRead8(u32 mem) } ret = psHu8(mem); - HW_LOG("Unknown Hardware Read 8 from 0x%x = 0x%x\n", mem, ret); + HW_LOG("Unknown Hardware Read 8 from 0x%x = 0x%x", mem, ret); break; } @@ -156,7 +156,7 @@ __forceinline u16 hwRead16(u32 mem) return (u16)ret; } ret = psHu16(mem); - HW_LOG("Hardware Read16 at 0x%x, value= 0x%x\n", ret, mem); + HW_LOG("Hardware Read16 at 0x%x, value= 0x%x", ret, mem); break; } return ret; @@ -217,11 +217,11 @@ static __forceinline mem32_t __hwRead32_page_0F( u32 mem, bool intchack ) case 0xf000: if( intchack ) IntCHackCheck(); // This one is checked alot, so leave it commented out unless you love 600 meg logfiles. - //HW_LOG("INTC_STAT Read 32bit %x\n", psHu32(0xf010)); + //HW_LOG("INTC_STAT Read 32bit %x", psHu32(0xf010)); break; case 0xf010: - HW_LOG("INTC_MASK Read32, value=0x%x\n", psHu32(INTC_MASK)); + HW_LOG("INTC_MASK Read32, value=0x%x", psHu32(INTC_MASK)); break; case 0xf130: // 0x1000f130 @@ -314,19 +314,19 @@ mem32_t __fastcall hwRead32_generic(u32 mem) case D2_SADR: regName = "DMA2_SADDR"; break; } - HW_LOG( "Hardware Read32 at 0x%x (%s), value=0x%x\n", mem, regName, psHu32(mem) ); + HW_LOG( "Hardware Read32 at 0x%x (%s), value=0x%x", mem, regName, psHu32(mem) ); } break; case 0x0b: if( mem == D4_CHCR ) - HW_LOG("Hardware Read32 at 0x%x (IPU1:DMA4_CHCR), value=0x%x\n", mem, psHu32(mem)); + HW_LOG("Hardware Read32 at 0x%x (IPU1:DMA4_CHCR), value=0x%x", mem, psHu32(mem)); break; case 0x0c: case 0x0e: if( mem == DMAC_STAT) - HW_LOG("DMAC_STAT Read32, value=0x%x\n", psHu32(DMAC_STAT)); + HW_LOG("DMAC_STAT Read32, value=0x%x", psHu32(DMAC_STAT)); break; jNO_DEFAULT; @@ -358,13 +358,13 @@ void __fastcall hwRead64_generic_INTC_HACK(u32 mem, mem64_t* result ) if( mem == INTC_STAT ) IntCHackCheck(); *result = psHu64(mem); - HW_LOG("Unknown Hardware Read 64 at %x\n",mem); + HW_LOG("Unknown Hardware Read 64 at %x",mem); } void __fastcall hwRead64_generic(u32 mem, mem64_t* result ) { *result = psHu64(mem); - HW_LOG("Unknown Hardware Read 64 at %x\n",mem); + HW_LOG("Unknown Hardware Read 64 at %x",mem); } ///////////////////////////////////////////////////////////////////////// @@ -385,7 +385,7 @@ void __fastcall hwRead128_page_01(u32 mem, mem128_t* result ) void __fastcall hwRead128_page_02(u32 mem, mem128_t* result ) { // IPU is currently unhandled in 128 bit mode. - HW_LOG("Unknown Hardware Read 128 at %x (IPU)\n",mem); + HW_LOG("Unknown Hardware Read 128 at %x (IPU)",mem); } void __fastcall hwRead128_generic(u32 mem, mem128_t* out) @@ -393,5 +393,5 @@ void __fastcall hwRead128_generic(u32 mem, mem128_t* out) out[0] = psHu64(mem); out[1] = psHu64(mem+8); - HW_LOG("Unknown Hardware Read 128 at %x\n",mem); + HW_LOG("Unknown Hardware Read 128 at %x",mem); } diff --git a/pcsx2/HwWrite.cpp b/pcsx2/HwWrite.cpp index 33b222880d..d3ef5196dd 100644 --- a/pcsx2/HwWrite.cpp +++ b/pcsx2/HwWrite.cpp @@ -48,7 +48,7 @@ static __forceinline void DmaExec8( void (*func)(), u32 mem, u8 value ) psHu8(mem) = (u8)value; if ((psHu8(mem) & 0x1) && (psHu32(DMAC_CTRL) & 0x1)) { - /*SysPrintf("Running DMA 8 %x\n", psHu32(mem & ~0x1));*/ + /*Console::WriteLn("Running DMA 8 %x", params psHu32(mem & ~0x1));*/ func(); } } @@ -63,7 +63,7 @@ static __forceinline void DmaExec16( void (*func)(), u32 mem, u16 value ) psHu16(mem) = (u16)value; if ((psHu16(mem) & 0x100) && (psHu32(DMAC_CTRL) & 0x1)) { - //SysPrintf("16bit DMA Start\n"); + //Console::WriteLn("16bit DMA Start"); func(); } } @@ -83,8 +83,6 @@ static void DmaExec( void (*func)(), u32 mem, u32 value ) if ((psHu32(mem) & 0x100) && (psHu32(DMAC_CTRL) & 0x1)) func(); - - } @@ -93,6 +91,7 @@ static void DmaExec( void (*func)(), u32 mem, u32 value ) char sio_buffer[1024]; int sio_count; +u16 QueuedDMA = 0; void hwWrite8(u32 mem, u8 value) { @@ -151,54 +150,104 @@ void hwWrite8(u32 mem, u8 value) { // vif1Write32(mem & ~0x2, value << 16); // break; case 0x10008001: // dma0 - vif0 - DMA_LOG("VIF0dma EXECUTE, value=0x%x\n", value); + DMA_LOG("VIF0dma EXECUTE, value=0x%x", value); + if ((value & 0x1) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("8 bit VIF0 DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x1; + } DmaExec8(dmaVIF0, mem, value); break; case 0x10009001: // dma1 - vif1 - DMA_LOG("VIF1dma EXECUTE, value=0x%x\n", value); + DMA_LOG("VIF1dma EXECUTE, value=0x%x", value); + if ((value & 0x1) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("8 bit VIF1 DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x2; + } if(value & 0x1) vif1.done = 0; //This must be done here! some games (ala Crash of the Titans) pause the dma to start MFIFO DmaExec8(dmaVIF1, mem, value); break; case 0x1000a001: // dma2 - gif - DMA_LOG("GSdma EXECUTE, value=0x%x\n", value); + DMA_LOG("GSdma EXECUTE, value=0x%x", value); + if ((value & 0x1) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("8 bit GIF DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x4; + } DmaExec8(dmaGIF, mem, value); break; case 0x1000b001: // dma3 - fromIPU - DMA_LOG("IPU0dma EXECUTE, value=0x%x\n", value); + DMA_LOG("IPU0dma EXECUTE, value=0x%x", value); + if ((value & 0x1) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("8 bit IPU0 DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x8; + } DmaExec8(dmaIPU0, mem, value); break; case 0x1000b401: // dma4 - toIPU - DMA_LOG("IPU1dma EXECUTE, value=0x%x\n", value); + DMA_LOG("IPU1dma EXECUTE, value=0x%x", value); + if ((value & 0x1) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("8 bit IPU1 DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x10; + } DmaExec8(dmaIPU1, mem, value); break; case 0x1000c001: // dma5 - sif0 - DMA_LOG("SIF0dma EXECUTE, value=0x%x\n", value); + DMA_LOG("SIF0dma EXECUTE, value=0x%x", value); // if (value == 0) psxSu32(0x30) = 0x40000; + if ((value & 0x1) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("8 bit SIF0 DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x20; + } DmaExec8(dmaSIF0, mem, value); break; case 0x1000c401: // dma6 - sif1 - DMA_LOG("SIF1dma EXECUTE, value=0x%x\n", value); + DMA_LOG("SIF1dma EXECUTE, value=0x%x", value); + if ((value & 0x1) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("8 bit SIF1 DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x40; + } DmaExec8(dmaSIF1, mem, value); break; case 0x1000c801: // dma7 - sif2 - DMA_LOG("SIF2dma EXECUTE, value=0x%x\n", value); + DMA_LOG("SIF2dma EXECUTE, value=0x%x", value); + if ((value & 0x1) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("8 bit SIF2 DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x80; + } DmaExec8(dmaSIF2, mem, value); break; case 0x1000d001: // dma8 - fromSPR - DMA_LOG("fromSPRdma8 EXECUTE, value=0x%x\n", value); + DMA_LOG("fromSPRdma8 EXECUTE, value=0x%x", value); + if ((value & 0x1) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("8 bit SPR0 DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x100; + } DmaExec8(dmaSPR0, mem, value); break; case 0x1000d401: // dma9 - toSPR - DMA_LOG("toSPRdma8 EXECUTE, value=0x%x\n", value); + DMA_LOG("toSPRdma8 EXECUTE, value=0x%x", value); + if ((value & 0x1) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("8 bit SPR1 DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x200; + } DmaExec8(dmaSPR1, mem, value); break; @@ -227,7 +276,7 @@ void hwWrite8(u32 mem, u8 value) { default: psHu8(mem) = value; } - HW_LOG("Unknown Hardware write 8 at %x with value %x\n", mem, value); + HW_LOG("Unknown Hardware write 8 at %x with value %x", mem, value); break; } } @@ -258,126 +307,156 @@ __forceinline void hwWrite16(u32 mem, u16 value) case 0x10001820: rcntWtarget(3, value); break; case 0x10008000: // dma0 - vif0 - DMA_LOG("VIF0dma %lx\n", value); + DMA_LOG("VIF0dma %lx", value); + if ((value & 0x100) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("16 bit VIF0 DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x1; + } DmaExec16(dmaVIF0, mem, value); break; case 0x10009000: // dma1 - vif1 - chcr - DMA_LOG("VIF1dma CHCR %lx\n", value); + DMA_LOG("VIF1dma CHCR %lx", value); + if ((value & 0x100) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("16 bit VIF1 DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x2; + } if(value & 0x100) vif1.done = 0; //This must be done here! some games (ala Crash of the Titans) pause the dma to start MFIFO DmaExec16(dmaVIF1, mem, value); break; #ifdef PCSX2_DEVBUILD case 0x10009010: // dma1 - vif1 - madr - HW_LOG("VIF1dma Madr %lx\n", value); + HW_LOG("VIF1dma Madr %lx", value); psHu16(mem) = value;//dma1 madr break; case 0x10009020: // dma1 - vif1 - qwc - HW_LOG("VIF1dma QWC %lx\n", value); + HW_LOG("VIF1dma QWC %lx", value); psHu16(mem) = value;//dma1 qwc break; case 0x10009030: // dma1 - vif1 - tadr - HW_LOG("VIF1dma TADR %lx\n", value); + HW_LOG("VIF1dma TADR %lx", value); psHu16(mem) = value;//dma1 tadr break; case 0x10009040: // dma1 - vif1 - asr0 - HW_LOG("VIF1dma ASR0 %lx\n", value); + HW_LOG("VIF1dma ASR0 %lx", value); psHu16(mem) = value;//dma1 asr0 break; case 0x10009050: // dma1 - vif1 - asr1 - HW_LOG("VIF1dma ASR1 %lx\n", value); + HW_LOG("VIF1dma ASR1 %lx", value); psHu16(mem) = value;//dma1 asr1 break; case 0x10009080: // dma1 - vif1 - sadr - HW_LOG("VIF1dma SADR %lx\n", value); + HW_LOG("VIF1dma SADR %lx", value); psHu16(mem) = value;//dma1 sadr break; #endif // --------------------------------------------------- case 0x1000a000: // dma2 - gif - DMA_LOG("0x%8.8x hwWrite32: GSdma %lx\n", cpuRegs.cycle, value); + DMA_LOG("0x%8.8x hwWrite32: GSdma %lx", cpuRegs.cycle, value); + if ((value & 0x100) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("16 bit GIF DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x4; + } DmaExec16(dmaGIF, mem, value); break; #ifdef PCSX2_DEVBUILD case 0x1000a010: psHu16(mem) = value;//dma2 madr - HW_LOG("Hardware write DMA2_MADR 32bit at %x with value %x\n",mem,value); + HW_LOG("Hardware write DMA2_MADR 32bit at %x with value %x",mem,value); break; case 0x1000a020: psHu16(mem) = value;//dma2 qwc - HW_LOG("Hardware write DMA2_QWC 32bit at %x with value %x\n",mem,value); + HW_LOG("Hardware write DMA2_QWC 32bit at %x with value %x",mem,value); break; case 0x1000a030: psHu16(mem) = value;//dma2 taddr - HW_LOG("Hardware write DMA2_TADDR 32bit at %x with value %x\n",mem,value); + HW_LOG("Hardware write DMA2_TADDR 32bit at %x with value %x",mem,value); break; case 0x1000a040: psHu16(mem) = value;//dma2 asr0 - HW_LOG("Hardware write DMA2_ASR0 32bit at %x with value %x\n",mem,value); + HW_LOG("Hardware write DMA2_ASR0 32bit at %x with value %x",mem,value); break; case 0x1000a050: psHu16(mem) = value;//dma2 asr1 - HW_LOG("Hardware write DMA2_ASR1 32bit at %x with value %x\n",mem,value); + HW_LOG("Hardware write DMA2_ASR1 32bit at %x with value %x",mem,value); break; case 0x1000a080: psHu16(mem) = value;//dma2 saddr - HW_LOG("Hardware write DMA2_SADDR 32bit at %x with value %x\n",mem,value); + HW_LOG("Hardware write DMA2_SADDR 32bit at %x with value %x",mem,value); break; #endif case 0x1000b000: // dma3 - fromIPU - DMA_LOG("IPU0dma %lx\n", value); + DMA_LOG("IPU0dma %lx", value); + if ((value & 0x100) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("16 bit IPU0 DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x8; + } DmaExec16(dmaIPU0, mem, value); break; #ifdef PCSX2_DEVBUILD case 0x1000b010: psHu16(mem) = value;//dma2 madr - HW_LOG("Hardware write IPU0DMA_MADR 32bit at %x with value %x\n",mem,value); + HW_LOG("Hardware write IPU0DMA_MADR 32bit at %x with value %x",mem,value); break; case 0x1000b020: psHu16(mem) = value;//dma2 madr - HW_LOG("Hardware write IPU0DMA_QWC 32bit at %x with value %x\n",mem,value); + HW_LOG("Hardware write IPU0DMA_QWC 32bit at %x with value %x",mem,value); break; case 0x1000b030: psHu16(mem) = value;//dma2 tadr - HW_LOG("Hardware write IPU0DMA_TADR 32bit at %x with value %x\n",mem,value); + HW_LOG("Hardware write IPU0DMA_TADR 32bit at %x with value %x",mem,value); break; case 0x1000b080: psHu16(mem) = value;//dma2 saddr - HW_LOG("Hardware write IPU0DMA_SADDR 32bit at %x with value %x\n",mem,value); + HW_LOG("Hardware write IPU0DMA_SADDR 32bit at %x with value %x",mem,value); break; #endif case 0x1000b400: // dma4 - toIPU - DMA_LOG("IPU1dma %lx\n", value); + DMA_LOG("IPU1dma %lx", value); + if ((value & 0x100) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("16 bit IPU1 DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x10; + } DmaExec16(dmaIPU1, mem, value); break; #ifdef PCSX2_DEVBUILD case 0x1000b410: psHu16(mem) = value;//dma2 madr - HW_LOG("Hardware write IPU1DMA_MADR 32bit at %x with value %x\n",mem,value); + HW_LOG("Hardware write IPU1DMA_MADR 32bit at %x with value %x",mem,value); break; case 0x1000b420: psHu16(mem) = value;//dma2 madr - HW_LOG("Hardware write IPU1DMA_QWC 32bit at %x with value %x\n",mem,value); + HW_LOG("Hardware write IPU1DMA_QWC 32bit at %x with value %x",mem,value); break; case 0x1000b430: psHu16(mem) = value;//dma2 tadr - HW_LOG("Hardware write IPU1DMA_TADR 32bit at %x with value %x\n",mem,value); + HW_LOG("Hardware write IPU1DMA_TADR 32bit at %x with value %x",mem,value); break; case 0x1000b480: psHu16(mem) = value;//dma2 saddr - HW_LOG("Hardware write IPU1DMA_SADDR 32bit at %x with value %x\n",mem,value); + HW_LOG("Hardware write IPU1DMA_SADDR 32bit at %x with value %x",mem,value); break; #endif case 0x1000c000: // dma5 - sif0 - DMA_LOG("SIF0dma %lx\n", value); + DMA_LOG("SIF0dma %lx", value); // if (value == 0) psxSu32(0x30) = 0x40000; + if ((value & 0x100) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("16 bit SIF0 DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x20; + } DmaExec16(dmaSIF0, mem, value); break; @@ -385,36 +464,56 @@ __forceinline void hwWrite16(u32 mem, u16 value) //? break; case 0x1000c400: // dma6 - sif1 - DMA_LOG("SIF1dma %lx\n", value); + DMA_LOG("SIF1dma %lx", value); + if ((value & 0x100) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("16 bit SIF1 DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x40; + } DmaExec16(dmaSIF1, mem, value); break; #ifdef PCSX2_DEVBUILD case 0x1000c420: // dma6 - sif1 - qwc - HW_LOG("SIF1dma QWC = %lx\n", value); + HW_LOG("SIF1dma QWC = %lx", value); psHu16(mem) = value; break; case 0x1000c430: // dma6 - sif1 - tadr - HW_LOG("SIF1dma TADR = %lx\n", value); + HW_LOG("SIF1dma TADR = %lx", value); psHu16(mem) = value; break; #endif case 0x1000c800: // dma7 - sif2 - DMA_LOG("SIF2dma %lx\n", value); + DMA_LOG("SIF2dma %lx", value); + if ((value & 0x100) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("16 bit SIF2 DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x80; + } DmaExec16(dmaSIF2, mem, value); break; case 0x1000c802: //? break; case 0x1000d000: // dma8 - fromSPR - DMA_LOG("fromSPRdma %lx\n", value); + DMA_LOG("fromSPRdma %lx", value); + if ((value & 0x100) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("16 bit SPR0 DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x100; + } DmaExec16(dmaSPR0, mem, value); break; case 0x1000d400: // dma9 - toSPR - DMA_LOG("toSPRdma %lx\n", value); + DMA_LOG("toSPRdma %lx", value); + if ((value & 0x100) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("16 bit SPR1 DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x200; + } DmaExec16(dmaSPR1, mem, value); break; case 0x1000f592: // DMAC_ENABLEW @@ -451,7 +550,7 @@ __forceinline void hwWrite16(u32 mem, u16 value) default: psHu16(mem) = value; - HW_LOG("Unknown Hardware write 16 at %x with value %x\n",mem,value); + HW_LOG("Unknown Hardware write 16 at %x with value %x",mem,value); } } @@ -553,6 +652,11 @@ void __fastcall hwWrite32_page_0B( u32 mem, u32 value ) { case D3_CHCR: // dma3 - fromIPU DMA_LOG("IPU0dma EXECUTE, value=0x%x\n", value); + if ((value & 0x100) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("32 bit IPU0 DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x8; + } DmaExec(dmaIPU0, mem, value); return; @@ -565,6 +669,11 @@ void __fastcall hwWrite32_page_0B( u32 mem, u32 value ) case D4_CHCR: // dma4 - toIPU DMA_LOG("IPU1dma EXECUTE, value=0x%x\n", value); + if ((value & 0x100) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("32 bit IPU1 DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x10; + } DmaExec(dmaIPU1, mem, value); return; @@ -574,19 +683,40 @@ void __fastcall hwWrite32_page_0B( u32 mem, u32 value ) case D4_SADR: regName = "IPU1DMA_SADDR"; break; } - HW_LOG( "Hardware Write32 at 0x%x (%s), value=0x%x\n", mem, regName, value ); + HW_LOG( "Hardware Write32 at 0x%x (%s), value=0x%x", mem, regName, value ); psHu32(mem) = value; } +void __fastcall StartQueuedDMA() +{ + if(QueuedDMA & 0x1) { QueuedDMA &= ~0x1; dmaVIF0(); } + if(QueuedDMA & 0x2) { QueuedDMA &= ~0x2; dmaVIF1(); } + if(QueuedDMA & 0x4) { QueuedDMA &= ~0x4; dmaGIF(); } + if(QueuedDMA & 0x8) { QueuedDMA &= ~0x8; dmaIPU0(); } + if(QueuedDMA & 0x10) { QueuedDMA &= ~0x10; dmaIPU1(); } + if(QueuedDMA & 0x20) { QueuedDMA &= ~0x20; dmaSIF0(); } + if(QueuedDMA & 0x40) { QueuedDMA &= ~0x40; dmaSIF1(); } + if(QueuedDMA & 0x80) { QueuedDMA &= ~0x80; dmaSIF2(); } + if(QueuedDMA & 0x100) { QueuedDMA &= ~0x100; dmaSPR0(); } + if(QueuedDMA & 0x200) { QueuedDMA &= ~0x200; dmaSPR1(); } +} + void __fastcall hwWrite32_page_0E( u32 mem, u32 value ) { if( mem == DMAC_CTRL ) { - HW_LOG("DMAC_CTRL Write 32bit %x\n", value); + HW_LOG("DMAC_CTRL Write 32bit %x", value); + //Check for DMAS that were started while the DMAC was disabled + if((psHu32(mem) & 0x1) == 0 && (value & 0x1) == 1) + { + psHu32(mem) = value; + if(QueuedDMA != 0) StartQueuedDMA(); + return; + } } else if( mem == DMAC_STAT ) { - HW_LOG("DMAC_STAT Write 32bit %x\n", value); + HW_LOG("DMAC_STAT Write 32bit %x", value); // lower 16 bits: clear on 1 // upper 16 bits: reverse on 1 @@ -611,13 +741,13 @@ void __fastcall hwWrite32_page_0F( u32 mem, u32 value ) switch( HELPSWITCH(mem) ) { case HELPSWITCH(INTC_STAT): - HW_LOG("INTC_STAT Write 32bit %x\n", value); + HW_LOG("INTC_STAT Write 32bit %x", value); psHu32(INTC_STAT) &= ~value; //cpuTestINTCInts(); break; case HELPSWITCH(INTC_MASK): - HW_LOG("INTC_MASK Write 32bit %x\n", value); + HW_LOG("INTC_MASK Write 32bit %x", value); psHu32(INTC_MASK) ^= (u16)value; cpuTestINTCInts(); break; @@ -653,7 +783,7 @@ void __fastcall hwWrite32_page_0F( u32 mem, u32 value ) break; case HELPSWITCH(0x1000f590): // DMAC_ENABLEW - HW_LOG("DMAC_ENABLEW Write 32bit %lx\n", value); + HW_LOG("DMAC_ENABLEW Write 32bit %lx", value); psHu32(0xf590) = value; psHu32(0xf520) = value; break; @@ -661,7 +791,7 @@ void __fastcall hwWrite32_page_0F( u32 mem, u32 value ) //------------------------------------------------------------------ case HELPSWITCH(0x1000f130): case HELPSWITCH(0x1000f410): - HW_LOG("Unknown Hardware write 32 at %x with value %x (%x)\n", mem, value, cpuRegs.CP0.n.Status.val); + HW_LOG("Unknown Hardware write 32 at %x with value %x (%x)", mem, value, cpuRegs.CP0.n.Status.val); break; default: @@ -677,13 +807,23 @@ void __fastcall hwWrite32_generic( u32 mem, u32 value ) switch (mem) { case D0_CHCR: // dma0 - vif0 - DMA_LOG("VIF0dma EXECUTE, value=0x%x\n", value); + DMA_LOG("VIF0dma EXECUTE, value=0x%x", value); + if ((value & 0x100) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("32 bit VIF0 DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x1; + } DmaExec(dmaVIF0, mem, value); return; //------------------------------------------------------------------ case D1_CHCR: // dma1 - vif1 - chcr - DMA_LOG("VIF1dma EXECUTE, value=0x%x\n", value); + DMA_LOG("VIF1dma EXECUTE, value=0x%x", value); + if ((value & 0x100) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("32 bit VIF1 DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x2; + } if(value & 0x100) { vif1.done = 0; //This must be done here! some games (ala Crash of the Titans) pause the dma to start MFIFO @@ -701,6 +841,11 @@ void __fastcall hwWrite32_generic( u32 mem, u32 value ) //------------------------------------------------------------------ case D2_CHCR: // dma2 - gif DMA_LOG("GIFdma EXECUTE, value=0x%x", value); + if ((value & 0x100) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("32 bit GIF DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x4; + } DmaExec(dmaGIF, mem, value); return; @@ -713,13 +858,23 @@ void __fastcall hwWrite32_generic( u32 mem, u32 value ) //------------------------------------------------------------------ case 0x1000c000: // dma5 - sif0 - DMA_LOG("SIF0dma EXECUTE, value=0x%x\n", value); + DMA_LOG("SIF0dma EXECUTE, value=0x%x", value); //if (value == 0) psxSu32(0x30) = 0x40000; + if ((value & 0x100) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("32 bit SIF0 DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x20; + } DmaExec(dmaSIF0, mem, value); return; //------------------------------------------------------------------ case 0x1000c400: // dma6 - sif1 - DMA_LOG("SIF1dma EXECUTE, value=0x%x\n", value); + DMA_LOG("SIF1dma EXECUTE, value=0x%x", value); + if ((value & 0x100) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("32 bit SIF1 DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x40; + } DmaExec(dmaSIF1, mem, value); return; @@ -728,21 +883,36 @@ void __fastcall hwWrite32_generic( u32 mem, u32 value ) //------------------------------------------------------------------ case 0x1000c800: // dma7 - sif2 - DMA_LOG("SIF2dma EXECUTE, value=0x%x\n", value); + DMA_LOG("SIF2dma EXECUTE, value=0x%x", value); + if ((value & 0x100) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("32 bit SIF2 DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x80; + } DmaExec(dmaSIF2, mem, value); return; //------------------------------------------------------------------ case 0x1000d000: // dma8 - fromSPR - DMA_LOG("SPR0dma EXECUTE (fromSPR), value=0x%x\n", value); + DMA_LOG("SPR0dma EXECUTE (fromSPR), value=0x%x", value); + if ((value & 0x100) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("32 bit SPR0 DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x100; + } DmaExec(dmaSPR0, mem, value); return; //------------------------------------------------------------------ case 0x1000d400: // dma9 - toSPR - DMA_LOG("SPR1dma EXECUTE (toSPR), value=0x%x\n", value); + DMA_LOG("SPR1dma EXECUTE (toSPR), value=0x%x", value); + if ((value & 0x100) && !(psHu32(DMAC_CTRL) & 0x1)) + { + DevCon::Notice("32 bit SPR1 DMA Start while DMAC Disabled\n"); + QueuedDMA |= 0x200; + } DmaExec(dmaSPR1, mem, value); return; } - HW_LOG( "Hardware Write32 at 0x%x (%s), value=0x%x\n", mem, regName, value ); + HW_LOG( "Hardware Write32 at 0x%x (%s), value=0x%x", mem, regName, value ); psHu32(mem) = value; } @@ -789,7 +959,7 @@ void __fastcall hwWrite64_page_03( u32 mem, const mem64_t* srcval ) case GIF_MODE: { #ifdef GSPATH3FIX - Console::Status("GIFMODE64 %x\n", params value); + Console::Status("GIFMODE64 %x", params value); #endif psHu64(GIF_MODE) = value; @@ -812,11 +982,17 @@ void __fastcall hwWrite64_page_0E( u32 mem, const mem64_t* srcval ) if( mem == DMAC_CTRL ) { - HW_LOG("DMAC_CTRL Write 64bit %x\n", value); + HW_LOG("DMAC_CTRL Write 64bit %x", value); + if((psHu32(mem) & 0x1) == 0 && (value & 0x1) == 1) + { + psHu64(mem) = value; + if(QueuedDMA != 0) StartQueuedDMA(); + return; + } } else if( mem == DMAC_STAT ) { - HW_LOG("DMAC_STAT Write 64bit %x\n", value); + HW_LOG("DMAC_STAT Write 64bit %x", value); // lower 16 bits: clear on 1 // upper 16 bits: reverse on 1 @@ -840,18 +1016,18 @@ void __fastcall hwWrite64_generic( u32 mem, const mem64_t* srcval ) switch (mem) { case 0x1000a000: // dma2 - gif - DMA_LOG("0x%8.8x hwWrite64: GSdma %x\n", cpuRegs.cycle, value); + DMA_LOG("0x%8.8x hwWrite64: GSdma %x", cpuRegs.cycle, value); DmaExec(dmaGIF, mem, value); break; case INTC_STAT: - HW_LOG("INTC_STAT Write 64bit %x\n", (u32)value); + HW_LOG("INTC_STAT Write 64bit %x", (u32)value); psHu32(INTC_STAT) &= ~value; //cpuTestINTCInts(); break; case INTC_MASK: - HW_LOG("INTC_MASK Write 64bit %x\n", (u32)value); + HW_LOG("INTC_MASK Write 64bit %x", (u32)value); psHu32(INTC_MASK) ^= (u16)value; cpuTestINTCInts(); break; @@ -868,7 +1044,7 @@ void __fastcall hwWrite64_generic( u32 mem, const mem64_t* srcval ) default: psHu64(mem) = value; - HW_LOG("Unknown Hardware write 64 at %x with value %x (status=%x)\n",mem,value, cpuRegs.CP0.n.Status.val); + HW_LOG("Unknown Hardware write 64 at %x with value %x (status=%x)",mem,value, cpuRegs.CP0.n.Status.val); break; } } @@ -883,13 +1059,13 @@ void __fastcall hwWrite128_generic(u32 mem, const mem128_t *srcval) switch (mem) { case INTC_STAT: - HW_LOG("INTC_STAT Write 64bit %x\n", (u32)srcval[0]); + HW_LOG("INTC_STAT Write 64bit %x", (u32)srcval[0]); psHu32(INTC_STAT) &= ~srcval[0]; //cpuTestINTCInts(); break; case INTC_MASK: - HW_LOG("INTC_MASK Write 64bit %x\n", (u32)srcval[0]); + HW_LOG("INTC_MASK Write 64bit %x", (u32)srcval[0]); psHu32(INTC_MASK) ^= (u16)srcval[0]; cpuTestINTCInts(); break; @@ -908,7 +1084,7 @@ void __fastcall hwWrite128_generic(u32 mem, const mem128_t *srcval) psHu64(mem ) = srcval[0]; psHu64(mem+8) = srcval[1]; - HW_LOG("Unknown Hardware write 128 at %x with value %x_%x (status=%x)\n", mem, srcval[1], srcval[0], cpuRegs.CP0.n.Status.val); + HW_LOG("Unknown Hardware write 128 at %x with value %x_%x (status=%x)", mem, srcval[1], srcval[0], cpuRegs.CP0.n.Status.val); break; } } diff --git a/pcsx2/IPU/IPU.cpp b/pcsx2/IPU/IPU.cpp index b7b3ad5fec..d0d0537645 100644 --- a/pcsx2/IPU/IPU.cpp +++ b/pcsx2/IPU/IPU.cpp @@ -5,12 +5,12 @@ * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. - * + * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. - * + * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA @@ -97,19 +97,19 @@ int IPU1dma(); char convert_data_buffer[0x1C]; // Quantization matrix -static u8 niq[64], //non-intraquant matrix - iq[64]; //intraquant matrix +static u8 niq[64]; //non-intraquant matrix +static u8 iq[64]; //intraquant matrix u16 vqclut[16]; //clut conversion table static u8 s_thresh[2]; //thresholds for color conversions -int coded_block_pattern=0; +int coded_block_pattern = 0; PCSX2_ALIGNED16(macroblock_8 mb8); PCSX2_ALIGNED16(macroblock_16 mb16); PCSX2_ALIGNED16(macroblock_rgb32 rgb32); PCSX2_ALIGNED16(macroblock_rgb16 rgb16); u8 indx4[16*16/2]; -u32 mpeg2_inited; //mpeg2_idct_init() must be called only once -u8 PCT[]={'r', 'I', 'P', 'B', 'D', '-', '-', '-'}; +bool mpeg2_inited = FALSE; //mpeg2_idct_init() must be called only once +u8 PCT[] = {'r', 'I', 'P', 'B', 'D', '-', '-', '-'}; decoder_t g_decoder; //static, only to place it in bss decoder_t tempdec; @@ -122,12 +122,39 @@ extern "C" PCSX2_ALIGNED16(u8 _readbits[80]); //local buffer (ring buffer) u8* readbits = _readbits; // always can decrement by one 1qw -#define SATURATE_4BITS(val) ((val)>15 ? 15 : (val)) +#define SATURATE_4BITS(val) ((val)>15 ? 15 : (val)) -void IPUProcessInterrupt() +__forceinline void IPUProcessInterrupt() { - if( ipuRegs->ctrl.BUSY ) { - IPUWorker(); + if (ipuRegs->ctrl.BUSY) IPUWorker(); +} + +__forceinline void init_g_decoder() +{ + //other stuff + g_decoder.intra_quantizer_matrix = (u8*)iq; + g_decoder.non_intra_quantizer_matrix = (u8*)niq; + g_decoder.picture_structure = FRAME_PICTURE; //default: progressive...my guess:P + g_decoder.mb8 = &mb8; + g_decoder.mb16 = &mb16; + g_decoder.rgb32 = &rgb32; + g_decoder.rgb16 = &rgb16; + g_decoder.stride = 16; +} + +__forceinline void mpeg2_init() +{ + if (!mpeg2_inited) + { + mpeg2_idct_init(); + yuv2rgb_init(); + memzero_obj(mb8.Y); + memzero_obj(mb8.Cb); + memzero_obj(mb8.Cr); + memzero_obj(mb16.Y); + memzero_obj(mb16.Cb); + memzero_obj(mb16.Cr); + mpeg2_inited = TRUE; } } @@ -137,16 +164,7 @@ int ipuInit() { memzero_obj(*ipuRegs); memzero_obj(g_BP); - - //other stuff - g_decoder.intra_quantizer_matrix =(u8*)iq; - g_decoder.non_intra_quantizer_matrix =(u8*)niq; - g_decoder.picture_structure = FRAME_PICTURE; //default: progressive...my guess:P - g_decoder.mb8 =&mb8; - g_decoder.mb16=&mb16; - g_decoder.rgb32=&rgb32; - g_decoder.rgb16=&rgb16; - g_decoder.stride=16; + init_g_decoder(); return 0; } @@ -167,11 +185,11 @@ void SaveState::ipuFreeze() { IPUProcessInterrupt(); - FreezeTag( "IPU" ); + FreezeTag("IPU"); // old versions saved the IPU regs, but they're already saved as part of HW! //FreezeMem(ipuRegs, sizeof(IPUregisters)); - + Freeze(g_nDMATransfer); Freeze(FIreadpos); Freeze(FIwritepos); @@ -191,37 +209,17 @@ void SaveState::ipuFreeze() Freeze(g_nCmdPos); Freeze(g_nCmdIndex); Freeze(ipuCurCmd); - + Freeze(_readbits); - int temp = readbits-_readbits; + int temp = readbits - _readbits; Freeze(temp); - if( IsLoading() ) + if (IsLoading()) { readbits = _readbits; - - //other stuff - g_decoder.intra_quantizer_matrix =(u8*)iq; - g_decoder.non_intra_quantizer_matrix =(u8*)niq; - g_decoder.picture_structure = FRAME_PICTURE; //default: progressive...my guess:P - g_decoder.mb8 =&mb8; - g_decoder.mb16=&mb16; - g_decoder.rgb32=&rgb32; - g_decoder.rgb16=&rgb16; - g_decoder.stride=16; - - if (!mpeg2_inited){ - mpeg2_idct_init(); - yuv2rgb_init(); - memzero_obj(mb8.Y); - memzero_obj(mb8.Cb); - memzero_obj(mb8.Cr); - memzero_obj(mb16.Y); - memzero_obj(mb16.Cb); - memzero_obj(mb16.Cr); - mpeg2_inited=1; - } + init_g_decoder(); + mpeg2_init(); } } @@ -235,54 +233,50 @@ __forceinline u32 ipuRead32(u32 mem) // Note: It's assumed that mem's input value is always in the 0x10002000 page // of memory (if not, it's probably bad code). - jASSUME( ( mem & ~0xff ) == 0x10002000 ); + jASSUME((mem & ~0xff) == 0x10002000); mem &= 0xff; // ipu repeats every 0x100 IPUProcessInterrupt(); - switch( mem ) + switch (mem) { case 0x10: // IPU_CTRL ipuRegs->ctrl.IFC = g_BP.IFC; - //ipuRegs->ctrl.OFC = min(g_nIPU0Data, 8); // check if transfering to ipu0 ipuRegs->ctrl.CBP = coded_block_pattern; - if( !ipuRegs->ctrl.BUSY ) - IPU_LOG("Ipu read32: IPU_CTRL=0x%08X %x\n", ipuRegs->ctrl._u32, cpuRegs.pc); + if (!ipuRegs->ctrl.BUSY) + IPU_LOG("Ipu read32: IPU_CTRL=0x%08X %x", ipuRegs->ctrl._u32, cpuRegs.pc); return ipuRegs->ctrl._u32; case 0x20: // IPU_BP ipuRegs->ipubp = g_BP.BP & 0x7f; - ipuRegs->ipubp |= g_BP.IFC<<8; - ipuRegs->ipubp |= (g_BP.FP+g_BP.bufferhasnew) << 16; + ipuRegs->ipubp |= g_BP.IFC << 8; + ipuRegs->ipubp |= (g_BP.FP + g_BP.bufferhasnew) << 16; - IPU_LOG("Ipu read32: IPU_BP=0x%08X\n", *(u32*)&g_BP); + IPU_LOG("Ipu read32: IPU_BP=0x%08X", *(u32*)&g_BP); return ipuRegs->ipubp; } - return *(u32*)(((u8*)ipuRegs)+mem); + return *(u32*)(((u8*)ipuRegs) + mem); } __forceinline u64 ipuRead64(u32 mem) { // Note: It's assumed that mem's input value is always in the 0x10002000 page // of memory (if not, it's probably bad code). - - jASSUME( ( mem & ~0xff ) == 0x10002000 ); + + jASSUME((mem & ~0xff) == 0x10002000); mem &= 0xff; // ipu repeats every 0x100 IPUProcessInterrupt(); - switch( mem ) + switch (mem) { case 0x00: // IPU_CMD - - //if(!ipuRegs->cmd.BUSY){ - if( ipuRegs->cmd.DATA&0xffffff ) - IPU_LOG("Ipu read64: IPU_CMD=BUSY=%x, DATA=%08X\n", ipuRegs->cmd.BUSY?1:0,ipuRegs->cmd.DATA); - //return *(u64*)&ipuRegs->cmd; + if (ipuRegs->cmd.DATA&0xffffff) + IPU_LOG("Ipu read64: IPU_CMD=BUSY=%x, DATA=%08X", ipuRegs->cmd.BUSY ? 1 : 0, ipuRegs->cmd.DATA); break; case 0x10: @@ -294,49 +288,36 @@ __forceinline u64 ipuRead64(u32 mem) break; case 0x30: // IPU_TOP - IPU_LOG("Ipu read64: IPU_TOP=%x, bp = %d\n",ipuRegs->top,g_BP.BP); - - //return *(u64*)&ipuRegs->top; + IPU_LOG("Ipu read64: IPU_TOP=%x, bp = %d", ipuRegs->top, g_BP.BP); break; default: - IPU_LOG("Ipu read64: Unknown=%x\n", mem); + IPU_LOG("Ipu read64: Unknown=%x", mem); break; } - return *(u64*)(((u8*)ipuRegs)+mem); + return *(u64*)(((u8*)ipuRegs) + mem); } void ipuSoftReset() { - if (!mpeg2_inited){ - mpeg2_idct_init(); - yuv2rgb_init(); - memzero_obj(mb8.Y); - memzero_obj(mb8.Cb); - memzero_obj(mb8.Cr); - memzero_obj(mb16.Y); - memzero_obj(mb16.Cb); - memzero_obj(mb16.Cr); - mpeg2_inited=1; - } - - FIFOto_clear(); + mpeg2_init(); + + FIFOto_clear(); memzero_obj(fifo_output); FOwritepos = 0; FOreadpos = 0; coded_block_pattern = 0; - //g_nDMATransfer = 0; - ipuRegs->ctrl._u32 = 0; - g_BP.BP = 0; - g_BP.IFC = 0; - g_BP.FP = 0; + g_BP.BP = 0; + g_BP.IFC = 0; + g_BP.FP = 0; g_BP.bufferhasnew = 0; ipuRegs->top = 0; g_nCmdIndex = 0; ipuCurCmd = 0xffffffff; - g_nCmdPos[0] = 0; g_nCmdPos[1] = 0; + g_nCmdPos[0] = 0; + g_nCmdPos[1] = 0; } __forceinline void ipuWrite32(u32 mem, u32 value) @@ -344,32 +325,33 @@ __forceinline void ipuWrite32(u32 mem, u32 value) // Note: It's assumed that mem's input value is always in the 0x10002000 page // of memory (if not, it's probably bad code). - jASSUME( ( mem & ~0xfff ) == 0x10002000 ); + jASSUME((mem & ~0xfff) == 0x10002000); mem &= 0xfff; IPUProcessInterrupt(); - switch (mem){ + switch (mem) + { case 0x00: // IPU_CMD - IPU_LOG("Ipu write32: IPU_CMD=0x%08X\n",value); + IPU_LOG("Ipu write32: IPU_CMD=0x%08X", value); IPUCMD_WRITE(value); break; case 0x10: // IPU_CTRL - ipuRegs->ctrl._u32 = (value&0x47f30000)|(ipuRegs->ctrl._u32&0x8000ffff); - if( ipuRegs->ctrl.IDP == 3 ) { - SysPrintf("IPU Invalid Intra DC Precision, switching to 9 bits\n"); - ipuRegs->ctrl.IDP = 1; - } - if (ipuRegs->ctrl.RST & 0x1) { // RESET - ipuSoftReset(); + ipuRegs->ctrl._u32 = (value & 0x47f30000) | (ipuRegs->ctrl._u32 & 0x8000ffff); + if (ipuRegs->ctrl.IDP == 3) + { + Console::WriteLn("IPU Invalid Intra DC Precision, switching to 9 bits"); + ipuRegs->ctrl.IDP = 1; } - IPU_LOG("Ipu write32: IPU_CTRL=0x%08X\n",value); + if (ipuRegs->ctrl.RST & 0x1) ipuSoftReset(); // RESET + + IPU_LOG("Ipu write32: IPU_CTRL=0x%08X", value); break; default: - IPU_LOG("Ipu write32: Unknown=%x\n", mem); + IPU_LOG("Ipu write32: Unknown=%x", mem); *(u32*)((u8*)ipuRegs + mem) = value; break; } @@ -380,20 +362,20 @@ __forceinline void ipuWrite64(u32 mem, u64 value) // Note: It's assumed that mem's input value is always in the 0x10002000 page // of memory (if not, it's probably bad code). - jASSUME( ( mem & ~0xfff ) == 0x10002000 ); + jASSUME((mem & ~0xfff) == 0x10002000); mem &= 0xfff; IPUProcessInterrupt(); - switch( mem ) + switch (mem) { case 0x10: - IPU_LOG("Ipu write64: IPU_CMD=0x%08X\n",value); + IPU_LOG("Ipu write64: IPU_CMD=0x%08X", value); IPUCMD_WRITE((u32)value); break; default: - IPU_LOG("Ipu write64: Unknown=%x\n", mem); + IPU_LOG("Ipu write64: Unknown=%x", mem); *(u64*)((u8*)ipuRegs + mem) = value; break; } @@ -403,8 +385,9 @@ __forceinline void ipuWrite64(u32 mem, u64 value) ////////////////////////////////////////////////////// // IPU Commands (exec on worker thread only) -static void ipuBCLR(u32 val) { - FIFOto_clear(); +static void ipuBCLR(u32 val) +{ + FIFOto_clear(); g_BP.BP = val & 0x7F; g_BP.FP = 0; g_BP.bufferhasnew = 0; @@ -412,156 +395,181 @@ static void ipuBCLR(u32 val) { ipuRegs->ctrl.BUSY = 0; ipuRegs->cmd.BUSY = 0; memzero_ptr<80>(readbits); - IPU_LOG("Clear IPU input FIFO. Set Bit offset=0x%X\n", g_BP.BP); + IPU_LOG("Clear IPU input FIFO. Set Bit offset=0x%X", g_BP.BP); } static __forceinline BOOL ipuIDEC(u32 val) { - tIPU_CMD_IDEC idec( val ); + tIPU_CMD_IDEC idec(val); + IPU_LOG("IPU IDEC command."); - IPU_LOG("IPU IDEC command.\n"); - if (idec.FB){ IPU_LOG(" Skip %d bits.",idec.FB);} - IPU_LOG(" Quantizer step code=0x%X.",idec.QSC); - if (idec.DTD==0){ IPU_LOG(" Does not decode DT."); - }else{ IPU_LOG(" Decodes DT.");} - if (idec.SGN==0){ IPU_LOG(" No bias."); - }else{ IPU_LOG(" Bias=128.");} - if (idec.DTE==1){ IPU_LOG(" Dither Enabled.");} - if (idec.OFM==0){ IPU_LOG(" Output format is RGB32."); - }else{ IPU_LOG(" Output format is RGB16.");} - IPU_LOG("\n"); + if (idec.FB) IPU_LOG(" Skip %d bits.", idec.FB); + IPU_LOG(" Quantizer step code=0x%X.", idec.QSC); - g_BP.BP+= idec.FB;//skip FB bits + if (idec.DTD == 0) + IPU_LOG(" Does not decode DT."); + else + IPU_LOG(" Decodes DT."); + + if (idec.SGN == 0) + IPU_LOG(" No bias."); + else + IPU_LOG(" Bias=128."); + + if (idec.DTE == 1) IPU_LOG(" Dither Enabled."); + if (idec.OFM == 0) + IPU_LOG(" Output format is RGB32."); + else + IPU_LOG(" Output format is RGB16."); + + IPU_LOG(""); + + g_BP.BP += idec.FB;//skip FB bits //from IPU_CTRL ipuRegs->ctrl.PCT = I_TYPE; //Intra DECoding;) - g_decoder.coding_type =ipuRegs->ctrl.PCT; - g_decoder.mpeg1 =ipuRegs->ctrl.MP1; - g_decoder.q_scale_type =ipuRegs->ctrl.QST; - g_decoder.intra_vlc_format=ipuRegs->ctrl.IVF; - g_decoder.scan =ipuRegs->ctrl.AS ? mpeg2_scan_alt: mpeg2_scan_norm; - g_decoder.intra_dc_precision=ipuRegs->ctrl.IDP; + g_decoder.coding_type = ipuRegs->ctrl.PCT; + g_decoder.mpeg1 = ipuRegs->ctrl.MP1; + g_decoder.q_scale_type = ipuRegs->ctrl.QST; + g_decoder.intra_vlc_format = ipuRegs->ctrl.IVF; + g_decoder.scan = ipuRegs->ctrl.AS ? mpeg2_scan_alt : mpeg2_scan_norm; + g_decoder.intra_dc_precision = ipuRegs->ctrl.IDP; //from IDEC value - g_decoder.quantizer_scale =idec.QSC; - g_decoder.frame_pred_frame_dct=!idec.DTD; - g_decoder.sgn =idec.SGN; - g_decoder.dte =idec.DTE; - g_decoder.ofm =idec.OFM; + g_decoder.quantizer_scale = idec.QSC; + g_decoder.frame_pred_frame_dct = !idec.DTD; + g_decoder.sgn = idec.SGN; + g_decoder.dte = idec.DTE; + g_decoder.ofm = idec.OFM; //other stuff - g_decoder.dcr =1;//resets DC prediction value + g_decoder.dcr = 1;//resets DC prediction value s_routine = so_create(mpeg2sliceIDEC, &s_RoutineDone, s_tempstack, sizeof(s_tempstack)); - assert( s_routine != NULL ); + assert(s_routine != NULL); so_call(s_routine); - if(s_RoutineDone) - s_routine = NULL; + if (s_RoutineDone) s_routine = NULL; return s_RoutineDone; } #ifdef _DEBUG -static int s_bdec=0; +static int s_bdec = 0; #else #define s_bdec 0 #endif static __forceinline BOOL ipuBDEC(u32 val) { - tIPU_CMD_BDEC bdec( val ); + tIPU_CMD_BDEC bdec(val); + + IPU_LOG("IPU BDEC(macroblock decode) command %x, num: 0x%x", cpuRegs.pc, s_bdec); + if (bdec.FB) IPU_LOG(" Skip 0x%X bits.", bdec.FB); + + if (bdec.MBI) + IPU_LOG(" Intra MB."); + else + IPU_LOG(" Non-intra MB."); + + if (bdec.DCR) + IPU_LOG(" Resets DC prediction value."); + else + IPU_LOG(" Doesn't reset DC prediction value."); + + if (bdec.DT) + IPU_LOG(" Use field DCT."); + else + IPU_LOG(" Use frame DCT."); + + IPU_LOG(" Quantizer step=0x%X", bdec.QSC); - IPU_LOG("IPU BDEC(macroblock decode) command %x, num: 0x%x\n",cpuRegs.pc, s_bdec); - if (bdec.FB){ IPU_LOG(" Skip 0x%X bits.", bdec.FB);} - if (bdec.MBI){ IPU_LOG(" Intra MB.");} - else{ IPU_LOG(" Non-intra MB.");} - if (bdec.DCR){ IPU_LOG(" Resets DC prediction value.");} - else{ IPU_LOG(" Doesn't reset DC prediction value.");} - if (bdec.DT){ IPU_LOG(" Use field DCT.");} - else{ IPU_LOG(" Use frame DCT.");} - IPU_LOG(" Quantizer step=0x%X\n",bdec.QSC); #ifdef _DEBUG s_bdec++; #endif - g_BP.BP+= bdec.FB;//skip FB bits - g_decoder.coding_type = I_TYPE; - g_decoder.mpeg1 =ipuRegs->ctrl.MP1; - g_decoder.q_scale_type =ipuRegs->ctrl.QST; - g_decoder.intra_vlc_format=ipuRegs->ctrl.IVF; - g_decoder.scan =ipuRegs->ctrl.AS ? mpeg2_scan_alt: mpeg2_scan_norm; - g_decoder.intra_dc_precision=ipuRegs->ctrl.IDP; + g_BP.BP += bdec.FB;//skip FB bits + g_decoder.coding_type = I_TYPE; + g_decoder.mpeg1 = ipuRegs->ctrl.MP1; + g_decoder.q_scale_type = ipuRegs->ctrl.QST; + g_decoder.intra_vlc_format = ipuRegs->ctrl.IVF; + g_decoder.scan = ipuRegs->ctrl.AS ? mpeg2_scan_alt : mpeg2_scan_norm; + g_decoder.intra_dc_precision = ipuRegs->ctrl.IDP; //from BDEC value /* JayteeMaster: the quantizer (linear/non linear) depends on the q_scale_type */ - g_decoder.quantizer_scale =g_decoder.q_scale_type?non_linear_quantizer_scale [bdec.QSC]:bdec.QSC<<1; - g_decoder.macroblock_modes =bdec.DT ? DCT_TYPE_INTERLACED : 0; - g_decoder.dcr =bdec.DCR; - g_decoder.macroblock_modes|=bdec.MBI ? MACROBLOCK_INTRA : MACROBLOCK_PATTERN; + g_decoder.quantizer_scale = g_decoder.q_scale_type ? non_linear_quantizer_scale [bdec.QSC] : bdec.QSC << 1; + g_decoder.macroblock_modes = bdec.DT ? DCT_TYPE_INTERLACED : 0; + g_decoder.dcr = bdec.DCR; + g_decoder.macroblock_modes |= bdec.MBI ? MACROBLOCK_INTRA : MACROBLOCK_PATTERN; memzero_obj(mb8); memzero_obj(mb16); - + s_routine = so_create(mpeg2_slice, &s_RoutineDone, s_tempstack, sizeof(s_tempstack)); - assert( s_routine != NULL ); + assert(s_routine != NULL); so_call(s_routine); - if(s_RoutineDone) - s_routine = NULL; + + if (s_RoutineDone) s_routine = NULL; return s_RoutineDone; } -static BOOL __fastcall ipuVDEC(u32 val) { - - switch( g_nCmdPos[0] ) { +static BOOL __fastcall ipuVDEC(u32 val) +{ + switch (g_nCmdPos[0]) + { case 0: ipuRegs->cmd.DATA = 0; - if( !getBits32((u8*)&g_decoder.bitstream_buf, 0) ) - return FALSE; - - g_decoder.bitstream_bits = -16; + if (!getBits32((u8*)&g_decoder.bitstream_buf, 0)) return FALSE; + + g_decoder.bitstream_bits = -16; BigEndian(g_decoder.bitstream_buf, g_decoder.bitstream_buf); - - switch((val >> 26) & 3){ + + switch ((val >> 26) & 3) + { case 0://Macroblock Address Increment - g_decoder.mpeg1 =ipuRegs->ctrl.MP1; + g_decoder.mpeg1 = ipuRegs->ctrl.MP1; ipuRegs->cmd.DATA = get_macroblock_address_increment(&g_decoder); break; + case 1://Macroblock Type //known issues: no error detected - g_decoder.frame_pred_frame_dct=1;//prevent DCT_TYPE_INTERLACED - g_decoder.coding_type =ipuRegs->ctrl.PCT; - ipuRegs->cmd.DATA=get_macroblock_modes(&g_decoder); + g_decoder.frame_pred_frame_dct = 1;//prevent DCT_TYPE_INTERLACED + g_decoder.coding_type = ipuRegs->ctrl.PCT; + ipuRegs->cmd.DATA = get_macroblock_modes(&g_decoder); break; + case 2://Motion Code //known issues: no error detected - ipuRegs->cmd.DATA=get_motion_delta(&g_decoder,0); + ipuRegs->cmd.DATA = get_motion_delta(&g_decoder, 0); break; + case 3://DMVector - ipuRegs->cmd.DATA=get_dmv(&g_decoder); + ipuRegs->cmd.DATA = get_dmv(&g_decoder); break; } - g_BP.BP+=(g_decoder.bitstream_bits+16); - if((int)g_BP.BP < 0) { + g_BP.BP += (g_decoder.bitstream_bits + 16); + if ((int)g_BP.BP < 0) + { g_BP.BP += 128; ReorderBitstream(); } - FillInternalBuffer(&g_BP.BP,1,0); + FillInternalBuffer(&g_BP.BP, 1, 0); - ipuRegs->cmd.DATA = (ipuRegs->cmd.DATA & 0xFFFF) | ((g_decoder.bitstream_bits+16) << 16); - ipuRegs->ctrl.ECD = (ipuRegs->cmd.DATA==0); + ipuRegs->cmd.DATA = (ipuRegs->cmd.DATA & 0xFFFF) | ((g_decoder.bitstream_bits + 16) << 16); + ipuRegs->ctrl.ECD = (ipuRegs->cmd.DATA == 0); case 1: - if( !getBits32((u8*)&ipuRegs->top, 0) ) { + if (!getBits32((u8*)&ipuRegs->top, 0)) + { g_nCmdPos[0] = 1; return FALSE; } - + BigEndian(ipuRegs->top, ipuRegs->top); - IPU_LOG("IPU VDEC command data 0x%x(0x%x). Skip 0x%X bits/Table=%d (%s), pct %d\n", - ipuRegs->cmd.DATA,ipuRegs->cmd.DATA >> 16,val & 0x3f, (val >> 26) & 3, (val >> 26) & 1 ? - ((val >> 26) & 2 ? "DMV" : "MBT") : (((val >> 26) & 2 ? "MC" : "MBAI")),ipuRegs->ctrl.PCT); - + IPU_LOG("IPU VDEC command data 0x%x(0x%x). Skip 0x%X bits/Table=%d (%s), pct %d", + ipuRegs->cmd.DATA, ipuRegs->cmd.DATA >> 16, val & 0x3f, (val >> 26) & 3, (val >> 26) & 1 ? + ((val >> 26) & 2 ? "DMV" : "MBT") : (((val >> 26) & 2 ? "MC" : "MBAI")), ipuRegs->ctrl.PCT); return TRUE; - jNO_DEFAULT + jNO_DEFAULT } return FALSE; @@ -569,13 +577,12 @@ static BOOL __fastcall ipuVDEC(u32 val) { static BOOL ipuFDEC(u32 val) { - if( !getBits32((u8*)&ipuRegs->cmd.DATA, 0) ) - return FALSE; + if (!getBits32((u8*)&ipuRegs->cmd.DATA, 0)) return FALSE; BigEndian(ipuRegs->cmd.DATA, ipuRegs->cmd.DATA); ipuRegs->top = ipuRegs->cmd.DATA; - IPU_LOG("FDEC read: 0x%8.8x\n", ipuRegs->top); + IPU_LOG("FDEC read: 0x%8.8x", ipuRegs->top); return TRUE; } @@ -584,22 +591,28 @@ static __forceinline BOOL ipuSETIQ(u32 val) { int i; - if ((val >> 27) & 1){ - g_nCmdPos[0] += getBits((u8*)niq + g_nCmdPos[0], 512-8*g_nCmdPos[0], 1); // 8*8*8 + if ((val >> 27) & 1) + { + g_nCmdPos[0] += getBits((u8*)niq + g_nCmdPos[0], 512 - 8 * g_nCmdPos[0], 1); // 8*8*8 - IPU_LOG("Read non-intra quantization matrix from IPU FIFO.\n"); - for (i=0; i<8; i++){ - IPU_LOG("%02X %02X %02X %02X %02X %02X %02X %02X\n", - niq[i*8+0], niq[i*8+1], niq[i*8+2], niq[i*8+3], - niq[i*8+4], niq[i*8+5], niq[i*8+6], niq[i*8+7]); + IPU_LOG("Read non-intra quantization matrix from IPU FIFO."); + for (i = 0; i < 8; i++) + { + IPU_LOG("%02X %02X %02X %02X %02X %02X %02X %02X", + niq[i * 8 + 0], niq[i * 8 + 1], niq[i * 8 + 2], niq[i * 8 + 3], + niq[i * 8 + 4], niq[i * 8 + 5], niq[i * 8 + 6], niq[i * 8 + 7]); } - }else{ - g_nCmdPos[0] += getBits((u8*)iq+8*g_nCmdPos[0], 512-8*g_nCmdPos[0], 1); - IPU_LOG("Read intra quantization matrix from IPU FIFO.\n"); - for (i=0; i<8; i++){ - IPU_LOG("%02X %02X %02X %02X %02X %02X %02X %02X\n", - iq[i*8+0], iq[i*8+1], iq[i*8+2], iq[i*8+3], - iq[i*8+4], iq[i*8+5], iq[i*8+6], iq[i*8+7]); + } + else + { + g_nCmdPos[0] += getBits((u8*)iq + 8 * g_nCmdPos[0], 512 - 8 * g_nCmdPos[0], 1); + + IPU_LOG("Read intra quantization matrix from IPU FIFO."); + for (i = 0; i < 8; i++) + { + IPU_LOG("%02X %02X %02X %02X %02X %02X %02X %02X", + iq[i * 8 + 0], iq[i * 8 + 1], iq[i * 8 + 2], iq[i *8 + 3], + iq[i * 8 + 4], iq[i * 8 + 5], iq[i * 8 + 6], iq[i *8 + 7]); } } @@ -607,33 +620,33 @@ static __forceinline BOOL ipuSETIQ(u32 val) } static __forceinline BOOL ipuSETVQ(u32 val) -{ - g_nCmdPos[0] += getBits((u8*)vqclut+g_nCmdPos[0], 256-8*g_nCmdPos[0], 1); // 16*2*8 +{ + g_nCmdPos[0] += getBits((u8*)vqclut + g_nCmdPos[0], 256 - 8 * g_nCmdPos[0], 1); // 16*2*8 - if( g_nCmdPos[0] == 32 ) + if (g_nCmdPos[0] == 32) { - IPU_LOG("IPU SETVQ command.\nRead VQCLUT table from IPU FIFO.\n"); + IPU_LOG("IPU SETVQ command.\nRead VQCLUT table from IPU FIFO."); IPU_LOG( - "%02d:%02d:%02d %02d:%02d:%02d %02d:%02d:%02d %02d:%02d:%02d " - "%02d:%02d:%02d %02d:%02d:%02d %02d:%02d:%02d %02d:%02d:%02d\n" - "%02d:%02d:%02d %02d:%02d:%02d %02d:%02d:%02d %02d:%02d:%02d " - "%02d:%02d:%02d %02d:%02d:%02d %02d:%02d:%02d %02d:%02d:%02d\n", - vqclut[0] >> 10, (vqclut[0] >> 5) & 0x1F, vqclut[0] & 0x1F, - vqclut[1] >> 10, (vqclut[1] >> 5) & 0x1F, vqclut[1] & 0x1F, - vqclut[2] >> 10, (vqclut[2] >> 5) & 0x1F, vqclut[2] & 0x1F, - vqclut[3] >> 10, (vqclut[3] >> 5) & 0x1F, vqclut[3] & 0x1F, - vqclut[4] >> 10, (vqclut[4] >> 5) & 0x1F, vqclut[4] & 0x1F, - vqclut[5] >> 10, (vqclut[5] >> 5) & 0x1F, vqclut[5] & 0x1F, - vqclut[6] >> 10, (vqclut[6] >> 5) & 0x1F, vqclut[6] & 0x1F, - vqclut[7] >> 10, (vqclut[7] >> 5) & 0x1F, vqclut[7] & 0x1F, - vqclut[8] >> 10, (vqclut[8] >> 5) & 0x1F, vqclut[8] & 0x1F, - vqclut[9] >> 10, (vqclut[9] >> 5) & 0x1F, vqclut[9] & 0x1F, - vqclut[10] >> 10, (vqclut[10] >> 5) & 0x1F, vqclut[10] & 0x1F, - vqclut[11] >> 10, (vqclut[11] >> 5) & 0x1F, vqclut[11] & 0x1F, - vqclut[12] >> 10, (vqclut[12] >> 5) & 0x1F, vqclut[12] & 0x1F, - vqclut[13] >> 10, (vqclut[13] >> 5) & 0x1F, vqclut[13] & 0x1F, - vqclut[14] >> 10, (vqclut[14] >> 5) & 0x1F, vqclut[14] & 0x1F, - vqclut[15] >> 10, (vqclut[15] >> 5) & 0x1F, vqclut[15] & 0x1F); + "%02d:%02d:%02d %02d:%02d:%02d %02d:%02d:%02d %02d:%02d:%02d " + "%02d:%02d:%02d %02d:%02d:%02d %02d:%02d:%02d %02d:%02d:%02d" + "%02d:%02d:%02d %02d:%02d:%02d %02d:%02d:%02d %02d:%02d:%02d " + "%02d:%02d:%02d %02d:%02d:%02d %02d:%02d:%02d %02d:%02d:%02d", + vqclut[0] >> 10, (vqclut[0] >> 5) & 0x1F, vqclut[0] & 0x1F, + vqclut[1] >> 10, (vqclut[1] >> 5) & 0x1F, vqclut[1] & 0x1F, + vqclut[2] >> 10, (vqclut[2] >> 5) & 0x1F, vqclut[2] & 0x1F, + vqclut[3] >> 10, (vqclut[3] >> 5) & 0x1F, vqclut[3] & 0x1F, + vqclut[4] >> 10, (vqclut[4] >> 5) & 0x1F, vqclut[4] & 0x1F, + vqclut[5] >> 10, (vqclut[5] >> 5) & 0x1F, vqclut[5] & 0x1F, + vqclut[6] >> 10, (vqclut[6] >> 5) & 0x1F, vqclut[6] & 0x1F, + vqclut[7] >> 10, (vqclut[7] >> 5) & 0x1F, vqclut[7] & 0x1F, + vqclut[8] >> 10, (vqclut[8] >> 5) & 0x1F, vqclut[8] & 0x1F, + vqclut[9] >> 10, (vqclut[9] >> 5) & 0x1F, vqclut[9] & 0x1F, + vqclut[10] >> 10, (vqclut[10] >> 5) & 0x1F, vqclut[10] & 0x1F, + vqclut[11] >> 10, (vqclut[11] >> 5) & 0x1F, vqclut[11] & 0x1F, + vqclut[12] >> 10, (vqclut[12] >> 5) & 0x1F, vqclut[12] & 0x1F, + vqclut[13] >> 10, (vqclut[13] >> 5) & 0x1F, vqclut[13] & 0x1F, + vqclut[14] >> 10, (vqclut[14] >> 5) & 0x1F, vqclut[14] & 0x1F, + vqclut[15] >> 10, (vqclut[15] >> 5) & 0x1F, vqclut[15] & 0x1F); } return g_nCmdPos[0] == 32; @@ -642,44 +655,46 @@ static __forceinline BOOL ipuSETVQ(u32 val) // IPU Transfers are split into 8Qwords so we need to send ALL the data static BOOL __fastcall ipuCSC(u32 val) { - tIPU_CMD_CSC csc( val ); + tIPU_CMD_CSC csc(val); - IPU_LOG("IPU CSC(Colorspace conversion from YCbCr) command (%d).\n",csc.MBC); - if (csc.OFM){ IPU_LOG("Output format is RGB16. ");} - else{ IPU_LOG("Output format is RGB32. ");} - if (csc.DTE){ IPU_LOG("Dithering enabled."); } + IPU_LOG("IPU CSC(Colorspace conversion from YCbCr) command (%d).", csc.MBC); + if (csc.OFM) + IPU_LOG("Output format is RGB16. "); + else + IPU_LOG("Output format is RGB32. "); - //SysPrintf("CSC\n"); - for (;g_nCmdIndex<(int)csc.MBC; g_nCmdIndex++){ + if (csc.DTE) IPU_LOG("Dithering enabled."); - if( g_nCmdPos[0] < 3072/8 ) { - g_nCmdPos[0] += getBits((u8*)&mb8+g_nCmdPos[0], 3072-8*g_nCmdPos[0], 1); + //Console::WriteLn("CSC"); + for (;g_nCmdIndex < (int)csc.MBC; g_nCmdIndex++) + { - if( g_nCmdPos[0] < 3072/8 ) - return FALSE; + if (g_nCmdPos[0] < 3072 / 8) + { + g_nCmdPos[0] += getBits((u8*) & mb8 + g_nCmdPos[0], 3072 - 8 * g_nCmdPos[0], 1); + + if (g_nCmdPos[0] < 3072 / 8) return FALSE; ipu_csc(&mb8, &rgb32, 0); - if (csc.OFM){ - ipu_dither2(&rgb32, &rgb16, csc.DTE); + if (csc.OFM) ipu_dither2(&rgb32, &rgb16, csc.DTE); + } + + if (csc.OFM) + { + while (g_nCmdPos[1] < 32) + { + g_nCmdPos[1] += FIFOfrom_write(((u32*) & rgb16) + 4 * g_nCmdPos[1], 32 - g_nCmdPos[1]); + + if (g_nCmdPos[1] <= 0) return FALSE; } } - - if (csc.OFM){ - while(g_nCmdPos[1] < 32) + else + { + while (g_nCmdPos[1] < 64) { - g_nCmdPos[1] += FIFOfrom_write(((u32*)&rgb16)+4*g_nCmdPos[1], 32-g_nCmdPos[1]); + g_nCmdPos[1] += FIFOfrom_write(((u32*) & rgb32) + 4 * g_nCmdPos[1], 64 - g_nCmdPos[1]); - if( g_nCmdPos[1] <= 0 ) - return FALSE; - } - } - else { - while(g_nCmdPos[1] < 64) - { - g_nCmdPos[1] += FIFOfrom_write(((u32*)&rgb32)+4*g_nCmdPos[1], 64-g_nCmdPos[1]); - - if( g_nCmdPos[1] <= 0 ) - return FALSE; + if (g_nCmdPos[1] <= 0) return FALSE; } } @@ -693,40 +708,44 @@ static BOOL __fastcall ipuCSC(u32 val) // Todo - Need to add the same stop and start code as CSC static BOOL ipuPACK(u32 val) { - tIPU_CMD_CSC csc( val ); + tIPU_CMD_CSC csc(val); - IPU_LOG("IPU PACK (Colorspace conversion from RGB32) command.\n"); - if (csc.OFM){ IPU_LOG("Output format is RGB16. ");} - else{ IPU_LOG("Output format is INDX4. ");} - if (csc.DTE){ IPU_LOG("Dithering enabled."); } - IPU_LOG("Number of macroblocks to be converted: %d\n", csc.MBC); + IPU_LOG("IPU PACK (Colorspace conversion from RGB32) command."); - for (;g_nCmdIndex<(int)csc.MBC; g_nCmdIndex++){ + if (csc.OFM) + IPU_LOG("Output format is RGB16. "); + else + IPU_LOG("Output format is INDX4. "); - if( g_nCmdPos[0] < 512 ) { - g_nCmdPos[0] += getBits((u8*)&mb8+g_nCmdPos[0], 512-8*g_nCmdPos[0], 1); + if (csc.DTE) IPU_LOG("Dithering enabled."); - if( g_nCmdPos[0] < 64 ) - return FALSE; + IPU_LOG("Number of macroblocks to be converted: %d", csc.MBC); + + for (;g_nCmdIndex < (int)csc.MBC; g_nCmdIndex++) + { + if (g_nCmdPos[0] < 512) + { + g_nCmdPos[0] += getBits((u8*) & mb8 + g_nCmdPos[0], 512 - 8 * g_nCmdPos[0], 1); + + if (g_nCmdPos[0] < 64) return FALSE; ipu_csc(&mb8, &rgb32, 0); ipu_dither2(&rgb32, &rgb16, csc.DTE); - if (csc.OFM){ - ipu_vq(&rgb16, indx4); - } - } - - if (csc.OFM) { - g_nCmdPos[1] += FIFOfrom_write(((u32*)&rgb16)+4*g_nCmdPos[1], 32-g_nCmdPos[1]); - if( g_nCmdPos[1] < 32 ) - return FALSE; + if (csc.OFM) ipu_vq(&rgb16, indx4); } - else { - g_nCmdPos[1] += FIFOfrom_write(((u32*)indx4)+4*g_nCmdPos[1], 8-g_nCmdPos[1]); - if( g_nCmdPos[1] < 8 ) - return FALSE; + if (csc.OFM) + { + g_nCmdPos[1] += FIFOfrom_write(((u32*) & rgb16) + 4 * g_nCmdPos[1], 32 - g_nCmdPos[1]); + + if (g_nCmdPos[1] < 32) return FALSE; + } + else + { + g_nCmdPos[1] += FIFOfrom_write(((u32*)indx4) + 4 * g_nCmdPos[1], 8 - g_nCmdPos[1]); + + if (g_nCmdPos[1] < 8) return FALSE; } g_nCmdPos[0] = 0; @@ -736,218 +755,187 @@ static BOOL ipuPACK(u32 val) return TRUE; } -static void ipuSETTH(u32 val) { +static void ipuSETTH(u32 val) +{ s_thresh[0] = (val & 0xff); - s_thresh[1] = ((val>>16) & 0xff); - IPU_LOG("IPU SETTH (Set threshold value)command %x.\n", val&0xff00ff); + s_thresh[1] = ((val >> 16) & 0xff); + IPU_LOG("IPU SETTH (Set threshold value)command %x.", val&0xff00ff); } /////////////////////// // IPU Worker Thread // /////////////////////// -#define IPU_INTERRUPT(dma) { \ - hwIntcIrq(INTC_IPU); \ +__forceinline void IPU_INTERRUPT() //dma +{ + hwIntcIrq(INTC_IPU); } -void IPUCMD_WRITE(u32 val) { +void IPUCMD_WRITE(u32 val) +{ // don't process anything if currently busy - if( ipuRegs->ctrl.BUSY ) { - // wait for thread - SysPrintf("IPU BUSY!\n"); - } + if (ipuRegs->ctrl.BUSY) Console::WriteLn("IPU BUSY!"); // wait for thread ipuRegs->ctrl.ECD = 0; ipuRegs->ctrl.SCD = 0; //clear ECD/SCD ipuRegs->cmd.DATA = val; g_nCmdPos[0] = 0; - switch (ipuRegs->cmd.CMD) { + switch (ipuRegs->cmd.CMD) + { case SCE_IPU_BCLR: ipuBCLR(val); - IPU_INTERRUPT(DMAC_TO_IPU); + IPU_INTERRUPT(); //DMAC_TO_IPU return; case SCE_IPU_VDEC: - g_BP.BP+= val & 0x3F; - + g_BP.BP += val & 0x3F; + // check if enough data in queue - if( ipuVDEC(val) ) { - return; - } + if (ipuVDEC(val)) return; ipuRegs->cmd.BUSY = 0x80000000; ipuRegs->topbusy = 0x80000000; - break; case SCE_IPU_FDEC: - IPU_LOG("IPU FDEC command. Skip 0x%X bits, FIFO 0x%X qwords, BP 0x%X, FP %d, CHCR 0x%x, %x\n", - val & 0x3f,g_BP.IFC,(int)g_BP.BP,g_BP.FP,((DMACh*)&PS2MEM_HW[0xb400])->chcr,cpuRegs.pc); - - g_BP.BP+= val & 0x3F; - - if( ipuFDEC(val) ) { - return; - } - + IPU_LOG("IPU FDEC command. Skip 0x%X bits, FIFO 0x%X qwords, BP 0x%X, FP %d, CHCR 0x%x, %x", + val & 0x3f, g_BP.IFC, (int)g_BP.BP, g_BP.FP, ((DMACh*)&PS2MEM_HW[0xb400])->chcr, cpuRegs.pc); + g_BP.BP += val & 0x3F; + if (ipuFDEC(val)) return; ipuRegs->cmd.BUSY = 0x80000000; ipuRegs->topbusy = 0x80000000; - break; - + case SCE_IPU_SETTH: ipuSETTH(val); hwIntcIrq(INTC_IPU); return; case SCE_IPU_SETIQ: - IPU_LOG("IPU SETIQ command.\n"); - - if (val & 0x3f) - IPU_LOG("Skip %d bits.\n", val & 0x3f); - - g_BP.BP+= val & 0x3F; - - if( ipuSETIQ(ipuRegs->cmd.DATA) ) { - return; - } - + IPU_LOG("IPU SETIQ command."); + if (val & 0x3f) IPU_LOG("Skip %d bits.", val & 0x3f); + g_BP.BP += val & 0x3F; + if (ipuSETIQ(ipuRegs->cmd.DATA)) return; break; + case SCE_IPU_SETVQ: - if( ipuSETVQ(ipuRegs->cmd.DATA) ) { - return; - } - + if (ipuSETVQ(ipuRegs->cmd.DATA)) return; break; + case SCE_IPU_CSC: g_nCmdPos[1] = 0; g_nCmdIndex = 0; - - if( ipuCSC(ipuRegs->cmd.DATA) ) { - if(ipu0dma->qwc > 0 && (ipu0dma->chcr & 0x100)) - IPU_INT0_FROM(); + + if (ipuCSC(ipuRegs->cmd.DATA)) + { + if (ipu0dma->qwc > 0 && (ipu0dma->chcr & 0x100)) IPU_INT0_FROM(); return; } - break; - case SCE_IPU_PACK: + case SCE_IPU_PACK: g_nCmdPos[1] = 0; g_nCmdIndex = 0; - - if( ipuPACK(ipuRegs->cmd.DATA) ) { - return; - } - + if (ipuPACK(ipuRegs->cmd.DATA)) return; break; case SCE_IPU_IDEC: - if( ipuIDEC(val) ) { + if (ipuIDEC(val)) + { // idec done, ipu0 done too - if(ipu0dma->qwc > 0 && (ipu0dma->chcr & 0x100)) - IPU_INT0_FROM(); + if (ipu0dma->qwc > 0 && (ipu0dma->chcr & 0x100)) IPU_INT0_FROM(); return; } - ipuRegs->topbusy = 0x80000000; // have to resort to the thread - ipuCurCmd = val>>28; + ipuCurCmd = val >> 28; ipuRegs->ctrl.BUSY = 1; - return; case SCE_IPU_BDEC: - if( ipuBDEC(val)) { - if(ipu0dma->qwc > 0 && (ipu0dma->chcr & 0x100)) - IPU_INT0_FROM(); - if (ipuRegs->ctrl.SCD || ipuRegs->ctrl.ECD) - hwIntcIrq(INTC_IPU); - + if (ipuBDEC(val)) + { + if (ipu0dma->qwc > 0 && (ipu0dma->chcr & 0x100)) IPU_INT0_FROM(); + if (ipuRegs->ctrl.SCD || ipuRegs->ctrl.ECD) hwIntcIrq(INTC_IPU); return; } - ipuRegs->topbusy = 0x80000000; - ipuCurCmd = val>>28; + ipuCurCmd = val >> 28; ipuRegs->ctrl.BUSY = 1; - return; } // have to resort to the thread - ipuCurCmd = val>>28; + ipuCurCmd = val >> 28; ipuRegs->ctrl.BUSY = 1; hwIntcIrq(INTC_IPU); } void IPUWorker() { - assert( ipuRegs->ctrl.BUSY ); + assert(ipuRegs->ctrl.BUSY); - switch (ipuCurCmd) { - case SCE_IPU_VDEC: - if( !ipuVDEC(ipuRegs->cmd.DATA) ) + switch (ipuCurCmd) + { + case SCE_IPU_VDEC: + if (!ipuVDEC(ipuRegs->cmd.DATA)) { hwIntcIrq(INTC_IPU); return; } - ipuRegs->cmd.BUSY = 0; ipuRegs->topbusy = 0; - break; case SCE_IPU_FDEC: - if( !ipuFDEC(ipuRegs->cmd.DATA) ) + if (!ipuFDEC(ipuRegs->cmd.DATA)) { hwIntcIrq(INTC_IPU); return; } - ipuRegs->cmd.BUSY = 0; ipuRegs->topbusy = 0; - break; case SCE_IPU_SETIQ: - if( !ipuSETIQ(ipuRegs->cmd.DATA) ) + if (!ipuSETIQ(ipuRegs->cmd.DATA)) { hwIntcIrq(INTC_IPU); return; } - break; + case SCE_IPU_SETVQ: - if( !ipuSETVQ(ipuRegs->cmd.DATA) ) + if (!ipuSETVQ(ipuRegs->cmd.DATA)) { hwIntcIrq(INTC_IPU); return; } - break; + case SCE_IPU_CSC: - if( !ipuCSC(ipuRegs->cmd.DATA) ) + if (!ipuCSC(ipuRegs->cmd.DATA)) { hwIntcIrq(INTC_IPU); return; } + if ((ipu0dma->qwc > 0) && (ipu0dma->chcr & 0x100)) IPU_INT0_FROM(); + break; - if(ipu0dma->qwc > 0 && (ipu0dma->chcr & 0x100)) - IPU_INT0_FROM(); - break; case SCE_IPU_PACK: - if( !ipuPACK(ipuRegs->cmd.DATA) ) + if (!ipuPACK(ipuRegs->cmd.DATA)) { hwIntcIrq(INTC_IPU); return; } - break; case SCE_IPU_IDEC: so_call(s_routine); - if( !s_RoutineDone ) { + if (!s_RoutineDone) + { hwIntcIrq(INTC_IPU); return; } @@ -957,15 +945,15 @@ void IPUWorker() ipuRegs->topbusy = 0; ipuRegs->cmd.BUSY = 0; ipuCurCmd = 0xffffffff; - // CHECK!: IPU0dma remains when IDEC is done, so we need to clear it - if(ipu0dma->qwc > 0 && (ipu0dma->chcr & 0x100)) - IPU_INT0_FROM(); + // CHECK!: IPU0dma remains when IDEC is done, so we need to clear it + if ((ipu0dma->qwc > 0) && (ipu0dma->chcr & 0x100)) IPU_INT0_FROM(); s_routine = NULL; break; + case SCE_IPU_BDEC: - so_call(s_routine); - if(!s_RoutineDone) + so_call(s_routine); + if (!s_RoutineDone) { hwIntcIrq(INTC_IPU); return; @@ -975,15 +963,14 @@ void IPUWorker() ipuRegs->topbusy = 0; ipuRegs->cmd.BUSY = 0; ipuCurCmd = 0xffffffff; - if(ipu0dma->qwc > 0 && (ipu0dma->chcr & 0x100)) - IPU_INT0_FROM(); + + if ((ipu0dma->qwc > 0) && (ipu0dma->chcr & 0x100)) IPU_INT0_FROM(); s_routine = NULL; - if (ipuRegs->ctrl.SCD || ipuRegs->ctrl.ECD) - hwIntcIrq(INTC_IPU); + if (ipuRegs->ctrl.SCD || ipuRegs->ctrl.ECD) hwIntcIrq(INTC_IPU); return; default: - SysPrintf("Unknown IPU command: %x\n", ipuRegs->cmd.CMD); + Console::WriteLn("Unknown IPU command: %x", params ipuRegs->cmd.CMD); break; } @@ -999,13 +986,13 @@ void IPUWorker() __forceinline void inc_readbits() { readbits += 16; - if( readbits >= _readbits+64 ) { - + if (readbits >= _readbits + 64) + { // move back - *(u64*)(_readbits) = *(u64*)(_readbits+64); - *(u64*)(_readbits+8) = *(u64*)(_readbits+72); - readbits = _readbits; - } + *(u64*)(_readbits) = *(u64*)(_readbits + 64); + *(u64*)(_readbits + 8) = *(u64*)(_readbits + 72); + readbits = _readbits; + } } // returns the pointer of readbits moved by 1 qword @@ -1013,164 +1000,152 @@ __forceinline u8* next_readbits() { return readbits + 16; } - + // returns the pointer of readbits moved by 1 qword u8* prev_readbits() { - if( readbits < _readbits+16 ) { - return _readbits+48-(readbits-_readbits); - } - - return readbits-16; + if (readbits < _readbits + 16) return _readbits + 48 - (readbits - _readbits); + + return readbits -16; } - + void ReorderBitstream() { readbits = prev_readbits(); g_BP.FP = 2; } - // IPU has a 2qword internal buffer whose status is pointed by FP. // If FP is 1, there's 1 qword in buffer. Second qword is only loaded // incase there are less than 32bits available in the first qword. // \return Number of bits available (clamps at 16 bits) u16 __fastcall FillInternalBuffer(u32 * pointer, u32 advance, u32 size) { - if(g_BP.FP == 0) + if (g_BP.FP == 0) { - if( FIFOto_read(next_readbits()) == 0 ) - return 0; + if (FIFOto_read(next_readbits()) == 0) return 0; inc_readbits(); g_BP.FP = 1; } - else if(g_BP.FP < 2 && (*(int*)pointer+size) >= 128) + else if ((g_BP.FP < 2) && (*(int*)pointer + size) >= 128) { - if( FIFOto_read(next_readbits()) ) - { - g_BP.FP += 1; - } + if (FIFOto_read(next_readbits())) g_BP.FP += 1; } - if(*(int*)pointer >= 128) + if (*(int*)pointer >= 128) { - assert( g_BP.FP >= 1); - - if(g_BP.FP > 1) - { - inc_readbits(); - } + assert(g_BP.FP >= 1); - if(advance) + if (g_BP.FP > 1) inc_readbits(); + + if (advance) { g_BP.FP--; *pointer &= 127; } } - return g_BP.FP >= 1 ? g_BP.FP*128-(*(int*)pointer) : 0; + return (g_BP.FP >= 1) ? g_BP.FP * 128 - (*(int*)pointer) : 0; } // whenever reading fractions of bytes. The low bits always come from the next byte // while the high bits come from the current byte u8 __fastcall getBits32(u8 *address, u32 advance) { - register u32 mask, shift=0; + register u32 mask, shift = 0; u8* readpos; // Check if the current BP has exceeded or reached the limit of 128 - if( FillInternalBuffer(&g_BP.BP,1,32) < 32 ) - return 0; + if (FillInternalBuffer(&g_BP.BP, 1, 32) < 32) return 0; - readpos = readbits+(int)g_BP.BP/8; + readpos = readbits + (int)g_BP.BP / 8; - if (g_BP.BP & 7) { - - shift = g_BP.BP&7; - mask = (0xff>>shift); - mask = mask|(mask<<8)|(mask<<16)|(mask<<24); - - *(u32*)address = ((~mask&*(u32*)(readpos+1))>>(8-shift)) | (((mask)&*(u32*)readpos)<> shift); + mask = mask | (mask << 8) | (mask << 16) | (mask << 24); + + *(u32*)address = ((~mask & *(u32*)(readpos + 1)) >> (8 - shift)) | (((mask) & *(u32*)readpos) << shift); } else + { *(u32*)address = *(u32*)readpos; + } - if (advance) - g_BP.BP+=32; + if (advance) g_BP.BP += 32; return 1; } __forceinline u8 __fastcall getBits16(u8 *address, u32 advance) { - register u32 mask, shift=0; + register u32 mask, shift = 0; u8* readpos; // Check if the current BP has exceeded or reached the limit of 128 - if( FillInternalBuffer(&g_BP.BP,1,16) < 16 ) + if (FillInternalBuffer(&g_BP.BP, 1, 16) < 16) return 0; + + readpos = readbits + (int)g_BP.BP / 8; + + if (g_BP.BP & 7) { - return 0; - } + shift = g_BP.BP & 7; + mask = (0xff >> shift); + mask = mask | (mask << 8); - readpos = readbits+(int)g_BP.BP/8; - - if (g_BP.BP & 7) { - - shift = g_BP.BP&7; - mask = (0xff>>shift); - mask = mask|(mask<<8); - - *(u16*)address = ((~mask&*(u16*)(readpos+1))>>(8-shift)) | (((mask)&*(u16*)readpos)<> (8 - shift)) | (((mask) & *(u16*)readpos) << shift); } else + { *(u16*)address = *(u16*)readpos; + } - if (advance) - g_BP.BP+=16; + if (advance) g_BP.BP += 16; return 1; } u8 __fastcall getBits8(u8 *address, u32 advance) { - register u32 mask, shift=0; + register u32 mask, shift = 0; u8* readpos; // Check if the current BP has exceeded or reached the limit of 128 - if( FillInternalBuffer(&g_BP.BP,1,8) < 8 ) + if (FillInternalBuffer(&g_BP.BP, 1, 8) < 8) return 0; - readpos = readbits+(int)g_BP.BP/8; + readpos = readbits + (int)g_BP.BP / 8; - if (g_BP.BP & 7) { - - shift = g_BP.BP&7; - mask = (0xff>>shift); - - *(u8*)address = (((~mask)&readpos[1])>>(8-shift)) | (((mask)&*readpos)<> shift); + + *(u8*)address = (((~mask) & readpos[1]) >> (8 - shift)) | (((mask) & *readpos) << shift); } else + { *(u8*)address = *(u8*)readpos; + } - if (advance) - g_BP.BP+=8; + if (advance) g_BP.BP += 8; return 1; } int __fastcall getBits(u8 *address, u32 size, u32 advance) { - register u32 mask = 0, shift=0, howmuch; + register u32 mask = 0, shift = 0, howmuch; u8* oldbits, *oldaddr = address; u32 pointer = 0; // Check if the current BP has exceeded or reached the limit of 128 - if( FillInternalBuffer(&g_BP.BP,1,8) < 8 ) - return 0; - + if (FillInternalBuffer(&g_BP.BP, 1, 8) < 8) return 0; + oldbits = readbits; - // Backup the current BP in case of VDEC/FDEC + // Backup the current BP in case of VDEC/FDEC pointer = g_BP.BP; if (pointer & 7) @@ -1178,34 +1153,28 @@ int __fastcall getBits(u8 *address, u32 size, u32 advance) address--; while (size) { - if (shift==0) + if (shift == 0) { - *++address=0; - shift=8; + *++address = 0; + shift = 8; } - howmuch = min(min(8-(pointer&7), 128-pointer), - min(size, shift)); + howmuch = min(min(8 - (pointer & 7), 128 - pointer), min(size, shift)); - if( FillInternalBuffer(&pointer,advance,8) < 8 ) + if (FillInternalBuffer(&pointer, advance, 8) < 8) { - if(advance) - { - g_BP.BP = pointer; - } - return address-oldaddr; + if (advance) g_BP.BP = pointer; + return address - oldaddr; } - - mask = ((0xFF >> (pointer&7)) << - (8-howmuch-(pointer&7))) & 0xFF; - mask &= readbits[((pointer)>>3)]; - mask >>= 8-howmuch-(pointer&7); - pointer += howmuch; - size -= howmuch; - shift -= howmuch; + + mask = ((0xFF >> (pointer & 7)) << (8 - howmuch - (pointer & 7))) & 0xFF; + mask &= readbits[((pointer) >> 3)]; + mask >>= 8 - howmuch - (pointer & 7); + pointer += howmuch; + size -= howmuch; + shift -= howmuch; *address |= mask << shift; } - ++address; } else @@ -1213,37 +1182,39 @@ int __fastcall getBits(u8 *address, u32 size, u32 advance) u8* readmem; while (size) { - if( FillInternalBuffer(&pointer,advance,8) < 8 ) + if (FillInternalBuffer(&pointer, advance, 8) < 8) { - if(advance) - { - g_BP.BP = pointer; - } - return address-oldaddr; + if (advance) g_BP.BP = pointer; + return address -oldaddr; } - - howmuch = min(128-pointer, size); - size -= howmuch; - readmem = readbits + (pointer>>3); + howmuch = min(128 - pointer, size); + size -= howmuch; + + readmem = readbits + (pointer >> 3); pointer += howmuch; howmuch >>= 3; - - while(howmuch >= 4) { + + while (howmuch >= 4) + { *(u32*)address = *(u32*)readmem; howmuch -= 4; address += 4; readmem += 4; } - switch(howmuch) { - case 3: address[2] = readmem[2]; - case 2: address[1] = readmem[1]; - case 1: address[0] = readmem[0]; + switch (howmuch) + { + case 3: + address[2] = readmem[2]; + case 2: + address[1] = readmem[1]; + case 1: + address[0] = readmem[0]; case 0: break; - jNO_DEFAULT + jNO_DEFAULT } address += howmuch; @@ -1251,41 +1222,46 @@ int __fastcall getBits(u8 *address, u32 size, u32 advance) } // If not advance then reset the Reading buffer value - if(advance) - { + if (advance) g_BP.BP = pointer; + else + readbits = oldbits; // restore the last pointer - } - else readbits = oldbits; // restore the last pointer - - return address-oldaddr; + return address - oldaddr; } ///////////////////// CORE FUNCTIONS ///////////////// void Skl_YUV_To_RGB32_MMX(u8 *RGB, const int Dst_BpS, const u8 *Y, const u8 *U, const u8 *V, - const int Src_BpS, const int Width, const int Height); + const int Src_BpS, const int Width, const int Height); -void __fastcall ipu_csc(macroblock_8 *mb8, macroblock_rgb32 *rgb32, int sgn){ +void __fastcall ipu_csc(macroblock_8 *mb8, macroblock_rgb32 *rgb32, int sgn) +{ int i; u8* p = (u8*)rgb32; yuv2rgb_sse2(); - if( s_thresh[0] > 0 ) { - for(i = 0; i < 64*4; i++, p += 4) { - if( p[0] < s_thresh[0] && p[1] < s_thresh[0] && p[2] < s_thresh[0] ) + if (s_thresh[0] > 0) + { + for (i = 0; i < 64*4; i++, p += 4) + { + if ((p[0] < s_thresh[0]) && (p[1] < s_thresh[0]) && (p[2] < s_thresh[0])) *(u32*)p = 0; else - p[3] = (p[1] < s_thresh[1] && p[2] < s_thresh[1] && p[3] < s_thresh[1]) ? 0x40 : 0x80; + p[3] = ((p[1] < s_thresh[1]) && (p[2] < s_thresh[1]) && (p[3] < s_thresh[1])) ? 0x40 : 0x80; } } - else if( s_thresh[1] > 0 ) { - for(i = 0; i < 64*4; i++, p += 4) { - p[3] = (p[1] < s_thresh[1] && p[2] < s_thresh[1] && p[3] < s_thresh[1]) ? 0x40 : 0x80; + else if (s_thresh[1] > 0) + { + for (i = 0; i < 64*4; i++, p += 4) + { + p[3] = ((p[1] < s_thresh[1]) && (p[2] < s_thresh[1]) && (p[3] < s_thresh[1])) ? 0x40 : 0x80; } } - else { - for(i = 0; i < 64; i++, p += 16) { + else + { + for (i = 0; i < 64; i++, p += 16) + { p[3] = p[7] = p[11] = p[15] = 0x80; } } @@ -1294,87 +1270,66 @@ void __fastcall ipu_csc(macroblock_8 *mb8, macroblock_rgb32 *rgb32, int sgn){ void __fastcall ipu_dither2(const macroblock_rgb32* rgb32, macroblock_rgb16 *rgb16, int dte) { int i, j; - for(i = 0; i < 16; ++i) { - for(j = 0; j < 16; ++j) { - rgb16->c[i][j].r = rgb32->c[i][j].r>>3; - rgb16->c[i][j].g = rgb32->c[i][j].g>>3; - rgb16->c[i][j].b = rgb32->c[i][j].b>>3; - rgb16->c[i][j].a = rgb32->c[i][j].a==0x40; + for (i = 0; i < 16; ++i) + { + for (j = 0; j < 16; ++j) + { + rgb16->c[i][j].r = rgb32->c[i][j].r >> 3; + rgb16->c[i][j].g = rgb32->c[i][j].g >> 3; + rgb16->c[i][j].b = rgb32->c[i][j].b >> 3; + rgb16->c[i][j].a = rgb32->c[i][j].a == 0x40; } } } void __fastcall ipu_dither(macroblock_8 *mb8, macroblock_rgb16 *rgb16, int dte) { - //SysPrintf("IPU: Dither not implemented"); + //Console::Error("IPU: Dither not implemented"); } -void __fastcall ipu_vq(macroblock_rgb16 *rgb16, u8* indx4){ +void __fastcall ipu_vq(macroblock_rgb16 *rgb16, u8* indx4) +{ Console::Error("IPU: VQ not implemented"); } -void __fastcall ipu_copy(const macroblock_8 *mb8, macroblock_16 *mb16) { - const u8 *s=(const u8*)mb8; - s16 *d=(s16*)mb16; +void __fastcall ipu_copy(const macroblock_8 *mb8, macroblock_16 *mb16) +{ + const u8 *s = (const u8*)mb8; + s16 *d = (s16*)mb16; int i; - for (i=0; i< 256; i++) *d++ = *s++; //Y bias - 16 - for (i=0; i< 64; i++) *d++ = *s++; //Cr bias - 128 - for (i=0; i< 64; i++) *d++ = *s++; //Cb bias - 128 - /*for(i = 0; i < 384/(16*6); ++i, s += 16*4, d += 16*4) { - __m128i r0, r1, r2, r3, r4, r5, r6, r7; - - r0 = _mm_load_si128((__m128i*)s); - r2 = _mm_load_si128((__m128i*)s+1); - r4 = _mm_load_si128((__m128i*)s+2); - r6 = _mm_load_si128((__m128i*)s+3); - - // signed shift - r1 = _mm_srai_epi16(_mm_unpackhi_epi8(r0, r0), 8); - r0 = _mm_srai_epi16(_mm_unpacklo_epi8(r0, r0), 8); - r3 = _mm_srai_epi16(_mm_unpackhi_epi8(r2, r2), 8); - r2 = _mm_srai_epi16(_mm_unpacklo_epi8(r2, r2), 8); - r5 = _mm_srai_epi16(_mm_unpackhi_epi8(r4, r4), 8); - r4 = _mm_srai_epi16(_mm_unpacklo_epi8(r4, r4), 8); - r7 = _mm_srai_epi16(_mm_unpackhi_epi8(r6, r6), 8); - r6 = _mm_srai_epi16(_mm_unpacklo_epi8(r6, r6), 8); - - _mm_store_si128((__m128i*)d, r0); - _mm_store_si128((__m128i*)d+1, r1); - _mm_store_si128((__m128i*)d+2, r2); - _mm_store_si128((__m128i*)d+3, r3); - _mm_store_si128((__m128i*)d+4, r4); - _mm_store_si128((__m128i*)d+5, r5); - _mm_store_si128((__m128i*)d+6, r6); - _mm_store_si128((__m128i*)d+7, r7); - }*/ + for (i = 0; i < 256; i++) *d++ = *s++; //Y bias - 16 + for (i = 0; i < 64; i++) *d++ = *s++; //Cr bias - 128 + for (i = 0; i < 64; i++) *d++ = *s++; //Cb bias - 128 } ///////////////////// IPU DMA //////////////////////// void FIFOto_clear() { - //assert( g_BP.IFC == 0 ); memzero_obj(fifo_input); g_BP.IFC = 0; ipuRegs->ctrl.IFC = 0; FIreadpos = 0; - FIwritepos = 0; + FIwritepos = 0; } int FIFOto_read(void *value) { // wait until enough data - if( g_BP.IFC == 0 ) { - if( IPU1dma() == 0 ) - return 0; - - assert( g_BP.IFC > 0 ); + if (g_BP.IFC == 0) + { + if (IPU1dma() == 0) return 0; + assert(g_BP.IFC > 0); } // transfer 1 qword, split into two transfers - ((u32*)value)[0] = fifo_input[FIreadpos]; fifo_input[FIreadpos] = 0; - ((u32*)value)[1] = fifo_input[FIreadpos+1]; fifo_input[FIreadpos+1] = 0; - ((u32*)value)[2] = fifo_input[FIreadpos+2]; fifo_input[FIreadpos+2] = 0; - ((u32*)value)[3] = fifo_input[FIreadpos+3]; fifo_input[FIreadpos+3] = 0; + ((u32*)value)[0] = fifo_input[FIreadpos]; + fifo_input[FIreadpos] = 0; + ((u32*)value)[1] = fifo_input[FIreadpos+1]; + fifo_input[FIreadpos+1] = 0; + ((u32*)value)[2] = fifo_input[FIreadpos+2]; + fifo_input[FIreadpos+2] = 0; + ((u32*)value)[3] = fifo_input[FIreadpos+3]; + fifo_input[FIreadpos+3] = 0; FIreadpos = (FIreadpos + 4) & 31; g_BP.IFC--; return 1; @@ -1383,25 +1338,27 @@ int FIFOto_read(void *value) int FIFOto_write(u32* pMem, int size) { int transsize; - int firsttrans = min(size, 8-(int)g_BP.IFC); + int firsttrans = min(size, 8 - (int)g_BP.IFC); - g_BP.IFC+=firsttrans; + g_BP.IFC += firsttrans; transsize = firsttrans; - while(transsize-- > 0) { + while (transsize-- > 0) + { fifo_input[FIwritepos] = pMem[0]; fifo_input[FIwritepos+1] = pMem[1]; fifo_input[FIwritepos+2] = pMem[2]; fifo_input[FIwritepos+3] = pMem[3]; - FIwritepos = (FIwritepos+4)&31; - pMem +=4; + FIwritepos = (FIwritepos + 4) & 31; + pMem += 4; } return firsttrans; } +// To do: convert this into a static inlined function. #define IPU1chain() { \ - if(ipu1dma->qwc > 0) \ + if (ipu1dma->qwc > 0) \ { \ int qwc = ipu1dma->qwc; \ pMem = (u32*)dmaGetAddr(ipu1dma->madr); \ @@ -1420,281 +1377,294 @@ int FIFOto_write(u32* pMem, int size) int IPU1dma() { u32 *ptag, *pMem; - int done=0; + bool done = FALSE; int ipu1cycles = 0; int totalqwc = 0; - assert( !(ipu1dma->chcr&0x40) ); + assert(!(ipu1dma->chcr & 0x40)); - if( !(ipu1dma->chcr & 0x100) || (cpuRegs.interrupt & (1<chcr & 0x100) || (cpuRegs.interrupt & (1 << DMAC_TO_IPU))) return 0; - assert( !(g_nDMATransfer & IPU_DMA_TIE1) ); + assert(!(g_nDMATransfer & IPU_DMA_TIE1)); // in kh, qwc == 0 when dma_actv1 is set - if( (g_nDMATransfer & IPU_DMA_ACTV1) && ipu1dma->qwc > 0 ) { + if ((g_nDMATransfer & IPU_DMA_ACTV1) && ipu1dma->qwc > 0) + { IPU1chain(); - if ((ipu1dma->chcr & 0x80) && (g_nDMATransfer&IPU_DMA_DOTIE1)) { //Check TIE bit of CHCR and IRQ bit of tag - SysPrintf("IPU1 TIE\n"); + //Check TIE bit of CHCR and IRQ bit of tag + if ((ipu1dma->chcr & 0x80) && (g_nDMATransfer&IPU_DMA_DOTIE1)) + { + Console::WriteLn("IPU1 TIE"); IPU_INT_TO(totalqwc*BIAS); - g_nDMATransfer &= ~(IPU_DMA_ACTV1|IPU_DMA_DOTIE1); + g_nDMATransfer &= ~(IPU_DMA_ACTV1 | IPU_DMA_DOTIE1); g_nDMATransfer |= IPU_DMA_TIE1; return totalqwc; } - g_nDMATransfer &= ~(IPU_DMA_ACTV1|IPU_DMA_DOTIE1); + g_nDMATransfer &= ~(IPU_DMA_ACTV1 | IPU_DMA_DOTIE1); - if( (ipu1dma->chcr&0xc) == 0 ) { + if ((ipu1dma->chcr&0xc) == 0) + { IPU_INT_TO(totalqwc*BIAS); return totalqwc; } - else { + else + { u32 tag = ipu1dma->chcr; // upper bits describe current tag - - if ((ipu1dma->chcr & 0x80) && (tag&0x80000000)) { + + if ((ipu1dma->chcr & 0x80) && (tag&0x80000000)) + { ptag = (u32*)dmaGetAddr(ipu1dma->tadr); - switch(tag&0x70000000) { - case 0x00000000: ipu1dma->tadr += 16; break; - case 0x70000000: ipu1dma->tadr = ipu1dma->madr; break; + switch (tag&0x70000000) + { + case 0x00000000: + ipu1dma->tadr += 16; + break; + case 0x70000000: + ipu1dma->tadr = ipu1dma->madr; + break; } - ipu1dma->chcr = (ipu1dma->chcr & 0xFFFF) | ( (*ptag) & 0xFFFF0000 ); - IPU_LOG("IPU dmaIrq Set\n"); + ipu1dma->chcr = (ipu1dma->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000); + IPU_LOG("IPU dmaIrq Set"); IPU_INT_TO(totalqwc*BIAS); g_nDMATransfer |= IPU_DMA_TIE1; return totalqwc; } - switch( tag&0x70000000 ) + switch (tag&0x70000000) { - case 0x00000000: - ipu1dma->tadr += 16; - IPU_INT_TO((1+totalqwc)*BIAS); - return totalqwc; + case 0x00000000: + ipu1dma->tadr += 16; + IPU_INT_TO((1 + totalqwc)*BIAS); + return totalqwc; - case 0x70000000: - ipu1dma->tadr = ipu1dma->madr; - IPU_INT_TO((1+totalqwc)*BIAS); - return totalqwc; + case 0x70000000: + ipu1dma->tadr = ipu1dma->madr; + IPU_INT_TO((1 + totalqwc)*BIAS); + return totalqwc; } } } - if ((ipu1dma->chcr & 0xc) == 0 && ipu1dma->qwc == 0) { // Normal Mode - //SysPrintf("ipu1 normal empty qwc?\n"); + if ((ipu1dma->chcr & 0xc) == 0 && ipu1dma->qwc == 0) // Normal Mode + { + //Console::WriteLn("ipu1 normal empty qwc?"); return totalqwc; } // Transfer Dn_QWC from Dn_MADR to GIF - - if ((ipu1dma->chcr & 0xc) == 0 || ipu1dma->qwc > 0) { // Normal Mode - IPU_LOG("dmaIPU1 Normal size=%d, addr=%lx, fifosize=%x\n", - ipu1dma->qwc, ipu1dma->madr, 8 - g_BP.IFC); + + if ((ipu1dma->chcr & 0xc) == 0 || ipu1dma->qwc > 0) // Normal Mode + { + IPU_LOG("dmaIPU1 Normal size=%d, addr=%lx, fifosize=%x", + ipu1dma->qwc, ipu1dma->madr, 8 - g_BP.IFC); IPU1chain(); - IPU_INT_TO((ipu1cycles+totalqwc)*BIAS); + IPU_INT_TO((ipu1cycles + totalqwc)*BIAS); return totalqwc; } - else + else { // Chain Mode - //while (done == 0) { // Loop while Dn_CHCR.STR is 1 - ptag = (u32*)dmaGetAddr(ipu1dma->tadr); //Set memory pointer to TADR - if (ptag == NULL) { //Is ptag empty? - SysPrintf("IPU1 BUSERR\n"); - ipu1dma->chcr = ( ipu1dma->chcr & 0xFFFF ) | ( (*ptag) & 0xFFFF0000 ); //Transfer upper part of tag to CHCR bits 31-15 - psHu32(DMAC_STAT)|= 1<<15; //If yes, set BEIS (BUSERR) in DMAC_STAT register - return totalqwc; - } - ipu1cycles+=1; // Add 1 cycles from the QW read for the tag - - ipu1dma->chcr = ( ipu1dma->chcr & 0xFFFF ) | ( (*ptag) & 0xFFFF0000 ); //Transfer upper part of tag to CHCR bits 31-15 - ipu1dma->qwc = (u16)ptag[0]; //QWC set to lower 16bits of the tag - //ipu1dma->madr = ptag[1]; //MADR = ADDR field - - //done = hwDmacSrcChainWithStack(ipu1dma, id); - switch(ptag[0] & 0x70000000) { - case 0x00000000: // refe - // do not change tadr - ipu1dma->madr = ptag[1]; - done = 1; - break; + ptag = (u32*)dmaGetAddr(ipu1dma->tadr); //Set memory pointer to TADR + if (ptag == NULL) //Is ptag empty? + { + Console::Error("IPU1 BUSERR"); + ipu1dma->chcr = (ipu1dma->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000); //Transfer upper part of tag to CHCR bits 31-15 + psHu32(DMAC_STAT) |= 1 << 15; //If yes, set BEIS (BUSERR) in DMAC_STAT register + return totalqwc; + } - case 0x10000000: // cnt - ipu1dma->madr = ipu1dma->tadr + 16; - // Set the taddr to the next tag - ipu1dma->tadr += 16 + (ipu1dma->qwc << 4); - break; + ipu1cycles += 1; // Add 1 cycles from the QW read for the tag - case 0x20000000: // next - ipu1dma->madr = ipu1dma->tadr + 16; - ipu1dma->tadr = ptag[1]; - break; + ipu1dma->chcr = (ipu1dma->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000); //Transfer upper part of tag to CHCR bits 31-15 + ipu1dma->qwc = (u16)ptag[0]; //QWC set to lower 16bits of the tag - case 0x30000000: // ref - ipu1dma->madr = ptag[1]; - ipu1dma->tadr += 16; - break; + switch (ptag[0] & 0x70000000) + { + case 0x00000000: // refe + // do not change tadr + ipu1dma->madr = ptag[1]; + done = TRUE; + break; - case 0x70000000: // end - // do not change tadr - ipu1dma->madr = ipu1dma->tadr + 16; - done = 1; - break; + case 0x10000000: // cnt + ipu1dma->madr = ipu1dma->tadr + 16; + // Set the taddr to the next tag + ipu1dma->tadr += 16 + (ipu1dma->qwc << 4); + break; - default: - Console::Error("IPU ERROR: different transfer mode!, Please report to PCSX2 Team\n"); - break; - } + case 0x20000000: // next + ipu1dma->madr = ipu1dma->tadr + 16; + ipu1dma->tadr = ptag[1]; + break; - IPU_LOG("dmaIPU1 dmaChain %8.8x_%8.8x size=%d, addr=%lx, fifosize=%x\n", - ptag[1], ptag[0], ipu1dma->qwc, ipu1dma->madr, 8 - g_BP.IFC); + case 0x30000000: // ref + ipu1dma->madr = ptag[1]; + ipu1dma->tadr += 16; + break; - if( (ipu1dma->chcr & 0x80) && ptag[0] & 0x80000000 ) - g_nDMATransfer |= IPU_DMA_DOTIE1; - else - g_nDMATransfer &= ~IPU_DMA_DOTIE1; + case 0x70000000: // end + // do not change tadr + ipu1dma->madr = ipu1dma->tadr + 16; + done = TRUE; + break; - //Britney Dance beat does a blank NEXT tag, for some odd reason the fix doesnt work if after IPU1Chain O_o - if(ipu1dma->qwc == 0 && done == 0 && !(g_nDMATransfer & IPU_DMA_DOTIE1)) IPU1dma(); + default: + Console::Error("IPU ERROR: different transfer mode!, Please report to PCSX2 Team"); + break; + } - IPU1chain(); + IPU_LOG("dmaIPU1 dmaChain %8.8x_%8.8x size=%d, addr=%lx, fifosize=%x", + ptag[1], ptag[0], ipu1dma->qwc, ipu1dma->madr, 8 - g_BP.IFC); - if ((ipu1dma->chcr & 0x80) && (ptag[0]&0x80000000) && ipu1dma->qwc == 0) { //Check TIE bit of CHCR and IRQ bit of tag - SysPrintf("IPU1 TIE\n"); + if ((ipu1dma->chcr & 0x80) && ptag[0] & 0x80000000) + g_nDMATransfer |= IPU_DMA_DOTIE1; + else + g_nDMATransfer &= ~IPU_DMA_DOTIE1; - if( done ) { - ptag = (u32*)dmaGetAddr(ipu1dma->tadr); + //Britney Dance beat does a blank NEXT tag, for some odd reason the fix doesnt work if after IPU1Chain O_o + if ((ipu1dma->qwc == 0) && (!done) && !(g_nDMATransfer & IPU_DMA_DOTIE1)) IPU1dma(); - switch(ptag[0]&0x70000000) { - case 0x00000000: ipu1dma->tadr += 16; break; - case 0x70000000: ipu1dma->tadr = ipu1dma->madr; break; - } + IPU1chain(); - ipu1dma->chcr = (ipu1dma->chcr & 0xFFFF) | ( (*ptag) & 0xFFFF0000 ); + if ((ipu1dma->chcr & 0x80) && (ptag[0]&0x80000000) && ipu1dma->qwc == 0) //Check TIE bit of CHCR and IRQ bit of tag + { + Console::WriteLn("IPU1 TIE"); + + if (done) + { + ptag = (u32*)dmaGetAddr(ipu1dma->tadr); + + switch (ptag[0]&0x70000000) + { + case 0x00000000: + ipu1dma->tadr += 16; + break; + case 0x70000000: + ipu1dma->tadr = ipu1dma->madr; + break; } - IPU_INT_TO(ipu1cycles+totalqwc*BIAS); - g_nDMATransfer |= IPU_DMA_TIE1; - return totalqwc; + ipu1dma->chcr = (ipu1dma->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000); } - if(ipu1dma->qwc == 0) + IPU_INT_TO(ipu1cycles + totalqwc*BIAS); + g_nDMATransfer |= IPU_DMA_TIE1; + return totalqwc; + } + + if (ipu1dma->qwc == 0) { - switch( ptag[0]&0x70000000 ) + switch (ptag[0]&0x70000000) { case 0x00000000: ipu1dma->tadr += 16; - break; - + break; + case 0x70000000: ipu1dma->tadr = ipu1dma->madr; - break; + break; } } } - IPU_INT_TO((ipu1cycles+totalqwc)*BIAS); + IPU_INT_TO((ipu1cycles + totalqwc)*BIAS); return totalqwc; } -int FIFOfrom_write(const u32 *value,int size) +int FIFOfrom_write(const u32 *value, int size) { - int transsize; - int firsttrans; + int transsize, firsttrans; - if((int)ipuRegs->ctrl.OFC >= 8) - { - if(IPU0dma() == 0) - { -// ipuRegs->ctrl.OFC = 0; - } - } + if ((int)ipuRegs->ctrl.OFC >= 8) IPU0dma(); - transsize = min(size,8-(int)ipuRegs->ctrl.OFC); + transsize = min(size, 8 - (int)ipuRegs->ctrl.OFC); firsttrans = transsize; - while(transsize-- > 0) { + while (transsize-- > 0) + { fifo_output[FOwritepos] = ((u32*)value)[0]; fifo_output[FOwritepos+1] = ((u32*)value)[1]; fifo_output[FOwritepos+2] = ((u32*)value)[2]; fifo_output[FOwritepos+3] = ((u32*)value)[3]; - FOwritepos = (FOwritepos+4)&31; + FOwritepos = (FOwritepos + 4) & 31; value += 4; } - ipuRegs->ctrl.OFC+=firsttrans; + ipuRegs->ctrl.OFC += firsttrans; IPU0dma(); - //SysPrintf("Written %d qwords, %d\n",firsttrans,ipuRegs->ctrl.OFC); + //Console::WriteLn("Written %d qwords, %d", params firsttrans,ipuRegs->ctrl.OFC); return firsttrans; } -void FIFOfrom_read(void *value,int size) +static __forceinline void _FIFOfrom_readsingle(void *value) +{ + // transfer 1 qword, split into two transfers + ((u32*)value)[0] = fifo_output[FOreadpos]; + fifo_output[FOreadpos] = 0; + ((u32*)value)[1] = fifo_output[FOreadpos+1]; + fifo_output[FOreadpos+1] = 0; + ((u32*)value)[2] = fifo_output[FOreadpos+2]; + fifo_output[FOreadpos+2] = 0; + ((u32*)value)[3] = fifo_output[FOreadpos+3]; + fifo_output[FOreadpos+3] = 0; + FOreadpos = (FOreadpos + 4) & 31; +} + +void FIFOfrom_readsingle(void *value) +{ + if (ipuRegs->ctrl.OFC > 0) + { + ipuRegs->ctrl.OFC--; + _FIFOfrom_readsingle(value); + } +} + +void FIFOfrom_read(void *value, int size) { ipuRegs->ctrl.OFC -= size; - while(size > 0) + while (size > 0) { - // transfer 1 qword, split into two transfers - ((u32*)value)[0] = fifo_output[FOreadpos]; fifo_output[FOreadpos] = 0; - ((u32*)value)[1] = fifo_output[FOreadpos+1]; fifo_output[FOreadpos+1] = 0; - ((u32*)value)[2] = fifo_output[FOreadpos+2]; fifo_output[FOreadpos+2] = 0; - ((u32*)value)[3] = fifo_output[FOreadpos+3]; fifo_output[FOreadpos+3] = 0; + _FIFOfrom_readsingle(value); value = (u32*)value + 4; - FOreadpos = (FOreadpos + 4) & 31; size--; } } -void FIFOfrom_readsingle(void *value) -{ - if(ipuRegs->ctrl.OFC > 0) - { - ipuRegs->ctrl.OFC --; - // transfer 1 qword, split into two transfers - ((u32*)value)[0] = fifo_output[FOreadpos]; fifo_output[FOreadpos] = 0; - ((u32*)value)[1] = fifo_output[FOreadpos+1]; fifo_output[FOreadpos+1] = 0; - ((u32*)value)[2] = fifo_output[FOreadpos+2]; fifo_output[FOreadpos+2] = 0; - ((u32*)value)[3] = fifo_output[FOreadpos+3]; fifo_output[FOreadpos+3] = 0; - FOreadpos = (FOreadpos + 4) & 31; - } -} int IPU0dma() { int readsize; void* pMem; - //int qwc = ipu0dma->qwc; - //u32 chcr = ipu0dma->chcr; - - if( !(ipu0dma->chcr & 0x100) || (cpuRegs.interrupt & (1<qwc == 0) + if ((!(ipu0dma->chcr & 0x100) || (cpuRegs.interrupt & (1 << DMAC_FROM_IPU))) || (ipu0dma->qwc == 0)) return 0; - assert( !(ipu0dma->chcr&0x40) ); + assert(!(ipu0dma->chcr&0x40)); - IPU_LOG("dmaIPU0 chcr = %lx, madr = %lx, qwc = %lx\n", - ipu0dma->chcr, ipu0dma->madr, ipu0dma->qwc); + IPU_LOG("dmaIPU0 chcr = %lx, madr = %lx, qwc = %lx", + ipu0dma->chcr, ipu0dma->madr, ipu0dma->qwc); - assert((ipu0dma->chcr & 0xC) == 0 ); + assert((ipu0dma->chcr & 0xC) == 0); pMem = (u32*)dmaGetAddr(ipu0dma->madr); - readsize = min(ipu0dma->qwc, (u16)ipuRegs->ctrl.OFC); - FIFOfrom_read(pMem,readsize); - ipu0dma->madr += readsize<< 4; + readsize = min(ipu0dma->qwc, (u16)ipuRegs->ctrl.OFC); + FIFOfrom_read(pMem, readsize); + ipu0dma->madr += readsize << 4; ipu0dma->qwc -= readsize; // note: qwc is u16 - if(ipu0dma->qwc == 0) { - if ((psHu32(DMAC_CTRL) & 0x30) == 0x30) { // STS == fromIPU + if (ipu0dma->qwc == 0) + { + if ((psHu32(DMAC_CTRL) & 0x30) == 0x30) // STS == fromIPU + { psHu32(DMAC_STADR) = ipu0dma->madr; - switch (psHu32(DMAC_CTRL) & 0xC0) { + switch (psHu32(DMAC_CTRL) & 0xC0) + { case 0x80: // GIF g_nDMATransfer |= IPU_DMA_GIFSTALL; break; @@ -1703,49 +1673,51 @@ int IPU0dma() break; } } - IPU_INT_FROM( readsize*BIAS ); + IPU_INT_FROM(readsize*BIAS); } return readsize; } -void dmaIPU0() // fromIPU +__forceinline void dmaIPU0() // fromIPU { - if( ipuRegs->ctrl.BUSY ) - IPUWorker(); + if (ipuRegs->ctrl.BUSY) IPUWorker(); } -void dmaIPU1() // toIPU +__forceinline void dmaIPU1() // toIPU { - //g_nDMATransfer &= ~(IPU_DMA_ACTV1|IPU_DMA_DOTIE1); IPU1dma(); - if( ipuRegs->ctrl.BUSY ) - IPUWorker(); + if (ipuRegs->ctrl.BUSY) IPUWorker(); } extern void GIFdma(); -void ipu0Interrupt() { - IPU_LOG("ipu0Interrupt: %x\n", cpuRegs.cycle); +void ipu0Interrupt() +{ + IPU_LOG("ipu0Interrupt: %x", cpuRegs.cycle); - if( g_nDMATransfer & IPU_DMA_FIREINT0 ) { + if (g_nDMATransfer & IPU_DMA_FIREINT0) + { hwIntcIrq(INTC_IPU); g_nDMATransfer &= ~IPU_DMA_FIREINT0; } - if( g_nDMATransfer & IPU_DMA_GIFSTALL ) { + if (g_nDMATransfer & IPU_DMA_GIFSTALL) + { // gif g_nDMATransfer &= ~IPU_DMA_GIFSTALL; - if(((DMACh*)&PS2MEM_HW[0xA000])->chcr & 0x100) GIFdma(); + if (((DMACh*)&PS2MEM_HW[0xA000])->chcr & 0x100) GIFdma(); } - if( g_nDMATransfer & IPU_DMA_VIFSTALL ) { + if (g_nDMATransfer & IPU_DMA_VIFSTALL) + { // vif g_nDMATransfer &= ~IPU_DMA_VIFSTALL; - if(((DMACh*)&PS2MEM_HW[0x9000])->chcr & 0x100)dmaVIF1(); + if (((DMACh*)&PS2MEM_HW[0x9000])->chcr & 0x100)dmaVIF1(); } - if( g_nDMATransfer & IPU_DMA_TIE0 ) { + if (g_nDMATransfer & IPU_DMA_TIE0) + { g_nDMATransfer &= ~IPU_DMA_TIE0; } @@ -1754,18 +1726,20 @@ void ipu0Interrupt() { hwDmacIrq(DMAC_FROM_IPU); } -IPU_FORCEINLINE void ipu1Interrupt() { - IPU_LOG("ipu1Interrupt %x:\n", cpuRegs.cycle); +IPU_FORCEINLINE void ipu1Interrupt() +{ + IPU_LOG("ipu1Interrupt %x:", cpuRegs.cycle); - if( g_nDMATransfer & IPU_DMA_FIREINT1 ) { + if (g_nDMATransfer & IPU_DMA_FIREINT1) + { hwIntcIrq(INTC_IPU); g_nDMATransfer &= ~IPU_DMA_FIREINT1; } - if( g_nDMATransfer & IPU_DMA_TIE1 ) { + if (g_nDMATransfer & IPU_DMA_TIE1) g_nDMATransfer &= ~IPU_DMA_TIE1; - }else + else ipu1dma->chcr &= ~0x100; - + hwDmacIrq(DMAC_TO_IPU); } diff --git a/pcsx2/IPU/IPU.h b/pcsx2/IPU/IPU.h index 9915000a0d..b644887550 100644 --- a/pcsx2/IPU/IPU.h +++ b/pcsx2/IPU/IPU.h @@ -255,6 +255,8 @@ extern void IPUProcessInterrupt(); extern void ipu0Interrupt(); extern void ipu1Interrupt(); +extern void dmaIPU0(); +extern void dmaIPU1(); extern u16 __fastcall FillInternalBuffer(u32 * pointer, u32 advance, u32 size); extern u8 __fastcall getBits32(u8 *address, u32 advance); extern u8 __fastcall getBits16(u8 *address, u32 advance); diff --git a/pcsx2/IPU/coroutine.cpp b/pcsx2/IPU/coroutine.cpp index 028ad83b3b..ac89043d8d 100644 --- a/pcsx2/IPU/coroutine.cpp +++ b/pcsx2/IPU/coroutine.cpp @@ -41,36 +41,33 @@ coroutine* g_pCurrentRoutine; coroutine_t so_create(void (*func)(void *), void *data, void *stack, int size) { - void* endstack; - int alloc = 0; // r = CO_STK_COROSIZE; + void* endstack; + int alloc = 0; // r = CO_STK_COROSIZE; coroutine *co; - if ((size &= ~(sizeof(long) - 1)) < CO_MIN_SIZE) - return NULL; + if ((size &= ~(sizeof(long) - 1)) < CO_MIN_SIZE) return NULL; if (!stack) { size = (size + sizeof(coroutine) + CO_STK_ALIGN - 1) & ~(CO_STK_ALIGN - 1); stack = malloc(size); - if (!stack) - return NULL; + if (!stack) return NULL; alloc = size; } - endstack = (char*)stack + size - 64; + endstack = (char*)stack + size - 64; co = (coroutine*)stack; stack = (char *) stack + CO_STK_COROSIZE; *(void**)endstack = NULL; *(void**)((char*)endstack+sizeof(void*)) = data; co->alloc = alloc; co->pcalladdr = (void*)func; - co->pcurstack = endstack; - return co; + co->pcurstack = endstack; + return co; } void so_delete(coroutine_t coro) { - coroutine *co = (coroutine *) coro; - assert( co != NULL ); - if (co->alloc) - free(co); + coroutine *co = (coroutine *) coro; + assert( co != NULL ); + if (co->alloc) free(co); } // see acoroutines.S and acoroutines.asm for other asm implementations diff --git a/pcsx2/Interpreter.cpp b/pcsx2/Interpreter.cpp index 460b3fe26c..533c6ca1a5 100644 --- a/pcsx2/Interpreter.cpp +++ b/pcsx2/Interpreter.cpp @@ -53,14 +53,14 @@ static void execI() //runs++; //if (runs > 1599999999){ //leave some time to startup the testgame // if (opcode.Name[0] == 'L') { //find all opcodes beginning with "L" - // SysPrintf ("Load %s\n",opcode.Name); + // Console::WriteLn ("Load %s", params opcode.Name); // } //} // Another method of instruction dumping: /*if( cpuRegs.cycle > 0x4f24d714 ) { - //CPU_LOG( "%s\n", disR5900Current.getCString()); + //CPU_LOG( "%s", disR5900Current.getCString()); disOut.clear(); opcode.disasm( disOut ); disOut += '\n'; @@ -101,7 +101,7 @@ static void __fastcall doBranch( u32 target ) void __fastcall intDoBranch(u32 target) { - //SysPrintf("Interpreter Branch \n"); + //Console::WriteLn("Interpreter Branch "); _doBranch_shared( target ); if( Cpu == &intCpu ) diff --git a/pcsx2/IopBios.cpp b/pcsx2/IopBios.cpp index 029b888cc7..697dac2510 100644 --- a/pcsx2/IopBios.cpp +++ b/pcsx2/IopBios.cpp @@ -182,7 +182,7 @@ void bios_write() { // 0x35/0x03 } pc0 = ra; return; } - PSXBIOS_LOG("bios_%s: %x,%x,%x\n", biosB0n[0x35], a0, a1, a2); + PSXBIOS_LOG("bios_%s: %x,%x,%x", biosB0n[0x35], a0, a1, a2); v0 = -1; pc0 = ra; diff --git a/pcsx2/IopCounters.cpp b/pcsx2/IopCounters.cpp index b4f40c801f..1152854a19 100644 --- a/pcsx2/IopCounters.cpp +++ b/pcsx2/IopCounters.cpp @@ -154,7 +154,7 @@ static void __fastcall _rcntTestTarget( int i ) { if( psxCounters[i].count < psxCounters[i].target ) return; - PSXCNT_LOG("IOP Counter[%d] target 0x%I64x >= 0x%I64x (mode: %x)\n", + PSXCNT_LOG("IOP Counter[%d] target 0x%I64x >= 0x%I64x (mode: %x)", i, psxCounters[i].count, psxCounters[i].target, psxCounters[i].mode); if (psxCounters[i].mode & IOPCNT_INT_TARGET) @@ -174,7 +174,7 @@ static void __fastcall _rcntTestTarget( int i ) psxCounters[i].count -= psxCounters[i].target; if(!(psxCounters[i].mode & 0x40)) { - SysPrintf("Counter %x repeat intr not set on zero ret, ignoring target\n", i); + Console::WriteLn("Counter %x repeat intr not set on zero ret, ignoring target", params i); psxCounters[i].target |= IOPCNT_FUTURE_TARGET; } } else psxCounters[i].target |= IOPCNT_FUTURE_TARGET; @@ -186,7 +186,7 @@ static __forceinline void _rcntTestOverflow( int i ) u64 maxTarget = ( i < 3 ) ? 0xffff : 0xfffffffful; if( psxCounters[i].count <= maxTarget ) return; - PSXCNT_LOG("IOP Counter[%d] overflow 0x%I64x >= 0x%I64x (mode: %x)\n", + PSXCNT_LOG("IOP Counter[%d] overflow 0x%I64x >= 0x%I64x (mode: %x)", i, psxCounters[i].count, maxTarget, psxCounters[i].mode ); if(psxCounters[i].mode & IOPCNT_INT_OVERFLOW) @@ -461,7 +461,7 @@ void psxRcntWcount16(int index, u32 value) u32 change; assert( index < 3 ); - PSXCNT_LOG("IOP Counter[%d] writeCount16 = %x\n", index, value); + PSXCNT_LOG("IOP Counter[%d] writeCount16 = %x", index, value); if(psxCounters[index].rate != PSXHBLANK) { @@ -482,7 +482,7 @@ void psxRcntWcount32(int index, u32 value) u32 change; assert( index >= 3 && index < 6 ); - PSXCNT_LOG("IOP Counter[%d] writeCount32 = %x\n", index, value); + PSXCNT_LOG("IOP Counter[%d] writeCount32 = %x", index, value); if(psxCounters[index].rate != PSXHBLANK) { @@ -500,7 +500,7 @@ void psxRcntWcount32(int index, u32 value) void psxRcnt0Wmode(u32 value) { - PSXCNT_LOG("IOP Counter[0] writeMode = %lx\n", value); + PSXCNT_LOG("IOP Counter[0] writeMode = %lx", value); psxCounters[0].mode = value; psxCounters[0].mode|= 0x0400; @@ -512,7 +512,7 @@ void psxRcnt0Wmode(u32 value) if(psxCounters[0].mode & IOPCNT_ENABLE_GATE) { // gated counters are added up as per the h/vblank timers. - PSXCNT_LOG("IOP Counter[0] Gate Check set, value = %x\n", value); + PSXCNT_LOG("IOP Counter[0] Gate Check set, value = %x", value); psxhblankgate |= 1; } else psxhblankgate &= ~1; @@ -526,7 +526,7 @@ void psxRcnt0Wmode(u32 value) void psxRcnt1Wmode(u32 value) { - PSXCNT_LOG("IOP Counter[0] writeMode = %lx\n", value); + PSXCNT_LOG("IOP Counter[0] writeMode = %lx", value); psxCounters[1].mode = value; psxCounters[1].mode|= 0x0400; @@ -537,7 +537,7 @@ void psxRcnt1Wmode(u32 value) if(psxCounters[1].mode & IOPCNT_ENABLE_GATE) { - PSXCNT_LOG("IOP Counter[1] Gate Check set, value = %x\n", value); + PSXCNT_LOG("IOP Counter[1] Gate Check set, value = %x", value); psxvblankgate |= 1<<1; } else psxvblankgate &= ~(1<<1); @@ -550,7 +550,7 @@ void psxRcnt1Wmode(u32 value) void psxRcnt2Wmode(u32 value) { - PSXCNT_LOG("IOP Counter[0] writeMode = %lx\n", value); + PSXCNT_LOG("IOP Counter[0] writeMode = %lx", value); psxCounters[2].mode = value; psxCounters[2].mode|= 0x0400; @@ -563,7 +563,7 @@ void psxRcnt2Wmode(u32 value) if((psxCounters[2].mode & 0x7) == 0x7 || (psxCounters[2].mode & 0x7) == 0x1) { - //SysPrintf("Gate set on IOP C2, disabling\n"); + //Console::WriteLn("Gate set on IOP C2, disabling"); psxCounters[2].mode |= IOPCNT_STOPPED; } @@ -575,7 +575,7 @@ void psxRcnt2Wmode(u32 value) void psxRcnt3Wmode(u32 value) { - PSXCNT_LOG("IOP Counter[3] writeMode = %lx\n", value); + PSXCNT_LOG("IOP Counter[3] writeMode = %lx", value); psxCounters[3].mode = value; psxCounters[3].rate = 1; @@ -586,7 +586,7 @@ void psxRcnt3Wmode(u32 value) if(psxCounters[3].mode & IOPCNT_ENABLE_GATE) { - PSXCNT_LOG("IOP Counter[3] Gate Check set, value = %x\n", value); + PSXCNT_LOG("IOP Counter[3] Gate Check set, value = %x", value); psxvblankgate |= 1<<3; } else psxvblankgate &= ~(1<<3); @@ -599,7 +599,7 @@ void psxRcnt3Wmode(u32 value) void psxRcnt4Wmode(u32 value) { - PSXCNT_LOG("IOP Counter[4] writeMode = %lx\n", value); + PSXCNT_LOG("IOP Counter[4] writeMode = %lx", value); psxCounters[4].mode = value; psxCounters[4].mode|= 0x0400; @@ -614,7 +614,7 @@ void psxRcnt4Wmode(u32 value) // Need to set a rate and target if((psxCounters[4].mode & 0x7) == 0x7 || (psxCounters[4].mode & 0x7) == 0x1) { - SysPrintf("Gate set on IOP C4, disabling\n"); + Console::WriteLn("Gate set on IOP C4, disabling"); psxCounters[4].mode |= IOPCNT_STOPPED; } @@ -626,7 +626,7 @@ void psxRcnt4Wmode(u32 value) void psxRcnt5Wmode(u32 value) { - PSXCNT_LOG("IOP Counter[5] writeMode = %lx\n", value); + PSXCNT_LOG("IOP Counter[5] writeMode = %lx", value); psxCounters[5].mode = value; psxCounters[5].mode|= 0x0400; @@ -641,7 +641,7 @@ void psxRcnt5Wmode(u32 value) // Need to set a rate and target if((psxCounters[5].mode & 0x7) == 0x7 || (psxCounters[5].mode & 0x7) == 0x1) { - SysPrintf("Gate set on IOP C5, disabling\n"); + Console::WriteLn("Gate set on IOP C5, disabling"); psxCounters[5].mode |= IOPCNT_STOPPED; } @@ -654,7 +654,7 @@ void psxRcnt5Wmode(u32 value) void psxRcntWtarget16(int index, u32 value) { assert( index < 3 ); - PSXCNT_LOG("IOP Counter[%d] writeTarget16 = %lx\n", index, value); + PSXCNT_LOG("IOP Counter[%d] writeTarget16 = %lx", index, value); psxCounters[index].target = value & 0xffff; // protect the target from an early arrival. @@ -670,7 +670,7 @@ void psxRcntWtarget16(int index, u32 value) void psxRcntWtarget32(int index, u32 value) { assert( index >= 3 && index < 6); - PSXCNT_LOG("IOP Counter[%d] writeTarget32 = %lx\n", index, value); + PSXCNT_LOG("IOP Counter[%d] writeTarget32 = %lx", index, value); psxCounters[index].target = value; @@ -690,7 +690,7 @@ u16 psxRcntRcount16(int index) assert( index < 3 ); - PSXCNT_LOG("IOP Counter[%d] readCount16 = %lx\n", index, (u16)retval ); + PSXCNT_LOG("IOP Counter[%d] readCount16 = %lx", index, (u16)retval ); // Don't count HBLANK timers // Don't count stopped gates either. @@ -700,7 +700,7 @@ u16 psxRcntRcount16(int index) { u32 delta = (u32)((psxRegs.cycle - psxCounters[index].sCycleT) / psxCounters[index].rate); retval += delta; - PSXCNT_LOG(" (delta = %lx)\n", delta ); + PSXCNT_LOG(" (delta = %lx)", delta ); } return (u16)retval; @@ -712,14 +712,14 @@ u32 psxRcntRcount32(int index) assert( index >= 3 && index < 6 ); - PSXCNT_LOG("IOP Counter[%d] readCount32 = %lx\n", index, retval ); + PSXCNT_LOG("IOP Counter[%d] readCount32 = %lx", index, retval ); if( !( psxCounters[index].mode & IOPCNT_STOPPED ) && ( psxCounters[index].rate != PSXHBLANK ) ) { u32 delta = (u32)((psxRegs.cycle - psxCounters[index].sCycleT) / psxCounters[index].rate); retval += delta; - PSXCNT_LOG(" (delta = %lx)\n", delta ); + PSXCNT_LOG(" (delta = %lx)", delta ); } return retval; diff --git a/pcsx2/IopDma.cpp b/pcsx2/IopDma.cpp index d90b247aaa..7798779a92 100644 --- a/pcsx2/IopDma.cpp +++ b/pcsx2/IopDma.cpp @@ -5,19 +5,18 @@ * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. - * + * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. - * + * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA */ #include "PrecompiledHeader.h" - #include "IopCommon.h" using namespace R3000A; @@ -27,63 +26,64 @@ using namespace R3000A; // Dma8 in PsxSpd.c // Dma11/12 in PsxSio2.c +// Should be a bool, and will be next time I break savestate. --arcum42 int iopsifbusy[2] = { 0, 0 }; -static void __fastcall psxDmaGeneric(u32 madr, u32 bcr, u32 chcr, u32 spuCore, _SPU2writeDMA4Mem spu2WriteFunc, _SPU2readDMA4Mem spu2ReadFunc ) +static void __fastcall psxDmaGeneric(u32 madr, u32 bcr, u32 chcr, u32 spuCore, _SPU2writeDMA4Mem spu2WriteFunc, _SPU2readDMA4Mem spu2ReadFunc) { const char dmaNum = spuCore ? '7' : '4'; - /*if (chcr & 0x400) DevCon::Status("SPU 2 DMA %c linked list chain mode! chcr = %x madr = %x bcr = %x\n", dmaNum, chcr, madr, bcr); - if (chcr & 0x40000000) DevCon::Notice("SPU 2 DMA %c Unusual bit set on 'to' direction chcr = %x madr = %x bcr = %x\n", dmaNum, chcr, madr, bcr); - if ((chcr & 0x1) == 0) DevCon::Status("SPU 2 DMA %c loading from spu2 memory chcr = %x madr = %x bcr = %x\n", dmaNum, chcr, madr, bcr);*/ + /*if (chcr & 0x400) DevCon::Status("SPU 2 DMA %c linked list chain mode! chcr = %x madr = %x bcr = %x\n", dmaNum, chcr, madr, bcr); + if (chcr & 0x40000000) DevCon::Notice("SPU 2 DMA %c Unusual bit set on 'to' direction chcr = %x madr = %x bcr = %x\n", dmaNum, chcr, madr, bcr); + if ((chcr & 0x1) == 0) DevCon::Status("SPU 2 DMA %c loading from spu2 memory chcr = %x madr = %x bcr = %x\n", dmaNum, chcr, madr, bcr);*/ const int size = (bcr >> 16) * (bcr & 0xFFFF); // Update the spu2 to the current cycle before initiating the DMA - if(SPU2async) + if (SPU2async) { - SPU2async(psxRegs.cycle - psxCounters[6].sCycleT); + SPU2async(psxRegs.cycle - psxCounters[6].sCycleT); //Console::Status("cycles sent to SPU2 %x\n", psxRegs.cycle - psxCounters[6].sCycleT); - + psxCounters[6].sCycleT = psxRegs.cycle; psxCounters[6].CycleT = size * 3; - psxNextCounter -= (psxRegs.cycle-psxNextsCounter); + psxNextCounter -= (psxRegs.cycle - psxNextsCounter); psxNextsCounter = psxRegs.cycle; - if(psxCounters[6].CycleT < psxNextCounter) + if (psxCounters[6].CycleT < psxNextCounter) psxNextCounter = psxCounters[6].CycleT; } switch (chcr) { case 0x01000201: //cpu to spu2 transfer - PSXDMA_LOG("*** DMA %c - mem2spu *** %x addr = %x size = %x\n", dmaNum, chcr, madr, bcr); + PSXDMA_LOG("*** DMA %c - mem2spu *** %x addr = %x size = %x", dmaNum, chcr, madr, bcr); spu2WriteFunc((u16 *)iopPhysMem(madr), size*2); - break; + break; case 0x01000200: //spu2 to cpu transfer - PSXDMA_LOG("*** DMA %c - spu2mem *** %x addr = %x size = %x\n", dmaNum, chcr, madr, bcr); + PSXDMA_LOG("*** DMA %c - spu2mem *** %x addr = %x size = %x", dmaNum, chcr, madr, bcr); spu2ReadFunc((u16 *)iopPhysMem(madr), size*2); psxCpu->Clear(spuCore ? HW_DMA7_MADR : HW_DMA4_MADR, size); - break; + break; default: - Console::Error("*** DMA %c - SPU unknown *** %x addr = %x size = %x\n", params dmaNum, chcr, madr, bcr); - break; + Console::Error("*** DMA %c - SPU unknown *** %x addr = %x size = %x", params dmaNum, chcr, madr, bcr); + break; } } void psxDma4(u32 madr, u32 bcr, u32 chcr) // SPU2's Core 0 { - psxDmaGeneric( madr, bcr, chcr, 0, SPU2writeDMA4Mem, SPU2readDMA4Mem ); + psxDmaGeneric(madr, bcr, chcr, 0, SPU2writeDMA4Mem, SPU2readDMA4Mem); } int psxDma4Interrupt() { HW_DMA4_CHCR &= ~0x01000000; psxDmaInterrupt(4); - iopIntcIrq( 9 ); + iopIntcIrq(9); return 1; } @@ -97,17 +97,22 @@ void psxDma6(u32 madr, u32 bcr, u32 chcr) { u32 *mem = (u32 *)iopPhysMem(madr); - PSXDMA_LOG("*** DMA 6 - OT *** %lx addr = %lx size = %lx\n", chcr, madr, bcr); + PSXDMA_LOG("*** DMA 6 - OT *** %lx addr = %lx size = %lx", chcr, madr, bcr); - if (chcr == 0x11000002) { - while (bcr--) { + if (chcr == 0x11000002) + { + while (bcr--) + { *mem-- = (madr - 4) & 0xffffff; madr -= 4; } - mem++; *mem = 0xffffff; - } else { + mem++; + *mem = 0xffffff; + } + else + { // Unknown option - PSXDMA_LOG("*** DMA 6 - OT unknown *** %lx addr = %lx size = %lx\n", chcr, madr, bcr); + PSXDMA_LOG("*** DMA 6 - OT unknown *** %lx addr = %lx size = %lx", chcr, madr, bcr); } HW_DMA6_CHCR &= ~0x01000000; psxDmaInterrupt(6); @@ -115,39 +120,41 @@ void psxDma6(u32 madr, u32 bcr, u32 chcr) void psxDma7(u32 madr, u32 bcr, u32 chcr) // SPU2's Core 1 { - psxDmaGeneric( madr, bcr, chcr, 1, SPU2writeDMA7Mem, SPU2readDMA7Mem ); + psxDmaGeneric(madr, bcr, chcr, 1, SPU2writeDMA7Mem, SPU2readDMA7Mem); } int psxDma7Interrupt() { HW_DMA7_CHCR &= ~0x01000000; psxDmaInterrupt2(0); - //iopIntcIrq( 9 ); return 1; - + } extern int eesifbusy[2]; void psxDma9(u32 madr, u32 bcr, u32 chcr) { - SIF_LOG("IOP: dmaSIF0 chcr = %lx, madr = %lx, bcr = %lx, tadr = %lx\n", chcr, madr, bcr, HW_DMA9_TADR); + SIF_LOG("IOP: dmaSIF0 chcr = %lx, madr = %lx, bcr = %lx, tadr = %lx", chcr, madr, bcr, HW_DMA9_TADR); iopsifbusy[0] = 1; psHu32(0x1000F240) |= 0x2000; - - if (eesifbusy[0] == 1) { + + if (eesifbusy[0] == 1) + { SIF0Dma(); psHu32(0x1000F240) &= ~0x20; psHu32(0x1000F240) &= ~0x2000; } } -void psxDma10(u32 madr, u32 bcr, u32 chcr) { - SIF_LOG("IOP: dmaSIF1 chcr = %lx, madr = %lx, bcr = %lx\n", chcr, madr, bcr); +void psxDma10(u32 madr, u32 bcr, u32 chcr) +{ + SIF_LOG("IOP: dmaSIF1 chcr = %lx, madr = %lx, bcr = %lx", chcr, madr, bcr); iopsifbusy[1] = 1; psHu32(0x1000F240) |= 0x4000; - - if (eesifbusy[1] == 1) { + + if (eesifbusy[1] == 1) + { FreezeXMMRegs(1); SIF1Dma(); psHu32(0x1000F240) &= ~0x40; @@ -157,80 +164,86 @@ void psxDma10(u32 madr, u32 bcr, u32 chcr) { } } -void psxDma8(u32 madr, u32 bcr, u32 chcr) { +void psxDma8(u32 madr, u32 bcr, u32 chcr) +{ const int size = (bcr >> 16) * (bcr & 0xFFFF) * 8; - switch (chcr & 0x01000201) { + switch (chcr & 0x01000201) + { case 0x01000201: //cpu to dev9 transfer - PSXDMA_LOG("*** DMA 8 - DEV9 mem2dev9 *** %lx addr = %lx size = %lx\n", chcr, madr, bcr); + PSXDMA_LOG("*** DMA 8 - DEV9 mem2dev9 *** %lx addr = %lx size = %lx", chcr, madr, bcr); DEV9writeDMA8Mem((u32*)iopPhysMem(madr), size); - break; + break; case 0x01000200: //dev9 to cpu transfer - PSXDMA_LOG("*** DMA 8 - DEV9 dev9mem *** %lx addr = %lx size = %lx\n", chcr, madr, bcr); + PSXDMA_LOG("*** DMA 8 - DEV9 dev9mem *** %lx addr = %lx size = %lx", chcr, madr, bcr); DEV9readDMA8Mem((u32*)iopPhysMem(madr), size); - break; + break; default: - PSXDMA_LOG("*** DMA 8 - DEV9 unknown *** %lx addr = %lx size = %lx\n", chcr, madr, bcr); - break; + PSXDMA_LOG("*** DMA 8 - DEV9 unknown *** %lx addr = %lx size = %lx", chcr, madr, bcr); + break; } HW_DMA8_CHCR &= ~0x01000000; psxDmaInterrupt2(1); } -void dev9Interrupt() { - if( (dev9Handler != NULL) && (dev9Handler() != 1) ) - return; +void dev9Interrupt() +{ + if ((dev9Handler != NULL) && (dev9Handler() != 1)) return; - iopIntcIrq( 13 ); - hwIntcIrq(INTC_SBUS); + iopIntcIrq(13); + hwIntcIrq(INTC_SBUS); } -void dev9Irq(int cycles) { +void dev9Irq(int cycles) +{ PSX_INT(IopEvt_DEV9, cycles); } -void usbInterrupt() { - if( usbHandler != NULL && (usbHandler() != 1) ) - return; +void usbInterrupt() +{ + if (usbHandler != NULL && (usbHandler() != 1)) return; - iopIntcIrq( 22 ); + iopIntcIrq(22); hwIntcIrq(INTC_SBUS); } -void usbIrq(int cycles) { +void usbIrq(int cycles) +{ PSX_INT(IopEvt_USB, cycles); } -void fwIrq() { - iopIntcIrq( 24 ); +void fwIrq() +{ + iopIntcIrq(24); hwIntcIrq(INTC_SBUS); } -void spu2DMA4Irq() { +void spu2DMA4Irq() +{ SPU2interruptDMA4(); - //HW_DMA4_BCR = 0; HW_DMA4_CHCR &= ~0x01000000; psxDmaInterrupt(4); } -void spu2DMA7Irq() { +void spu2DMA7Irq() +{ SPU2interruptDMA7(); - //HW_DMA7_BCR = 0; HW_DMA7_CHCR &= ~0x01000000; psxDmaInterrupt2(0); } -void spu2Irq() { - iopIntcIrq( 9 ); +void spu2Irq() +{ + iopIntcIrq(9); hwIntcIrq(INTC_SBUS); } -void iopIntcIrq( uint irqType ) +void iopIntcIrq(uint irqType) { - psxHu32(0x1070)|= 1<Control&DMA_CTRL_ACTIVE) + if (ch->Control&DMA_CTRL_ACTIVE) { - ch->Target-=elapsed; - if(ch->Target<=0) + ch->Target -= elapsed; + if (ch->Target <= 0) { - if(ch->ByteCount<=0) + if (ch->ByteCount <= 0) { ch->Control &= ~DMA_CTRL_ACTIVE; RaiseDmaIrq(i); @@ -338,17 +358,17 @@ void IopDmaUpdate(u32 elapsed) else { // TODO: Make sure it's the right order - DmaHandler handler = (ch->Control&DMA_CTRL_DIRECTION)?IopDmaHandlers[i].Read:IopDmaHandlers[i].Write; + DmaHandler handler = (ch->Control & DMA_CTRL_DIRECTION) ? IopDmaHandlers[i].Read : IopDmaHandlers[i].Write; u32 BCount = 0; - s32 Target = (handler)?handler(i,(u32*)PSXM(ch->MemAddr),ch->ByteCount,&BCount):0; + s32 Target = (handler) ? handler(i, (u32*)PSXM(ch->MemAddr), ch->ByteCount, &BCount) : 0; ch->Target = 100; - if(Target<0) + if (Target < 0) { // TODO: ... What to do if the plugin errors? :P } - else if(BCount!=0) + else if (BCount != 0) { ch->MemAddr += BCount; ch->ByteCount -= BCount; @@ -356,24 +376,24 @@ void IopDmaUpdate(u32 elapsed) ch->Target = BCount / ch->Width; } - if (Target!=0) ch->Target=Target; + if (Target != 0) ch->Target = Target; } } } } } -s32 errDmaRead (s32 channel, u32* data, u32 wordsLeft, u32* wordsProcessed) +s32 errDmaRead(s32 channel, u32* data, u32 wordsLeft, u32* wordsProcessed) { - Console::Error("ERROR: Tried to read using DMA %d (%s). Ignoring.",0,channel,IopDmaNames[channel]); + Console::Error("ERROR: Tried to read using DMA %d (%s). Ignoring.", 0, channel, IopDmaNames[channel]); *wordsProcessed = wordsLeft; return 0; } -s32 errDmaWrite (s32 channel, u32* data, u32 wordsLeft, u32* wordsProcessed) +s32 errDmaWrite(s32 channel, u32* data, u32 wordsLeft, u32* wordsProcessed) { - Console::Error("ERROR: Tried to write using DMA %d (%s). Ignoring.",0,channel,IopDmaNames[channel]); + Console::Error("ERROR: Tried to write using DMA %d (%s). Ignoring.", 0, channel, IopDmaNames[channel]); *wordsProcessed = wordsLeft; return 0; diff --git a/pcsx2/IopHw.cpp b/pcsx2/IopHw.cpp index 073102ef86..57344bbc99 100644 --- a/pcsx2/IopHw.cpp +++ b/pcsx2/IopHw.cpp @@ -86,16 +86,16 @@ u8 psxHwRead8(u32 add) { case 0x1F808264: hard = sio2_fifoOut();//sio2 serial data feed/fifo_out - PSXHW_LOG("SIO2 read8 DATAOUT %08X\n", hard); + PSXHW_LOG("SIO2 read8 DATAOUT %08X", hard); return hard; default: hard = psxHu8(add); - PSXHW_LOG("*Unknown 8bit read at address %lx\n", add); + PSXHW_LOG("*Unknown 8bit read at address %lx", add); return hard; } - PSXHW_LOG("*Known 8bit read at address %lx value %x\n", add, hard); + PSXHW_LOG("*Known 8bit read at address %lx value %x", add, hard); return hard; } @@ -108,31 +108,31 @@ u16 psxHwRead16(u32 add) { switch (add) { - case 0x1f801070: PSXHW_LOG("IREG 16bit read %x\n", psxHu16(0x1070)); + case 0x1f801070: PSXHW_LOG("IREG 16bit read %x", psxHu16(0x1070)); return psxHu16(0x1070); - case 0x1f801074: PSXHW_LOG("IMASK 16bit read %x\n", psxHu16(0x1074)); + case 0x1f801074: PSXHW_LOG("IMASK 16bit read %x", psxHu16(0x1074)); return psxHu16(0x1074); case 0x1f801040: hard = sioRead8(); hard|= sioRead8() << 8; - PAD_LOG("sio read16 %lx; ret = %x\n", add&0xf, hard); + PAD_LOG("sio read16 %lx; ret = %x", add&0xf, hard); return hard; case 0x1f801044: hard = sio.StatReg; - PAD_LOG("sio read16 %lx; ret = %x\n", add&0xf, hard); + PAD_LOG("sio read16 %lx; ret = %x", add&0xf, hard); return hard; case 0x1f801048: hard = sio.ModeReg; - PAD_LOG("sio read16 %lx; ret = %x\n", add&0xf, hard); + PAD_LOG("sio read16 %lx; ret = %x", add&0xf, hard); return hard; case 0x1f80104a: hard = sio.CtrlReg; - PAD_LOG("sio read16 %lx; ret = %x\n", add&0xf, hard); + PAD_LOG("sio read16 %lx; ret = %x", add&0xf, hard); return hard; case 0x1f80104e: hard = sio.BaudReg; - PAD_LOG("sio read16 %lx; ret = %x\n", add&0xf, hard); + PAD_LOG("sio read16 %lx; ret = %x", add&0xf, hard); return hard; //Serial port stuff not support now ;P @@ -143,45 +143,45 @@ u16 psxHwRead16(u32 add) { case 0x1f801100: hard = (u16)psxRcntRcount16(0); - PSXCNT_LOG("T0 count read16: %x\n", hard); + PSXCNT_LOG("T0 count read16: %x", hard); return hard; case 0x1f801104: hard = psxCounters[0].mode; psxCounters[0].mode &= ~0x1800; psxCounters[0].mode |= 0x400; - PSXCNT_LOG("T0 mode read16: %x\n", hard); + PSXCNT_LOG("T0 mode read16: %x", hard); return hard; case 0x1f801108: hard = psxCounters[0].target; - PSXCNT_LOG("T0 target read16: %x\n", hard); + PSXCNT_LOG("T0 target read16: %x", hard); return hard; case 0x1f801110: hard = (u16)psxRcntRcount16(1); - PSXCNT_LOG("T1 count read16: %x\n", hard); + PSXCNT_LOG("T1 count read16: %x", hard); return hard; case 0x1f801114: hard = psxCounters[1].mode; psxCounters[1].mode &= ~0x1800; psxCounters[1].mode |= 0x400; - PSXCNT_LOG("T1 mode read16: %x\n", hard); + PSXCNT_LOG("T1 mode read16: %x", hard); return hard; case 0x1f801118: hard = psxCounters[1].target; - PSXCNT_LOG("T1 target read16: %x\n", hard); + PSXCNT_LOG("T1 target read16: %x", hard); return hard; case 0x1f801120: hard = (u16)psxRcntRcount16(2); - PSXCNT_LOG("T2 count read16: %x\n", hard); + PSXCNT_LOG("T2 count read16: %x", hard); return hard; case 0x1f801124: hard = psxCounters[2].mode; psxCounters[2].mode &= ~0x1800; psxCounters[2].mode |= 0x400; - PSXCNT_LOG("T2 mode read16: %x\n", hard); + PSXCNT_LOG("T2 mode read16: %x", hard); return hard; case 0x1f801128: hard = psxCounters[2].target; - PSXCNT_LOG("T2 target read16: %x\n", hard); + PSXCNT_LOG("T2 target read16: %x", hard); return hard; case 0x1f80146e: // DEV9_R_REV @@ -189,54 +189,54 @@ u16 psxHwRead16(u32 add) { case 0x1f801480: hard = (u16)psxRcntRcount32(3); - PSXCNT_LOG("T3 count read16: %lx\n", hard); + PSXCNT_LOG("T3 count read16: %lx", hard); return hard; case 0x1f801484: hard = psxCounters[3].mode; psxCounters[3].mode &= ~0x1800; psxCounters[3].mode |= 0x400; - PSXCNT_LOG("T3 mode read16: %lx\n", hard); + PSXCNT_LOG("T3 mode read16: %lx", hard); return hard; case 0x1f801488: hard = psxCounters[3].target; - PSXCNT_LOG("T3 target read16: %lx\n", hard); + PSXCNT_LOG("T3 target read16: %lx", hard); return hard; case 0x1f801490: hard = (u16)psxRcntRcount32(4); - PSXCNT_LOG("T4 count read16: %lx\n", hard); + PSXCNT_LOG("T4 count read16: %lx", hard); return hard; case 0x1f801494: hard = psxCounters[4].mode; psxCounters[4].mode &= ~0x1800; psxCounters[4].mode |= 0x400; - PSXCNT_LOG("T4 mode read16: %lx\n", hard); + PSXCNT_LOG("T4 mode read16: %lx", hard); return hard; case 0x1f801498: hard = psxCounters[4].target; - PSXCNT_LOG("T4 target read16: %lx\n", hard); + PSXCNT_LOG("T4 target read16: %lx", hard); return hard; case 0x1f8014a0: hard = (u16)psxRcntRcount32(5); - PSXCNT_LOG("T5 count read16: %lx\n", hard); + PSXCNT_LOG("T5 count read16: %lx", hard); return hard; case 0x1f8014a4: hard = psxCounters[5].mode; psxCounters[5].mode &= ~0x1800; psxCounters[5].mode |= 0x400; - PSXCNT_LOG("T5 mode read16: %lx\n", hard); + PSXCNT_LOG("T5 mode read16: %lx", hard); return hard; case 0x1f8014a8: hard = psxCounters[5].target; - PSXCNT_LOG("T5 target read16: %lx\n", hard); + PSXCNT_LOG("T5 target read16: %lx", hard); return hard; case 0x1f801504: hard = psxHu16(0x1504); - PSXHW_LOG("DMA7 BCR_size 16bit read %lx\n", hard); + PSXHW_LOG("DMA7 BCR_size 16bit read %lx", hard); return hard; case 0x1f801506: hard = psxHu16(0x1506); - PSXHW_LOG("DMA7 BCR_count 16bit read %lx\n", hard); + PSXHW_LOG("DMA7 BCR_count 16bit read %lx", hard); return hard; //case 0x1f802030: hard = //int_2000???? //case 0x1f802040: hard =//dip switches...?? @@ -246,13 +246,13 @@ u16 psxHwRead16(u32 add) { hard = SPU2read(add); } else { hard = psxHu16(add); - PSXHW_LOG("*Unknown 16bit read at address %lx\n", add); + PSXHW_LOG("*Unknown 16bit read at address %lx", add); } return hard; } - PSXHW_LOG("*Known 16bit read at address %lx value %x\n", add, hard); + PSXHW_LOG("*Known 16bit read at address %lx value %x", add, hard); return hard; } @@ -272,30 +272,30 @@ u32 psxHwRead32(u32 add) { hard|= sioRead8() << 8; hard|= sioRead8() << 16; hard|= sioRead8() << 24; - PAD_LOG("sio read32 ;ret = %lx\n", hard); + PAD_LOG("sio read32 ;ret = %lx", hard); return hard; // case 0x1f801050: hard = serial_read32(); break;//serial port case 0x1f801060: - PSXHW_LOG("RAM size read %lx\n", psxHu32(0x1060)); + PSXHW_LOG("RAM size read %lx", psxHu32(0x1060)); return psxHu32(0x1060); - case 0x1f801070: PSXHW_LOG("IREG 32bit read %x\n", psxHu32(0x1070)); + case 0x1f801070: PSXHW_LOG("IREG 32bit read %x", psxHu32(0x1070)); return psxHu32(0x1070); - case 0x1f801074: PSXHW_LOG("IMASK 32bit read %x\n", psxHu32(0x1074)); + case 0x1f801074: PSXHW_LOG("IMASK 32bit read %x", psxHu32(0x1074)); return psxHu32(0x1074); case 0x1f801078: - PSXHW_LOG("ICTRL 32bit read %x\n", psxHu32(0x1078)); + PSXHW_LOG("ICTRL 32bit read %x", psxHu32(0x1078)); hard = psxHu32(0x1078); psxHu32(0x1078) = 0; return hard; /* case 0x1f801810: // hard = GPU_readData(); - PSXHW_LOG("GPU DATA 32bit read %lx\n", hard); + PSXHW_LOG("GPU DATA 32bit read %lx", hard); return hard;*/ /* case 0x1f801814: hard = GPU_readStatus(); - PSXHW_LOG("GPU STATUS 32bit read %lx\n", hard); + PSXHW_LOG("GPU STATUS 32bit read %lx", hard); return hard; */ /* case 0x1f801820: hard = mdecRead0(); break; @@ -303,215 +303,215 @@ u32 psxHwRead32(u32 add) { */ case 0x1f8010a0: - PSXHW_LOG("DMA2 MADR 32bit read %lx\n", psxHu32(0x10a0)); + PSXHW_LOG("DMA2 MADR 32bit read %lx", psxHu32(0x10a0)); return HW_DMA2_MADR; case 0x1f8010a4: - PSXHW_LOG("DMA2 BCR 32bit read %lx\n", psxHu32(0x10a4)); + PSXHW_LOG("DMA2 BCR 32bit read %lx", psxHu32(0x10a4)); return HW_DMA2_BCR; case 0x1f8010a8: - PSXHW_LOG("DMA2 CHCR 32bit read %lx\n", psxHu32(0x10a8)); + PSXHW_LOG("DMA2 CHCR 32bit read %lx", psxHu32(0x10a8)); return HW_DMA2_CHCR; case 0x1f8010b0: - PSXHW_LOG("DMA3 MADR 32bit read %lx\n", psxHu32(0x10b0)); + PSXHW_LOG("DMA3 MADR 32bit read %lx", psxHu32(0x10b0)); return HW_DMA3_MADR; case 0x1f8010b4: - PSXHW_LOG("DMA3 BCR 32bit read %lx\n", psxHu32(0x10b4)); + PSXHW_LOG("DMA3 BCR 32bit read %lx", psxHu32(0x10b4)); return HW_DMA3_BCR; case 0x1f8010b8: - PSXHW_LOG("DMA3 CHCR 32bit read %lx\n", psxHu32(0x10b8)); + PSXHW_LOG("DMA3 CHCR 32bit read %lx", psxHu32(0x10b8)); return HW_DMA3_CHCR; case 0x1f801520: - PSXHW_LOG("DMA9 MADR 32bit read %lx\n", HW_DMA9_MADR); + PSXHW_LOG("DMA9 MADR 32bit read %lx", HW_DMA9_MADR); return HW_DMA9_MADR; case 0x1f801524: - PSXHW_LOG("DMA9 BCR 32bit read %lx\n", HW_DMA9_BCR); + PSXHW_LOG("DMA9 BCR 32bit read %lx", HW_DMA9_BCR); return HW_DMA9_BCR; case 0x1f801528: - PSXHW_LOG("DMA9 CHCR 32bit read %lx\n", HW_DMA9_CHCR); + PSXHW_LOG("DMA9 CHCR 32bit read %lx", HW_DMA9_CHCR); return HW_DMA9_CHCR; case 0x1f80152C: - PSXHW_LOG("DMA9 TADR 32bit read %lx\n", HW_DMA9_TADR); + PSXHW_LOG("DMA9 TADR 32bit read %lx", HW_DMA9_TADR); return HW_DMA9_TADR; case 0x1f801530: - PSXHW_LOG("DMA10 MADR 32bit read %lx\n", HW_DMA10_MADR); + PSXHW_LOG("DMA10 MADR 32bit read %lx", HW_DMA10_MADR); return HW_DMA10_MADR; case 0x1f801534: - PSXHW_LOG("DMA10 BCR 32bit read %lx\n", HW_DMA10_BCR); + PSXHW_LOG("DMA10 BCR 32bit read %lx", HW_DMA10_BCR); return HW_DMA10_BCR; case 0x1f801538: - PSXHW_LOG("DMA10 CHCR 32bit read %lx\n", HW_DMA10_CHCR); + PSXHW_LOG("DMA10 CHCR 32bit read %lx", HW_DMA10_CHCR); return HW_DMA10_CHCR; // case 0x1f8010f0: PSXHW_LOG("DMA PCR 32bit read " << psxHu32(0x10f0)); // return HW_DMA_PCR; // dma rest channel case 0x1f8010f4: - PSXHW_LOG("DMA ICR 32bit read %lx\n", HW_DMA_ICR); + PSXHW_LOG("DMA ICR 32bit read %lx", HW_DMA_ICR); return HW_DMA_ICR; //SSBus registers case 0x1f801000: hard = psxHu32(0x1000); - PSXHW_LOG("SSBUS 32bit read %lx\n", hard); + PSXHW_LOG("SSBUS 32bit read %lx", hard); return hard; case 0x1f801004: hard = psxHu32(0x1004); - PSXHW_LOG("SSBUS 32bit read %lx\n", hard); + PSXHW_LOG("SSBUS 32bit read %lx", hard); return hard; case 0x1f801008: hard = psxHu32(0x1008); - PSXHW_LOG("SSBUS 32bit read %lx\n", hard); + PSXHW_LOG("SSBUS 32bit read %lx", hard); return hard; case 0x1f80100C: hard = psxHu32(0x100C); - PSXHW_LOG("SSBUS dev1_delay 32bit read %lx\n", hard); + PSXHW_LOG("SSBUS dev1_delay 32bit read %lx", hard); return hard; case 0x1f801010: hard = psxHu32(0x1010); - PSXHW_LOG("SSBUS rom_delay 32bit read %lx\n", hard); + PSXHW_LOG("SSBUS rom_delay 32bit read %lx", hard); return hard; case 0x1f801014: hard = psxHu32(0x1014); - PSXHW_LOG("SSBUS spu_delay 32bit read %lx\n", hard); + PSXHW_LOG("SSBUS spu_delay 32bit read %lx", hard); return hard; case 0x1f801018: hard = psxHu32(0x1018); - PSXHW_LOG("SSBUS dev5_delay 32bit read %lx\n", hard); + PSXHW_LOG("SSBUS dev5_delay 32bit read %lx", hard); return hard; case 0x1f80101C: hard = psxHu32(0x101C); - PSXHW_LOG("SSBUS 32bit read %lx\n", hard); + PSXHW_LOG("SSBUS 32bit read %lx", hard); return hard; case 0x1f801020: hard = psxHu32(0x1020); - PSXHW_LOG("SSBUS com_delay 32bit read %lx\n", hard); + PSXHW_LOG("SSBUS com_delay 32bit read %lx", hard); return hard; case 0x1f801400: hard = psxHu32(0x1400); - PSXHW_LOG("SSBUS dev1_addr 32bit read %lx\n", hard); + PSXHW_LOG("SSBUS dev1_addr 32bit read %lx", hard); return hard; case 0x1f801404: hard = psxHu32(0x1404); - PSXHW_LOG("SSBUS spu_addr 32bit read %lx\n", hard); + PSXHW_LOG("SSBUS spu_addr 32bit read %lx", hard); return hard; case 0x1f801408: hard = psxHu32(0x1408); - PSXHW_LOG("SSBUS dev5_addr 32bit read %lx\n", hard); + PSXHW_LOG("SSBUS dev5_addr 32bit read %lx", hard); return hard; case 0x1f80140C: hard = psxHu32(0x140C); - PSXHW_LOG("SSBUS spu1_addr 32bit read %lx\n", hard); + PSXHW_LOG("SSBUS spu1_addr 32bit read %lx", hard); return hard; case 0x1f801410: hard = psxHu32(0x1410); - PSXHW_LOG("SSBUS 32bit read %lx\n", hard); + PSXHW_LOG("SSBUS 32bit read %lx", hard); return hard; case 0x1f801414: hard = psxHu32(0x1414); - PSXHW_LOG("SSBUS spu1_delay 32bit read %lx\n", hard); + PSXHW_LOG("SSBUS spu1_delay 32bit read %lx", hard); return hard; case 0x1f801418: hard = psxHu32(0x1418); - PSXHW_LOG("SSBUS 32bit read %lx\n", hard); + PSXHW_LOG("SSBUS 32bit read %lx", hard); return hard; case 0x1f80141C: hard = psxHu32(0x141C); - PSXHW_LOG("SSBUS 32bit read %lx\n", hard); + PSXHW_LOG("SSBUS 32bit read %lx", hard); return hard; case 0x1f801420: hard = psxHu32(0x1420); - PSXHW_LOG("SSBUS 32bit read %lx\n", hard); + PSXHW_LOG("SSBUS 32bit read %lx", hard); return hard; case 0x1f8010f0: - PSXHW_LOG("DMA PCR 32bit read %lx\n", HW_DMA_PCR); + PSXHW_LOG("DMA PCR 32bit read %lx", HW_DMA_PCR); return HW_DMA_PCR; case 0x1f8010c8: - PSXHW_LOG("DMA4 CHCR 32bit read %lx\n", HW_DMA4_CHCR); + PSXHW_LOG("DMA4 CHCR 32bit read %lx", HW_DMA4_CHCR); return HW_DMA4_CHCR; // DMA4 chcr (SPU DMA) // time for rootcounters :) case 0x1f801100: hard = (u16)psxRcntRcount16(0); - PSXCNT_LOG("T0 count read32: %lx\n", hard); + PSXCNT_LOG("T0 count read32: %lx", hard); return hard; case 0x1f801104: hard = (u16)psxCounters[0].mode; - PSXCNT_LOG("T0 mode read32: %lx\n", hard); + PSXCNT_LOG("T0 mode read32: %lx", hard); return hard; case 0x1f801108: hard = psxCounters[0].target; - PSXCNT_LOG("T0 target read32: %lx\n", hard); + PSXCNT_LOG("T0 target read32: %lx", hard); return hard; case 0x1f801110: hard = (u16)psxRcntRcount16(1); - PSXCNT_LOG("T1 count read32: %lx\n", hard); + PSXCNT_LOG("T1 count read32: %lx", hard); return hard; case 0x1f801114: hard = (u16)psxCounters[1].mode; - PSXCNT_LOG("T1 mode read32: %lx\n", hard); + PSXCNT_LOG("T1 mode read32: %lx", hard); return hard; case 0x1f801118: hard = psxCounters[1].target; - PSXCNT_LOG("T1 target read32: %lx\n", hard); + PSXCNT_LOG("T1 target read32: %lx", hard); return hard; case 0x1f801120: hard = (u16)psxRcntRcount16(2); - PSXCNT_LOG("T2 count read32: %lx\n", hard); + PSXCNT_LOG("T2 count read32: %lx", hard); return hard; case 0x1f801124: hard = (u16)psxCounters[2].mode; - PSXCNT_LOG("T2 mode read32: %lx\n", hard); + PSXCNT_LOG("T2 mode read32: %lx", hard); return hard; case 0x1f801128: hard = psxCounters[2].target; - PSXCNT_LOG("T2 target read32: %lx\n", hard); + PSXCNT_LOG("T2 target read32: %lx", hard); return hard; case 0x1f801480: hard = (u32)psxRcntRcount32(3); - PSXCNT_LOG("T3 count read32: %lx\n", hard); + PSXCNT_LOG("T3 count read32: %lx", hard); return hard; case 0x1f801484: hard = (u16)psxCounters[3].mode; - PSXCNT_LOG("T3 mode read32: %lx\n", hard); + PSXCNT_LOG("T3 mode read32: %lx", hard); return hard; case 0x1f801488: hard = psxCounters[3].target; - PSXCNT_LOG("T3 target read32: %lx\n", hard); + PSXCNT_LOG("T3 target read32: %lx", hard); return hard; case 0x1f801490: hard = (u32)psxRcntRcount32(4); - PSXCNT_LOG("T4 count read32: %lx\n", hard); + PSXCNT_LOG("T4 count read32: %lx", hard); return hard; case 0x1f801494: hard = (u16)psxCounters[4].mode; - PSXCNT_LOG("T4 mode read32: %lx\n", hard); + PSXCNT_LOG("T4 mode read32: %lx", hard); return hard; case 0x1f801498: hard = psxCounters[4].target; - PSXCNT_LOG("T4 target read32: %lx\n", hard); + PSXCNT_LOG("T4 target read32: %lx", hard); return hard; case 0x1f8014a0: hard = (u32)psxRcntRcount32(5); - PSXCNT_LOG("T5 count read32: %lx\n", hard); + PSXCNT_LOG("T5 count read32: %lx", hard); return hard; case 0x1f8014a4: hard = (u16)psxCounters[5].mode; - PSXCNT_LOG("T5 mode read32: %lx\n", hard); + PSXCNT_LOG("T5 mode read32: %lx", hard); return hard; case 0x1f8014a8: hard = psxCounters[5].target; - PSXCNT_LOG("T5 target read32: %lx\n", hard); + PSXCNT_LOG("T5 target read32: %lx", hard); return hard; case 0x1f801450: hard = psxHu32(add); - PSXHW_LOG("%08X ICFG 32bit read %x\n", psxRegs.pc, hard); + PSXHW_LOG("%08X ICFG 32bit read %x", psxRegs.pc, hard); return hard; @@ -521,22 +521,22 @@ u32 psxHwRead32(u32 add) { case 0x1f801500: HW_DMA7_MADR = SPU2ReadMemAddr(1); - PSXHW_LOG("DMA7 MADR 32bit read %lx\n", HW_DMA7_MADR); + PSXHW_LOG("DMA7 MADR 32bit read %lx", HW_DMA7_MADR); return HW_DMA7_MADR; // DMA7 madr case 0x1f801504: - PSXHW_LOG("DMA7 BCR 32bit read %lx\n", HW_DMA7_BCR); + PSXHW_LOG("DMA7 BCR 32bit read %lx", HW_DMA7_BCR); return HW_DMA7_BCR; // DMA7 bcr case 0x1f801508: - PSXHW_LOG("DMA7 CHCR 32bit read %lx\n", HW_DMA7_CHCR); + PSXHW_LOG("DMA7 CHCR 32bit read %lx", HW_DMA7_CHCR); return HW_DMA7_CHCR; // DMA7 chcr (SPU2) case 0x1f801570: hard = psxHu32(0x1570); - PSXHW_LOG("DMA PCR2 32bit read %lx\n", hard); + PSXHW_LOG("DMA PCR2 32bit read %lx", hard); return hard; case 0x1f801574: - PSXHW_LOG("DMA ICR2 32bit read %lx\n", HW_DMA_ICR2); + PSXHW_LOG("DMA ICR2 32bit read %lx", HW_DMA_ICR2); return HW_DMA_ICR2; case 0x1F808200: @@ -556,7 +556,7 @@ u32 psxHwRead32(u32 add) { case 0x1F808238: case 0x1F80823C: hard=sio2_getSend3((add-0x1F808200)/4); - PSXHW_LOG("SIO2 read param[%d] (%lx)\n", (add-0x1F808200)/4, hard); + PSXHW_LOG("SIO2 read param[%d] (%lx)", (add-0x1F808200)/4, hard); return hard; case 0x1F808240: @@ -564,7 +564,7 @@ u32 psxHwRead32(u32 add) { case 0x1F808250: case 0x1F80825C: hard=sio2_getSend1((add-0x1F808240)/8); - PSXHW_LOG("SIO2 read send1[%d] (%lx)\n", (add-0x1F808240)/8, hard); + PSXHW_LOG("SIO2 read send1[%d] (%lx)", (add-0x1F808240)/8, hard); return hard; case 0x1F808244: @@ -572,50 +572,50 @@ u32 psxHwRead32(u32 add) { case 0x1F808254: case 0x1F808258: hard=sio2_getSend2((add-0x1F808244)/8); - PSXHW_LOG("SIO2 read send2[%d] (%lx)\n", (add-0x1F808244)/8, hard); + PSXHW_LOG("SIO2 read send2[%d] (%lx)", (add-0x1F808244)/8, hard); return hard; case 0x1F808268: hard=sio2_getCtrl(); - PSXHW_LOG("SIO2 read CTRL (%lx)\n", hard); + PSXHW_LOG("SIO2 read CTRL (%lx)", hard); return hard; case 0x1F80826C: hard=sio2_getRecv1(); - PSXHW_LOG("SIO2 read Recv1 (%lx)\n", hard); + PSXHW_LOG("SIO2 read Recv1 (%lx)", hard); return hard; case 0x1F808270: hard=sio2_getRecv2(); - PSXHW_LOG("SIO2 read Recv2 (%lx)\n", hard); + PSXHW_LOG("SIO2 read Recv2 (%lx)", hard); return hard; case 0x1F808274: hard=sio2_getRecv3(); - PSXHW_LOG("SIO2 read Recv3 (%lx)\n", hard); + PSXHW_LOG("SIO2 read Recv3 (%lx)", hard); return hard; case 0x1F808278: hard=sio2_get8278(); - PSXHW_LOG("SIO2 read [8278] (%lx)\n", hard); + PSXHW_LOG("SIO2 read [8278] (%lx)", hard); return hard; case 0x1F80827C: hard=sio2_get827C(); - PSXHW_LOG("SIO2 read [827C] (%lx)\n", hard); + PSXHW_LOG("SIO2 read [827C] (%lx)", hard); return hard; case 0x1F808280: hard=sio2_getIntr(); - PSXHW_LOG("SIO2 read INTR (%lx)\n", hard); + PSXHW_LOG("SIO2 read INTR (%lx)", hard); return hard; default: hard = psxHu32(add); - PSXHW_LOG("*Unknown 32bit read at address %lx: %lx\n", add, hard); + PSXHW_LOG("*Unknown 32bit read at address %lx: %lx", add, hard); return hard; } - PSXHW_LOG("*Known 32bit read at address %lx: %lx\n", add, hard); + PSXHW_LOG("*Known 32bit read at address %lx: %lx", add, hard); return hard; } @@ -665,7 +665,7 @@ void psxHwWrite8(u32 add, u8 value) { return; case 0x1f801450: - if (value) { PSXHW_LOG("%08X ICFG 8bit write %lx\n", psxRegs.pc, value); } + if (value) { PSXHW_LOG("%08X ICFG 8bit write %lx", psxRegs.pc, value); } psxHu8(0x1450) = value; return; @@ -685,16 +685,16 @@ void psxHwWrite8(u32 add, u8 value) { return; case 0x1F808260: - PSXHW_LOG("SIO2 write8 DATAIN <- %08X\n", value); + PSXHW_LOG("SIO2 write8 DATAIN <- %08X", value); sio2_serialIn(value);return;//serial data feed/fifo default: psxHu8(add) = value; - PSXHW_LOG("*Unknown 8bit write at address %lx value %x\n", add, value); + PSXHW_LOG("*Unknown 8bit write at address %lx value %x", add, value); return; } psxHu8(add) = value; - PSXHW_LOG("*Known 8bit write at address %lx value %x\n", add, value); + PSXHW_LOG("*Known 8bit write at address %lx value %x", add, value); } void psxHwWrite16(u32 add, u16 value) { @@ -708,22 +708,22 @@ void psxHwWrite16(u32 add, u16 value) { case 0x1f801040: sioWrite8((u8)value); sioWrite8((u8)(value>>8)); - PAD_LOG ("sio write16 %lx, %x\n", add&0xf, value); + PAD_LOG ("sio write16 %lx, %x", add&0xf, value); return; case 0x1f801044: - PAD_LOG ("sio write16 %lx, %x\n", add&0xf, value); + PAD_LOG ("sio write16 %lx, %x", add&0xf, value); return; case 0x1f801048: sio.ModeReg = value; - PAD_LOG ("sio write16 %lx, %x\n", add&0xf, value); + PAD_LOG ("sio write16 %lx, %x", add&0xf, value); return; case 0x1f80104a: // control register sioWriteCtrl16(value); - PAD_LOG ("sio write16 %lx, %x\n", add&0xf, value); + PAD_LOG ("sio write16 %lx, %x", add&0xf, value); return; case 0x1f80104e: // baudrate register sio.BaudReg = value; - PAD_LOG ("sio write16 %lx, %x\n", add&0xf, value); + PAD_LOG ("sio write16 %lx, %x", add&0xf, value); return; //serial port ;P @@ -733,105 +733,105 @@ void psxHwWrite16(u32 add, u16 value) { // case 0x1f801054: serial_status_write(value); break; case 0x1f801070: - PSXHW_LOG("IREG 16bit write %x\n", value); + PSXHW_LOG("IREG 16bit write %x", value); // if (Config.Sio) psxHu16(0x1070) |= 0x80; // if (Config.SpuIrq) psxHu16(0x1070) |= 0x200; psxHu16(0x1070) &= value; return; case 0x1f801074: - PSXHW_LOG("IMASK 16bit write %x\n", value); + PSXHW_LOG("IMASK 16bit write %x", value); psxHu16(0x1074) = value; iopTestIntc(); return; case 0x1f801078: // see the 32-bit version for notes! - PSXHW_LOG("ICTRL 16bit write %x\n", value); + PSXHW_LOG("ICTRL 16bit write %n", value); psxHu16(0x1078) = value; iopTestIntc(); return; case 0x1f8010c4: - PSXHW_LOG("DMA4 BCR_size 16bit write %lx\n", value); + PSXHW_LOG("DMA4 BCR_size 16bit write %lx", value); psxHu16(0x10c4) = value; return; // DMA4 bcr_size case 0x1f8010c6: - PSXHW_LOG("DMA4 BCR_count 16bit write %lx\n", value); + PSXHW_LOG("DMA4 BCR_count 16bit write %lx", value); psxHu16(0x10c6) = value; return; // DMA4 bcr_count case 0x1f801100: - PSXCNT_LOG("COUNTER 0 COUNT 16bit write %x\n", value); + PSXCNT_LOG("COUNTER 0 COUNT 16bit write %x", value); psxRcntWcount16(0, value); return; case 0x1f801104: - PSXCNT_LOG("COUNTER 0 MODE 16bit write %x\n", value); + PSXCNT_LOG("COUNTER 0 MODE 16bit write %x", value); psxRcnt0Wmode(value); return; case 0x1f801108: - PSXCNT_LOG("COUNTER 0 TARGET 16bit write %x\n", value); + PSXCNT_LOG("COUNTER 0 TARGET 16bit write %x", value); psxRcntWtarget16(0, value); return; case 0x1f801110: - PSXCNT_LOG("COUNTER 1 COUNT 16bit write %x\n", value); + PSXCNT_LOG("COUNTER 1 COUNT 16bit write %x", value); psxRcntWcount16(1, value); return; case 0x1f801114: - PSXCNT_LOG("COUNTER 1 MODE 16bit write %x\n", value); + PSXCNT_LOG("COUNTER 1 MODE 16bit write %x", value); psxRcnt1Wmode(value); return; case 0x1f801118: - PSXCNT_LOG("COUNTER 1 TARGET 16bit write %x\n", value); + PSXCNT_LOG("COUNTER 1 TARGET 16bit write %x", value); psxRcntWtarget16(1, value); return; case 0x1f801120: - PSXCNT_LOG("COUNTER 2 COUNT 16bit write %x\n", value); + PSXCNT_LOG("COUNTER 2 COUNT 16bit write %x", value); psxRcntWcount16(2, value); return; case 0x1f801124: - PSXCNT_LOG("COUNTER 2 MODE 16bit write %x\n", value); + PSXCNT_LOG("COUNTER 2 MODE 16bit write %x", value); psxRcnt2Wmode(value); return; case 0x1f801128: - PSXCNT_LOG("COUNTER 2 TARGET 16bit write %x\n", value); + PSXCNT_LOG("COUNTER 2 TARGET 16bit write %x", value); psxRcntWtarget16(2, value); return; case 0x1f801450: - if (value) { PSXHW_LOG("%08X ICFG 16bit write %lx\n", psxRegs.pc, value); } + if (value) { PSXHW_LOG("%08X ICFG 16bit write %lx", psxRegs.pc, value); } psxHu16(0x1450) = value/* & (~0x8)*/; return; case 0x1f801480: - PSXCNT_LOG("COUNTER 3 COUNT 16bit write %lx\n", value); + PSXCNT_LOG("COUNTER 3 COUNT 16bit write %lx", value); psxRcntWcount32(3, value); return; case 0x1f801484: - PSXCNT_LOG("COUNTER 3 MODE 16bit write %lx\n", value); + PSXCNT_LOG("COUNTER 3 MODE 16bit write %lx", value); psxRcnt3Wmode(value); return; case 0x1f801488: - PSXCNT_LOG("COUNTER 3 TARGET 16bit write %lx\n", value); + PSXCNT_LOG("COUNTER 3 TARGET 16bit write %lx", value); psxRcntWtarget32(3, value); return; case 0x1f801490: - PSXCNT_LOG("COUNTER 4 COUNT 16bit write %lx\n", value); + PSXCNT_LOG("COUNTER 4 COUNT 16bit write %lx", value); psxRcntWcount32(4, value); return; case 0x1f801494: - PSXCNT_LOG("COUNTER 4 MODE 16bit write %lx\n", value); + PSXCNT_LOG("COUNTER 4 MODE 16bit write %lx", value); psxRcnt4Wmode(value); return; case 0x1f801498: - PSXCNT_LOG("COUNTER 4 TARGET 16bit write %lx\n", value); + PSXCNT_LOG("COUNTER 4 TARGET 16bit write %lx", value); psxRcntWtarget32(4, value); return; case 0x1f8014a0: - PSXCNT_LOG("COUNTER 5 COUNT 16bit write %lx\n", value); + PSXCNT_LOG("COUNTER 5 COUNT 16bit write %lx", value); psxRcntWcount32(5, value); return; case 0x1f8014a4: - PSXCNT_LOG("COUNTER 5 MODE 16bit write %lx\n", value); + PSXCNT_LOG("COUNTER 5 MODE 16bit write %lx", value); psxRcnt5Wmode(value); return; case 0x1f8014a8: - PSXCNT_LOG("COUNTER 5 TARGET 16bit write %lx\n", value); + PSXCNT_LOG("COUNTER 5 TARGET 16bit write %lx", value); psxRcntWtarget32(5, value); return; case 0x1f801504: psxHu16(0x1504) = value; - PSXHW_LOG("DMA7 BCR_size 16bit write %lx\n", value); + PSXHW_LOG("DMA7 BCR_size 16bit write %lx", value); return; case 0x1f801506: psxHu16(0x1506) = value; - PSXHW_LOG("DMA7 BCR_count 16bit write %lx\n", value); + PSXHW_LOG("DMA7 BCR_count 16bit write %lx", value); return; default: if (add>=0x1f801c00 && add<0x1f801e00) { @@ -840,11 +840,11 @@ void psxHwWrite16(u32 add, u16 value) { } psxHu16(add) = value; - PSXHW_LOG("*Unknown 16bit write at address %lx value %x\n", add, value); + PSXHW_LOG("*Unknown 16bit write at address %lx value %x", add, value); return; } psxHu16(add) = value; - PSXHW_LOG("*Known 16bit write at address %lx value %x\n", add, value); + PSXHW_LOG("*Known 16bit write at address %lx value %x", add, value); } #define DmaExec2(n) { \ @@ -867,31 +867,31 @@ void psxHwWrite32(u32 add, u32 value) { sioWrite8((u8)((value&0xff) >> 8)); sioWrite8((u8)((value&0xff) >> 16)); sioWrite8((u8)((value&0xff) >> 24)); - PAD_LOG("sio write32 %lx\n", value); + PAD_LOG("sio write32 %lx", value); return; // case 0x1f801050: serial_write32(value); break;//serial port case 0x1f801060: - PSXHW_LOG("RAM size write %lx\n", value); + PSXHW_LOG("RAM size write %lx", value); psxHu32(add) = value; return; // Ram size //------------------------------------------------------------------ case 0x1f801070: - PSXHW_LOG("IREG 32bit write %lx\n", value); + PSXHW_LOG("IREG 32bit write %lx", value); // if (Config.Sio) psxHu32(0x1070) |= 0x80; // if (Config.SpuIrq) psxHu32(0x1070) |= 0x200; psxHu32(0x1070) &= value; return; case 0x1f801074: - PSXHW_LOG("IMASK 32bit write %lx\n", value); + PSXHW_LOG("IMASK 32bit write %lx", value); psxHu32(0x1074) = value; iopTestIntc(); return; case 0x1f801078: - PSXHW_LOG("ICTRL 32bit write %lx\n", value); - psxHu32(0x1078) = value; //1; //According to pSXAuthor this allways becomes 1 on write, but MHPB won't boot if value is not writen ;p + PSXHW_LOG("ICTRL 32bit write %lx", value); + psxHu32(0x1078) = value; //1; //According to pSXAuthor this always becomes 1 on write, but MHPB won't boot if value is not writen ;p iopTestIntc(); return; @@ -899,125 +899,125 @@ void psxHwWrite32(u32 add, u32 value) { //SSBus registers case 0x1f801000: psxHu32(0x1000) = value; - PSXHW_LOG("SSBUS 32bit write %lx\n", value); + PSXHW_LOG("SSBUS 32bit write %lx", value); return; case 0x1f801004: psxHu32(0x1004) = value; - PSXHW_LOG("SSBUS 32bit write %lx\n", value); + PSXHW_LOG("SSBUS 32bit write %lx", value); return; case 0x1f801008: psxHu32(0x1008) = value; - PSXHW_LOG("SSBUS 32bit write %lx\n", value); + PSXHW_LOG("SSBUS 32bit write %lx", value); return; case 0x1f80100C: psxHu32(0x100C) = value; - PSXHW_LOG("SSBUS dev1_delay 32bit write %lx\n", value); + PSXHW_LOG("SSBUS dev1_delay 32bit write %lx", value); return; case 0x1f801010: psxHu32(0x1010) = value; - PSXHW_LOG("SSBUS rom_delay 32bit write %lx\n", value); + PSXHW_LOG("SSBUS rom_delay 32bit write %lx", value); return; case 0x1f801014: psxHu32(0x1014) = value; - PSXHW_LOG("SSBUS spu_delay 32bit write %lx\n", value); + PSXHW_LOG("SSBUS spu_delay 32bit write %lx", value); return; case 0x1f801018: psxHu32(0x1018) = value; - PSXHW_LOG("SSBUS dev5_delay 32bit write %lx\n", value); + PSXHW_LOG("SSBUS dev5_delay 32bit write %lx", value); return; case 0x1f80101C: psxHu32(0x101C) = value; - PSXHW_LOG("SSBUS 32bit write %lx\n", value); + PSXHW_LOG("SSBUS 32bit write %lx", value); return; case 0x1f801020: psxHu32(0x1020) = value; - PSXHW_LOG("SSBUS com_delay 32bit write %lx\n", value); + PSXHW_LOG("SSBUS com_delay 32bit write %lx", value); return; case 0x1f801400: psxHu32(0x1400) = value; - PSXHW_LOG("SSBUS dev1_addr 32bit write %lx\n", value); + PSXHW_LOG("SSBUS dev1_addr 32bit write %lx", value); return; case 0x1f801404: psxHu32(0x1404) = value; - PSXHW_LOG("SSBUS spu_addr 32bit write %lx\n", value); + PSXHW_LOG("SSBUS spu_addr 32bit write %lx", value); return; case 0x1f801408: psxHu32(0x1408) = value; - PSXHW_LOG("SSBUS dev5_addr 32bit write %lx\n", value); + PSXHW_LOG("SSBUS dev5_addr 32bit write %lx", value); return; case 0x1f80140C: psxHu32(0x140C) = value; - PSXHW_LOG("SSBUS spu1_addr 32bit write %lx\n", value); + PSXHW_LOG("SSBUS spu1_addr 32bit write %lx", value); return; case 0x1f801410: psxHu32(0x1410) = value; - PSXHW_LOG("SSBUS 32bit write %lx\n", value); + PSXHW_LOG("SSBUS 32bit write %lx", value); return; case 0x1f801414: psxHu32(0x1414) = value; - PSXHW_LOG("SSBUS spu1_delay 32bit write %lx\n", value); + PSXHW_LOG("SSBUS spu1_delay 32bit write %lx", value); return; case 0x1f801418: psxHu32(0x1418) = value; - PSXHW_LOG("SSBUS 32bit write %lx\n", value); + PSXHW_LOG("SSBUS 32bit write %lx", value); return; case 0x1f80141C: psxHu32(0x141C) = value; - PSXHW_LOG("SSBUS 32bit write %lx\n", value); + PSXHW_LOG("SSBUS 32bit write %lx", value); return; case 0x1f801420: psxHu32(0x1420) = value; - PSXHW_LOG("SSBUS 32bit write %lx\n", value); + PSXHW_LOG("SSBUS 32bit write %lx", value); return; //------------------------------------------------------------------ case 0x1f801080: - PSXHW_LOG("DMA0 MADR 32bit write %lx\n", value); + PSXHW_LOG("DMA0 MADR 32bit write %lx", value); HW_DMA0_MADR = value; return; // DMA0 madr case 0x1f801084: - PSXHW_LOG("DMA0 BCR 32bit write %lx\n", value); + PSXHW_LOG("DMA0 BCR 32bit write %lx", value); HW_DMA0_BCR = value; return; // DMA0 bcr case 0x1f801088: - PSXHW_LOG("DMA0 CHCR 32bit write %lx\n", value); + PSXHW_LOG("DMA0 CHCR 32bit write %lx", value); HW_DMA0_CHCR = value; // DMA0 chcr (MDEC in DMA) // DmaExec(0); return; //------------------------------------------------------------------ case 0x1f801090: - PSXHW_LOG("DMA1 MADR 32bit write %lx\n", value); + PSXHW_LOG("DMA1 MADR 32bit write %lx", value); HW_DMA1_MADR = value; return; // DMA1 madr case 0x1f801094: - PSXHW_LOG("DMA1 BCR 32bit write %lx\n", value); + PSXHW_LOG("DMA1 BCR 32bit write %lx", value); HW_DMA1_BCR = value; return; // DMA1 bcr case 0x1f801098: - PSXHW_LOG("DMA1 CHCR 32bit write %lx\n", value); + PSXHW_LOG("DMA1 CHCR 32bit write %lx", value); HW_DMA1_CHCR = value; // DMA1 chcr (MDEC out DMA) // DmaExec(1); return; //------------------------------------------------------------------ case 0x1f8010a0: - PSXHW_LOG("DMA2 MADR 32bit write %lx\n", value); + PSXHW_LOG("DMA2 MADR 32bit write %lx", value); HW_DMA2_MADR = value; return; // DMA2 madr case 0x1f8010a4: - PSXHW_LOG("DMA2 BCR 32bit write %lx\n", value); + PSXHW_LOG("DMA2 BCR 32bit write %lx", value); HW_DMA2_BCR = value; return; // DMA2 bcr case 0x1f8010a8: - PSXHW_LOG("DMA2 CHCR 32bit write %lx\n", value); + PSXHW_LOG("DMA2 CHCR 32bit write %lx", value); HW_DMA2_CHCR = value; // DMA2 chcr (GPU DMA) DmaExec(2); return; //------------------------------------------------------------------ case 0x1f8010b0: - PSXHW_LOG("DMA3 MADR 32bit write %lx\n", value); + PSXHW_LOG("DMA3 MADR 32bit write %lx", value); HW_DMA3_MADR = value; return; // DMA3 madr case 0x1f8010b4: - PSXHW_LOG("DMA3 BCR 32bit write %lx\n", value); + PSXHW_LOG("DMA3 BCR 32bit write %lx", value); HW_DMA3_BCR = value; return; // DMA3 bcr case 0x1f8010b8: - PSXHW_LOG("DMA3 CHCR 32bit write %lx\n", value); + PSXHW_LOG("DMA3 CHCR 32bit write %lx", value); HW_DMA3_CHCR = value; // DMA3 chcr (CDROM DMA) DmaExec(3); @@ -1025,14 +1025,14 @@ void psxHwWrite32(u32 add, u32 value) { //------------------------------------------------------------------ case 0x1f8010c0: - PSXHW_LOG("DMA4 MADR 32bit write %lx\n", value); + PSXHW_LOG("DMA4 MADR 32bit write %lx", value); SPU2WriteMemAddr(0,value); HW_DMA4_MADR = value; return; // DMA4 madr case 0x1f8010c4: - PSXHW_LOG("DMA4 BCR 32bit write %lx\n", value); + PSXHW_LOG("DMA4 BCR 32bit write %lx", value); HW_DMA4_BCR = value; return; // DMA4 bcr case 0x1f8010c8: - PSXHW_LOG("DMA4 CHCR 32bit write %lx\n", value); + PSXHW_LOG("DMA4 CHCR 32bit write %lx", value); HW_DMA4_CHCR = value; // DMA4 chcr (SPU DMA) DmaExec(4); return; @@ -1045,97 +1045,97 @@ void psxHwWrite32(u32 add, u32 value) { #endif case 0x1f8010e0: - PSXHW_LOG("DMA6 MADR 32bit write %lx\n", value); + PSXHW_LOG("DMA6 MADR 32bit write %lx", value); HW_DMA6_MADR = value; return; // DMA6 madr case 0x1f8010e4: - PSXHW_LOG("DMA6 BCR 32bit write %lx\n", value); + PSXHW_LOG("DMA6 BCR 32bit write %lx", value); HW_DMA6_BCR = value; return; // DMA6 bcr case 0x1f8010e8: - PSXHW_LOG("DMA6 CHCR 32bit write %lx\n", value); + PSXHW_LOG("DMA6 CHCR 32bit write %lx", value); HW_DMA6_CHCR = value; // DMA6 chcr (OT clear) DmaExec(6); return; //------------------------------------------------------------------ case 0x1f801500: - PSXHW_LOG("DMA7 MADR 32bit write %lx\n", value); + PSXHW_LOG("DMA7 MADR 32bit write %lx", value); SPU2WriteMemAddr(1,value); HW_DMA7_MADR = value; return; // DMA7 madr case 0x1f801504: - PSXHW_LOG("DMA7 BCR 32bit write %lx\n", value); + PSXHW_LOG("DMA7 BCR 32bit write %lx", value); HW_DMA7_BCR = value; return; // DMA7 bcr case 0x1f801508: - PSXHW_LOG("DMA7 CHCR 32bit write %lx\n", value); + PSXHW_LOG("DMA7 CHCR 32bit write %lx", value); HW_DMA7_CHCR = value; // DMA7 chcr (SPU2) DmaExec2(7); return; //------------------------------------------------------------------ case 0x1f801510: - PSXHW_LOG("DMA8 MADR 32bit write %lx\n", value); + PSXHW_LOG("DMA8 MADR 32bit write %lx", value); HW_DMA8_MADR = value; return; // DMA8 madr case 0x1f801514: - PSXHW_LOG("DMA8 BCR 32bit write %lx\n", value); + PSXHW_LOG("DMA8 BCR 32bit write %lx", value); HW_DMA8_BCR = value; return; // DMA8 bcr case 0x1f801518: - PSXHW_LOG("DMA8 CHCR 32bit write %lx\n", value); + PSXHW_LOG("DMA8 CHCR 32bit write %lx", value); HW_DMA8_CHCR = value; // DMA8 chcr (DEV9) DmaExec2(8); return; //------------------------------------------------------------------ case 0x1f801520: - PSXHW_LOG("DMA9 MADR 32bit write %lx\n", value); + PSXHW_LOG("DMA9 MADR 32bit write %lx", value); HW_DMA9_MADR = value; return; // DMA9 madr case 0x1f801524: - PSXHW_LOG("DMA9 BCR 32bit write %lx\n", value); + PSXHW_LOG("DMA9 BCR 32bit write %lx", value); HW_DMA9_BCR = value; return; // DMA9 bcr case 0x1f801528: - PSXHW_LOG("DMA9 CHCR 32bit write %lx\n", value); + PSXHW_LOG("DMA9 CHCR 32bit write %lx", value); HW_DMA9_CHCR = value; // DMA9 chcr (SIF0) DmaExec2(9); return; case 0x1f80152c: - PSXHW_LOG("DMA9 TADR 32bit write %lx\n", value); + PSXHW_LOG("DMA9 TADR 32bit write %lx", value); HW_DMA9_TADR = value; return; // DMA9 tadr //------------------------------------------------------------------ case 0x1f801530: - PSXHW_LOG("DMA10 MADR 32bit write %lx\n", value); + PSXHW_LOG("DMA10 MADR 32bit write %lx", value); HW_DMA10_MADR = value; return; // DMA10 madr case 0x1f801534: - PSXHW_LOG("DMA10 BCR 32bit write %lx\n", value); + PSXHW_LOG("DMA10 BCR 32bit write %lx", value); HW_DMA10_BCR = value; return; // DMA10 bcr case 0x1f801538: - PSXHW_LOG("DMA10 CHCR 32bit write %lx\n", value); + PSXHW_LOG("DMA10 CHCR 32bit write %lx", value); HW_DMA10_CHCR = value; // DMA10 chcr (SIF1) DmaExec2(10); return; //------------------------------------------------------------------ case 0x1f801540: - PSXHW_LOG("DMA11 SIO2in MADR 32bit write %lx\n", value); + PSXHW_LOG("DMA11 SIO2in MADR 32bit write %lx", value); HW_DMA11_MADR = value; return; case 0x1f801544: - PSXHW_LOG("DMA11 SIO2in BCR 32bit write %lx\n", value); + PSXHW_LOG("DMA11 SIO2in BCR 32bit write %lx", value); HW_DMA11_BCR = value; return; case 0x1f801548: - PSXHW_LOG("DMA11 SIO2in CHCR 32bit write %lx\n", value); + PSXHW_LOG("DMA11 SIO2in CHCR 32bit write %lx", value); HW_DMA11_CHCR = value; // DMA11 chcr (SIO2 in) DmaExec2(11); return; //------------------------------------------------------------------ case 0x1f801550: - PSXHW_LOG("DMA12 SIO2out MADR 32bit write %lx\n", value); + PSXHW_LOG("DMA12 SIO2out MADR 32bit write %lx", value); HW_DMA12_MADR = value; return; case 0x1f801554: - PSXHW_LOG("DMA12 SIO2out BCR 32bit write %lx\n", value); + PSXHW_LOG("DMA12 SIO2out BCR 32bit write %lx", value); HW_DMA12_BCR = value; return; case 0x1f801558: - PSXHW_LOG("DMA12 SIO2out CHCR 32bit write %lx\n", value); + PSXHW_LOG("DMA12 SIO2out CHCR 32bit write %lx", value); HW_DMA12_CHCR = value; // DMA12 chcr (SIO2 out) DmaExec2(12); return; @@ -1143,15 +1143,15 @@ void psxHwWrite32(u32 add, u32 value) { //------------------------------------------------------------------ case 0x1f801570: psxHu32(0x1570) = value; - PSXHW_LOG("DMA PCR2 32bit write %lx\n", value); + PSXHW_LOG("DMA PCR2 32bit write %lx", value); return; case 0x1f8010f0: - PSXHW_LOG("DMA PCR 32bit write %lx\n", value); + PSXHW_LOG("DMA PCR 32bit write %lx", value); HW_DMA_PCR = value; return; case 0x1f8010f4: - PSXHW_LOG("DMA ICR 32bit write %lx\n", value); + PSXHW_LOG("DMA ICR 32bit write %lx", value); { u32 tmp = (~value) & HW_DMA_ICR; HW_DMA_ICR = ((tmp ^ value) & 0xffffff) ^ tmp; @@ -1159,7 +1159,7 @@ void psxHwWrite32(u32 add, u32 value) { return; case 0x1f801574: - PSXHW_LOG("DMA ICR2 32bit write %lx\n", value); + PSXHW_LOG("DMA ICR2 32bit write %lx", value); { u32 tmp = (~value) & HW_DMA_ICR2; HW_DMA_ICR2 = ((tmp ^ value) & 0xffffff) ^ tmp; @@ -1168,10 +1168,10 @@ void psxHwWrite32(u32 add, u32 value) { //------------------------------------------------------------------ /* case 0x1f801810: - PSXHW_LOG("GPU DATA 32bit write %lx\n", value); + PSXHW_LOG("GPU DATA 32bit write %lx", value); GPU_writeData(value); return; case 0x1f801814: - PSXHW_LOG("GPU STATUS 32bit write %lx\n", value); + PSXHW_LOG("GPU STATUS 32bit write %lx", value); GPU_writeStatus(value); return; */ /* case 0x1f801820: @@ -1180,73 +1180,73 @@ void psxHwWrite32(u32 add, u32 value) { mdecWrite1(value); break; */ case 0x1f801100: - PSXCNT_LOG("COUNTER 0 COUNT 32bit write %lx\n", value); + PSXCNT_LOG("COUNTER 0 COUNT 32bit write %lx", value); psxRcntWcount16(0, value ); return; case 0x1f801104: - PSXCNT_LOG("COUNTER 0 MODE 32bit write %lx\n", value); + PSXCNT_LOG("COUNTER 0 MODE 32bit write %lx", value); psxRcnt0Wmode(value); return; case 0x1f801108: - PSXCNT_LOG("COUNTER 0 TARGET 32bit write %lx\n", value); + PSXCNT_LOG("COUNTER 0 TARGET 32bit write %lx", value); psxRcntWtarget16(0, value ); return; case 0x1f801110: - PSXCNT_LOG("COUNTER 1 COUNT 32bit write %lx\n", value); + PSXCNT_LOG("COUNTER 1 COUNT 32bit write %lx", value); psxRcntWcount16(1, value ); return; case 0x1f801114: - PSXCNT_LOG("COUNTER 1 MODE 32bit write %lx\n", value); + PSXCNT_LOG("COUNTER 1 MODE 32bit write %lx", value); psxRcnt1Wmode(value); return; case 0x1f801118: - PSXCNT_LOG("COUNTER 1 TARGET 32bit write %lx\n", value); + PSXCNT_LOG("COUNTER 1 TARGET 32bit write %lx", value); psxRcntWtarget16(1, value ); return; case 0x1f801120: - PSXCNT_LOG("COUNTER 2 COUNT 32bit write %lx\n", value); + PSXCNT_LOG("COUNTER 2 COUNT 32bit write %lx", value); psxRcntWcount16(2, value ); return; case 0x1f801124: - PSXCNT_LOG("COUNTER 2 MODE 32bit write %lx\n", value); + PSXCNT_LOG("COUNTER 2 MODE 32bit write %lx", value); psxRcnt2Wmode(value); return; case 0x1f801128: - PSXCNT_LOG("COUNTER 2 TARGET 32bit write %lx\n", value); + PSXCNT_LOG("COUNTER 2 TARGET 32bit write %lx", value); psxRcntWtarget16(2, value); return; case 0x1f801480: - PSXCNT_LOG("COUNTER 3 COUNT 32bit write %lx\n", value); + PSXCNT_LOG("COUNTER 3 COUNT 32bit write %lx", value); psxRcntWcount32(3, value); return; case 0x1f801484: - PSXCNT_LOG("COUNTER 3 MODE 32bit write %lx\n", value); + PSXCNT_LOG("COUNTER 3 MODE 32bit write %lx", value); psxRcnt3Wmode(value); return; case 0x1f801488: - PSXCNT_LOG("COUNTER 3 TARGET 32bit write %lx\n", value); + PSXCNT_LOG("COUNTER 3 TARGET 32bit write %lx", value); psxRcntWtarget32(3, value); return; case 0x1f801490: - PSXCNT_LOG("COUNTER 4 COUNT 32bit write %lx\n", value); + PSXCNT_LOG("COUNTER 4 COUNT 32bit write %lx", value); psxRcntWcount32(4, value); return; case 0x1f801494: - PSXCNT_LOG("COUNTER 4 MODE 32bit write %lx\n", value); + PSXCNT_LOG("COUNTER 4 MODE 32bit write %lx", value); psxRcnt4Wmode(value); return; case 0x1f801498: - PSXCNT_LOG("COUNTER 4 TARGET 32bit write %lx\n", value); + PSXCNT_LOG("COUNTER 4 TARGET 32bit write %lx", value); psxRcntWtarget32(4, value); return; case 0x1f8014a0: - PSXCNT_LOG("COUNTER 5 COUNT 32bit write %lx\n", value); + PSXCNT_LOG("COUNTER 5 COUNT 32bit write %lx", value); psxRcntWcount32(5, value); return; case 0x1f8014a4: - PSXCNT_LOG("COUNTER 5 MODE 32bit write %lx\n", value); + PSXCNT_LOG("COUNTER 5 MODE 32bit write %lx", value); psxRcnt5Wmode(value); return; case 0x1f8014a8: - PSXCNT_LOG("COUNTER 5 TARGET 32bit write %lx\n", value); + PSXCNT_LOG("COUNTER 5 TARGET 32bit write %lx", value); psxRcntWtarget32(5, value); return; //------------------------------------------------------------------ case 0x1f8014c0: - PSXHW_LOG("RTC_HOLDMODE 32bit write %lx\n", value); + PSXHW_LOG("RTC_HOLDMODE 32bit write %lx", value); Console::Notice("** RTC_HOLDMODE 32bit write %lx", params value); break; case 0x1f801450: - if (value) { PSXHW_LOG("%08X ICFG 32bit write %lx\n", psxRegs.pc, value); } + if (value) { PSXHW_LOG("%08X ICFG 32bit write %lx", psxRegs.pc, value); } /* if (value && psxSu32(0x20) == 0x20000 && (psxSu32(0x30) == 0x20000 || @@ -1274,47 +1274,47 @@ void psxHwWrite32(u32 add, u32 value) { case 0x1F808234: case 0x1F808238: case 0x1F80823C: - PSXHW_LOG("SIO2 write param[%d] <- %lx\n", (add-0x1F808200)/4, value); + PSXHW_LOG("SIO2 write param[%d] <- %lx", (add-0x1F808200)/4, value); sio2_setSend3((add-0x1F808200)/4, value); return; case 0x1F808240: case 0x1F808248: case 0x1F808250: case 0x1F808258: - PSXHW_LOG("SIO2 write send1[%d] <- %lx\n", (add-0x1F808240)/8, value); + PSXHW_LOG("SIO2 write send1[%d] <- %lx", (add-0x1F808240)/8, value); sio2_setSend1((add-0x1F808240)/8, value); return; case 0x1F808244: case 0x1F80824C: case 0x1F808254: case 0x1F80825C: - PSXHW_LOG("SIO2 write send2[%d] <- %lx\n", (add-0x1F808244)/8, value); + PSXHW_LOG("SIO2 write send2[%d] <- %lx", (add-0x1F808244)/8, value); sio2_setSend2((add-0x1F808244)/8, value); return; case 0x1F808268: - PSXHW_LOG("SIO2 write CTRL <- %lx\n", value); + PSXHW_LOG("SIO2 write CTRL <- %lx", value); sio2_setCtrl(value); return; case 0x1F808278: - PSXHW_LOG("SIO2 write [8278] <- %lx\n", value); + PSXHW_LOG("SIO2 write [8278] <- %lx", value); sio2_set8278(value); return; case 0x1F80827C: - PSXHW_LOG("SIO2 write [827C] <- %lx\n", value); + PSXHW_LOG("SIO2 write [827C] <- %lx", value); sio2_set827C(value); return; case 0x1F808280: - PSXHW_LOG("SIO2 write INTR <- %lx\n", value); + PSXHW_LOG("SIO2 write INTR <- %lx", value); sio2_setIntr(value); return; //------------------------------------------------------------------ default: psxHu32(add) = value; - PSXHW_LOG("*Unknown 32bit write at address %lx value %lx\n", add, value); + PSXHW_LOG("*Unknown 32bit write at address %lx value %lx", add, value); return; } psxHu32(add) = value; - PSXHW_LOG("*Known 32bit write at address %lx value %lx\n", add, value); + PSXHW_LOG("*Known 32bit write at address %lx value %lx", add, value); } u8 psxHw4Read8(u32 add) { @@ -1356,14 +1356,13 @@ u8 psxHw4Read8(u32 add) { case 0x1f402039: return cdvdRead39(); case 0x1f40203A: return cdvdRead3A(); default: - // note: use SysPrintF to notify console since this is a potentially serious - // emulation problem: - PSXHW_LOG("*Unknown 8bit read at address 0x%x\n", add); + // note: notify the console since this is a potentially serious emulation problem: + PSXHW_LOG("*Unknown 8bit read at address 0x%x", add); Console::Error( "IOP Unknown 8bit read from addr 0x%x", params add ); return 0; } - PSXHW_LOG( "Known 8bit read from addr 0x%x = 0x%x\n", add, hard ); + PSXHW_LOG( "Known 8bit read from addr 0x%x = 0x%x", add, hard ); return hard; } @@ -1384,11 +1383,11 @@ void psxHw4Write8(u32 add, u8 value) { case 0x1f402018: cdvdWrite18(value); return; case 0x1f40203A: cdvdWrite3A(value); return; default: - //PSXHW_LOG("*Unknown 8bit write at address %lx value %x\n", add, value); + //PSXHW_LOG("*Unknown 8bit write at address %lx value %x", add, value); Console::Notice("IOP Unknown 8bit write to addr 0x%x = 0x%x", params add, value); return; } - PSXHW_LOG("Known 8bit write to addr 0x%x = 0x%x\n", add, value); + PSXHW_LOG("Known 8bit write to addr 0x%x = 0x%x", add, value); } void psxDmaInterrupt(int n) { @@ -1402,10 +1401,10 @@ void psxDmaInterrupt(int n) { void psxDmaInterrupt2(int n) { if (HW_DMA_ICR2 & (1 << (16 + n))) { /* if (HW_DMA_ICR2 & (1 << (24 + n))) { - SysPrintf("*PCSX2*: HW_DMA_ICR2 n=%d already set\n", n); + Console::WriteLn("*PCSX2*: HW_DMA_ICR2 n=%d already set", params n); } if (psxHu32(0x1070) & 8) { - SysPrintf("*PCSX2*: psxHu32(0x1070) 8 already set (n=%d)\n", n); + Console::WriteLn("*PCSX2*: psxHu32(0x1070) 8 already set (n=%d)", params n); }*/ HW_DMA_ICR2|= (1 << (24 + n)); psxRegs.CP0.n.Cause |= 1 << (16 + n); diff --git a/pcsx2/IopMem.cpp b/pcsx2/IopMem.cpp index e32657f704..10989ac42c 100644 --- a/pcsx2/IopMem.cpp +++ b/pcsx2/IopMem.cpp @@ -156,7 +156,7 @@ u8 iopMemRead8(u32 mem) { if (t == 0x1000) return DEV9read8(mem); - PSXMEM_LOG("err lb %8.8lx\n", mem); + PSXMEM_LOG("err lb %8.8lx", mem); return 0; } } @@ -200,7 +200,7 @@ u16 iopMemRead16(u32 mem) ret = psxHu16(mem); break; } - SIF_LOG("Sif reg read %x value %x\n", mem, ret); + SIF_LOG("Sif reg read %x value %x", mem, ret); return ret; } return *(const u16 *)(p + (mem & 0xffff)); @@ -211,7 +211,7 @@ u16 iopMemRead16(u32 mem) return SPU2read(mem); if (t == 0x1000) return DEV9read16(mem); - PSXMEM_LOG("err lh %8.8lx\n", mem); + PSXMEM_LOG("err lh %8.8lx", mem); return 0; } } @@ -261,7 +261,7 @@ u32 iopMemRead32(u32 mem) ret = psxHu32(mem); break; } - SIF_LOG("Sif reg read %x value %x\n", mem, ret); + SIF_LOG("Sif reg read %x value %x", mem, ret); return ret; } return *(const u32 *)(p + (mem & 0xffff)); @@ -301,14 +301,17 @@ void iopMemWrite8(u32 mem, u8 value) } else { - if (t == 0x1D00) SysPrintf("sw8 [0x%08X]=0x%08X\n", mem, value); - if (t == 0x1d00) { - psxSu8(mem) = value; return; + if (t == 0x1d00) + { + Console::WriteLn("sw8 [0x%08X]=0x%08X", params mem, value); + psxSu8(mem) = value; + return; } - if (t == 0x1000) { + if (t == 0x1000) + { DEV9write8(mem, value); return; } - PSXMEM_LOG("err sb %8.8lx = %x\n", mem, value); + PSXMEM_LOG("err sb %8.8lx = %x", mem, value); } } } @@ -329,7 +332,7 @@ void iopMemWrite16(u32 mem, u16 value) u8* p = (u8 *)(psxMemWLUT[mem >> 16]); if (p != NULL && !(psxRegs.CP0.n.Status & 0x10000) ) { - if( t==0x1D00 ) SysPrintf("sw16 [0x%08X]=0x%08X\n", mem, value); + if( t==0x1D00 ) Console::WriteLn("sw16 [0x%08X]=0x%08X", params mem, value); *(u16 *)(p + (mem & 0xffff)) = value; psxCpu->Clear(mem&~3, 1); } @@ -371,7 +374,7 @@ void iopMemWrite16(u32 mem, u16 value) if (t == 0x1000) { DEV9write16(mem, value); return; } - PSXMEM_LOG("err sh %8.8lx = %x\n", mem, value); + PSXMEM_LOG("err sh %8.8lx = %x", mem, value); } } } @@ -400,7 +403,7 @@ void iopMemWrite32(u32 mem, u32 value) { if (t == 0x1d00) { - MEM_LOG("iop Sif reg write %x value %x\n", mem, value); + MEM_LOG("iop Sif reg write %x value %x", mem, value); switch (mem & 0xf0) { case 0x00: // EE write path (EE/IOP readable) diff --git a/pcsx2/IopSio2.cpp b/pcsx2/IopSio2.cpp index c4270b7465..d3ffd8271e 100644 --- a/pcsx2/IopSio2.cpp +++ b/pcsx2/IopSio2.cpp @@ -60,13 +60,13 @@ void sio2Reset() { } u32 sio2_getRecv1() { - PAD_LOG("Reading Recv1 = %x\n",sio2.packet.recvVal1); + PAD_LOG("Reading Recv1 = %x",sio2.packet.recvVal1); return sio2.packet.recvVal1; } u32 sio2_getRecv2() { - PAD_LOG("Reading Recv2 = %x\n",0xF); + PAD_LOG("Reading Recv2 = %x",0xF); return 0xf; }//0, 0x10, 0x20, 0x10 | 0x20; bits 4 & 5 @@ -75,7 +75,7 @@ u32 sio2_getRecv3() { if(sio2.packet.recvVal3 == 0x8C || sio2.packet.recvVal3 == 0x8b || sio2.packet.recvVal3 == 0x83) { - PAD_LOG("Reading Recv3 = %x\n",sio2.packet.recvVal3); + PAD_LOG("Reading Recv3 = %x",sio2.packet.recvVal3); sio.packetsize = sio2.packet.recvVal3; sio2.packet.recvVal3 = 0; // Reset @@ -83,7 +83,7 @@ u32 sio2_getRecv3() { } else { - PAD_LOG("Reading Recv3 = %x\n",sio.packetsize << 16); + PAD_LOG("Reading Recv3 = %x",sio.packetsize << 16); return sio.packetsize << 16; } @@ -103,7 +103,7 @@ void sio2_setSend3(u32 index, u32 value) // for (i=0; i<4; i++){PAD_LOG("0x%08X ", sio2.packet.sendArray2[i]);}PAD_LOG("\n"); // for (i=0; i<8; i++){PAD_LOG("0x%08X ", sio2.packet.sendArray3[i]);}PAD_LOG("\n"); // for ( ; i<16; i++){PAD_LOG("0x%08X ", sio2.packet.sendArray3[i]);}PAD_LOG("\n"); - PAD_LOG("[%d] : 0x%08X\n", index,sio2.packet.sendArray3[index]); + PAD_LOG("[%d] : 0x%08X", index,sio2.packet.sendArray3[index]); // } } //0->15 @@ -148,7 +148,7 @@ void sio2_serialIn(u8 value){ ctrl |= (sio2.packet.sendArray3[sio2.cmdport] & 1) << 13; //sioWriteCtrl16(SIO_RESET); sioWriteCtrl16(ctrl); - PSXDMA_LOG("sio2_fifoIn: ctrl = %x, cmdlength = %x, cmdport = %d (%x)\n", ctrl, sio2.cmdlength, sio2.cmdport, sio2.packet.sendArray3[sio2.cmdport]); + PSXDMA_LOG("sio2_fifoIn: ctrl = %x, cmdlength = %x, cmdport = %d (%x)", ctrl, sio2.cmdlength, sio2.cmdport, sio2.packet.sendArray3[sio2.cmdport]); sio2.cmdport++; } @@ -175,7 +175,7 @@ void sio2_fifoIn(u8 value){ ctrl |= (sio2.packet.sendArray3[sio2.cmdport] & 1) << 13; //sioWriteCtrl16(SIO_RESET); sioWriteCtrl16(ctrl); - PSXDMA_LOG("sio2_fifoIn: ctrl = %x, cmdlength = %x, cmdport = %d (%x)\n", ctrl, sio2.cmdlength, sio2.cmdport, sio2.packet.sendArray3[sio2.cmdport]); + PSXDMA_LOG("sio2_fifoIn: ctrl = %x, cmdlength = %x, cmdport = %d (%x)", ctrl, sio2.cmdlength, sio2.cmdport, sio2.packet.sendArray3[sio2.cmdport]); sio2.cmdport++; } @@ -184,7 +184,7 @@ void sio2_fifoIn(u8 value){ SIODMAWrite(value); if (sio2.packet.sendSize > BUFSIZE) {//asadr - SysPrintf("*PCSX2*: sendSize >= %d\n", BUFSIZE); + Console::WriteLn("*PCSX2*: sendSize >= %d", params BUFSIZE); } else { sio2.buf[sio2.packet.sendSize] = sioRead8(); sio2.packet.sendSize++; @@ -214,7 +214,7 @@ void SaveState::sio2Freeze() void psxDma11(u32 madr, u32 bcr, u32 chcr) { unsigned int i, j; int size = (bcr >> 16) * (bcr & 0xffff); - PSXDMA_LOG("*** DMA 11 - SIO2 in *** %lx addr = %lx size = %lx\n", chcr, madr, bcr); + PSXDMA_LOG("*** DMA 11 - SIO2 in *** %lx addr = %lx size = %lx", chcr, madr, bcr); if (chcr != 0x01000201) return; @@ -243,7 +243,7 @@ void psxDMA11Interrupt() void psxDma12(u32 madr, u32 bcr, u32 chcr) { int size = ((bcr >> 16) * (bcr & 0xFFFF)) * 4; - PSXDMA_LOG("*** DMA 12 - SIO2 out *** %lx addr = %lx size = %lx\n", chcr, madr, size); + PSXDMA_LOG("*** DMA 12 - SIO2 out *** %lx addr = %lx size = %lx", chcr, madr, size); if (chcr != 0x41000200) return; diff --git a/pcsx2/Linux/HacksDlg.cpp b/pcsx2/Linux/HacksDlg.cpp index 7a13ad8d83..1f4a29936f 100644 --- a/pcsx2/Linux/HacksDlg.cpp +++ b/pcsx2/Linux/HacksDlg.cpp @@ -23,11 +23,13 @@ GtkWidget *GameFixDlg, *SpeedHacksDlg; void on_Game_Fixes(GtkMenuItem *menuitem, gpointer user_data) { GameFixDlg = create_GameFixDlg(); + + set_checked(GameFixDlg, "check_VU_Add_Sub", (Config.GameFixes & FLAG_VU_ADD_SUB)); + set_checked(GameFixDlg, "check_VU_Clip", (Config.GameFixes & FLAG_VU_CLIP)); set_checked(GameFixDlg, "check_FPU_Compare", (Config.GameFixes & FLAG_FPU_Compare)); - set_checked(GameFixDlg, "check_VU_Add_Sub", (Config.GameFixes & FLAG_VU_ADD_SUB)); set_checked(GameFixDlg, "check_FPU_Mul", (Config.GameFixes & FLAG_FPU_MUL)); - + gtk_widget_show_all(GameFixDlg); gtk_widget_set_sensitive(MainWindow, FALSE); gtk_main(); @@ -37,11 +39,15 @@ void on_Game_Fix_OK(GtkButton *button, gpointer user_data) { Config.GameFixes = 0; - Config.GameFixes |= is_checked(GameFixDlg, "check_FPU_Compare") ? FLAG_FPU_Compare : 0; + Config.GameFixes |= is_checked(GameFixDlg, "check_VU_Add_Sub") ? FLAG_VU_ADD_SUB : 0; + Config.GameFixes |= is_checked(GameFixDlg, "check_VU_Clip") ? FLAG_VU_CLIP : 0; + + Config.GameFixes |= is_checked(GameFixDlg, "check_FPU_Compare") ? FLAG_FPU_Compare : 0; Config.GameFixes |= is_checked(GameFixDlg, "check_FPU_Mul") ? FLAG_FPU_MUL : 0; SaveConfig(); + gtk_widget_destroy(GameFixDlg); gtk_widget_set_sensitive(MainWindow, TRUE); gtk_main_quit(); diff --git a/pcsx2/Linux/Linux.h b/pcsx2/Linux/Linux.h index fc9b436e44..5ca6f7f9f8 100644 --- a/pcsx2/Linux/Linux.h +++ b/pcsx2/Linux/Linux.h @@ -100,8 +100,12 @@ char iop_log_names[9][32] = "Cdr Log", "GPU Log" }; + //Tri-Ace - IDC_GAMEFIX2 #define FLAG_VU_ADD_SUB 0x1 +// Persona3/4 - IDC_GAMEFIX4 +#define FLAG_VU_CLIP 0x2 + // Digimon Rumble Arena - IDC_GAMEFIX3 #define FLAG_FPU_Compare 0x4 //Tales of Destiny - IDC_GAMEFIX5 diff --git a/pcsx2/Linux/LnxConsole.cpp b/pcsx2/Linux/LnxConsole.cpp index c399b9ec4b..c7dda945d9 100644 --- a/pcsx2/Linux/LnxConsole.cpp +++ b/pcsx2/Linux/LnxConsole.cpp @@ -55,11 +55,11 @@ void Close() __forceinline bool __fastcall Newline() { if (Config.PsxOut) - puts("\n"); + printf("\n"); if (emuLog != NULL) { - fputs("\n", emuLog); + fprintf(emuLog,"\n"); fflush(emuLog); } @@ -68,23 +68,25 @@ __forceinline bool __fastcall Newline() __forceinline bool __fastcall Write(const char* fmt) { - if (Config.PsxOut) - fputs(fmt, stdout); + // By using fputs, append a newline automatically. + if (Config.PsxOut) fputs(fmt, stdout); - if (emuLog != NULL) - fputs(fmt, emuLog); + // Color changing should not use this function, as we don't want the color codes logged, or new lines inserted. + if (emuLog != NULL) fputs(fmt, emuLog); return false; } void __fastcall SetColor(Colors color) { - Write(tbl_color_codes[color]); + // Don't log the color change, and don't insert a new line afterwards. + printf(tbl_color_codes[color]); } void ClearColor() { - Write(COLOR_RESET); + // Don't log the color change, and don't insert a new line afterwards. + printf(COLOR_RESET); } } diff --git a/pcsx2/Linux/interface.c b/pcsx2/Linux/interface.c index 62bceb6fdc..f62270e3d4 100644 --- a/pcsx2/Linux/interface.c +++ b/pcsx2/Linux/interface.c @@ -891,6 +891,7 @@ create_GameFixDlg (void) GtkWidget *check_FPU_Compare; GtkWidget *check_VU_Add_Sub; GtkWidget *check_FPU_Mul; + GtkWidget *check_VU_Clip; GtkWidget *label42; GtkWidget *dialog_action_area1; GtkWidget *cancelbutton1; @@ -937,6 +938,11 @@ create_GameFixDlg (void) gtk_widget_show (check_FPU_Mul); gtk_box_pack_start (GTK_BOX (vbox30), check_FPU_Mul, FALSE, TRUE, 0); + check_VU_Clip = gtk_check_button_new_with_mnemonic (_("VU Clip Hack - Fixes missing ground geometry in Persona.")); + gtk_widget_set_name (check_VU_Clip, "check_VU_Clip"); + gtk_widget_show (check_VU_Clip); + gtk_box_pack_start (GTK_BOX (vbox30), check_VU_Clip, FALSE, FALSE, 0); + label42 = gtk_label_new (_("Some games need special settings.\nConfigure them here.")); gtk_widget_set_name (label42, "label42"); gtk_widget_show (label42); @@ -976,6 +982,7 @@ create_GameFixDlg (void) GLADE_HOOKUP_OBJECT (GameFixDlg, check_FPU_Compare, "check_FPU_Compare"); GLADE_HOOKUP_OBJECT (GameFixDlg, check_VU_Add_Sub, "check_VU_Add_Sub"); GLADE_HOOKUP_OBJECT (GameFixDlg, check_FPU_Mul, "check_FPU_Mul"); + GLADE_HOOKUP_OBJECT (GameFixDlg, check_VU_Clip, "check_VU_Clip"); GLADE_HOOKUP_OBJECT (GameFixDlg, label42, "label42"); GLADE_HOOKUP_OBJECT_NO_REF (GameFixDlg, dialog_action_area1, "dialog_action_area1"); GLADE_HOOKUP_OBJECT (GameFixDlg, cancelbutton1, "cancelbutton1"); diff --git a/pcsx2/Linux/pcsx2.glade b/pcsx2/Linux/pcsx2.glade index 103e4c2b04..4e2513352c 100644 --- a/pcsx2/Linux/pcsx2.glade +++ b/pcsx2/Linux/pcsx2.glade @@ -1923,6 +1923,25 @@ Known to work well with a couple games, namely Shadow of the Colossus (but break True + + + + True + True + VU Clip Hack - Fixes missing ground geometry in Persona. + True + GTK_RELIEF_NORMAL + True + False + False + True + + + 0 + False + False + + diff --git a/pcsx2/MMI.cpp b/pcsx2/MMI.cpp index f4948bc151..49b525d705 100644 --- a/pcsx2/MMI.cpp +++ b/pcsx2/MMI.cpp @@ -113,11 +113,22 @@ namespace OpcodeImpl { if (_Rd_) cpuRegs.GPR.r[_Rd_].UD[0] = cpuRegs.LO.UD[1]; } - void DIV1() { - if (cpuRegs.GPR.r[_Rt_].SL[0] != 0) { + void DIV1() { + if (cpuRegs.GPR.r[_Rs_].UL[0] == 0x80000000 && cpuRegs.GPR.r[_Rt_].UL[0] == 0xffffffff) + { + cpuRegs.LO.SD[1] = (s32)0x80000000; + cpuRegs.HI.SD[1] = (s32)0x0; + } + else if (cpuRegs.GPR.r[_Rt_].SL[0] != 0) + { cpuRegs.LO.SD[1] = cpuRegs.GPR.r[_Rs_].SL[0] / cpuRegs.GPR.r[_Rt_].SL[0]; cpuRegs.HI.SD[1] = cpuRegs.GPR.r[_Rs_].SL[0] % cpuRegs.GPR.r[_Rt_].SL[0]; } + else + { + cpuRegs.LO.SD[1] = (cpuRegs.GPR.r[_Rs_].SL[0] < 0) ? 1 : -1; + cpuRegs.HI.SD[1] = cpuRegs.GPR.r[_Rs_].SL[0]; + } } void DIVU1() @@ -129,6 +140,11 @@ namespace OpcodeImpl { cpuRegs.LO.SD[1] = (s32)(cpuRegs.GPR.r[_Rs_].UL[0] / cpuRegs.GPR.r[_Rt_].UL[0]); cpuRegs.HI.SD[1] = (s32)(cpuRegs.GPR.r[_Rs_].UL[0] % cpuRegs.GPR.r[_Rt_].UL[0]); } + else + { + cpuRegs.LO.SD[1] = -1; + cpuRegs.HI.SD[1] = cpuRegs.GPR.r[_Rs_].SL[0]; + } } namespace MMI { @@ -187,19 +203,19 @@ void PMFHL() { case 0x02: // SLW { - u64 TempU64 = ((u64)cpuRegs.HI.UL[0] << 32) | (u64)cpuRegs.LO.UL[0]; - if (TempU64 >= 0x000000007fffffffLL) { + s64 TempS64 = ((u64)cpuRegs.HI.UL[0] << 32) | (u64)cpuRegs.LO.UL[0]; + if (TempS64 >= 0x000000007fffffffLL) { cpuRegs.GPR.r[_Rd_].UD[0] = 0x000000007fffffffLL; - } else if (TempU64 <= 0xffffffff80000000LL) { + } else if (TempS64 <= 0xffffffff80000000LL) { cpuRegs.GPR.r[_Rd_].UD[0] = 0xffffffff80000000LL; } else { cpuRegs.GPR.r[_Rd_].UD[0] = (s64)cpuRegs.LO.SL[0]; } - TempU64 = ((u64)cpuRegs.HI.UL[2] << 32) | (u64)cpuRegs.LO.UL[2]; - if (TempU64 >= 0x000000007fffffffLL) { + TempS64 = ((u64)cpuRegs.HI.UL[2] << 32) | (u64)cpuRegs.LO.UL[2]; + if (TempS64 >= 0x000000007fffffffLL) { cpuRegs.GPR.r[_Rd_].UD[1] = 0x000000007fffffffLL; - } else if (TempU64 <= 0xffffffff80000000LL) { + } else if (TempS64 <= 0xffffffff80000000LL) { cpuRegs.GPR.r[_Rd_].UD[1] = 0xffffffff80000000LL; } else { cpuRegs.GPR.r[_Rd_].UD[1] = (s64)cpuRegs.LO.SL[2]; @@ -603,7 +619,7 @@ __forceinline void _PADDSB(int n) if (sTemp16 > 0x7F) cpuRegs.GPR.r[_Rd_].UC[n] = 0x7F; - else if ((sTemp16 < 0x180) && (sTemp16 >= 0x100)) + else if (sTemp16 < (s16)0xff80) cpuRegs.GPR.r[_Rd_].UC[n] = 0x80; else cpuRegs.GPR.r[_Rd_].UC[n] = (s8)sTemp16; @@ -624,7 +640,7 @@ static __forceinline void _PSUBSB( u8 n ) if (sTemp16 >= 0x7F) cpuRegs.GPR.r[_Rd_].UC[n] = 0x7F; - else if ((sTemp16 < 0x180) && (sTemp16 >= 0x100)) + else if (sTemp16 <= (s16)0xff80) cpuRegs.GPR.r[_Rd_].UC[n] = 0x80; else cpuRegs.GPR.r[_Rd_].UC[n] = (s8)sTemp16; @@ -727,7 +743,12 @@ void PPAC5() { __forceinline void _PABSW(int n) { - cpuRegs.GPR.r[_Rd_].UL[n] = abs(cpuRegs.GPR.r[_Rt_].SL[n]); + if (cpuRegs.GPR.r[_Rt_].UL[n] == 0x80000000) + cpuRegs.GPR.r[_Rd_].UL[n] = 0x7fffffff; //clamp + else if (cpuRegs.GPR.r[_Rt_].SL[n] < 0) + cpuRegs.GPR.r[_Rd_].UL[n] = - cpuRegs.GPR.r[_Rt_].SL[n]; + else + cpuRegs.GPR.r[_Rd_].UL[n] = cpuRegs.GPR.r[_Rt_].SL[n]; } void PABSW() { @@ -773,7 +794,12 @@ void PADSBH() { __forceinline void _PABSH(int n) { - cpuRegs.GPR.r[_Rd_].US[n] = abs(cpuRegs.GPR.r[_Rt_].SS[n]); + if (cpuRegs.GPR.r[_Rt_].US[n] == 0x8000) + cpuRegs.GPR.r[_Rd_].US[n] = 0x7fff; //clamp + else if (cpuRegs.GPR.r[_Rt_].SS[n] < 0) + cpuRegs.GPR.r[_Rd_].US[n] = - cpuRegs.GPR.r[_Rt_].SS[n]; + else + cpuRegs.GPR.r[_Rd_].US[n] = cpuRegs.GPR.r[_Rt_].SS[n]; } void PABSH() { @@ -994,38 +1020,39 @@ void QFSRV() { // JayteeMaster: changed a bit to avoid screw up GPR_reg Rd; if (!_Rd_) return; - if (cpuRegs.sa == 0) { + u32 sa_amt = cpuRegs.sa << 3; + if (sa_amt == 0) { cpuRegs.GPR.r[_Rd_].UD[0] = cpuRegs.GPR.r[_Rt_].UD[0]; cpuRegs.GPR.r[_Rd_].UD[1] = cpuRegs.GPR.r[_Rt_].UD[1]; //saZero++; //if( saZero >= 388800 ) //Console::WriteLn( "SA Is Zero, Bitch: %d zeros and counting.", params saZero ); } else { - //Console::WriteLn( "SA Properly Valued at: %d (after %d zeros)", params cpuRegs.sa, saZero ); + //Console::WriteLn( "SA Properly Valued at: %d (after %d zeros)", params sa_amt, saZero ); //saZero = 0; - if (cpuRegs.sa < 64) { + if (sa_amt < 64) { /* - cpuRegs.GPR.r[_Rd_].UD[0] = cpuRegs.GPR.r[_Rt_].UD[0] >> cpuRegs.sa; - cpuRegs.GPR.r[_Rd_].UD[1] = cpuRegs.GPR.r[_Rt_].UD[1] >> cpuRegs.sa; - cpuRegs.GPR.r[_Rd_].UD[0]|= cpuRegs.GPR.r[_Rt_].UD[1] << (64 - cpuRegs.sa); - cpuRegs.GPR.r[_Rd_].UD[1]|= cpuRegs.GPR.r[_Rs_].UD[0] << (64 - cpuRegs.sa); + cpuRegs.GPR.r[_Rd_].UD[0] = cpuRegs.GPR.r[_Rt_].UD[0] >> sa_amt; + cpuRegs.GPR.r[_Rd_].UD[1] = cpuRegs.GPR.r[_Rt_].UD[1] >> sa_amt; + cpuRegs.GPR.r[_Rd_].UD[0]|= cpuRegs.GPR.r[_Rt_].UD[1] << (64 - sa_amt); + cpuRegs.GPR.r[_Rd_].UD[1]|= cpuRegs.GPR.r[_Rs_].UD[0] << (64 - sa_amt); */ - Rd.UD[0] = cpuRegs.GPR.r[_Rt_].UD[0] >> cpuRegs.sa; - Rd.UD[1] = cpuRegs.GPR.r[_Rt_].UD[1] >> cpuRegs.sa; - Rd.UD[0]|= cpuRegs.GPR.r[_Rt_].UD[1] << (64 - cpuRegs.sa); - Rd.UD[1]|= cpuRegs.GPR.r[_Rs_].UD[0] << (64 - cpuRegs.sa); + Rd.UD[0] = cpuRegs.GPR.r[_Rt_].UD[0] >> sa_amt; + Rd.UD[1] = cpuRegs.GPR.r[_Rt_].UD[1] >> sa_amt; + Rd.UD[0]|= cpuRegs.GPR.r[_Rt_].UD[1] << (64 - sa_amt); + Rd.UD[1]|= cpuRegs.GPR.r[_Rs_].UD[0] << (64 - sa_amt); cpuRegs.GPR.r[_Rd_] = Rd; } else { /* - cpuRegs.GPR.r[_Rd_].UD[0] = cpuRegs.GPR.r[_Rt_].UD[1] >> (cpuRegs.sa - 64); - cpuRegs.GPR.r[_Rd_].UD[1] = cpuRegs.GPR.r[_Rs_].UD[0] >> (cpuRegs.sa - 64); - cpuRegs.GPR.r[_Rd_].UD[0]|= cpuRegs.GPR.r[_Rs_].UD[0] << (128 - cpuRegs.sa); - cpuRegs.GPR.r[_Rd_].UD[1]|= cpuRegs.GPR.r[_Rs_].UD[1] << (128 - cpuRegs.sa); + cpuRegs.GPR.r[_Rd_].UD[0] = cpuRegs.GPR.r[_Rt_].UD[1] >> (sa_amt - 64); + cpuRegs.GPR.r[_Rd_].UD[1] = cpuRegs.GPR.r[_Rs_].UD[0] >> (sa_amt - 64); + cpuRegs.GPR.r[_Rd_].UD[0]|= cpuRegs.GPR.r[_Rs_].UD[0] << (128 - sa_amt); + cpuRegs.GPR.r[_Rd_].UD[1]|= cpuRegs.GPR.r[_Rs_].UD[1] << (128 - sa_amt); */ - Rd.UD[0] = cpuRegs.GPR.r[_Rt_].UD[1] >> (cpuRegs.sa - 64); - Rd.UD[1] = cpuRegs.GPR.r[_Rs_].UD[0] >> (cpuRegs.sa - 64); - Rd.UD[0]|= cpuRegs.GPR.r[_Rs_].UD[0] << (128 - cpuRegs.sa); - Rd.UD[1]|= cpuRegs.GPR.r[_Rs_].UD[1] << (128 - cpuRegs.sa); + Rd.UD[0] = cpuRegs.GPR.r[_Rt_].UD[1] >> (sa_amt - 64); + Rd.UD[1] = cpuRegs.GPR.r[_Rs_].UD[0] >> (sa_amt - 64); + Rd.UD[0]|= cpuRegs.GPR.r[_Rs_].UD[0] << (128 - sa_amt); + Rd.UD[1]|= cpuRegs.GPR.r[_Rs_].UD[1] << (128 - sa_amt); cpuRegs.GPR.r[_Rd_] = Rd; } } @@ -1132,11 +1159,21 @@ void PMULTW() { __forceinline void _PDIVW(int dd, int ss) { - if (cpuRegs.GPR.r[_Rt_].UL[ss] != 0) + if (cpuRegs.GPR.r[_Rs_].UL[ss] == 0x80000000 && cpuRegs.GPR.r[_Rt_].UL[ss] == 0xffffffff) + { + cpuRegs.LO.SD[dd] = (s32)0x80000000; + cpuRegs.HI.SD[dd] = (s32)0; + } + else if (cpuRegs.GPR.r[_Rt_].SL[ss] != 0) { cpuRegs.LO.SD[dd] = cpuRegs.GPR.r[_Rs_].SL[ss] / cpuRegs.GPR.r[_Rt_].SL[ss]; cpuRegs.HI.SD[dd] = cpuRegs.GPR.r[_Rs_].SL[ss] % cpuRegs.GPR.r[_Rt_].SL[ss]; } + else + { + cpuRegs.LO.SD[dd] = (cpuRegs.GPR.r[_Rs_].SL[ss] < 0) ? 1 : -1; + cpuRegs.HI.SD[dd] = cpuRegs.GPR.r[_Rs_].SL[ss]; + } } void PDIVW() { @@ -1196,18 +1233,20 @@ void PMADDH() { // JayteeMaster: changed a bit to avoid screw up // JayteeMaster: changed a bit to avoid screw up __forceinline void _PHMADH_LO(int dd, int n) { - s32 temp = (s32)cpuRegs.GPR.r[_Rs_].SS[n+1] * (s32)cpuRegs.GPR.r[_Rt_].SS[n+1] + \ - (s32)cpuRegs.GPR.r[_Rs_].SS[n] * (s32)cpuRegs.GPR.r[_Rt_].SS[n]; + s32 firsttemp = (s32)cpuRegs.GPR.r[_Rs_].SS[n+1] * (s32)cpuRegs.GPR.r[_Rt_].SS[n+1]; + s32 temp = firsttemp + (s32)cpuRegs.GPR.r[_Rs_].SS[n] * (s32)cpuRegs.GPR.r[_Rt_].SS[n]; cpuRegs.LO.UL[dd] = temp; + cpuRegs.LO.UL[dd+1] = firsttemp; } __forceinline void _PHMADH_HI(int dd, int n) { - s32 temp = (s32)cpuRegs.GPR.r[_Rs_].SS[n+1] * (s32)cpuRegs.GPR.r[_Rt_].SS[n+1] + \ - (s32)cpuRegs.GPR.r[_Rs_].SS[n] * (s32)cpuRegs.GPR.r[_Rt_].SS[n]; + s32 firsttemp = (s32)cpuRegs.GPR.r[_Rs_].SS[n+1] * (s32)cpuRegs.GPR.r[_Rt_].SS[n+1]; + s32 temp = firsttemp + (s32)cpuRegs.GPR.r[_Rs_].SS[n] * (s32)cpuRegs.GPR.r[_Rt_].SS[n]; cpuRegs.HI.UL[dd] = temp; + cpuRegs.HI.UL[dd+1] = firsttemp; } void PHMADH() { // JayteeMaster: changed a bit to avoid screw up. Also used 0,2,4,6 instead of 0,1,2,3 @@ -1279,17 +1318,19 @@ void PMSUBH() { // JayteeMaster: changed a bit to avoid screw up // JayteeMaster: changed a bit to avoid screw up __forceinline void _PHMSBH_LO(int dd, int n, int rdd) { - s32 temp = (s32)cpuRegs.GPR.r[_Rs_].SS[n+1] * (s32)cpuRegs.GPR.r[_Rt_].SS[n+1] - \ - (s32)cpuRegs.GPR.r[_Rs_].SS[n] * (s32)cpuRegs.GPR.r[_Rt_].SS[n]; + s32 firsttemp = (s32)cpuRegs.GPR.r[_Rs_].SS[n+1] * (s32)cpuRegs.GPR.r[_Rt_].SS[n+1]; + s32 temp = firsttemp - (s32)cpuRegs.GPR.r[_Rs_].SS[n] * (s32)cpuRegs.GPR.r[_Rt_].SS[n]; cpuRegs.LO.UL[dd] = temp; + cpuRegs.LO.UL[dd+1] = ~firsttemp; } __forceinline void _PHMSBH_HI(int dd, int n, int rdd) { - s32 temp = (s32)cpuRegs.GPR.r[_Rs_].SS[n+1] * (s32)cpuRegs.GPR.r[_Rt_].SS[n+1] - \ - (s32)cpuRegs.GPR.r[_Rs_].SS[n] * (s32)cpuRegs.GPR.r[_Rt_].SS[n]; + s32 firsttemp = (s32)cpuRegs.GPR.r[_Rs_].SS[n+1] * (s32)cpuRegs.GPR.r[_Rt_].SS[n+1]; + s32 temp = firsttemp - (s32)cpuRegs.GPR.r[_Rs_].SS[n] * (s32)cpuRegs.GPR.r[_Rt_].SS[n]; cpuRegs.HI.UL[dd] = temp; + cpuRegs.HI.UL[dd+1] = ~firsttemp; } void PHMSBH() { // JayteeMaster: changed a bit to avoid screw up @@ -1378,13 +1419,24 @@ void PMULTH() { // JayteeMaster: changed a bit to avoid screw up __forceinline void _PDIVBW(int n) { - cpuRegs.LO.UL[n] = (s32)(cpuRegs.GPR.r[_Rs_].SL[n] / cpuRegs.GPR.r[_Rt_].SS[0]); - cpuRegs.HI.UL[n] = (s16)(cpuRegs.GPR.r[_Rs_].SL[n] % cpuRegs.GPR.r[_Rt_].SS[0]); + if (cpuRegs.GPR.r[_Rs_].UL[n] == 0x80000000 && cpuRegs.GPR.r[_Rt_].US[0] == 0xffff) + { + cpuRegs.LO.SL[n] = (s32)0x80000000; + cpuRegs.HI.SL[n] = (s32)0x0; + } + else if (cpuRegs.GPR.r[_Rt_].US[0] != 0) + { + cpuRegs.LO.SL[n] = cpuRegs.GPR.r[_Rs_].SL[n] / cpuRegs.GPR.r[_Rt_].SS[0]; + cpuRegs.HI.SL[n] = cpuRegs.GPR.r[_Rs_].SL[n] % cpuRegs.GPR.r[_Rt_].SS[0]; + } + else + { + cpuRegs.LO.SL[n] = (cpuRegs.GPR.r[_Rs_].SL[n] < 0) ? 1 : -1; + cpuRegs.HI.SL[n] = cpuRegs.GPR.r[_Rs_].SL[n]; + } } void PDIVBW() { - if (cpuRegs.GPR.r[_Rt_].US[0] == 0) return; - _PDIVBW(0); _PDIVBW(1); _PDIVBW(2); _PDIVBW(3); } @@ -1486,8 +1538,13 @@ void PMULTUW() { __forceinline void _PDIVUW(int dd, int ss) { if (cpuRegs.GPR.r[_Rt_].UL[ss] != 0) { - cpuRegs.LO.UD[dd] = (u64)cpuRegs.GPR.r[_Rs_].UL[ss] / (u64)cpuRegs.GPR.r[_Rt_].UL[ss]; - cpuRegs.HI.UD[dd] = (u64)cpuRegs.GPR.r[_Rs_].UL[ss] % (u64)cpuRegs.GPR.r[_Rt_].UL[ss]; + cpuRegs.LO.SD[dd] = (s32)(cpuRegs.GPR.r[_Rs_].UL[ss] / cpuRegs.GPR.r[_Rt_].UL[ss]); + cpuRegs.HI.SD[dd] = (s32)(cpuRegs.GPR.r[_Rs_].UL[ss] % cpuRegs.GPR.r[_Rt_].UL[ss]); + } + else + { + cpuRegs.LO.SD[dd] = -1; + cpuRegs.HI.SD[dd] = cpuRegs.GPR.r[_Rs_].SL[ss]; } } diff --git a/pcsx2/MTGS.cpp b/pcsx2/MTGS.cpp index bc94623e9b..dacea2eeea 100644 --- a/pcsx2/MTGS.cpp +++ b/pcsx2/MTGS.cpp @@ -290,7 +290,7 @@ __forceinline u32 mtgsThreadObject::_gifTransferDummy( GIF_PATH pathidx, const u --size; if(pathidx == 2 && path.tag.eop) - Path3transfer = 0; + Path3transfer = FALSE; if( pathidx == 0 ) { @@ -327,7 +327,7 @@ __forceinline u32 mtgsThreadObject::_gifTransferDummy( GIF_PATH pathidx, const u } else if(path.tag.nloop == 0) { - if(pathidx == 0 && g_FFXHack) + if(pathidx == 0) continue; eop = true; @@ -952,7 +952,7 @@ int mtgsThreadObject::PrepDataPacket( GIF_PATH pathidx, const u8* srcdata, u32 s else // always true - if( writepos + size == MTGS_RINGBUFFEREND ) { // Yay. Perfect fit. What are the odds? - //SysPrintf( "MTGS > Perfect Fit!\n"); + //Console::WriteLn( "MTGS > Perfect Fit!"); PrepEventWait(); while( true ) diff --git a/pcsx2/Mdec.cpp b/pcsx2/Mdec.cpp index 839c84669b..8a8f84ddf9 100644 --- a/pcsx2/Mdec.cpp +++ b/pcsx2/Mdec.cpp @@ -156,7 +156,7 @@ void mdecInit(void) { void mdecWrite0(u32 data) { - CDR_LOG("mdec0 write %lx\n", data); + CDR_LOG("mdec0 write %lx", data); mdec.command = data; if ((data&0xf5ff0000)==0x30000000) { @@ -165,7 +165,7 @@ void mdecWrite0(u32 data) { } void mdecWrite1(u32 data) { - CDR_LOG("mdec1 write %lx\n", data); + CDR_LOG("mdec1 write %lx", data); if (data&0x80000000) { // mdec reset round_init(); @@ -174,14 +174,14 @@ void mdecWrite1(u32 data) { } u32 mdecRead0(void) { - CDR_LOG("mdec0 read %lx\n", mdec.command); + CDR_LOG("mdec0 read %lx", mdec.command); return mdec.command; } u32 mdecRead1(void) { #ifdef CDR_LOG - CDR_LOG("mdec1 read %lx\n", mdec.status); + CDR_LOG("mdec1 read %lx", mdec.status); #endif return mdec.status; } @@ -190,7 +190,7 @@ void psxDma0(u32 adr, u32 bcr, u32 chcr) { int cmd = mdec.command; int size; - CDR_LOG("DMA0 %lx %lx %lx\n", adr, bcr, chcr); + CDR_LOG("DMA0 %lx %lx %lx", adr, bcr, chcr); if (chcr!=0x01000201) return; @@ -214,7 +214,7 @@ void psxDma1(u32 adr, u32 bcr, u32 chcr) { unsigned short *image; int size; - CDR_LOG("DMA1 %lx %lx %lx (cmd = %lx)\n", adr, bcr, chcr, mdec.command); + CDR_LOG("DMA1 %lx %lx %lx (cmd = %lx)", adr, bcr, chcr, mdec.command); if (chcr!=0x01000200) return; diff --git a/pcsx2/Memory.cpp b/pcsx2/Memory.cpp index 2e02c84603..b30a545335 100644 --- a/pcsx2/Memory.cpp +++ b/pcsx2/Memory.cpp @@ -71,7 +71,7 @@ void memSetUserMode() { u16 ba0R16(u32 mem) { - //MEM_LOG("ba00000 Memory read16 address %x\n", mem); + //MEM_LOG("ba00000 Memory read16 address %x", mem); if (mem == 0x1a000006) { static int ba6; @@ -132,7 +132,7 @@ u8 *psS = NULL; //0.015 mb, scratch pad void MyMemCheck(u32 mem) { if( mem == 0x1c02f2a0 ) - SysPrintf("yo\n"); + Console::WriteLn("yo; (mem == 0x1c02f2a0) in MyMemCheck..."); } ///////////////////////////// @@ -254,12 +254,12 @@ mem8_t __fastcall _ext_memRead8 (u32 mem) case 7: // dev9 { mem8_t retval = DEV9read8(mem & ~0xa4000000); - SysPrintf("DEV9 read8 %8.8lx: %2.2lx\n", mem & ~0xa4000000, retval); + Console::WriteLn("DEV9 read8 %8.8lx: %2.2lx", params mem & ~0xa4000000, retval); return retval; } } - MEM_LOG("Unknown Memory Read8 from address %8.8x\n", mem); + MEM_LOG("Unknown Memory Read8 from address %8.8x", mem); cpuTlbMissR(mem, cpuRegs.branch); return 0; } @@ -274,7 +274,7 @@ mem16_t __fastcall _ext_memRead16(u32 mem) case 2: // psh return psxHwRead16(mem); case 4: // b80 - MEM_LOG("b800000 Memory read16 address %x\n", mem); + MEM_LOG("b800000 Memory read16 address %x", mem); return 0; case 5: // ba0 return ba0R16(mem); @@ -284,14 +284,14 @@ mem16_t __fastcall _ext_memRead16(u32 mem) case 7: // dev9 { mem16_t retval = DEV9read16(mem & ~0xa4000000); - SysPrintf("DEV9 read16 %8.8lx: %4.4lx\n", mem & ~0xa4000000, retval); + Console::WriteLn("DEV9 read16 %8.8lx: %4.4lx", params mem & ~0xa4000000, retval); return retval; } case 8: // spu2 return SPU2read(mem); } - MEM_LOG("Unknown Memory read16 from address %8.8x\n", mem); + MEM_LOG("Unknown Memory read16 from address %8.8x", mem); cpuTlbMissR(mem, cpuRegs.branch); return 0; } @@ -308,12 +308,12 @@ mem32_t __fastcall _ext_memRead32(u32 mem) case 7: // dev9 { mem32_t retval = DEV9read32(mem & ~0xa4000000); - SysPrintf("DEV9 read32 %8.8lx: %8.8lx\n", mem & ~0xa4000000, retval); + Console::WriteLn("DEV9 read32 %8.8lx: %8.8lx", params mem & ~0xa4000000, retval); return retval; } } - MEM_LOG("Unknown Memory read32 from address %8.8x (Status=%8.8x)\n", mem, cpuRegs.CP0.n.Status.val); + MEM_LOG("Unknown Memory read32 from address %8.8x (Status=%8.8x)", mem, cpuRegs.CP0.n.Status.val); cpuTlbMissR(mem, cpuRegs.branch); return 0; } @@ -327,7 +327,7 @@ void __fastcall _ext_memRead64(u32 mem, mem64_t *out) *out = gsRead64(mem); return; } - MEM_LOG("Unknown Memory read64 from address %8.8x\n", mem); + MEM_LOG("Unknown Memory read64 from address %8.8x", mem); cpuTlbMissR(mem, cpuRegs.branch); } @@ -343,7 +343,7 @@ void __fastcall _ext_memRead128(u32 mem, mem128_t *out) out[1] = gsRead64(mem+8); return; } - MEM_LOG("Unknown Memory read128 from address %8.8x\n", mem); + MEM_LOG("Unknown Memory read128 from address %8.8x", mem); cpuTlbMissR(mem, cpuRegs.branch); } @@ -362,11 +362,11 @@ void __fastcall _ext_memWrite8 (u32 mem, u8 value) gsWrite8(mem, value); return; case 7: // dev9 DEV9write8(mem & ~0xa4000000, value); - SysPrintf("DEV9 write8 %8.8lx: %2.2lx\n", mem & ~0xa4000000, value); + Console::WriteLn("DEV9 write8 %8.8lx: %2.2lx", params mem & ~0xa4000000, value); return; } - MEM_LOG("Unknown Memory write8 to address %x with data %2.2x\n", mem, value); + MEM_LOG("Unknown Memory write8 to address %x with data %2.2x", mem, value); cpuTlbMissW(mem, cpuRegs.branch); } template @@ -379,18 +379,18 @@ void __fastcall _ext_memWrite16(u32 mem, u16 value) case 2: // psh psxHwWrite16(mem, value); return; case 5: // ba0 - MEM_LOG("ba00000 Memory write16 to address %x with data %x\n", mem, value); + MEM_LOG("ba00000 Memory write16 to address %x with data %x", mem, value); return; case 6: // gsm gsWrite16(mem, value); return; case 7: // dev9 DEV9write16(mem & ~0xa4000000, value); - SysPrintf("DEV9 write16 %8.8lx: %4.4lx\n", mem & ~0xa4000000, value); + Console::WriteLn("DEV9 write16 %8.8lx: %4.4lx", params mem & ~0xa4000000, value); return; case 8: // spu2 SPU2write(mem, value); return; } - MEM_LOG("Unknown Memory write16 to address %x with data %4.4x\n", mem, value); + MEM_LOG("Unknown Memory write16 to address %x with data %4.4x", mem, value); cpuTlbMissW(mem, cpuRegs.branch); } @@ -404,10 +404,10 @@ void __fastcall _ext_memWrite32(u32 mem, u32 value) gsWrite32(mem, value); return; case 7: // dev9 DEV9write32(mem & ~0xa4000000, value); - SysPrintf("DEV9 write32 %8.8lx: %8.8lx\n", mem & ~0xa4000000, value); + Console::WriteLn("DEV9 write32 %8.8lx: %8.8lx", params mem & ~0xa4000000, value); return; } - MEM_LOG("Unknown Memory write32 to address %x with data %8.8x\n", mem, value); + MEM_LOG("Unknown Memory write32 to address %x with data %8.8x", mem, value); cpuTlbMissW(mem, cpuRegs.branch); } @@ -423,7 +423,7 @@ void __fastcall _ext_memWrite64(u32 mem, const u64* value) // gsWrite64(mem & ~0xa0000000, *value); return; }*/ - MEM_LOG("Unknown Memory write64 to address %x with data %8.8x_%8.8x\n", mem, (u32)(*value>>32), (u32)*value); + MEM_LOG("Unknown Memory write64 to address %x with data %8.8x_%8.8x", mem, (u32)(*value>>32), (u32)*value); cpuTlbMissW(mem, cpuRegs.branch); } @@ -440,7 +440,7 @@ void __fastcall _ext_memWrite128(u32 mem, const u64 *value) // gsWrite64(mem+8, value[1]); return; }*/ - MEM_LOG("Unknown Memory write128 to address %x with data %8.8x_%8.8x_%8.8x_%8.8x\n", mem, ((u32*)value)[3], ((u32*)value)[2], ((u32*)value)[1], ((u32*)value)[0]); + MEM_LOG("Unknown Memory write128 to address %x with data %8.8x_%8.8x_%8.8x_%8.8x", mem, ((u32*)value)[3], ((u32*)value)[2], ((u32*)value)[1], ((u32*)value)[0]); cpuTlbMissW(mem, cpuRegs.branch); } @@ -588,7 +588,7 @@ void __fastcall vuMicroWrite128(u32 addr,const mem128_t* data) void memSetPageAddr(u32 vaddr, u32 paddr) { - //SysPrintf("memSetPageAddr: %8.8x -> %8.8x\n", vaddr, paddr); + //Console::WriteLn("memSetPageAddr: %8.8x -> %8.8x", params vaddr, paddr); vtlb_VMap(vaddr,paddr,0x1000); @@ -596,7 +596,7 @@ void memSetPageAddr(u32 vaddr, u32 paddr) void memClearPageAddr(u32 vaddr) { - //SysPrintf("memClearPageAddr: %8.8x\n", vaddr); + //Console::WriteLn("memClearPageAddr: %8.8x", params vaddr); vtlb_VMapUnmap(vaddr,0x1000); // -> whut ? diff --git a/pcsx2/Patch.cpp b/pcsx2/Patch.cpp index 30414ac479..5284d16395 100644 --- a/pcsx2/Patch.cpp +++ b/pcsx2/Patch.cpp @@ -653,7 +653,8 @@ int AddPatch(int Mode, int Place, int Address, int Size, u64 data) void patchFunc_ffxhack( char * cmd, char * param ) { - g_FFXHack = 1; + //Keeping this as a dummy a while :p + //g_FFXHack = 1; } void patchFunc_xkickdelay( char * cmd, char * param ) @@ -674,7 +675,7 @@ void patchFunc_vunanmode( char * cmd, char * param ) void patchFunc_path3hack( char * cmd, char * param ) { - path3hack = 1; + path3hack = TRUE; } void patchFunc_roundmode( char * cmd, char * param ) diff --git a/pcsx2/Patch.h b/pcsx2/Patch.h index 3604944e66..e032614d51 100644 --- a/pcsx2/Patch.h +++ b/pcsx2/Patch.h @@ -109,8 +109,7 @@ int AddPatch(int Mode, int Place, int Address, int Size, u64 data); extern void SetFastMemory(int); // iR5900LoadStore.c -extern int path3hack; -extern int g_FFXHack; +extern bool path3hack; //extern int g_VUGameFixes; extern int g_ZeroGSOptions; extern u32 g_sseMXCSR; diff --git a/pcsx2/Plugins.cpp b/pcsx2/Plugins.cpp index 8576cf9215..b1c64c3949 100644 --- a/pcsx2/Plugins.cpp +++ b/pcsx2/Plugins.cpp @@ -5,12 +5,12 @@ * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. - * + * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. - * + * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA @@ -72,6 +72,8 @@ _PADconfigure PAD1configure; _PADtest PAD1test; _PADabout PAD1about; _PADfreeze PAD1freeze; +_PADsetSlot PAD1setSlot; +_PADqueryMtap PAD1queryMtap; // PAD2 _PADinit PAD2init; @@ -89,6 +91,8 @@ _PADconfigure PAD2configure; _PADtest PAD2test; _PADabout PAD2about; _PADfreeze PAD2freeze; +_PADsetSlot PAD2setSlot; +_PADqueryMtap PAD2queryMtap; // SIO[2] _SIOinit SIOinit[2][9]; @@ -223,7 +227,7 @@ USBhandler usbHandler; const char* errString = SysLibError(); \ Msgbox::Alert("%s: Error loading %hs: %s", params &filename, #name, errString); \ return -1; \ -} +} #define MapSymbol(name) MapSymbolVar(name,name) #define MapSymbol_Fallback(name,fallback) MapSymbolVar_Fallback(name,name,fallback) @@ -269,7 +273,7 @@ void CALLBACK GS_printf(int timeout, char *fmt, ...) { vsprintf(msg, fmt, list); va_end(list); - SysPrintf(msg); + Console::WriteLn(msg); } s32 CALLBACK GS_freeze(int mode, freezeData *data) { data->size = 0; return 0; } @@ -332,7 +336,9 @@ void *PAD1plugin; void CALLBACK PAD1_configure() {} void CALLBACK PAD1_about() {} s32 CALLBACK PAD1_test() { return 0; } -s32 CALLBACK PAD1_freeze(int mode, freezeData *data) { data->size = 0; return 0; } +s32 CALLBACK PAD1_freeze(int mode, freezeData *data) { if (mode == FREEZE_SIZE) data->size = 0; return 0; } +s32 CALLBACK PAD1_setSlot(u8 port, u8 slot) { return slot == 1; } +s32 CALLBACK PAD1_queryMtap(u8 port) { return 0; } int LoadPAD1plugin(const string& filename) { void *drv; @@ -356,6 +362,8 @@ int LoadPAD1plugin(const string& filename) { MapSymbolPAD_Fallback(PAD1,PAD,about); MapSymbolPAD_Fallback(PAD1,PAD,test); MapSymbolPAD_Fallback(PAD1,PAD,freeze); + MapSymbolPAD_Fallback(PAD1,PAD,setSlot); + MapSymbolPAD_Fallback(PAD1,PAD,queryMtap); return 0; } @@ -365,7 +373,9 @@ void *PAD2plugin; void CALLBACK PAD2_configure() {} void CALLBACK PAD2_about() {} s32 CALLBACK PAD2_test() { return 0; } -s32 CALLBACK PAD2_freeze(int mode, freezeData *data) { data->size = 0; return 0; } +s32 CALLBACK PAD2_freeze(int mode, freezeData *data) { if (mode == FREEZE_SIZE) data->size = 0; return 0; } +s32 CALLBACK PAD2_setSlot(u8 port, u8 slot) { return slot == 1; } +s32 CALLBACK PAD2_queryMtap(u8 port) { return 0; } int LoadPAD2plugin(const string& filename) { void *drv; @@ -389,6 +399,8 @@ int LoadPAD2plugin(const string& filename) { MapSymbolPAD_Fallback(PAD2,PAD,about); MapSymbolPAD_Fallback(PAD2,PAD,test); MapSymbolPAD_Fallback(PAD2,PAD,freeze); + MapSymbolPAD_Fallback(PAD2,PAD,setSlot); + MapSymbolPAD_Fallback(PAD2,PAD,queryMtap); return 0; } @@ -413,11 +425,11 @@ int LoadSPU2plugin(const string& filename) { MapSymbol_Error(SPU2close); MapSymbol_Error(SPU2write); MapSymbol_Error(SPU2read); - MapSymbol_Error(SPU2readDMA4Mem); - MapSymbol_Error(SPU2writeDMA4Mem); + MapSymbol_Error(SPU2readDMA4Mem); + MapSymbol_Error(SPU2writeDMA4Mem); MapSymbol_Error(SPU2interruptDMA4); - MapSymbol_Error(SPU2readDMA7Mem); - MapSymbol_Error(SPU2writeDMA7Mem); + MapSymbol_Error(SPU2readDMA7Mem); + MapSymbol_Error(SPU2writeDMA7Mem); MapSymbol_Error(SPU2interruptDMA7); MapSymbol(SPU2setDMABaseAddr); MapSymbol_Error(SPU2ReadMemAddr); @@ -537,7 +549,7 @@ int LoadUSBplugin(const string& filename) { MapSymbol_Error(USBirqCallback); MapSymbol_Error(USBirqHandler); MapSymbol_Error(USBsetRAM); - + MapSymbol(USBasync); MapSymbol_Fallback(USBfreeze,USB_freeze); @@ -659,7 +671,7 @@ void ShutdownPlugins() if( GSshutdown != NULL ) GSshutdown(); - + if( PAD1shutdown != NULL ) PAD1shutdown(); if( PAD2shutdown != NULL ) @@ -704,7 +716,7 @@ int OpenPlugins(const char* pTitleFilename) chdir(MAIN_DIR); chdir(Config.PluginsDir); - if( pTitleFilename != NULL && pTitleFilename[0] != '/' ) + if( pTitleFilename != NULL && pTitleFilename[0] != '/' ) { // because we are changing the dir, we have to set a new title if it is a relative dir sprintf(pNewTitle, "%s/%s", file, pTitleFilename); @@ -820,7 +832,7 @@ OpenError: void ClosePlugins( bool closegs ) { // Close pads first since they attatch to the GS's window. - + CLOSE_PLUGIN( PAD1 ); CLOSE_PLUGIN( PAD2 ); @@ -844,7 +856,7 @@ void ClosePlugins( bool closegs ) CLOSE_PLUGIN( USB ); CLOSE_PLUGIN( FW ); CLOSE_PLUGIN( SPU2 ); - + // More special treatment for the GS. It needs a complete shutdown and re-init // or else it will tend to error out when we try to use it again. if( 0 ) //closegs ) @@ -895,7 +907,7 @@ void ReleasePlugins() void PluginsResetGS() { // PADs are tied to the GS window, so shut them down together with the GS. - + CLOSE_PLUGIN( PAD1 ); CLOSE_PLUGIN( PAD2 ); diff --git a/pcsx2/R3000A.cpp b/pcsx2/R3000A.cpp index fca5f4de97..50931387a3 100644 --- a/pcsx2/R3000A.cpp +++ b/pcsx2/R3000A.cpp @@ -75,8 +75,8 @@ void psxShutdown() { } void psxException(u32 code, u32 bd) { -// PSXCPU_LOG("psxException %x: %x, %x\n", code, psxHu32(0x1070), psxHu32(0x1074)); - //SysPrintf("!! psxException %x: %x, %x\n", code, psxHu32(0x1070), psxHu32(0x1074)); +// PSXCPU_LOG("psxException %x: %x, %x", code, psxHu32(0x1070), psxHu32(0x1074)); + //Console::WriteLn("!! psxException %x: %x, %x", params code, psxHu32(0x1070), psxHu32(0x1074)); // Set the Cause psxRegs.CP0.n.Cause &= ~0x7f; psxRegs.CP0.n.Cause |= code; @@ -84,7 +84,7 @@ void psxException(u32 code, u32 bd) { // Set the EPC & PC if (bd) { - PSXCPU_LOG("bd set\n"); + PSXCPU_LOG("bd set"); psxRegs.CP0.n.Cause|= 0x80000000; psxRegs.CP0.n.EPC = (psxRegs.pc - 4); } @@ -111,7 +111,7 @@ void psxException(u32 code, u32 bd) { case 0xa0: if (call != 0x28 && call != 0xe) - PSXBIOS_LOG("Bios call a0: %s (%x) %x,%x,%x,%x\n", biosA0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); + PSXBIOS_LOG("Bios call a0: %s (%x) %x,%x,%x,%x", biosA0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); if (biosA0[call]) biosA0[call](); @@ -119,14 +119,14 @@ void psxException(u32 code, u32 bd) { case 0xb0: if (call != 0x17 && call != 0xb) - PSXBIOS_LOG("Bios call b0: %s (%x) %x,%x,%x,%x\n", biosB0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); + PSXBIOS_LOG("Bios call b0: %s (%x) %x,%x,%x,%x", biosB0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); if (biosB0[call]) biosB0[call](); break; case 0xc0: - PSXBIOS_LOG("Bios call c0: %s (%x) %x,%x,%x,%x\n", biosC0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); + PSXBIOS_LOG("Bios call c0: %s (%x) %x,%x,%x,%x", biosC0n[call], call, psxRegs.GPR.n.a0, psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); if (biosC0[call]) biosC0[call](); @@ -169,7 +169,7 @@ __forceinline void PSX_INT( IopEventId n, s32 ecycle ) // Exception: IRQ16 - SIO - it drops ints like crazy when handling PAD stuff. //if( /*n!=16 &&*/ psxRegs.interrupt & (1< Twice-thrown int on IRQ %d\n", n ); + // Console::WriteLn( "***** IOP > Twice-thrown int on IRQ %d", n ); psxRegs.interrupt |= 1 << n; @@ -248,7 +248,7 @@ void psxBranchTest() if ((psxRegs.CP0.n.Status & 0xFE01) >= 0x401) { - PSXCPU_LOG("Interrupt: %x %x\n", psxHu32(0x1070), psxHu32(0x1074)); + PSXCPU_LOG("Interrupt: %x %x", psxHu32(0x1070), psxHu32(0x1074)); psxException(0, 0); iopBranchAction = true; } @@ -278,6 +278,6 @@ void iopTestIntc() void psxExecuteBios() { /* while (psxRegs.pc != 0x80030000) psxCpu->ExecuteBlock(); - PSX_LOG("*BIOS END*\n"); + PSX_LOG("*BIOS END*"); */ } diff --git a/pcsx2/R3000A.h b/pcsx2/R3000A.h index 41cb4862a5..7ab13663e8 100644 --- a/pcsx2/R3000A.h +++ b/pcsx2/R3000A.h @@ -127,13 +127,13 @@ extern s32 psxCycleEE; // tracks IOP's current sych status with the EE #ifndef _PC_ #define _i32(x) (s32)x -#define _u32(x) x +#define _u32(x) (u32)x -#define _i16(x) (short)x -#define _u16(x) (unsigned short)x +#define _i16(x) (s16)x +#define _u16(x) (u16)x -#define _i8(x) (char)x -#define _u8(x) (unsigned char)x +#define _i8(x) (s8)x +#define _u8(x) (u8)x /**** R3000A Instruction Macros ****/ #define _PC_ psxRegs.pc // The next PC to be executed @@ -143,7 +143,7 @@ extern s32 psxCycleEE; // tracks IOP's current sych status with the EE #define _Rt_ ((psxRegs.code >> 16) & 0x1F) // The rt part of the instruction register #define _Rs_ ((psxRegs.code >> 21) & 0x1F) // The rs part of the instruction register #define _Sa_ ((psxRegs.code >> 6) & 0x1F) // The sa part of the instruction register -#define _Im_ ((unsigned short)psxRegs.code) // The immediate part of the instruction register +#define _Im_ ((u16)psxRegs.code) // The immediate part of the instruction register #define _Target_ (psxRegs.code & 0x03ffffff) // The target part of the instruction register #define _Imm_ ((short)psxRegs.code) // sign-extended immediate diff --git a/pcsx2/R3000AInterpreter.cpp b/pcsx2/R3000AInterpreter.cpp index 10f0c7aaee..2612204644 100644 --- a/pcsx2/R3000AInterpreter.cpp +++ b/pcsx2/R3000AInterpreter.cpp @@ -221,7 +221,7 @@ void zeroEx() fname = irxlibs[i].names[code]; //if( strcmp(fname, "setIOPrcvaddr") == 0 ) { -// SysPrintf("yo\n"); +// Console::WriteLn("yo"); // varLog |= 0x100000; // Log = 1; // } @@ -291,7 +291,7 @@ void zeroEx() pc = psxRegs.GPR.n.ra; while (psxRegs.pc != pc) psxCpu->ExecuteBlock(); - PSXBIOS_LOG("%s: %s (%x) END\n", lib, fname == NULL ? "unknown" : fname, code);*/ + PSXBIOS_LOG("%s: %s (%x) END", lib, fname == NULL ? "unknown" : fname, code);*/ #endif } @@ -305,7 +305,7 @@ char* getName(char *file, u32 addr){ name[0]=0; else{ while (!feof(f)){ - fscanf(f, "%08X %s\n", &a, name); + fscanf(f, "%08X %s", &a, name); if (a==addr)break; } fclose(f); @@ -324,13 +324,13 @@ void spyFunctions(){ if (strncmp("__push_params", name, 13)==0){ PAD_LOG(PSXM(psxRegs.GPR.n.a0), psxRegs.GPR.n.a1, psxRegs.GPR.n.a2, psxRegs.GPR.n.a3); }else{ - PAD_LOG("secrman: %s (ra=%06X cycle=%d)\n", name, psxRegs.GPR.n.ra-iii->vaddr, psxRegs.cycle);}}else + PAD_LOG("secrman: %s (ra=%06X cycle=%d)", name, psxRegs.GPR.n.ra-iii->vaddr, psxRegs.cycle);}}else if (strcmp("mcman", PSXM(iii->name))==0){ - PAD_LOG("mcman: %s (ra=%06X cycle=%d)\n", getName("mcman.fun", psxRegs.pc-iii->vaddr), psxRegs.GPR.n.ra-iii->vaddr, psxRegs.cycle);}else + PAD_LOG("mcman: %s (ra=%06X cycle=%d)", getName("mcman.fun", psxRegs.pc-iii->vaddr), psxRegs.GPR.n.ra-iii->vaddr, psxRegs.cycle);}else if (strcmp("padman", PSXM(iii->name))==0){ - PAD_LOG("padman: %s (ra=%06X cycle=%d)\n", getName("padman.fun", psxRegs.pc-iii->vaddr), psxRegs.GPR.n.ra-iii->vaddr, psxRegs.cycle);}else + PAD_LOG("padman: %s (ra=%06X cycle=%d)", getName("padman.fun", psxRegs.pc-iii->vaddr), psxRegs.GPR.n.ra-iii->vaddr, psxRegs.cycle);}else if (strcmp("sio2man", PSXM(iii->name))==0){ - PAD_LOG("sio2man: %s (ra=%06X cycle=%d)\n", getName("sio2man.fun", psxRegs.pc-iii->vaddr), psxRegs.GPR.n.ra-iii->vaddr, psxRegs.cycle);} + PAD_LOG("sio2man: %s (ra=%06X cycle=%d)", getName("sio2man.fun", psxRegs.pc-iii->vaddr), psxRegs.GPR.n.ra-iii->vaddr, psxRegs.cycle);} break; } } @@ -381,7 +381,7 @@ static __forceinline void execI() psxRegs.code = iopMemRead32(psxRegs.pc); //if( (psxRegs.pc >= 0x1200 && psxRegs.pc <= 0x1400) || (psxRegs.pc >= 0x0b40 && psxRegs.pc <= 0x1000)) - PSXCPU_LOG("%s\n", disR3000AF(psxRegs.code, psxRegs.pc)); + PSXCPU_LOG("%s", disR3000AF(psxRegs.code, psxRegs.pc)); psxRegs.pc+= 4; psxRegs.cycle++; diff --git a/pcsx2/R3000AOpcodeTables.cpp b/pcsx2/R3000AOpcodeTables.cpp index 98ba9a92de..6cd7dc5e0b 100644 --- a/pcsx2/R3000AOpcodeTables.cpp +++ b/pcsx2/R3000AOpcodeTables.cpp @@ -159,7 +159,7 @@ void psxSYSCALL() { } void psxRFE() { -// SysPrintf("RFE\n"); +// Console::WriteLn("RFE\n"); psxRegs.CP0.n.Status = (psxRegs.CP0.n.Status & 0xfffffff0) | ((psxRegs.CP0.n.Status & 0x3c) >> 2); // Log=0; @@ -299,11 +299,11 @@ void psxMTC0() { _rFs_ = _u32(_rRt_); } void psxCTC0() { _rFs_ = _u32(_rRt_); } /********************************************************* -* Unknow instruction (would generate an exception) * +* Unknown instruction (would generate an exception) * * Format: ? * *********************************************************/ void psxNULL() { -SysPrintf("psx: Unimplemented op %x\n", psxRegs.code); +Console::Notice("psx: Unimplemented op %x", params psxRegs.code); } void psxSPECIAL() { diff --git a/pcsx2/R5900.cpp b/pcsx2/R5900.cpp index b7e179f542..b19d06dd0b 100644 --- a/pcsx2/R5900.cpp +++ b/pcsx2/R5900.cpp @@ -91,7 +91,7 @@ void cpuReset() hwReset(); vif0Reset(); - vif1Reset(); + vif1Reset(); rcntInit(); psxReset(); } @@ -106,82 +106,86 @@ void cpuShutdown() disR5900FreeSyms(); } -void cpuException(u32 code, u32 bd) +__releaseinline void __fastcall cpuException(u32 code, u32 bd) { cpuRegs.branch = 0; // Tells the interpreter that an exception occurred during a branch. - + bool errLevel2, checkStatus; u32 offset; cpuRegs.CP0.n.Cause = code & 0xffff; - if(cpuRegs.CP0.n.Status.b.ERL == 0){ //Error Level 0-1 - if(((code & 0x7C) >= 0x8) && ((code & 0x7C) <= 0xC)) offset = 0x0; //TLB Refill - else if ((code & 0x7C) == 0x0) offset = 0x200; //Interrupt - else offset = 0x180; // Everything else + if(cpuRegs.CP0.n.Status.b.ERL == 0) + { + //Error Level 0-1 + errLevel2 = FALSE; + checkStatus = (cpuRegs.CP0.n.Status.b.BEV == 0); // for TLB/general exceptions + + if (((code & 0x7C) >= 0x8) && ((code & 0x7C) <= 0xC)) + offset = 0x0; //TLB Refill + else if ((code & 0x7C) == 0x0) + offset = 0x200; //Interrupt + else + offset = 0x180; // Everything else + } + else + { + //Error Level 2 + errLevel2 = TRUE; + checkStatus = (cpuRegs.CP0.n.Status.b.DEV == 0); // for perf/debug exceptions - - if (cpuRegs.CP0.n.Status.b.EXL == 0) { - cpuRegs.CP0.n.Status.b.EXL = 1; - if (bd) { - Console::Notice("branch delay!!"); - cpuRegs.CP0.n.EPC = cpuRegs.pc - 4; - cpuRegs.CP0.n.Cause |= 0x80000000; - } else { - cpuRegs.CP0.n.EPC = cpuRegs.pc; - cpuRegs.CP0.n.Cause &= ~0x80000000; - } - } else { - offset = 0x180; //Overrride the cause - //Console::Notice("cpuException: Status.EXL = 1 cause %x", params code); - } - if (cpuRegs.CP0.n.Status.b.BEV == 0) { - cpuRegs.pc = 0x80000000 + offset; - } else { - cpuRegs.pc = 0xBFC00200 + offset; - } - } else { //Error Level 2 Console::Error("*PCSX2* FIX ME: Level 2 cpuException"); - if((code & 0x38000) <= 0x8000 ) { //Reset / NMI + if ((code & 0x38000) <= 0x8000 ) + { + //Reset / NMI cpuRegs.pc = 0xBFC00000; Console::Notice("Reset request"); UpdateCP0Status(); return; - } else if((code & 0x38000) == 0x10000) offset = 0x80; //Performance Counter - else if((code & 0x38000) == 0x18000) offset = 0x100; //Debug - else Console::Error("Unknown Level 2 Exception!! Cause %x", params code); - - if (cpuRegs.CP0.n.Status.b.EXL == 0) { - cpuRegs.CP0.n.Status.b.EXL = 1; - if (bd) { - Console::Notice("branch delay!!"); - cpuRegs.CP0.n.EPC = cpuRegs.pc - 4; - cpuRegs.CP0.n.Cause |= 0x80000000; - } else { - cpuRegs.CP0.n.EPC = cpuRegs.pc; - cpuRegs.CP0.n.Cause &= ~0x80000000; - } - } else { - offset = 0x180; //Overrride the cause - Console::Notice("cpuException: Status.EXL = 1 cause %x", params code); - } - - if (cpuRegs.CP0.n.Status.b.DEV == 0) { - cpuRegs.pc = 0x80000000 + offset; - } else { - cpuRegs.pc = 0xBFC00200 + offset; - } + } + else if((code & 0x38000) == 0x10000) + offset = 0x80; //Performance Counter + else if((code & 0x38000) == 0x18000) + offset = 0x100; //Debug + else + Console::Error("Unknown Level 2 Exception!! Cause %x", params code); } + + if (cpuRegs.CP0.n.Status.b.EXL == 0) + { + cpuRegs.CP0.n.Status.b.EXL = 1; + if (bd) + { + Console::Notice("branch delay!!"); + cpuRegs.CP0.n.EPC = cpuRegs.pc - 4; + cpuRegs.CP0.n.Cause |= 0x80000000; + } + else + { + cpuRegs.CP0.n.EPC = cpuRegs.pc; + cpuRegs.CP0.n.Cause &= ~0x80000000; + } + } + else + { + offset = 0x180; //Override the cause + if (errLevel2) Console::Notice("cpuException: Status.EXL = 1 cause %x", params code); + } + + if (checkStatus) + cpuRegs.pc = 0x80000000 + offset; + else + cpuRegs.pc = 0xBFC00200 + offset; + UpdateCP0Status(); } -void cpuTlbMiss(u32 addr, u32 bd, u32 excode) { +void cpuTlbMiss(u32 addr, u32 bd, u32 excode) +{ Console::Error("cpuTlbMiss pc:%x, cycl:%x, addr: %x, status=%x, code=%x", params cpuRegs.pc, cpuRegs.cycle, addr, cpuRegs.CP0.n.Status.val, excode); - if (bd) { - Console::Notice("branch delay!!"); - } + if (bd) Console::Notice("branch delay!!"); - assert(0); // temporary + assert(0); // temporary cpuRegs.CP0.n.BadVAddr = addr; cpuRegs.CP0.n.Context &= 0xFF80000F; @@ -212,55 +216,11 @@ void cpuTlbMissW(u32 addr, u32 bd) { cpuTlbMiss(addr, bd, EXC_CODE_TLBS); } -void JumpCheckSym(u32 addr, u32 pc) { -#if 0 -// if (addr == 0x80051770) { SysPrintf("Log!: %s\n", PSM(cpuRegs.GPR.n.a0.UL[0])); Log=1; varLog|= 0x40000000; } - if (addr == 0x8002f150) { SysPrintf("printk: %s\n", PSM(cpuRegs.GPR.n.a0.UL[0])); } - if (addr == 0x8002aba0) return; - if (addr == 0x8002f450) return; - if (addr == 0x800dd520) return; -// if (addr == 0x80049300) SysPrintf("register_blkdev: %x\n", cpuRegs.GPR.n.a0.UL[0]); - if (addr == 0x8013cb70) { SysPrintf("change_root: %x\n", cpuRegs.GPR.n.a0.UL[0]); } -// if (addr == 0x8013d1e8) { SysPrintf("Log!\n"); Log++; if (Log==2) exit(0); varLog|= 0x40000000; } -// if (addr == 0x00234e88) { SysPrintf("StoreImage\n"); Log=1; /*psMu32(0x234e88) = 0x03e00008; psMu32(0x234e8c) = 0;*/ } -#endif -/* if ((pc >= 0x00131D50 && - pc < 0x00132454) || - (pc >= 0x00786a90 && - pc < 0x00786ac8))*/ - /*if (varLog & 0x40000000) { - char *str; - char *strf; - - str = disR5900GetSym(addr); - if (str != NULL) { - strf = disR5900GetUpperSym(pc); - if (strf) { - SysPrintf("Func %8.8x: %s (called by %8.8x: %s)\n", addr, str, pc, strf); - } else { - SysPrintf("Func %8.8x: %s (called by %x)\n", addr, str, pc); - } - if (!strcmp(str, "printf")) { SysPrintf("%s\n", (char*)PSM(cpuRegs.GPR.n.a0.UL[0])); } - if (!strcmp(str, "printk")) { SysPrintf("%s\n", (char*)PSM(cpuRegs.GPR.n.a0.UL[0])); } - } - }*/ -} - -void JumpCheckSymRet(u32 addr) { - /*if (varLog & 0x40000000) { - char *str; - str = disR5900GetUpperSym(addr); - if (str != NULL) { - SysPrintf("Return : %s, v0=%8.8x\n", str, cpuRegs.GPR.n.v0.UL[0]); - } - }*/ -} - __forceinline void _cpuTestMissingINTC() { if (cpuRegs.CP0.n.Status.val & 0x400 && psHu32(INTC_STAT) & psHu32(INTC_MASK)) { if ((cpuRegs.interrupt & (1 << 30)) == 0) { - SysPrintf("*PCSX2*: Error, missing INTC Interrupt\n"); + Console::Error("*PCSX2*: Error, missing INTC Interrupt"); } } } @@ -270,7 +230,7 @@ __forceinline void _cpuTestMissingDMAC() { (psHu16(0xe012) & psHu16(0xe010) || psHu16(0xe010) & 0x8000)) { if ((cpuRegs.interrupt & (1 << 31)) == 0) { - SysPrintf("*PCSX2*: Error, missing DMAC Interrupt\n"); + Console::Error("*PCSX2*: Error, missing DMAC Interrupt"); } } } @@ -284,7 +244,7 @@ void cpuTestMissingHwInts() { } // sets a branch test to occur some time from an arbitrary starting point. -__forceinline int cpuSetNextBranch( u32 startCycle, s32 delta ) +__forceinline int __fastcall cpuSetNextBranch( u32 startCycle, s32 delta ) { // typecast the conditional to signed so that things don't blow up // if startCycle is greater than our next branch cycle. @@ -298,14 +258,14 @@ __forceinline int cpuSetNextBranch( u32 startCycle, s32 delta ) } // sets a branch to occur some time from the current cycle -__forceinline int cpuSetNextBranchDelta( s32 delta ) +__forceinline int __fastcall cpuSetNextBranchDelta( s32 delta ) { return cpuSetNextBranch( cpuRegs.cycle, delta ); } // tests the cpu cycle agaisnt the given start and delta values. // Returns true if the delta time has passed. -__forceinline int cpuTestCycle( u32 startCycle, s32 delta ) +__forceinline int __fastcall cpuTestCycle( u32 startCycle, s32 delta ) { // typecast the conditional to signed so that things don't explode // if the startCycle is ahead of our current cpu cycle. @@ -544,7 +504,7 @@ __forceinline bool _cpuBranchTest_Shared() return vsyncEvent; } -void cpuTestINTCInts() +__releaseinline void cpuTestINTCInts() { if( cpuRegs.interrupt & (1 << 30) ) return; //if( (cpuRegs.CP0.n.Status.val & 0x10407) != 0x10401 ) return; @@ -596,7 +556,7 @@ __forceinline void cpuTestTIMRInts() { } } -void cpuTestHwInts() { +__forceinline void cpuTestHwInts() { cpuTestINTCInts(); cpuTestDMACInts(); cpuTestTIMRInts(); diff --git a/pcsx2/R5900.h b/pcsx2/R5900.h index 900142b2ea..b2dd4db46f 100644 --- a/pcsx2/R5900.h +++ b/pcsx2/R5900.h @@ -219,9 +219,6 @@ struct tlbs #endif -void JumpCheckSym(u32 addr, u32 pc); -void JumpCheckSymRet(u32 addr); - PCSX2_ALIGNED16_EXTERN(cpuRegisters cpuRegs); PCSX2_ALIGNED16_EXTERN(fpuRegisters fpuRegs); PCSX2_ALIGNED16_EXTERN(tlbs tlb[48]); @@ -260,14 +257,14 @@ extern void cpuInit(); extern void cpuReset(); // can throw Exception::FileNotFound. extern void cpuShutdown(); extern void cpuExecuteBios(); -extern void cpuException(u32 code, u32 bd); +extern void __fastcall cpuException(u32 code, u32 bd); extern void cpuTlbMissR(u32 addr, u32 bd); extern void cpuTlbMissW(u32 addr, u32 bd); extern void cpuTestHwInts(); -extern int cpuSetNextBranch( u32 startCycle, s32 delta ); -extern int cpuSetNextBranchDelta( s32 delta ); -extern int cpuTestCycle( u32 startCycle, s32 delta ); +extern int __fastcall cpuSetNextBranch( u32 startCycle, s32 delta ); +extern int __fastcall cpuSetNextBranchDelta( s32 delta ); +extern int __fastcall cpuTestCycle( u32 startCycle, s32 delta ); extern void cpuSetBranch(); extern bool _cpuBranchTest_Shared(); // for internal use by the Dynarecs and Ints inside R5900: diff --git a/pcsx2/R5900OpcodeImpl.cpp b/pcsx2/R5900OpcodeImpl.cpp index d938fc6d62..f9b2e194ac 100644 --- a/pcsx2/R5900OpcodeImpl.cpp +++ b/pcsx2/R5900OpcodeImpl.cpp @@ -130,12 +130,12 @@ void COP2() //std::string disOut; //disR5900Fasm(disOut, cpuRegs.code, cpuRegs.pc); - //VU0_LOG("%s\n", disOut.c_str()); + //VU0_LOG("%s", disOut.c_str()); Int_COP2PrintTable[_Rs_](); } void Unknown() { - CPU_LOG("%8.8lx: Unknown opcode called\n", cpuRegs.pc); + CPU_LOG("%8.8lx: Unknown opcode called", cpuRegs.pc); } void MMI_Unknown() { Console::Notice("Unknown MMI opcode called"); } @@ -247,14 +247,29 @@ void SLTU() { if (!_Rd_) return; cpuRegs.GPR.r[_Rd_].UD[0] = (cpuRegs.GPR.r[_Rs * Format: OP rs, rt * *********************************************************/ +// Signed division "overflows" on (0x80000000 / -1), here (LO = 0x80000000, HI = 0) is returned by MIPS +// in division by zero on MIPS, it appears that: +// LO gets 1 if rs is negative (and the division is signed) and -1 otherwise. +// HI gets the value of rs. + // Result is stored in HI/LO [no arithmetic exceptions] void DIV() { - if (cpuRegs.GPR.r[_Rt_].SL[0] != 0) + if (cpuRegs.GPR.r[_Rs_].UL[0] == 0x80000000 && cpuRegs.GPR.r[_Rt_].UL[0] == 0xffffffff) + { + cpuRegs.LO.SD[0] = (s32)0x80000000; + cpuRegs.HI.SD[0] = (s32)0x0; + } + else if (cpuRegs.GPR.r[_Rt_].SL[0] != 0) { cpuRegs.LO.SD[0] = cpuRegs.GPR.r[_Rs_].SL[0] / cpuRegs.GPR.r[_Rt_].SL[0]; cpuRegs.HI.SD[0] = cpuRegs.GPR.r[_Rs_].SL[0] % cpuRegs.GPR.r[_Rt_].SL[0]; } + else + { + cpuRegs.LO.SD[0] = (cpuRegs.GPR.r[_Rs_].SL[0] < 0) ? 1 : -1; + cpuRegs.HI.SD[0] = cpuRegs.GPR.r[_Rs_].SL[0]; + } } // Result is stored in HI/LO [no arithmetic exceptions] @@ -267,6 +282,11 @@ void DIVU() cpuRegs.LO.SD[0] = (s32)(cpuRegs.GPR.r[_Rs_].UL[0] / cpuRegs.GPR.r[_Rt_].UL[0]); cpuRegs.HI.SD[0] = (s32)(cpuRegs.GPR.r[_Rs_].UL[0] % cpuRegs.GPR.r[_Rt_].UL[0]); } + else + { + cpuRegs.LO.SD[0] = -1; + cpuRegs.HI.SD[0] = cpuRegs.GPR.r[_Rs_].SL[0]; + } } // Result is written to both HI/LO and to the _Rd_ (Lo only) @@ -738,7 +758,7 @@ int __Deci2Call(int call, u32 *addr) if( addr != NULL ) { deci2addr = (u32*)PSM(addr[1]); - BIOS_LOG("deci2open: %x,%x,%x,%x\n", + BIOS_LOG("deci2open: %x,%x,%x,%x", addr[3], addr[2], addr[1], addr[0]); deci2handler = addr[2]; } @@ -758,13 +778,13 @@ int __Deci2Call(int call, u32 *addr) if( addr != NULL ) sprintf( reqaddr, "%x %x %x %x", addr[3], addr[2], addr[1], addr[0] ); - BIOS_LOG("deci2reqsend: %s: deci2addr: %x,%x,%x,buf=%x %x,%x,len=%x,%x\n", + BIOS_LOG("deci2reqsend: %s: deci2addr: %x,%x,%x,buf=%x %x,%x,len=%x,%x", (( addr == NULL ) ? "NULL" : reqaddr), deci2addr[7], deci2addr[6], deci2addr[5], deci2addr[4], deci2addr[3], deci2addr[2], deci2addr[1], deci2addr[0]); // cpuRegs.pc = deci2handler; -// SysPrintf("deci2msg: %s", (char*)PSM(deci2addr[4]+0xc)); +// Console::WriteLn("deci2msg: %s", params (char*)PSM(deci2addr[4]+0xc)); if (deci2addr == NULL) return 1; if (deci2addr[1]>0xc){ u8* pdeciaddr = (u8*)dmaGetAddr(deci2addr[4]+0xc); @@ -810,7 +830,7 @@ void SYSCALL() else call = cpuRegs.GPR.n.v1.UC[0]; - BIOS_LOG("Bios call: %s (%x)\n", bios[call], call); + BIOS_LOG("Bios call: %s (%x)", bios[call], call); if (call == 0x7c) { @@ -836,7 +856,7 @@ void SYSCALL() addr = cpuRegs.GPR.n.a0.UL[0] + n_transfer * sizeof(t_sif_dma_transfer); dmat = (t_sif_dma_transfer*)PSM(addr); - BIOS_LOG("bios_%s: n_transfer=%d, size=%x, attr=%x, dest=%x, src=%x\n", + BIOS_LOG("bios_%s: n_transfer=%d, size=%x, attr=%x, dest=%x, src=%x", bios[cpuRegs.GPR.n.v1.UC[0]], n_transfer, dmat->size, dmat->attr, dmat->dest, dmat->src); @@ -858,7 +878,7 @@ void MFSA( void ) { } void MTSA( void ) { - cpuRegs.sa = (s32)cpuRegs.GPR.r[_Rs_].SD[0]; + cpuRegs.sa = (s32)cpuRegs.GPR.r[_Rs_].SD[0] & 0xf; } // SNY supports three basic modes, two which synchronize memory accesses (related @@ -907,11 +927,11 @@ void TLTIU() { if (cpuRegs.GPR.r[_Rs_].UD[0] < (u64)_Imm_) throw R5900Exception *********************************************************/ void MTSAB() { - cpuRegs.sa = ((cpuRegs.GPR.r[_Rs_].UL[0] & 0xF) ^ (_Imm_ & 0xF)) << 3; + cpuRegs.sa = ((cpuRegs.GPR.r[_Rs_].UL[0] & 0xF) ^ (_Imm_ & 0xF)); } void MTSAH() { - cpuRegs.sa = ((cpuRegs.GPR.r[_Rs_].UL[0] & 0x7) ^ (_Imm_ & 0x7)) << 4; + cpuRegs.sa = ((cpuRegs.GPR.r[_Rs_].UL[0] & 0x7) ^ (_Imm_ & 0x7)) << 1; } } } } // end namespace R5900::Interpreter::OpcodeImpl diff --git a/pcsx2/SPR.cpp b/pcsx2/SPR.cpp index c9b59e1a25..97e8510206 100644 --- a/pcsx2/SPR.cpp +++ b/pcsx2/SPR.cpp @@ -5,12 +5,12 @@ * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. - * + * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. - * + * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA @@ -25,72 +25,67 @@ #define spr0 ((DMACh*)&PS2MEM_HW[0xD000]) #define spr1 ((DMACh*)&PS2MEM_HW[0xD400]) +#define gif ((DMACh*)&PS2MEM_HW[0xA000]) +extern void mfifoGIFtransfer(int); + +/* Both of these should be bools. Again, next savestate break. --arcum42 */ static int spr0finished = 0; static int spr1finished = 0; + static u32 mfifotransferred = 0; -void sprInit() { +void sprInit() +{ } -//__forceinline static void SPR0transfer(u32 *data, int size) { -///* while (size > 0) { -// SPR_LOG("SPR1transfer: %x\n", *data); -// data++; size--; -// }*/ -// size <<= 2; -// if ((psHu32(DMAC_CTRL) & 0xC) == 0xC || // GIF MFIFO -// (psHu32(DMAC_CTRL) & 0xC) == 0x8) { // VIF1 MFIFO -// hwMFIFOWrite(spr0->madr, (u8*)&PS2MEM_SCRATCH[spr0->sadr & 0x3fff], size); -// } else { -// u32 * p = (u32*)&PS2MEM_SCRATCH[spr0->sadr & 0x3fff]; -// //WriteCodeSSE2(p,data,size >> 4); -// memcpy_fast((u8*)data, &PS2MEM_SCRATCH[spr0->sadr & 0x3fff], size); -// } -// spr0->sadr+= size; -//} - static void TestClearVUs(u32 madr, u32 size) { - if( madr >= 0x11000000 ) { - if( madr < 0x11004000 ) { - DbgCon::Notice("scratch pad clearing vu0\n"); + if (madr >= 0x11000000) + { + if (madr < 0x11004000) + { + DbgCon::Notice("scratch pad clearing vu0"); CpuVU0.Clear(madr&0xfff, size); } - else if( madr >= 0x11008000 && madr < 0x1100c000 ) { - DbgCon::Notice("scratch pad clearing vu1\n"); + else if (madr >= 0x11008000 && madr < 0x1100c000) + { + DbgCon::Notice("scratch pad clearing vu1"); CpuVU1.Clear(madr&0x3fff, size); } } } -int _SPR0chain() { +int _SPR0chain() +{ u32 *pMem; if (spr0->qwc == 0) return 0; pMem = (u32*)dmaGetAddr(spr0->madr); if (pMem == NULL) return -1; - //SPR0transfer(pMem, qwc << 2); - - if ((psHu32(DMAC_CTRL) & 0xC) >= 0x8) { // 0x8 VIF1 MFIFO, 0xC GIF MFIFO - if((spr0->madr & ~psHu32(DMAC_RBSR)) != psHu32(DMAC_RBOR)) SysPrintf("SPR MFIFO Write outside MFIFO area\n"); + if ((psHu32(DMAC_CTRL) & 0xC) >= 0x8) // 0x8 VIF1 MFIFO, 0xC GIF MFIFO + { + if ((spr0->madr & ~psHu32(DMAC_RBSR)) != psHu32(DMAC_RBOR)) Console::WriteLn("SPR MFIFO Write outside MFIFO area"); + hwMFIFOWrite(spr0->madr, (u8*)&PS2MEM_SCRATCH[spr0->sadr & 0x3fff], spr0->qwc << 4); spr0->madr += spr0->qwc << 4; spr0->madr = psHu32(DMAC_RBOR) + (spr0->madr & psHu32(DMAC_RBSR)); mfifotransferred += spr0->qwc; - } else { + } + else + { memcpy_fast((u8*)pMem, &PS2MEM_SCRATCH[spr0->sadr & 0x3fff], spr0->qwc << 4); - //Cpu->Clear(spr0->madr, spr0->qwc<<2); + // clear VU mem also! TestClearVUs(spr0->madr, spr0->qwc << 2); // Wtf is going on here? AFAIK, only VIF should affect VU micromem (cottonvibes) - + spr0->madr += spr0->qwc << 4; } spr0->sadr += spr0->qwc << 4; - - return (spr0->qwc) * BIAS; // bus is 1/2 the ee speed + + return (spr0->qwc) * BIAS; // bus is 1/2 the ee speed } #define SPR0chain() \ @@ -98,97 +93,98 @@ int _SPR0chain() { spr0->qwc = 0; -void _SPR0interleave() { +void _SPR0interleave() +{ int qwc = spr0->qwc; int sqwc = psHu32(DMAC_SQWC) & 0xff; int tqwc = (psHu32(DMAC_SQWC) >> 16) & 0xff; int cycles = 0; u32 *pMem; - if(tqwc == 0) tqwc = qwc; - //SysPrintf("dmaSPR0 interleave\n"); - SPR_LOG("SPR0 interleave size=%d, tqwc=%d, sqwc=%d, addr=%lx sadr=%lx\n", - spr0->qwc, tqwc, sqwc, spr0->madr, spr0->sadr); - while (qwc > 0) { - spr0->qwc = std::min(tqwc, qwc); qwc-= spr0->qwc; + if (tqwc == 0) tqwc = qwc; + //Console::WriteLn("dmaSPR0 interleave"); + SPR_LOG("SPR0 interleave size=%d, tqwc=%d, sqwc=%d, addr=%lx sadr=%lx", + spr0->qwc, tqwc, sqwc, spr0->madr, spr0->sadr); + + while (qwc > 0) + { + spr0->qwc = std::min(tqwc, qwc); + qwc -= spr0->qwc; pMem = (u32*)dmaGetAddr(spr0->madr); if ((psHu32(DMAC_CTRL) & 0xC) == 0xC || // GIF MFIFO - (psHu32(DMAC_CTRL) & 0xC) == 0x8) { // VIF1 MFIFO - hwMFIFOWrite(spr0->madr, (u8*)&PS2MEM_SCRATCH[spr0->sadr & 0x3fff], spr0->qwc<<4); + (psHu32(DMAC_CTRL) & 0xC) == 0x8) // VIF1 MFIFO + { + hwMFIFOWrite(spr0->madr, (u8*)&PS2MEM_SCRATCH[spr0->sadr & 0x3fff], spr0->qwc << 4); mfifotransferred += spr0->qwc; - } else { - //Cpu->Clear(spr0->madr, spr0->qwc<<2); + } + else + { // clear VU mem also! - TestClearVUs(spr0->madr, spr0->qwc<<2); - memcpy_fast((u8*)pMem, &PS2MEM_SCRATCH[spr0->sadr & 0x3fff], spr0->qwc<<4); + TestClearVUs(spr0->madr, spr0->qwc << 2); + memcpy_fast((u8*)pMem, &PS2MEM_SCRATCH[spr0->sadr & 0x3fff], spr0->qwc << 4); } cycles += tqwc * BIAS; - spr0->sadr+= spr0->qwc * 16; - spr0->madr+= (sqwc+spr0->qwc)*16; //qwc-= sqwc; + spr0->sadr += spr0->qwc * 16; + spr0->madr += (sqwc + spr0->qwc) * 16; //qwc-= sqwc; } - spr0->qwc = 0; + spr0->qwc = 0; spr0finished = 1; - //CPU_INT(8, cycles); } -static __forceinline void _dmaSPR0() { - - - if ((psHu32(DMAC_CTRL) & 0x30) == 0x20) { // STS == fromSPR - SysPrintf("SPR0 stall %d\n", (psHu32(DMAC_CTRL)>>6)&3); +static __forceinline void _dmaSPR0() +{ + if ((psHu32(DMAC_CTRL) & 0x30) == 0x20) // STS == fromSPR + { + Console::WriteLn("SPR0 stall %d", params(psHu32(DMAC_CTRL) >> 6)&3); } - - // Transfer Dn_QWC from SPR to Dn_MADR - - - - if ((spr0->chcr & 0xc) == 0x0) { // Normal Mode + if ((spr0->chcr & 0xc) == 0x0) // Normal Mode + { int cycles = 0; SPR0chain(); - //CPU_INT(8, cycles); spr0finished = 1; - - return; - } else if ((spr0->chcr & 0xc) == 0x4) { - int cycles = 0; - u32 *ptag; - int id; - int done = 0; - - if(spr0->qwc > 0){ - SPR0chain(); - //CPU_INT(8, cycles); - spr0finished = 1; - return; - } - // Destination Chain Mode - //while (done == 0) { // Loop while Dn_CHCR.STR is 1 - ptag = (u32*)&PS2MEM_SCRATCH[spr0->sadr & 0x3fff]; - spr0->sadr+= 16; + return; + } + else if ((spr0->chcr & 0xc) == 0x4) + { + int cycles = 0; + u32 *ptag; + int id; + int done = 0; + + if (spr0->qwc > 0) + { + SPR0chain(); + spr0finished = 1; + return; + } + // Destination Chain Mode + ptag = (u32*) & PS2MEM_SCRATCH[spr0->sadr & 0x3fff]; + spr0->sadr += 16; // Transfer dma tag if tte is set -// if (spr0->chcr & 0x40) SPR0transfer(ptag, 4); - spr0->chcr = ( spr0->chcr & 0xFFFF ) | ( (*ptag) & 0xFFFF0000 ); //Transfer upper part of tag to CHCR bits 31-15 + spr0->chcr = (spr0->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000); //Transfer upper part of tag to CHCR bits 31-15 id = (ptag[0] >> 28) & 0x7; //ID for DmaChain copied from bit 28 of the tag spr0->qwc = (u16)ptag[0]; //QWC set to lower 16bits of the tag spr0->madr = ptag[1]; //MADR = ADDR field - SPR_LOG("spr0 dmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx spr=%lx\n", - ptag[1], ptag[0], spr0->qwc, id, spr0->madr, spr0->sadr); + SPR_LOG("spr0 dmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx spr=%lx", + ptag[1], ptag[0], spr0->qwc, id, spr0->madr, spr0->sadr); - if ((psHu32(DMAC_CTRL) & 0x30) == 0x20) { // STS == fromSPR - SysPrintf("SPR stall control\n"); + if ((psHu32(DMAC_CTRL) & 0x30) == 0x20) // STS == fromSPR + { + Console::WriteLn("SPR stall control"); } - - switch (id) { + + switch (id) + { case 0: // CNTS - Transfer QWC following the tag (Stall Control) - if ((psHu32(DMAC_CTRL) & 0x30) == 0x20 ) psHu32(DMAC_STADR) = spr0->madr + (spr0->qwc * 16); //Copy MADR to DMAC_STADR stall addr register + if ((psHu32(DMAC_CTRL) & 0x30) == 0x20) psHu32(DMAC_STADR) = spr0->madr + (spr0->qwc * 16); //Copy MADR to DMAC_STADR stall addr register break; case 1: // CNT - Transfer QWC following the tag. @@ -200,107 +196,90 @@ static __forceinline void _dmaSPR0() { break; } SPR0chain(); - if (spr0->chcr & 0x80 && ptag[0] >> 31) { //Check TIE bit of CHCR and IRQ bit of tag - //SysPrintf("SPR0 TIE\n"); + if (spr0->chcr & 0x80 && ptag[0] >> 31) //Check TIE bit of CHCR and IRQ bit of tag + { + //Console::WriteLn("SPR0 TIE"); done = 1; spr0->qwc = 0; - //break; } - -/* if (spr0->chcr & 0x80 && ptag[0] >> 31) { - SPR_LOG("dmaIrq Set\n"); - - spr0->chcr&= ~0x100; - hwDmacIrq(8); - return; - }*/ - //} spr0finished = done; - if(done == 0) { - ptag = (u32*)&PS2MEM_SCRATCH[spr0->sadr & 0x3fff]; //Set memory pointer to SADR + if (done == 0) + { + ptag = (u32*) & PS2MEM_SCRATCH[spr0->sadr & 0x3fff]; //Set memory pointer to SADR spr0->qwc = (u16)ptag[0]; //QWC set to lower 16bits of the tag CPU_INT(8, spr0->qwc / BIAS); spr0->qwc = 0; return; } - SPR_LOG("spr0 dmaChain complete %8.8x_%8.8x size=%d, id=%d, addr=%lx spr=%lx\n", - ptag[1], ptag[0], spr0->qwc, id, spr0->madr); - //CPU_INT(8, cycles); - } else { // Interleave Mode + SPR_LOG("spr0 dmaChain complete %8.8x_%8.8x size=%d, id=%d, addr=%lx spr=%lx", + ptag[1], ptag[0], spr0->qwc, id, spr0->madr); + } + else // Interleave Mode + { _SPR0interleave(); - } - - - -} + } -extern void mfifoGIFtransfer(int); -#define gif ((DMACh*)&PS2MEM_HW[0xA000]) + + +} void SPRFROMinterrupt() { - //int qwc = spr0->qwc; - _dmaSPR0(); - if ((psHu32(DMAC_CTRL) & 0xC) == 0xC) { // GIF MFIFO - if((spr0->madr & ~psHu32(DMAC_RBSR)) != psHu32(DMAC_RBOR)) SysPrintf("GIF MFIFO Write outside MFIFO area\n"); + if ((psHu32(DMAC_CTRL) & 0xC) == 0xC) // GIF MFIFO + { + if ((spr0->madr & ~psHu32(DMAC_RBSR)) != psHu32(DMAC_RBOR)) Console::WriteLn("GIF MFIFO Write outside MFIFO area"); spr0->madr = psHu32(DMAC_RBOR) + (spr0->madr & psHu32(DMAC_RBSR)); - //SysPrintf("mfifoGIFtransfer %x madr %x, tadr %x\n", gif->chcr, gif->madr, gif->tadr); + //Console::WriteLn("mfifoGIFtransfer %x madr %x, tadr %x", params gif->chcr, gif->madr, gif->tadr); mfifoGIFtransfer(mfifotransferred); mfifotransferred = 0; - } else - if ((psHu32(DMAC_CTRL) & 0xC) == 0x8) { // VIF1 MFIFO - if((spr0->madr & ~psHu32(DMAC_RBSR)) != psHu32(DMAC_RBOR)) SysPrintf("VIF MFIFO Write outside MFIFO area\n"); - spr0->madr = psHu32(DMAC_RBOR) + (spr0->madr & psHu32(DMAC_RBSR)); - //SysPrintf("mfifoVIF1transfer %x madr %x, tadr %x\n", vif1ch->chcr, vif1ch->madr, vif1ch->tadr); - //vifqwc+= qwc; - mfifoVIF1transfer(mfifotransferred); - mfifotransferred = 0; } - if(spr0finished == 0) return; - spr0->chcr&= ~0x100; + else + if ((psHu32(DMAC_CTRL) & 0xC) == 0x8) // VIF1 MFIFO + { + if ((spr0->madr & ~psHu32(DMAC_RBSR)) != psHu32(DMAC_RBOR)) Console::WriteLn("VIF MFIFO Write outside MFIFO area"); + spr0->madr = psHu32(DMAC_RBOR) + (spr0->madr & psHu32(DMAC_RBSR)); + //Console::WriteLn("mfifoVIF1transfer %x madr %x, tadr %x", params vif1ch->chcr, vif1ch->madr, vif1ch->tadr); + mfifoVIF1transfer(mfifotransferred); + mfifotransferred = 0; + } + if (spr0finished == 0) return; + spr0->chcr &= ~0x100; hwDmacIrq(8); } -void dmaSPR0() { // fromSPR - +void dmaSPR0() // fromSPR +{ - SPR_LOG("dmaSPR0 chcr = %lx, madr = %lx, qwc = %lx, sadr = %lx\n", - spr0->chcr, spr0->madr, spr0->qwc, spr0->sadr); - if ((spr0->chcr & 0xc) == 0x4 && spr0->qwc == 0){ - u32 *ptag; - ptag = (u32*)&PS2MEM_SCRATCH[spr0->sadr & 0x3fff]; //Set memory pointer to SADR - CPU_INT(8, (ptag[0] & 0xffff) / BIAS); - // spr0->qwc = 0; - return; - } + SPR_LOG("dmaSPR0 chcr = %lx, madr = %lx, qwc = %lx, sadr = %lx", + spr0->chcr, spr0->madr, spr0->qwc, spr0->sadr); + + if ((spr0->chcr & 0xc) == 0x4 && spr0->qwc == 0) + { + u32 *ptag; + ptag = (u32*) & PS2MEM_SCRATCH[spr0->sadr & 0x3fff]; //Set memory pointer to SADR + CPU_INT(8, (ptag[0] & 0xffff) / BIAS); + return; + } // COMPLETE HACK!!! For now at least.. FFX Videos dont rely on interrupts or reading DMA values // It merely assumes that the last one has finished then starts another one (broke with the DMA fix) // This "shouldn't" cause any problems as SPR is generally faster than the other DMAS anyway. (Refraction) CPU_INT(8, spr0->qwc / BIAS); - - - } -__forceinline static void SPR1transfer(u32 *data, int size) { -/* { - int i; - for (i=0; isadr+i*4) & 0x3fff, data[i] ); - } - }*/ - //Cpu->Clear(spr1->sadr, size); // why? +__forceinline static void SPR1transfer(u32 *data, int size) +{ memcpy_fast(&PS2MEM_SCRATCH[spr1->sadr & 0x3fff], (u8*)data, size << 2); - spr1->sadr+= size << 2; + spr1->sadr += size << 2; } -int _SPR1chain() { +int _SPR1chain() +{ u32 *pMem; if (spr1->qwc == 0) return 0; @@ -309,8 +288,8 @@ int _SPR1chain() { if (pMem == NULL) return -1; SPR1transfer(pMem, spr1->qwc << 2); - spr1->madr+= spr1->qwc << 4; - + spr1->madr += spr1->qwc << 4; + return (spr1->qwc) * BIAS; } @@ -319,142 +298,144 @@ int _SPR1chain() { spr1->qwc = 0; -void _SPR1interleave() { +void _SPR1interleave() +{ int qwc = spr1->qwc; int sqwc = psHu32(DMAC_SQWC) & 0xff; int tqwc = (psHu32(DMAC_SQWC) >> 16) & 0xff; int cycles = 0; u32 *pMem; - if(tqwc == 0) tqwc = qwc; - SPR_LOG("SPR1 interleave size=%d, tqwc=%d, sqwc=%d, addr=%lx sadr=%lx\n", - spr1->qwc, tqwc, sqwc, spr1->madr, spr1->sadr); + + if (tqwc == 0) tqwc = qwc; + SPR_LOG("SPR1 interleave size=%d, tqwc=%d, sqwc=%d, addr=%lx sadr=%lx", + spr1->qwc, tqwc, sqwc, spr1->madr, spr1->sadr); - while (qwc > 0) { - spr1->qwc = std::min(tqwc, qwc); qwc-= spr1->qwc; + while (qwc > 0) + { + spr1->qwc = std::min(tqwc, qwc); + qwc -= spr1->qwc; pMem = (u32*)dmaGetAddr(spr1->madr); - memcpy_fast(&PS2MEM_SCRATCH[spr1->sadr & 0x3fff], (u8*)pMem, spr1->qwc <<4); + memcpy_fast(&PS2MEM_SCRATCH[spr1->sadr & 0x3fff], (u8*)pMem, spr1->qwc << 4); spr1->sadr += spr1->qwc * 16; cycles += spr1->qwc * BIAS; - spr1->madr+= (sqwc + spr1->qwc) * 16; //qwc-= sqwc; + spr1->madr += (sqwc + spr1->qwc) * 16; //qwc-= sqwc; } - spr1->qwc = 0; - spr1finished = 1; - //CPU_INT(9, cycles); - + spr1->qwc = 0; + spr1finished = 1; } -void _dmaSPR1() { // toSPR work function - if ((spr1->chcr & 0xc) == 0) { // Normal Mode +void _dmaSPR1() // toSPR work function +{ + if ((spr1->chcr & 0xc) == 0) // Normal Mode + { int cycles = 0; - //if(spr1->qwc == 0 && (spr1->chcr & 0xc) == 1) spr1->qwc = 0xffff; // Transfer Dn_QWC from Dn_MADR to SPR1 SPR1chain(); spr1finished = 1; - //CPU_INT(9, cycles); return; - } else - if ((spr1->chcr & 0xc) == 0x4){ - int cycles = 0; - u32 *ptag; - int id, done=0; - + } + else if ((spr1->chcr & 0xc) == 0x4) + { + int cycles = 0; + u32 *ptag; + int id, done = 0; - if(spr1->qwc > 0){ - //if(spr1->qwc == 0 && (spr1->chcr & 0xc) == 1) spr1->qwc = 0xffff; + if (spr1->qwc > 0) + { // Transfer Dn_QWC from Dn_MADR to SPR1 SPR1chain(); spr1finished = 1; - //CPU_INT(9, cycles); return; } - // Chain Mode + // Chain Mode -// while (done == 0) { // Loop while Dn_CHCR.STR is 1 ptag = (u32*)dmaGetAddr(spr1->tadr); //Set memory pointer to TADR - if (ptag == NULL) { //Is ptag empty? - SysPrintf("SPR1 Tag BUSERR\n"); - spr1->chcr = ( spr1->chcr & 0xFFFF ) | ( (*ptag) & 0xFFFF0000 ); //Transfer upper part of tag to CHCR bits 31-15 - psHu32(DMAC_STAT)|= 1<<15; //If yes, set BEIS (BUSERR) in DMAC_STAT register + if (ptag == NULL) //Is ptag empty? + { + Console::WriteLn("SPR1 Tag BUSERR"); + spr1->chcr = (spr1->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000); //Transfer upper part of tag to CHCR bits 31-15 + psHu32(DMAC_STAT) |= 1 << 15; //If yes, set BEIS (BUSERR) in DMAC_STAT register done = 1; spr1finished = done; return; } - spr1->chcr = ( spr1->chcr & 0xFFFF ) | ( (*ptag) & 0xFFFF0000 ); //Transfer upper part of tag to CHCR bits 31-15 + spr1->chcr = (spr1->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000); //Transfer upper part of tag to CHCR bits 31-15 - id = (ptag[0] >> 28) & 0x7; //ID for DmaChain copied from bit 28 of the tag + id = (ptag[0] >> 28) & 0x7; //ID for DmaChain copied from bit 28 of the tag spr1->qwc = (u16)ptag[0]; //QWC set to lower 16bits of the tag spr1->madr = ptag[1]; //MADR = ADDR field // Transfer dma tag if tte is set - if (spr1->chcr & 0x40) { + if (spr1->chcr & 0x40) + { SPR_LOG("SPR TTE: %x_%x\n", ptag[3], ptag[2]); SPR1transfer(ptag, 4); //Transfer Tag } - SPR_LOG("spr1 dmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx\n", - ptag[1], ptag[0], spr1->qwc, id, spr1->madr); - + SPR_LOG("spr1 dmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx", + ptag[1], ptag[0], spr1->qwc, id, spr1->madr); + done = hwDmacSrcChain(spr1, id); SPR1chain(); //Transfers the data set by the switch - if (spr1->chcr & 0x80 && ptag[0] >> 31) { //Check TIE bit of CHCR and IRQ bit of tag - SPR_LOG("dmaIrq Set\n"); - - //SysPrintf("SPR1 TIE\n"); + if (spr1->chcr & 0x80 && ptag[0] >> 31) //Check TIE bit of CHCR and IRQ bit of tag + { + SPR_LOG("dmaIrq Set"); + + //Console::WriteLn("SPR1 TIE"); spr1->qwc = 0; done = 1; - // break; } - //} + spr1finished = done; - if(done == 0) { + if (done == 0) + { ptag = (u32*)dmaGetAddr(spr1->tadr); //Set memory pointer to TADR spr1->qwc = (u16)ptag[0]; //QWC set to lower 16bits of the tag CPU_INT(9, spr1->qwc / BIAS); spr1->qwc = 0; } - } else { // Interleave Mode + } + else // Interleave Mode + { _SPR1interleave(); - } + } } -void dmaSPR1() { // toSPR - - -#ifdef SPR_LOG - SPR_LOG("dmaSPR1 chcr = 0x%x, madr = 0x%x, qwc = 0x%x\n" - " tadr = 0x%x, sadr = 0x%x\n", - spr1->chcr, spr1->madr, spr1->qwc, - spr1->tadr, spr1->sadr); -#endif +void dmaSPR1() // toSPR +{ - if ((spr1->chcr & 0xc) == 0x4 && spr1->qwc == 0){ - u32 *ptag; - ptag = (u32*)dmaGetAddr(spr1->tadr); //Set memory pointer to TADR - CPU_INT(9, (ptag[0] & 0xffff) / BIAS); - //spr1->qwc = 0; - return; - } + SPR_LOG("dmaSPR1 chcr = 0x%x, madr = 0x%x, qwc = 0x%x\n" + " tadr = 0x%x, sadr = 0x%x", + spr1->chcr, spr1->madr, spr1->qwc, + spr1->tadr, spr1->sadr); + + if ((spr1->chcr & 0xc) == 0x4 && spr1->qwc == 0) + { + u32 *ptag; + ptag = (u32*)dmaGetAddr(spr1->tadr); //Set memory pointer to TADR + CPU_INT(9, (ptag[0] & 0xffff) / BIAS); + //spr1->qwc = 0; + return; + } // COMPLETE HACK!!! For now at least.. FFX Videos dont rely on interrupts or reading DMA values // It merely assumes that the last one has finished then starts another one (broke with the DMA fix) // This "shouldn't" cause any problems as SPR is generally faster than the other DMAS anyway. (Refraction) CPU_INT(9, spr1->qwc / BIAS); - - } void SPRTOinterrupt() { _dmaSPR1(); - if( spr1finished == 0 ) return; + if (spr1finished == 0) return; spr1->chcr &= ~0x100; hwDmacIrq(9); } void SaveState::sprFreeze() { - FreezeTag( "SPRdma" ); + FreezeTag("SPRdma"); Freeze(spr0finished); Freeze(spr1finished); diff --git a/pcsx2/SaveState.cpp b/pcsx2/SaveState.cpp index 9de5fe2f6e..3da782d03a 100644 --- a/pcsx2/SaveState.cpp +++ b/pcsx2/SaveState.cpp @@ -207,6 +207,7 @@ gzSavingState::gzSavingState( const string& filename ) : if( m_file == NULL ) throw Exception::FileNotFound(); + gzsetparams( m_file, Z_BEST_SPEED, Z_DEFAULT_STRATEGY ); Freeze( m_version ); } diff --git a/pcsx2/SaveState.h b/pcsx2/SaveState.h index 380f7185e3..d884755a6d 100644 --- a/pcsx2/SaveState.h +++ b/pcsx2/SaveState.h @@ -31,7 +31,7 @@ // the lower 16 bit value. IF the change is breaking of all compatibility with old // states, increment the upper 16 bit value, and clear the lower 16 bits to 0. -static const u32 g_SaveVersion = 0x8b410000; +static const u32 g_SaveVersion = 0x8b410001; // this function is meant to be used in the place of GSfreeze, and provides a safe layer // between the GS saving function and the MTGS's needs. :) diff --git a/pcsx2/Sif.cpp b/pcsx2/Sif.cpp index 0456780b60..78c006c58d 100644 --- a/pcsx2/Sif.cpp +++ b/pcsx2/Sif.cpp @@ -5,12 +5,12 @@ * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. - * + * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. - * + * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA @@ -37,8 +37,9 @@ DMACh *sif2ch; #define FIFO_SIF0_W 128 #define FIFO_SIF1_W 128 -struct _sif0{ - u32 fifoData[FIFO_SIF0_W]; +struct _sif0 +{ + u32 fifoData[FIFO_SIF0_W]; int fifoReadPos; int fifoWritePos; int fifoSize; @@ -49,7 +50,8 @@ struct _sif0{ struct sifData sifData; }; -struct _sif1 { +struct _sif1 +{ u32 fifoData[FIFO_SIF1_W]; int fifoReadPos; int fifoWritePos; @@ -76,284 +78,213 @@ void sifInit() static __forceinline void SIF0write(u32 *from, int words) { - /*if(FIFO_SIF0_W < (words+sif0.fifoWritePos)) {*/ - - const int wP0 = min((FIFO_SIF0_W-sif0.fifoWritePos),words); - const int wP1 = words - wP0; - - memcpy(&sif0.fifoData[sif0.fifoWritePos], from, wP0 << 2); - memcpy(&sif0.fifoData[0], &from[wP0], wP1 << 2); + const int wP0 = min((FIFO_SIF0_W - sif0.fifoWritePos), words); + const int wP1 = words - wP0; - sif0.fifoWritePos = (sif0.fifoWritePos + words) & (FIFO_SIF0_W-1); - /*} - else - { - memcpy_fast(&sif0.fifoData[sif0.fifoWritePos], from, words << 2); - sif0.fifoWritePos += words; - }*/ + memcpy(&sif0.fifoData[sif0.fifoWritePos], from, wP0 << 2); + memcpy(&sif0.fifoData[0], &from[wP0], wP1 << 2); + + sif0.fifoWritePos = (sif0.fifoWritePos + words) & (FIFO_SIF0_W - 1); sif0.fifoSize += words; - SIF_LOG(" SIF0 + %d = %d (pos=%d)\n", words, sif0.fifoSize, sif0.fifoWritePos); + SIF_LOG(" SIF0 + %d = %d (pos=%d)", words, sif0.fifoSize, sif0.fifoWritePos); } static __forceinline void SIF0read(u32 *to, int words) { - /*if(FIFO_SIF0_W < (words+sif0.fifoReadPos)) - {*/ - const int wP0 = min((FIFO_SIF0_W-sif0.fifoReadPos),words); - const int wP1 = words - wP0; + const int wP0 = min((FIFO_SIF0_W - sif0.fifoReadPos), words); + const int wP1 = words - wP0; - memcpy(to, &sif0.fifoData[sif0.fifoReadPos], wP0 << 2); - memcpy(&to[wP0], &sif0.fifoData[0], wP1 << 2); - - sif0.fifoReadPos = (sif0.fifoReadPos + words) & (FIFO_SIF0_W-1); - /*} - else - { - memcpy_fast(to, &sif0.fifoData[sif0.fifoReadPos], words << 2); - sif0.fifoReadPos += words; - }*/ + memcpy(to, &sif0.fifoData[sif0.fifoReadPos], wP0 << 2); + memcpy(&to[wP0], &sif0.fifoData[0], wP1 << 2); + sif0.fifoReadPos = (sif0.fifoReadPos + words) & (FIFO_SIF0_W - 1); sif0.fifoSize -= words; - SIF_LOG(" SIF0 - %d = %d (pos=%d)\n", words, sif0.fifoSize, sif0.fifoReadPos); + SIF_LOG(" SIF0 - %d = %d (pos=%d)", words, sif0.fifoSize, sif0.fifoReadPos); } __forceinline void SIF1write(u32 *from, int words) { - /*if(FIFO_SIF1_W < (words+sif1.fifoWritePos)) - {*/ - const int wP0 = min((FIFO_SIF1_W-sif1.fifoWritePos),words); - const int wP1 = words - wP0; + const int wP0 = min((FIFO_SIF1_W - sif1.fifoWritePos), words); + const int wP1 = words - wP0; - memcpy(&sif1.fifoData[sif1.fifoWritePos], from, wP0 << 2); - memcpy(&sif1.fifoData[0], &from[wP0], wP1 << 2); - - sif1.fifoWritePos = (sif1.fifoWritePos + words) & (FIFO_SIF1_W-1); - /*} - else - { - memcpy_fast(&sif1.fifoData[sif1.fifoWritePos], from, words << 2); - sif1.fifoWritePos += words; - }*/ + memcpy(&sif1.fifoData[sif1.fifoWritePos], from, wP0 << 2); + memcpy(&sif1.fifoData[0], &from[wP0], wP1 << 2); + sif1.fifoWritePos = (sif1.fifoWritePos + words) & (FIFO_SIF1_W - 1); sif1.fifoSize += words; - SIF_LOG(" SIF1 + %d = %d (pos=%d)\n", words, sif1.fifoSize, sif1.fifoWritePos); + SIF_LOG(" SIF1 + %d = %d (pos=%d)", words, sif1.fifoSize, sif1.fifoWritePos); } static __forceinline void SIF1read(u32 *to, int words) { - /*if(FIFO_SIF1_W < (words+sif1.fifoReadPos)) - {*/ - const int wP0 = min((FIFO_SIF1_W-sif1.fifoReadPos),words); - const int wP1 = words - wP0; + const int wP0 = min((FIFO_SIF1_W - sif1.fifoReadPos), words); + const int wP1 = words - wP0; - memcpy(to, &sif1.fifoData[sif1.fifoReadPos], wP0 << 2); - memcpy(&to[wP0], &sif1.fifoData[0], wP1 << 2); - - sif1.fifoReadPos = (sif1.fifoReadPos + words) & (FIFO_SIF1_W-1); - /*} - else - { - memcpy_fast(to, &sif1.fifoData[sif1.fifoReadPos], words << 2); - sif1.fifoReadPos += words; - }*/ + memcpy(to, &sif1.fifoData[sif1.fifoReadPos], wP0 << 2); + memcpy(&to[wP0], &sif1.fifoData[0], wP1 << 2); + sif1.fifoReadPos = (sif1.fifoReadPos + words) & (FIFO_SIF1_W - 1); sif1.fifoSize -= words; - SIF_LOG(" SIF1 - %d = %d (pos=%d)\n", words, sif1.fifoSize, sif1.fifoReadPos); + SIF_LOG(" SIF1 - %d = %d (pos=%d)", words, sif1.fifoSize, sif1.fifoReadPos); } __forceinline void SIF0Dma() { u32 *ptag; - int notDone = 1; + int notDone = TRUE; int cycles = 0, psxCycles = 0; - - SIF_LOG("SIF0 DMA start...\n"); + + SIF_LOG("SIF0 DMA start..."); do { - - /*if ((psHu32(DMAC_CTRL) & 0xC0)) { - SysPrintf("DMA Stall Control %x\n",(psHu32(DMAC_CTRL) & 0xC0)); - }*/ - if(iopsifbusy[0] == 1) // If EE SIF0 is enabled + if (iopsifbusy[0] == 1) // If EE SIF0 is enabled { - //int size = sif0.counter; //HW_DMA9_BCR >> 16; - - if(sif0.counter == 0) // If there's no more to transfer + if (sif0.counter == 0) // If there's no more to transfer { // Note.. add normal mode here if (sif0.sifData.data & 0xC0000000) // If NORMAL mode or end of CHAIN, or interrupt then stop DMA { - SIF_LOG(" IOP SIF Stopped\n"); + SIF_LOG(" IOP SIF Stopped"); // Stop & signal interrupts on IOP - //HW_DMA9_CHCR &= ~0x01000000; //reset TR flag - //psxDmaInterrupt2(2); iopsifbusy[0] = 0; - PSX_INT(IopEvt_SIF0, psxCycles); + // iop is 1/8th the clock rate of the EE and psxcycles is in words (not quadwords) // So when we're all done, the equation looks like thus: //PSX_INT(IopEvt_SIF0, ( ( psxCycles*BIAS ) / 4 ) / 8); + PSX_INT(IopEvt_SIF0, psxCycles); - //hwIntcIrq(INTC_SBUS); sif0.sifData.data = 0; - notDone = 0; + notDone = FALSE; } else // Chain mode { // Process DMA tag at HW_DMA9_TADR - sif0.sifData = *(sifData *)iopPhysMem( HW_DMA9_TADR ); + sif0.sifData = *(sifData *)iopPhysMem(HW_DMA9_TADR); sif0.sifData.words = (sif0.sifData.words + 3) & 0xfffffffc; // Round up to nearest 4. - SIF0write((u32*)iopPhysMem(HW_DMA9_TADR+8), 4); + SIF0write((u32*)iopPhysMem(HW_DMA9_TADR + 8), 4); - //psxCycles += 2; - - HW_DMA9_MADR = sif0.sifData.data & 0xFFFFFF; + HW_DMA9_MADR = sif0.sifData.data & 0xFFFFFF; HW_DMA9_TADR += 16; ///HW_DMA9_MADR + 16 + sif0.sifData.words << 2; - //HW_DMA9_BCR = (sif0.sifData.words << 16) | 1; sif0.counter = sif0.sifData.words & 0xFFFFFF; - notDone = 1; + notDone = TRUE; - SIF_LOG(" SIF0 Tag: madr=%lx, tadr=%lx, counter=%lx (%08X_%08X)\n", HW_DMA9_MADR, HW_DMA9_TADR, sif0.counter, sif0.sifData.words, sif0.sifData.data); - if(sif0.sifData.data & 0x40000000) - SIF_LOG(" END\n"); + SIF_LOG(" SIF0 Tag: madr=%lx, tadr=%lx, counter=%lx (%08X_%08X)", HW_DMA9_MADR, HW_DMA9_TADR, sif0.counter, sif0.sifData.words, sif0.sifData.data); + if (sif0.sifData.data & 0x40000000) + SIF_LOG(" END"); else - SIF_LOG(" CNT %08X, %08X\n", sif0.sifData.data, sif0.sifData.words); + SIF_LOG(" CNT %08X, %08X", sif0.sifData.data, sif0.sifData.words); } } else // There's some data ready to transfer into the fifo.. { - int wTransfer = min(sif0.counter, FIFO_SIF0_W-sif0.fifoSize); // HW_DMA9_BCR >> 16; + int wTransfer = min(sif0.counter, FIFO_SIF0_W - sif0.fifoSize); // HW_DMA9_BCR >> 16; - SIF_LOG("+++++++++++ %lX of %lX\n", wTransfer, sif0.counter /*(HW_DMA9_BCR >> 16)*/ ); + SIF_LOG("+++++++++++ %lX of %lX", wTransfer, sif0.counter /*(HW_DMA9_BCR >> 16)*/); SIF0write((u32*)iopPhysMem(HW_DMA9_MADR), wTransfer); HW_DMA9_MADR += wTransfer << 2; - //HW_DMA9_BCR = (HW_DMA9_BCR & 0xFFFF) | (((HW_DMA9_BCR >> 16) - wTransfer)<<16); psxCycles += (wTransfer / 4) * BIAS; // fixme : should be / 16 - //psxCycles += wTransfer; sif0.counter -= wTransfer; - - //notDone = 1; } } - if(eesifbusy[0] == 1) // If EE SIF enabled and there's something to transfer + if (eesifbusy[0] == 1) // If EE SIF enabled and there's something to transfer { int size = sif0dma->qwc; - if ((psHu32(DMAC_CTRL) & 0x30) == 0x10) { // STS == fromSIF0 - SIF_LOG("SIF0 stall control\n"); - } - if(size > 0) // If we're reading something continue to do so + if ((psHu32(DMAC_CTRL) & 0x30) == 0x10) // STS == fromSIF0 { - /*if(sif0.fifoSize > 0) - {*/ - int readSize = min(size, (sif0.fifoSize>>2)); - - //SIF_LOG(" EE SIF doing transfer %04Xqw to %08X\n", readSize, sif0dma->madr); - SIF_LOG("----------- %lX of %lX\n", readSize << 2, size << 2 ); - - _dmaGetAddr(sif0dma, ptag, sif0dma->madr, 5); - - SIF0read((u32*)ptag, readSize<<2); -// { -// int i; -// for(i = 0; i < readSize; ++i) { -// SIF_LOG("EE SIF0 read madr: %x %x %x %x\n", ((u32*)ptag)[4*i+0], ((u32*)ptag)[4*i+1], ((u32*)ptag)[4*i+2], ((u32*)ptag)[4*i+3]); -// } -// } - - Cpu->Clear(sif0dma->madr, readSize*4); - - cycles += readSize * BIAS; // fixme : BIAS is factored in below - //cycles += readSize; - sif0dma->qwc -= readSize; - sif0dma->madr += readSize << 4; - - //notDone = 1; - //} + SIF_LOG("SIF0 stall control"); } - - if(sif0dma->qwc == 0) + if (size > 0) // If we're reading something continue to do so { - if((sif0dma->chcr & 0x80000080) == 0x80000080) // Stop on tag IRQ + int readSize = min(size, (sif0.fifoSize >> 2)); + + //SIF_LOG(" EE SIF doing transfer %04Xqw to %08X", readSize, sif0dma->madr); + SIF_LOG("----------- %lX of %lX", readSize << 2, size << 2); + + _dmaGetAddr(sif0dma, ptag, sif0dma->madr, 5); + + SIF0read((u32*)ptag, readSize << 2); + + Cpu->Clear(sif0dma->madr, readSize*4); + + cycles += readSize * BIAS; // fixme : BIAS is factored in below + sif0dma->qwc -= readSize; + sif0dma->madr += readSize << 4; + } + + if (sif0dma->qwc == 0) + { + if ((sif0dma->chcr & 0x80000080) == 0x80000080) // Stop on tag IRQ { // Tag interrupt - SIF_LOG(" EE SIF interrupt\n"); + SIF_LOG(" EE SIF interrupt"); - //sif0dma->chcr &= ~0x100; eesifbusy[0] = 0; CPU_INT(5, cycles*BIAS); - //hwDmacIrq(5); - notDone = 0; + notDone = FALSE; } - else if(sif0.end) // Stop on tag END + else if (sif0.end) // Stop on tag END { // End tag. - SIF_LOG(" EE SIF end\n"); + SIF_LOG(" EE SIF end"); - //sif0dma->chcr &= ~0x100; - //hwDmacIrq(5); eesifbusy[0] = 0; CPU_INT(5, cycles*BIAS); - notDone = 0; + notDone = FALSE; } - else if(sif0.fifoSize >= 4) // Read a tag + else if (sif0.fifoSize >= 4) // Read a tag { static PCSX2_ALIGNED16(u32 tag[4]); SIF0read((u32*)&tag[0], 4); // Tag - SIF_LOG(" EE SIF read tag: %x %x %x %x\n", tag[0], tag[1], tag[2], tag[3]); + SIF_LOG(" EE SIF read tag: %x %x %x %x", tag[0], tag[1], tag[2], tag[3]); sif0dma->qwc = (u16)tag[0]; sif0dma->madr = tag[1]; sif0dma->chcr = (sif0dma->chcr & 0xffff) | (tag[0] & 0xffff0000); - /*if ((sif0dma->chcr & 0x80) && (tag[0] >> 31)) { - SysPrintf("SIF0 TIE\n"); - }*/ - SIF_LOG(" EE SIF dest chain tag madr:%08X qwc:%04X id:%X irq:%d(%08X_%08X)\n", sif0dma->madr, sif0dma->qwc, (tag[0]>>28)&3, (tag[0]>>31)&1, tag[1], tag[0]); + SIF_LOG(" EE SIF dest chain tag madr:%08X qwc:%04X id:%X irq:%d(%08X_%08X)", sif0dma->madr, sif0dma->qwc, (tag[0] >> 28)&3, (tag[0] >> 31)&1, tag[1], tag[0]); - if ((psHu32(DMAC_CTRL) & 0x30) != 0 && ((tag[0]>>28)&3) == 0) - psHu32(DMAC_STADR) = sif0dma->madr + (sif0dma->qwc * 16); - notDone = 1; + if ((psHu32(DMAC_CTRL) & 0x30) != 0 && ((tag[0] >> 28)&3) == 0) + psHu32(DMAC_STADR) = sif0dma->madr + (sif0dma->qwc * 16); + notDone = TRUE; sif0.chain = 1; - if(tag[0] & 0x40000000) - sif0.end = 1; - + if (tag[0] & 0x40000000) sif0.end = 1; + } } } - }while(notDone); + } + while (notDone); } __forceinline void SIF1Dma() { int id; u32 *ptag; - int notDone; + bool notDone = true; int cycles = 0, psxCycles = 0; - notDone = 1; do { - if(eesifbusy[1] == 1) // If EE SIF1 is enabled + if (eesifbusy[1] == 1) // If EE SIF1 is enabled { - - if ((psHu32(DMAC_CTRL) & 0xC0) == 0xC0) - SIF_LOG("SIF1 stall control\n"); // STS == fromSIF1 - if(sif1dma->qwc == 0) // If there's no more to transfer + if ((psHu32(DMAC_CTRL) & 0xC0) == 0xC0) + SIF_LOG("SIF1 stall control"); // STS == fromSIF1 + + if (sif1dma->qwc == 0) // If there's no more to transfer { if ((sif1dma->chcr & 0xc) == 0 || sif1.end) // If NORMAL mode or end of CHAIN then stop DMA { // Stop & signal interrupts on EE - //sif1dma->chcr &= ~0x100; - //hwDmacIrq(6); - SIF_LOG("EE SIF1 End %x\n", sif1.end); + SIF_LOG("EE SIF1 End %x", sif1.end); eesifbusy[1] = 0; - notDone = 0; + notDone = FALSE; CPU_INT(6, cycles*BIAS); sif1.chain = 0; sif1.end = 0; @@ -361,59 +292,61 @@ __forceinline void SIF1Dma() else // Chain mode { // Process DMA tag at sif1dma->tadr - notDone = 1; + notDone = TRUE; _dmaGetAddr(sif1dma, ptag, sif1dma->tadr, 6); - sif1dma->chcr = ( sif1dma->chcr & 0xFFFF ) | ( (*ptag) & 0xFFFF0000 ); // Copy the tag + sif1dma->chcr = (sif1dma->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000); // Copy the tag sif1dma->qwc = (u16)ptag[0]; - if (sif1dma->chcr & 0x40) { - SysPrintf("SIF1 TTE\n"); - SIF1write(ptag+2, 2); + if (sif1dma->chcr & 0x40) + { + Console::WriteLn("SIF1 TTE"); + SIF1write(ptag + 2, 2); } - + sif1.chain = 1; id = (ptag[0] >> 28) & 0x7; - switch(id) + switch (id) { case 0: // refe - SIF_LOG(" REFE %08X\n", ptag[1]); + SIF_LOG(" REFE %08X", ptag[1]); sif1.end = 1; sif1dma->madr = ptag[1]; sif1dma->tadr += 16; break; case 1: // cnt - SIF_LOG(" CNT\n"); + SIF_LOG(" CNT"); sif1dma->madr = sif1dma->tadr + 16; sif1dma->tadr = sif1dma->madr + (sif1dma->qwc << 4); break; case 2: // next - SIF_LOG(" NEXT %08X\n", ptag[1]); + SIF_LOG(" NEXT %08X", ptag[1]); sif1dma->madr = sif1dma->tadr + 16; sif1dma->tadr = ptag[1]; break; case 3: // ref case 4: // refs - SIF_LOG(" REF %08X\n", ptag[1]); + SIF_LOG(" REF %08X", ptag[1]); sif1dma->madr = ptag[1]; sif1dma->tadr += 16; break; case 7: // end - SIF_LOG(" END\n"); + SIF_LOG(" END"); sif1.end = 1; sif1dma->madr = sif1dma->tadr + 16; sif1dma->tadr = sif1dma->madr + (sif1dma->qwc << 4); break; - + default: - SysPrintf("Bad addr1 source chain\n"); + Console::WriteLn("Bad addr1 source chain"); } - if ((sif1dma->chcr & 0x80) && (ptag[0] >> 31)) { - SysPrintf("SIF1 TIE\n"); + if ((sif1dma->chcr & 0x80) && (ptag[0] >> 31)) + { + Console::WriteLn("SIF1 TIE"); sif1.end = 1; } } @@ -422,125 +355,113 @@ __forceinline void SIF1Dma() { int qwTransfer = sif1dma->qwc; u32 *data; - - //notDone = 1; + _dmaGetAddr(sif1dma, data, sif1dma->madr, 6); - if(qwTransfer > (FIFO_SIF1_W-sif1.fifoSize)/4) // Copy part of sif1dma into FIFO - qwTransfer = (FIFO_SIF1_W-sif1.fifoSize)/4; + if (qwTransfer > (FIFO_SIF1_W - sif1.fifoSize) / 4) // Copy part of sif1dma into FIFO + qwTransfer = (FIFO_SIF1_W - sif1.fifoSize) / 4; SIF1write(data, qwTransfer << 2); - + sif1dma->madr += qwTransfer << 4; cycles += qwTransfer * BIAS; // fixme : BIAS is factored in above - //cycles += qwTransfer; // 1 cycle per quadword (BIAS is factored later) sif1dma->qwc -= qwTransfer; } } - if(iopsifbusy[1] == 1) // If IOP SIF enabled and there's something to transfer + if (iopsifbusy[1] == 1) // If IOP SIF enabled and there's something to transfer { - int size = sif1.counter; - - if(size > 0) // If we're reading something continue to do so + int size = sif1.counter; + + if (size > 0) // If we're reading something continue to do so { - /*if(sif1.fifoSize > 0) - {*/ - int readSize = size; + int readSize = size; - if(readSize > sif1.fifoSize) readSize = sif1.fifoSize; + if (readSize > sif1.fifoSize) readSize = sif1.fifoSize; - SIF_LOG(" IOP SIF doing transfer %04X to %08X\n", readSize, HW_DMA10_MADR); + SIF_LOG(" IOP SIF doing transfer %04X to %08X", readSize, HW_DMA10_MADR); - SIF1read((u32*)iopPhysMem(HW_DMA10_MADR), readSize); - psxCpu->Clear(HW_DMA10_MADR, readSize); - psxCycles += readSize / 4; // fixme: should be / 16 - sif1.counter = size-readSize; - HW_DMA10_MADR += readSize << 2; - //notDone = 1; - //} + SIF1read((u32*)iopPhysMem(HW_DMA10_MADR), readSize); + psxCpu->Clear(HW_DMA10_MADR, readSize); + psxCycles += readSize / 4; // fixme: should be / 16 + sif1.counter = size - readSize; + HW_DMA10_MADR += readSize << 2; } - if(sif1.counter <= 0) + if (sif1.counter <= 0) { - if(sif1.tagMode & 0x80) // Stop on tag IRQ + if (sif1.tagMode & 0x80) // Stop on tag IRQ { // Tag interrupt - SIF_LOG(" IOP SIF interrupt\n"); - //HW_DMA10_CHCR &= ~0x01000000; //reset TR flag - //psxDmaInterrupt2(3); + SIF_LOG(" IOP SIF interrupt"); iopsifbusy[1] = 0; PSX_INT(IopEvt_SIF1, psxCycles); - //hwIntcIrq(INTC_SBUS); sif1.tagMode = 0; - notDone = 0; + notDone = FALSE; } - else if(sif1.tagMode & 0x40) // Stop on tag END + else if (sif1.tagMode & 0x40) // Stop on tag END { // End tag. - SIF_LOG(" IOP SIF end\n"); - //HW_DMA10_CHCR &= ~0x01000000; //reset TR flag - //psxDmaInterrupt2(3); + SIF_LOG(" IOP SIF end"); iopsifbusy[1] = 0; PSX_INT(IopEvt_SIF1, psxCycles); - //hwIntcIrq(INTC_SBUS); sif1.tagMode = 0; - notDone = 0; + notDone = FALSE; } - else if(sif1.fifoSize >= 4) // Read a tag + else if (sif1.fifoSize >= 4) // Read a tag { struct sifData d; SIF1read((u32*)&d, 4); - SIF_LOG(" IOP SIF dest chain tag madr:%08X wc:%04X id:%X irq:%d\n", d.data & 0xffffff, d.words, (d.data>>28)&7, (d.data>>31)&1); + SIF_LOG(" IOP SIF dest chain tag madr:%08X wc:%04X id:%X irq:%d", d.data & 0xffffff, d.words, (d.data >> 28)&7, (d.data >> 31)&1); HW_DMA10_MADR = d.data & 0xffffff; sif1.counter = d.words; sif1.tagMode = (d.data >> 24) & 0xFF; - notDone = 1; + notDone = TRUE; } } } - } while (notDone); + } + while (notDone); } -__forceinline void sif0Interrupt() { - +__forceinline void sif0Interrupt() +{ HW_DMA9_CHCR &= ~0x01000000; psxDmaInterrupt2(2); - //hwIntcIrq(INTC_SBUS); } -__forceinline void sif1Interrupt() { - +__forceinline void sif1Interrupt() +{ HW_DMA10_CHCR &= ~0x01000000; //reset TR flag psxDmaInterrupt2(3); - //hwIntcIrq(INTC_SBUS); } -__forceinline void EEsif0Interrupt() { +__forceinline void EEsif0Interrupt() +{ sif0dma->chcr &= ~0x100; hwDmacIrq(DMAC_SIF0); } -__forceinline void EEsif1Interrupt() { +__forceinline void EEsif1Interrupt() +{ hwDmacIrq(DMAC_SIF1); sif1dma->chcr &= ~0x100; } -__forceinline void dmaSIF0() { - SIF_LOG("EE: dmaSIF0 chcr = %lx, madr = %lx, qwc = %lx, tadr = %lx\n", - sif0dma->chcr, sif0dma->madr, sif0dma->qwc, sif0dma->tadr); +__forceinline void dmaSIF0() +{ + SIF_LOG("EE: dmaSIF0 chcr = %lx, madr = %lx, qwc = %lx, tadr = %lx", + sif0dma->chcr, sif0dma->madr, sif0dma->qwc, sif0dma->tadr); - if (sif0.fifoReadPos != sif0.fifoWritePos) { - SIF_LOG("warning, sif0.fifoReadPos != sif0.fifoWritePos\n"); + if (sif0.fifoReadPos != sif0.fifoWritePos) + { + SIF_LOG("warning, sif0.fifoReadPos != sif0.fifoWritePos"); } -// if(sif0dma->qwc > 0 & (sif0dma->chcr & 0x4) == 0x4) { -// sif0dma->chcr &= ~4; //Halflife sets a QWC amount in chain mode, no tadr set. -// SysPrintf("yo\n"); -// } psHu32(0x1000F240) |= 0x2000; eesifbusy[0] = 1; - if(eesifbusy[0] == 1 && iopsifbusy[0] == 1) { + if (eesifbusy[0] == 1 && iopsifbusy[0] == 1) + { FreezeXMMRegs(1); hwIntcIrq(INTC_SBUS); SIF0Dma(); @@ -550,22 +471,20 @@ __forceinline void dmaSIF0() { } } -__forceinline void dmaSIF1() { - SIF_LOG("EE: dmaSIF1 chcr = %lx, madr = %lx, qwc = %lx, tadr = %lx\n", - sif1dma->chcr, sif1dma->madr, sif1dma->qwc, sif1dma->tadr); +__forceinline void dmaSIF1() +{ + SIF_LOG("EE: dmaSIF1 chcr = %lx, madr = %lx, qwc = %lx, tadr = %lx", + sif1dma->chcr, sif1dma->madr, sif1dma->qwc, sif1dma->tadr); - if (sif1.fifoReadPos != sif1.fifoWritePos) { - SIF_LOG("warning, sif1.fifoReadPos != sif1.fifoWritePos\n"); + if (sif1.fifoReadPos != sif1.fifoWritePos) + { + SIF_LOG("warning, sif1.fifoReadPos != sif1.fifoWritePos"); } -// if(sif1dma->qwc > 0 & (sif1dma->chcr & 0x4) == 0x4) { -// sif1dma->chcr &= ~4; //Halflife sets a QWC amount in chain mode, no tadr set. -// SysPrintf("yo2\n"); -// } - psHu32(0x1000F240) |= 0x4000; eesifbusy[1] = 1; - if(eesifbusy[1] == 1 && iopsifbusy[1] == 1) { + if (eesifbusy[1] == 1 && iopsifbusy[1] == 1) + { FreezeXMMRegs(1); SIF1Dma(); psHu32(0x1000F240) &= ~0x40; @@ -573,22 +492,23 @@ __forceinline void dmaSIF1() { psHu32(0x1000F240) &= ~0x4000; FreezeXMMRegs(0); } - + } -__forceinline void dmaSIF2() { - SIF_LOG("dmaSIF2 chcr = %lx, madr = %lx, qwc = %lx\n", - sif2dma->chcr, sif2dma->madr, sif2dma->qwc); +__forceinline void dmaSIF2() +{ + SIF_LOG("dmaSIF2 chcr = %lx, madr = %lx, qwc = %lx", + sif2dma->chcr, sif2dma->madr, sif2dma->qwc); - sif2dma->chcr&= ~0x100; + sif2dma->chcr &= ~0x100; hwDmacIrq(7); - SysPrintf("*PCSX2*: dmaSIF2\n"); + Console::WriteLn("*PCSX2*: dmaSIF2"); } void SaveState::sifFreeze() { - FreezeTag( "SIFdma" ); + FreezeTag("SIFdma"); Freeze(sif0); Freeze(sif1); diff --git a/pcsx2/Sio.cpp b/pcsx2/Sio.cpp index 8e17a70ccc..333ba5d85c 100644 --- a/pcsx2/Sio.cpp +++ b/pcsx2/Sio.cpp @@ -5,12 +5,12 @@ * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. - * + * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. - * + * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA @@ -45,6 +45,17 @@ __forceinline void SIO_INT() #define SIO_FORCEINLINE __forceinline #endif +// Currently only check if pad wants mtap to be active. +// Could lets PCSX2 have its own options, if anyone ever +// wants to add support for using the extra memcard slots. +static bool IsMtapPresent( uint port ) { + switch(port) { + case 1: return 0 != PAD1queryMtap(port); + case 2: return 0 != PAD2queryMtap(port); + } + return 0; +} + static void _ReadMcd(u8 *data, u32 adr, int size) { MemoryCard::Read(sio.GetMemcardIndex(), data, adr, size); } @@ -73,7 +84,7 @@ void sioInit() sio.StatReg = TX_RDY | TX_EMPTY; sio.packetsize = 0; sio.terminator =0x55; // Command terminator 'U' - + MemoryCard::Init(); } @@ -99,12 +110,12 @@ u8 sioRead8() { }*/ } } - //PAD_LOG("sio read8 ;ret = %x\n", ret); + //PAD_LOG("sio read8 ;ret = %x", ret); return ret; } void SIO_CommandWrite(u8 value,int way) { - PAD_LOG("sio write8 %x\n", value); + PAD_LOG("sio write8 %x", value); // PAD COMMANDS switch (sio.padst) { @@ -138,6 +149,13 @@ void SIO_CommandWrite(u8 value,int way) { if (sio.parp == sio.bufcount) { sio.padst = 0; return; } SIO_INT(); return; + case 3: + // No pad connected. + sio.parp++; + sio.bufcount = 6; + if (sio.parp == sio.bufcount) { sio.padst = 0; return; } + SIO_INT(); + return; } // MEMORY CARD COMMANDS @@ -149,29 +167,29 @@ void SIO_CommandWrite(u8 value,int way) { sio.parp = 1; switch (value) { case 0x11: // RESET - PAD_LOG("RESET MEMORY CARD\n"); - - sio.bufcount = 8; + PAD_LOG("RESET MEMORY CARD"); + + sio.bufcount = 8; memset8_obj<0xff>(sio.buf); sio.buf[3] = sio.terminator; sio.buf[2] = '+'; - sio.mcdst = 99; + sio.mcdst = 99; sio2.packet.recvVal3 = 0x8c; break; case 0x12: // RESET - sio.bufcount = 8; + sio.bufcount = 8; memset8_obj<0xff>(sio.buf); sio.buf[3] = sio.terminator; sio.buf[2] = '+'; - sio.mcdst = 99; + sio.mcdst = 99; sio2.packet.recvVal3 = 0x8c; - MEMCARDS_LOG("MC(%d) command 0x%02X\n", sio.GetMemcardIndex()+1, value); + MEMCARDS_LOG("MC(%d) command 0x%02X", sio.GetMemcardIndex()+1, value); break; case 0x81: // COMMIT - sio.bufcount = 8; + sio.bufcount = 8; memset8_obj<0xff>(sio.buf); - sio.mcdst = 99; + sio.mcdst = 99; sio.buf[3] = sio.terminator; sio.buf[2] = '+'; sio2.packet.recvVal3 = 0x8c; @@ -180,82 +198,82 @@ void SIO_CommandWrite(u8 value,int way) { sio2.packet.recvVal1 = 0x1600; // Writing else if(sio.mc_command==0x43) sio2.packet.recvVal1 = 0x1700; // Reading } - MEMCARDS_LOG("MC(%d) command 0x%02X\n", sio.GetMemcardIndex()+1, value); + MEMCARDS_LOG("MC(%d) command 0x%02X", sio.GetMemcardIndex()+1, value); break; - case 0x21: - case 0x22: + case 0x21: + case 0x22: case 0x23: // SECTOR SET sio.bufcount = 8; sio.mcdst = 99; sio.sector=0; sio.k=0; memset8_obj<0xff>(sio.buf); - sio2.packet.recvVal3 = 0x8c; + sio2.packet.recvVal3 = 0x8c; sio.buf[8]=sio.terminator; sio.buf[7]='+'; - MEMCARDS_LOG("MC(%d) command 0x%02X\n", sio.GetMemcardIndex()+1, value); + MEMCARDS_LOG("MC(%d) command 0x%02X", sio.GetMemcardIndex()+1, value); break; - case 0x24: - MEMCARDS_LOG("MC(%d) command 0x%02X\n", sio.GetMemcardIndex()+1, value); + case 0x24: + MEMCARDS_LOG("MC(%d) command 0x%02X", sio.GetMemcardIndex()+1, value); break; - case 0x25: - MEMCARDS_LOG("MC(%d) command 0x%02X\n", sio.GetMemcardIndex()+1, value); + case 0x25: + MEMCARDS_LOG("MC(%d) command 0x%02X", sio.GetMemcardIndex()+1, value); break; - case 0x26: - sio.bufcount = 12; sio.mcdst = 99; sio2.packet.recvVal3 = 0x83; + case 0x26: + sio.bufcount = 12; sio.mcdst = 99; sio2.packet.recvVal3 = 0x83; memset8_obj<0xff>(sio.buf); memcpy(&sio.buf[2], &mc_command_0x26, sizeof(mc_command_0x26)); sio.buf[12]=sio.terminator; - MEMCARDS_LOG("MC(%d) command 0x%02X\n", sio.GetMemcardIndex()+1, value); + MEMCARDS_LOG("MC(%d) command 0x%02X", sio.GetMemcardIndex()+1, value); break; - case 0x27: - case 0x28: + case 0x27: + case 0x28: case 0xBF: sio.bufcount = 4; sio.mcdst = 99; sio2.packet.recvVal3 = 0x8b; memset8_obj<0xff>(sio.buf); sio.buf[4]=sio.terminator; sio.buf[3]='+'; - MEMCARDS_LOG("MC(%d) command 0x%02X\n", sio.GetMemcardIndex()+1, value); + MEMCARDS_LOG("MC(%d) command 0x%02X", sio.GetMemcardIndex()+1, value); break; case 0x42: // WRITE case 0x43: // READ case 0x82: if(value==0x82 && sio.lastsector==sio.sector) sio.mode = 2; if(value==0x42) sio.mode = 0; - if(value==0x43) sio.lastsector = sio.sector; // Reading - + if(value==0x43) sio.lastsector = sio.sector; // Reading + sio.bufcount =133; sio.mcdst = 99; memset8_obj<0xff>(sio.buf); sio.buf[133]=sio.terminator; sio.buf[132]='+'; - MEMCARDS_LOG("MC(%d) command 0x%02X\n", sio.GetMemcardIndex()+1, value); + MEMCARDS_LOG("MC(%d) command 0x%02X", sio.GetMemcardIndex()+1, value); break; case 0xf0: case 0xf1: - case 0xf2: - sio.mcdst = 99; - MEMCARDS_LOG("MC(%d) command 0x%02X\n", sio.GetMemcardIndex()+1, value); + case 0xf2: + sio.mcdst = 99; + MEMCARDS_LOG("MC(%d) command 0x%02X", sio.GetMemcardIndex()+1, value); break; case 0xf3: - case 0xf7: + case 0xf7: sio.bufcount = 4; sio.mcdst = 99; memset8_obj<0xff>(sio.buf); sio.buf[4]=sio.terminator; sio.buf[3]='+'; - MEMCARDS_LOG("MC(%d) command 0x%02X\n", sio.GetMemcardIndex()+1, value); + MEMCARDS_LOG("MC(%d) command 0x%02X", sio.GetMemcardIndex()+1, value); break; case 0x52: sio.rdwr = 1; memset8_obj<0xff>(sio.buf); sio.buf[sio.bufcount]=sio.terminator; sio.buf[sio.bufcount-1]='+'; - MEMCARDS_LOG("MC(%d) command 0x%02X\n", sio.GetMemcardIndex()+1, value); + MEMCARDS_LOG("MC(%d) command 0x%02X", sio.GetMemcardIndex()+1, value); break; case 0x57: sio.rdwr = 2; memset8_obj<0xff>(sio.buf); - sio.buf[sio.bufcount]=sio.terminator; sio.buf[sio.bufcount-1]='+'; - MEMCARDS_LOG("MC(%d) command 0x%02X\n", sio.GetMemcardIndex()+1, value); + sio.buf[sio.bufcount]=sio.terminator; sio.buf[sio.bufcount-1]='+'; + MEMCARDS_LOG("MC(%d) command 0x%02X", sio.GetMemcardIndex()+1, value); break; default: sio.mcdst = 0; memset8_obj<0xff>(sio.buf); - sio.buf[sio.bufcount]=sio.terminator; sio.buf[sio.bufcount-1]='+'; - MEMCARDS_LOG("Unknown MC(%d) command 0x%02X\n", sio.GetMemcardIndex()+1, value); + sio.buf[sio.bufcount]=sio.terminator; sio.buf[sio.bufcount-1]='+'; + MEMCARDS_LOG("Unknown MC(%d) command 0x%02X", sio.GetMemcardIndex()+1, value); } sio.mc_command=value; return; @@ -278,10 +296,10 @@ void SIO_CommandWrite(u8 value,int way) { if (sio.parp==6) { if (sio_xor((u8 *)&sio.sector, 4) == value) - MEMCARDS_LOG("MC(%d) SET PAGE sio.sector 0x%04X\n", + MEMCARDS_LOG("MC(%d) SET PAGE sio.sector 0x%04X", sio.GetMemcardIndex()+1, sio.sector); else - MEMCARDS_LOG("MC(%d) SET PAGE XOR value ERROR 0x%02X != ^0x%02X\n", + MEMCARDS_LOG("MC(%d) SET PAGE XOR value ERROR 0x%02X != ^0x%02X", sio.GetMemcardIndex()+1, value, sio_xor((u8 *)&sio.sector, 4)); } break; @@ -291,7 +309,7 @@ void SIO_CommandWrite(u8 value,int way) { if(sio.parp==2) { sio.terminator = value; sio.buf[4] = value; - MEMCARDS_LOG("MC(%d) SET TERMINATOR command 0x%02X\n", sio.GetMemcardIndex()+1, value); + MEMCARDS_LOG("MC(%d) SET TERMINATOR command 0x%02X", sio.GetMemcardIndex()+1, value); } break; @@ -302,11 +320,11 @@ void SIO_CommandWrite(u8 value,int way) { if(sio.parp == 2) { sio.buf[2] = '+'; sio.buf[3] = sio.terminator; - - //if(value == 0) sio.buf[4] = 0xFF; + + //if(value == 0) sio.buf[4] = 0xFF; sio.buf[4] = 0x55; - MEMCARDS_LOG("MC(%d) GET TERMINATOR command 0x%02X\n", sio.GetMemcardIndex()+1, value); - } + MEMCARDS_LOG("MC(%d) GET TERMINATOR command 0x%02X", sio.GetMemcardIndex()+1, value); + } break; // WRITE DATA case 0x42: @@ -315,12 +333,12 @@ void SIO_CommandWrite(u8 value,int way) { memset8_obj<0xff>(sio.buf); sio.buf[sio.bufcount-1]='+'; sio.buf[sio.bufcount]=sio.terminator; - MEMCARDS_LOG("MC(%d) WRITE command 0x%02X\n\n\n\n\n", sio.GetMemcardIndex()+1, value); - } + MEMCARDS_LOG("MC(%d) WRITE command 0x%02X\n\n\n\n", sio.GetMemcardIndex()+1, value); + } else if ((sio.parp>2) && (sio.parp> 13; diff --git a/pcsx2/SourceLog.cpp b/pcsx2/SourceLog.cpp index 55a2b9db05..ac49b3bbac 100644 --- a/pcsx2/SourceLog.cpp +++ b/pcsx2/SourceLog.cpp @@ -76,6 +76,7 @@ void __Log( const char* fmt, ... ) else if( emuLog != NULL ) // manually write to the logfile. { fputs( tmp, emuLog ); + fputs( "\n", emuLog ); //fputs( "\r\n", emuLog ); fflush( emuLog ); } @@ -113,7 +114,7 @@ static __forceinline void _vSourceLog( u16 protocol, u8 source, u32 cpuPc, u32 c } else if( emuLog != NULL ) // manually write to the logfile. { fputs( tmp, emuLog ); - //fputs( "\r\n", emuLog ); + fputs( "\n", emuLog ); fflush( emuLog ); } #endif diff --git a/pcsx2/Stats.cpp b/pcsx2/Stats.cpp index b515c2f7fb..0f8fb593e8 100644 --- a/pcsx2/Stats.cpp +++ b/pcsx2/Stats.cpp @@ -44,7 +44,7 @@ void statsClose() { #else f = fopen(LOGS_DIR "/stats.txt", "w"); #endif - if (!f) { SysPrintf("Can't open stats.txt\n"); return; } + if (!f) { Console::WriteLn("Can't open stats.txt"); return; } fprintf(f, "-- PCSX2 v%s statics--\n\n", PCSX2_VERSION); fprintf(f, "Ran for %d seconds\n", t); fprintf(f, "Total VSyncs: %d (%s)\n", stats.vsyncCount, Config.PsxType ? "PAL" : "NTSC"); diff --git a/pcsx2/VU0.cpp b/pcsx2/VU0.cpp index c7c9b7936d..2b6c831f6d 100644 --- a/pcsx2/VU0.cpp +++ b/pcsx2/VU0.cpp @@ -62,7 +62,7 @@ void COP2_SPECIAL2() { void COP2_Unknown() { - CPU_LOG("Unknown COP2 opcode called\n"); + CPU_LOG("Unknown COP2 opcode called"); } //**************************************************************************** @@ -165,14 +165,14 @@ void CTC2() { Console::Error("fixme: VU0 Force Break"); } if (cpuRegs.GPR.r[_Rt_].UL[0] & 0x2) { // VU0 Reset - //SysPrintf("fixme: VU0 Reset\n"); + //Console::WriteLn("fixme: VU0 Reset"); vu0ResetRegs(); } if (cpuRegs.GPR.r[_Rt_].UL[0] & 0x100) { // VU1 Force Break Console::Error("fixme: VU1 Force Break"); } if (cpuRegs.GPR.r[_Rt_].UL[0] & 0x200) { // VU1 Reset -// SysPrintf("fixme: VU1 Reset\n"); +// Console::WriteLn("fixme: VU1 Reset"); vu1ResetRegs(); } break; diff --git a/pcsx2/VU0micro.cpp b/pcsx2/VU0micro.cpp index ad30ea69f8..77a19202ab 100644 --- a/pcsx2/VU0micro.cpp +++ b/pcsx2/VU0micro.cpp @@ -73,7 +73,7 @@ void VU0MI_XTOP() { } void vu0ExecMicro(u32 addr) { - VUM_LOG("vu0ExecMicro %x\n", addr); + VUM_LOG("vu0ExecMicro %x", addr); if(VU0.VI[REG_VPU_STAT].UL & 0x1) { DevCon::Notice("vu0ExecMicro > Stalling for previous microprogram to finish"); @@ -95,13 +95,13 @@ void vu0ExecMicro(u32 addr) { void VU0unknown() { assert(0); - CPU_LOG("Unknown VU micromode opcode called\n"); + CPU_LOG("Unknown VU micromode opcode called"); } void VU0regsunknown(_VURegsNum *VUregsn) { assert(0); - CPU_LOG("Unknown VU micromode opcode called\n"); + CPU_LOG("Unknown VU micromode opcode called"); } _vuRegsTables(VU0, VU0regs); diff --git a/pcsx2/VU0microInterp.cpp b/pcsx2/VU0microInterp.cpp index 7edd46370b..cf70894bd1 100644 --- a/pcsx2/VU0microInterp.cpp +++ b/pcsx2/VU0microInterp.cpp @@ -54,7 +54,7 @@ static void _vu0Exec(VURegs* VU) if(VU0.VI[REG_TPC].UL >= VU0.maxmicro){ #ifdef CPU_LOG - SysPrintf("VU0 memory overflow!!: %x\n", VU->VI[REG_TPC].UL); + Console::WriteLn("VU0 memory overflow!!: %x", params VU->VI[REG_TPC].UL); #endif VU0.VI[REG_VPU_STAT].UL&= ~0x1; VU->cycle++; @@ -69,7 +69,7 @@ static void _vu0Exec(VURegs* VU) } if (ptr[1] & 0x20000000) { /* M flag */ VU->flags|= VUFLAG_MFLAGSET; -// SysPrintf("fixme: M flag set\n"); +// Console::WriteLn("fixme: M flag set"); } if (ptr[1] & 0x10000000) { /* D flag */ if (VU0.VI[REG_FBRST].UL & 0x4) { @@ -108,19 +108,19 @@ static void _vu0Exec(VURegs* VU) vfreg = 0; vireg = 0; if (uregs.VFwrite) { if (lregs.VFwrite == uregs.VFwrite) { -// SysPrintf("*PCSX2*: Warning, VF write to the same reg in both lower/upper cycle\n"); +// Console::Notice("*PCSX2*: Warning, VF write to the same reg in both lower/upper cycle"); discard = 1; } if (lregs.VFread0 == uregs.VFwrite || lregs.VFread1 == uregs.VFwrite) { -// SysPrintf("saving reg %d at pc=%x\n", i, VU->VI[REG_TPC].UL); +// Console::WriteLn("saving reg %d at pc=%x", params i, VU->VI[REG_TPC].UL); _VF = VU->VF[uregs.VFwrite]; vfreg = uregs.VFwrite; } } if (uregs.VIread & (1 << REG_CLIP_FLAG)) { if (lregs.VIwrite & (1 << REG_CLIP_FLAG)) { - SysPrintf("*PCSX2*: Warning, VI write to the same reg in both lower/upper cycle\n"); + Console::Notice("*PCSX2*: Warning, VI write to the same reg in both lower/upper cycle"); discard = 1; } if (lregs.VIread & (1 << REG_CLIP_FLAG)) { @@ -178,7 +178,7 @@ void vu0Exec(VURegs* VU) { if (VU->VI[REG_TPC].UL >= VU->maxmicro) { #ifdef CPU_LOG - SysPrintf("VU0 memory overflow!!: %x\n", VU->VI[REG_TPC].UL); + Console::Notice("VU0 memory overflow!!: %x", params VU->VI[REG_TPC].UL); #endif VU0.VI[REG_VPU_STAT].UL&= ~0x1; } else { diff --git a/pcsx2/VU1micro.cpp b/pcsx2/VU1micro.cpp index f52bad2620..669feef7a6 100644 --- a/pcsx2/VU1micro.cpp +++ b/pcsx2/VU1micro.cpp @@ -77,8 +77,8 @@ void vu1ExecMicro(u32 addr) CpuVU1.ExecuteBlock(); } - VUM_LOG("vu1ExecMicro %x\n", addr); - VUM_LOG("vu1ExecMicro %x (count=%d)\n", addr, count++); + VUM_LOG("vu1ExecMicro %x", addr); + VUM_LOG("vu1ExecMicro %x (count=%d)", addr, count++); VU0.VI[REG_VPU_STAT].UL|= 0x100; VU0.VI[REG_VPU_STAT].UL&= ~0x7E000; @@ -93,12 +93,12 @@ _vuRegsTables(VU1, VU1regs); void VU1unknown() { //assert(0); - CPU_LOG("Unknown VU micromode opcode called\n"); + CPU_LOG("Unknown VU micromode opcode called"); } void VU1regsunknown(_VURegsNum *VUregsn) { //assert(0); - CPU_LOG("Unknown VU micromode opcode called\n"); + CPU_LOG("Unknown VU micromode opcode called"); } diff --git a/pcsx2/VU1microInterp.cpp b/pcsx2/VU1microInterp.cpp index 9ff6c3eabd..fc8f7f793a 100644 --- a/pcsx2/VU1microInterp.cpp +++ b/pcsx2/VU1microInterp.cpp @@ -54,7 +54,7 @@ static void _vu1Exec(VURegs* VU) int discard=0; if(VU->VI[REG_TPC].UL >= VU->maxmicro){ - CPU_LOG("VU1 memory overflow!!: %x\n", VU->VI[REG_TPC].UL); + CPU_LOG("VU1 memory overflow!!: %x", VU->VI[REG_TPC].UL); VU->VI[REG_TPC].UL &= 0x3FFF; /*VU0.VI[REG_VPU_STAT].UL&= ~0x100; VU->cycle++; @@ -79,7 +79,7 @@ static void _vu1Exec(VURegs* VU) } } - VUM_LOG("VU->cycle = %d (flags st=%x;mac=%x;clip=%x,q=%f)\n", VU->cycle, VU->statusflag, VU->macflag, VU->clipflag, VU->q.F); + VUM_LOG("VU->cycle = %d (flags st=%x;mac=%x;clip=%x,q=%f)", VU->cycle, VU->statusflag, VU->macflag, VU->clipflag, VU->q.F); VU->code = ptr[1]; VU1regs_UPPER_OPCODE[VU->code & 0x3f](&uregs); @@ -104,19 +104,19 @@ static void _vu1Exec(VURegs* VU) vfreg = 0; vireg = 0; if (uregs.VFwrite) { if (lregs.VFwrite == uregs.VFwrite) { -// SysPrintf("*PCSX2*: Warning, VF write to the same reg in both lower/upper cycle\n"); +// Console::Notice("*PCSX2*: Warning, VF write to the same reg in both lower/upper cycle"); discard = 1; } if (lregs.VFread0 == uregs.VFwrite || lregs.VFread1 == uregs.VFwrite) { -// SysPrintf("saving reg %d at pc=%x\n", i, VU->VI[REG_TPC].UL); +// Console::WriteLn("saving reg %d at pc=%x", params i, VU->VI[REG_TPC].UL); _VF = VU->VF[uregs.VFwrite]; vfreg = uregs.VFwrite; } } if (uregs.VIread & (1 << REG_CLIP_FLAG)) { if (lregs.VIwrite & (1 << REG_CLIP_FLAG)) { - SysPrintf("*PCSX2*: Warning, VI write to the same reg in both lower/upper cycle\n"); + Console::Notice("*PCSX2*: Warning, VI write to the same reg in both lower/upper cycle"); discard = 1; } if (lregs.VIread & (1 << REG_CLIP_FLAG)) { diff --git a/pcsx2/VUmicro.h b/pcsx2/VUmicro.h index 5d95348bae..5933338447 100644 --- a/pcsx2/VUmicro.h +++ b/pcsx2/VUmicro.h @@ -1290,9 +1290,9 @@ void (*PREFIX##_LOWER_OPCODE[128])(_VURegsNum *VUregsn) = { \ #ifdef VUM_LOG #define IdebugUPPER(VU) \ - VUM_LOG("%s\n", dis##VU##MicroUF(VU.code, VU.VI[REG_TPC].UL)); + VUM_LOG("%s", dis##VU##MicroUF(VU.code, VU.VI[REG_TPC].UL)); #define IdebugLOWER(VU) \ - VUM_LOG("%s\n", dis##VU##MicroLF(VU.code, VU.VI[REG_TPC].UL)); + VUM_LOG("%s", dis##VU##MicroLF(VU.code, VU.VI[REG_TPC].UL)); #else @@ -1303,7 +1303,7 @@ void (*PREFIX##_LOWER_OPCODE[128])(_VURegsNum *VUregsn) = { \ #ifdef VUM_LOG #define _vuExecMicroDebug(VU) \ - VUM_LOG("_vuExecMicro: %8.8x\n", VU.VI[REG_TPC].UL); + VUM_LOG("_vuExecMicro: %8.8x", VU.VI[REG_TPC].UL); #else #define _vuExecMicroDebug(VU) #endif diff --git a/pcsx2/VUops.cpp b/pcsx2/VUops.cpp index 9114776b26..0f7a112ae4 100644 --- a/pcsx2/VUops.cpp +++ b/pcsx2/VUops.cpp @@ -54,7 +54,7 @@ void _vuFMACflush(VURegs * VU) { if (VU->fmac[i].enable == 0) continue; if ((VU->cycle - VU->fmac[i].sCycle) >= VU->fmac[i].Cycle) { - VUM_LOG("flushing FMAC pipe[%d] (macflag=%x)\n", i, VU->fmac[i].macflag); + VUM_LOG("flushing FMAC pipe[%d] (macflag=%x)", i, VU->fmac[i].macflag); VU->fmac[i].enable = 0; VU->VI[REG_MAC_FLAG].UL = VU->fmac[i].macflag; @@ -68,7 +68,7 @@ void _vuFDIVflush(VURegs * VU) { if (VU->fdiv.enable == 0) return; if ((VU->cycle - VU->fdiv.sCycle) >= VU->fdiv.Cycle) { - VUM_LOG("flushing FDIV pipe\n"); + VUM_LOG("flushing FDIV pipe"); VU->fdiv.enable = 0; VU->VI[REG_Q].UL = VU->fdiv.reg.UL; @@ -80,7 +80,7 @@ void _vuEFUflush(VURegs * VU) { if (VU->efu.enable == 0) return; if ((VU->cycle - VU->efu.sCycle) >= VU->efu.Cycle) { -// VUM_LOG("flushing EFU pipe\n"); +// VUM_LOG("flushing EFU pipe"); VU->efu.enable = 0; VU->VI[REG_P].UL = VU->efu.reg.UL; @@ -101,7 +101,7 @@ void _vuFlushAll(VURegs* VU) nRepeat = 1; if ((VU->cycle - VU->fmac[i].sCycle) >= VU->fmac[i].Cycle) { - VUM_LOG("flushing FMAC pipe[%d] (macflag=%x)\n", i, VU->fmac[i].macflag); + VUM_LOG("flushing FMAC pipe[%d] (macflag=%x)", i, VU->fmac[i].macflag); VU->fmac[i].enable = 0; VU->VI[REG_MAC_FLAG].UL = VU->fmac[i].macflag; @@ -115,7 +115,7 @@ void _vuFlushAll(VURegs* VU) nRepeat = 1; if ((VU->cycle - VU->fdiv.sCycle) >= VU->fdiv.Cycle) { - VUM_LOG("flushing FDIV pipe\n"); + VUM_LOG("flushing FDIV pipe"); nRepeat = 1; VU->fdiv.enable = 0; @@ -129,7 +129,7 @@ void _vuFlushAll(VURegs* VU) nRepeat = 1; if ((VU->cycle - VU->efu.sCycle) >= VU->efu.Cycle) { - // VUM_LOG("flushing EFU pipe\n"); + // VUM_LOG("flushing EFU pipe"); nRepeat = 1; VU->efu.enable = 0; @@ -165,7 +165,7 @@ void _vuFMACTestStall(VURegs * VU, int reg, int xyzw) { VU->VI[REG_MAC_FLAG].UL = VU->fmac[i].macflag; VU->VI[REG_STATUS_FLAG].UL = VU->fmac[i].statusflag; VU->VI[REG_CLIP_FLAG].UL = VU->fmac[i].clipflag; - VUM_LOG("FMAC[%d] stall %d\n", i, cycle); + VUM_LOG("FMAC[%d] stall %d", i, cycle); VU->cycle+= cycle; _vuTestPipes(VU); @@ -179,11 +179,10 @@ void _vuFMACAdd(VURegs * VU, int reg, int xyzw) { if (VU->fmac[i].enable == 1) continue; break; } - if (i==8) { -// SysPrintf("*PCSX2*: error , out of fmacs %d\n", VU->cycle); - } + //if (i==8) Console::Error("*PCSX2*: error , out of fmacs %d", params VU->cycle); + - VUM_LOG("adding FMAC pipe[%d]; xyzw=%x\n", i, xyzw); + VUM_LOG("adding FMAC pipe[%d]; xyzw=%x", i, xyzw); VU->fmac[i].enable = 1; VU->fmac[i].sCycle = VU->cycle; @@ -196,7 +195,7 @@ void _vuFMACAdd(VURegs * VU, int reg, int xyzw) { } void _vuFDIVAdd(VURegs * VU, int cycles) { - VUM_LOG("adding FDIV pipe\n"); + VUM_LOG("adding FDIV pipe"); VU->fdiv.enable = 1; VU->fdiv.sCycle = VU->cycle; @@ -220,7 +219,7 @@ void _vuFlushFDIV(VURegs * VU) { if (VU->fdiv.enable == 0) return; cycle = VU->fdiv.Cycle - (VU->cycle - VU->fdiv.sCycle); - VUM_LOG("waiting FDIV pipe %d\n", cycle); + VUM_LOG("waiting FDIV pipe %d", cycle); VU->fdiv.enable = 0; VU->cycle+= cycle; @@ -234,7 +233,7 @@ void _vuFlushEFU(VURegs * VU) { if (VU->efu.enable == 0) return; cycle = VU->efu.Cycle - (VU->cycle - VU->efu.sCycle); -// VUM_LOG("waiting EFU pipe %d\n", cycle); +// VUM_LOG("waiting EFU pipe %d", cycle); VU->efu.enable = 0; VU->cycle+= cycle; @@ -317,7 +316,6 @@ void _vuAddLowerStalls(VURegs * VU, _VURegsNum *VUregsn) { /* VU Upper instructions */ /******************************/ #ifndef INT_VUDOUBLEHACK -static u32 d; float vuDouble(u32 f) { switch(f & 0x7f800000){ @@ -325,10 +323,13 @@ float vuDouble(u32 f) f &= 0x80000000; return *(float*)&f; break; - case 0x7f800000: + case 0x7f800000: + { + u32 d; d = (f & 0x80000000)|0x7f7fffff; return *(float*)&d; break; + } default: return *(float*)&f; break; @@ -2719,7 +2720,7 @@ void _vuRegsFSSET(VURegs * VU, _VURegsNum *VUregsn) { VUregsn->VFread0 = 0; VUregsn->VFread1 = 0; VUregsn->VIwrite = 1 << REG_STATUS_FLAG; - VUregsn->VIread = 0;//1 << REG_STATUS_FLAG; this kills speed + VUregsn->VIread = 0; } void _vuRegsFMAND(VURegs * VU, _VURegsNum *VUregsn) { diff --git a/pcsx2/Vif.cpp b/pcsx2/Vif.cpp index 329f98f2d7..6d9ec34b9c 100644 --- a/pcsx2/Vif.cpp +++ b/pcsx2/Vif.cpp @@ -5,12 +5,12 @@ * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. - * + * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. - * + * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA @@ -39,9 +39,16 @@ vifStruct *_vif; static int n; -__forceinline static int _limit( int a, int max ) +#define spr0 ((DMACh*)&PS2MEM_HW[0xD000]) + +static int cycles; +extern int g_vifCycles; +u16 vifqwc = 0; +u32 mfifodmairq = 0; + +__forceinline static int _limit(int a, int max) { - return ( a > max ) ? max : a; + return (a > max) ? max : a; } #define _UNPACKpart( offnum, func ) \ @@ -57,607 +64,722 @@ __forceinline static int _limit( int a, int max ) _vifRegs->offset++; \ } -static __releaseinline void writeX( u32 *dest, u32 data ) { - if (_vifRegs->code & 0x10000000) { - switch ( _vif->cl ) { - case 0: n = (_vifRegs->mask) & 0x3; break; - case 1: n = (_vifRegs->mask >> 8) & 0x3; break; - case 2: n = (_vifRegs->mask >> 16) & 0x3; break; - default: n = (_vifRegs->mask >> 24) & 0x3; break; - } - } else n = 0; - - switch ( n ) { - case 0: - if((_vif->cmd & 0x6F) == 0x6f) { - *dest = data; +static __releaseinline void writeX(u32 *dest, u32 data) +{ + if (_vifRegs->code & 0x10000000) + { + switch (_vif->cl) + { + case 0: + n = (_vifRegs->mask) & 0x3; break; + case 1: + n = (_vifRegs->mask >> 8) & 0x3; + break; + case 2: + n = (_vifRegs->mask >> 16) & 0x3; + break; + default: + n = (_vifRegs->mask >> 24) & 0x3; + break; + } + } + else n = 0; + + switch (n) + { + case 0: + if ((_vif->cmd & 0x6F) == 0x6f) + { + *dest = data; } - if (_vifRegs->mode == 1) { + else if (_vifRegs->mode == 1) + { *dest = data + _vifRegs->r0; - } else - if (_vifRegs->mode == 2) { - _vifRegs->r0 = data + _vifRegs->r0; + } + else if (_vifRegs->mode == 2) + { + _vifRegs->r0 += data; *dest = _vifRegs->r0; - } else { + } + else + { *dest = data; } break; - case 1: *dest = _vifRegs->r0; break; - case 2: - switch ( _vif->cl ) { - case 0: *dest = _vifRegs->c0; break; - case 1: *dest = _vifRegs->c1; break; - case 2: *dest = _vifRegs->c2; break; - default: *dest = _vifRegs->c3; break; + case 1: + *dest = _vifRegs->r0; + break; + case 2: + switch (_vif->cl) + { + case 0: + *dest = _vifRegs->c0; + break; + case 1: + *dest = _vifRegs->c1; + break; + case 2: + *dest = _vifRegs->c2; + break; + default: + *dest = _vifRegs->c3; + break; } break; } -// VIF_LOG("writeX %8.8x : Mode %d, r0 = %x, data %8.8x\n", *dest,_vifRegs->mode,_vifRegs->r0,data); +// VIF_LOG("writeX %8.8x : Mode %d, r0 = %x, data %8.8x", *dest,_vifRegs->mode,_vifRegs->r0,data); } -static __releaseinline void writeY( u32 *dest, u32 data ) { - if (_vifRegs->code & 0x10000000) { - switch ( _vif->cl ) { - case 0: n = (_vifRegs->mask >> 2) & 0x3; break; - case 1: n = (_vifRegs->mask >> 10) & 0x3; break; - case 2: n = (_vifRegs->mask >> 18) & 0x3; break; - default: n = (_vifRegs->mask >> 26) & 0x3; break; - } - } else n = 0; - - switch ( n ) { - case 0: - if((_vif->cmd & 0x6F) == 0x6f) { - *dest = data; +static __releaseinline void writeY(u32 *dest, u32 data) +{ + if (_vifRegs->code & 0x10000000) + { + switch (_vif->cl) + { + case 0: + n = (_vifRegs->mask >> 2) & 0x3; break; + case 1: + n = (_vifRegs->mask >> 10) & 0x3; + break; + case 2: + n = (_vifRegs->mask >> 18) & 0x3; + break; + default: + n = (_vifRegs->mask >> 26) & 0x3; + break; + } + } + else n = 0; + + switch (n) + { + case 0: + if ((_vif->cmd & 0x6F) == 0x6f) + { + *dest = data; } - if (_vifRegs->mode == 1) { + else if (_vifRegs->mode == 1) + { *dest = data + _vifRegs->r1; - } else - if (_vifRegs->mode == 2) { - _vifRegs->r1 = data + _vifRegs->r1; + } + else if (_vifRegs->mode == 2) + { + _vifRegs->r1 += data; *dest = _vifRegs->r1; - } else { + } + else + { *dest = data; } break; - case 1: *dest = _vifRegs->r1; break; - case 2: - switch ( _vif->cl ) { - case 0: *dest = _vifRegs->c0; break; - case 1: *dest = _vifRegs->c1; break; - case 2: *dest = _vifRegs->c2; break; - default: *dest = _vifRegs->c3; break; + case 1: + *dest = _vifRegs->r1; + break; + case 2: + switch (_vif->cl) + { + case 0: + *dest = _vifRegs->c0; + break; + case 1: + *dest = _vifRegs->c1; + break; + case 2: + *dest = _vifRegs->c2; + break; + default: + *dest = _vifRegs->c3; + break; } break; } -// VIF_LOG("writeY %8.8x : Mode %d, r1 = %x, data %8.8x\n", *dest,_vifRegs->mode,_vifRegs->r1,data); +// VIF_LOG("writeY %8.8x : Mode %d, r1 = %x, data %8.8x", *dest,_vifRegs->mode,_vifRegs->r1,data); } -static __releaseinline void writeZ( u32 *dest, u32 data ) { - if (_vifRegs->code & 0x10000000) { - switch ( _vif->cl ) { - case 0: n = (_vifRegs->mask >> 4) & 0x3; break; - case 1: n = (_vifRegs->mask >> 12) & 0x3; break; - case 2: n = (_vifRegs->mask >> 20) & 0x3; break; - default: n = (_vifRegs->mask >> 28) & 0x3; break; - } - } else n = 0; - - switch ( n ) { - case 0: - if((_vif->cmd & 0x6F) == 0x6f) { - *dest = data; +static __releaseinline void writeZ(u32 *dest, u32 data) +{ + if (_vifRegs->code & 0x10000000) + { + switch (_vif->cl) + { + case 0: + n = (_vifRegs->mask >> 4) & 0x3; break; + case 1: + n = (_vifRegs->mask >> 12) & 0x3; + break; + case 2: + n = (_vifRegs->mask >> 20) & 0x3; + break; + default: + n = (_vifRegs->mask >> 28) & 0x3; + break; + } + } + else n = 0; + + switch (n) + { + case 0: + if ((_vif->cmd & 0x6F) == 0x6f) + { + *dest = data; } - if (_vifRegs->mode == 1) { + else if (_vifRegs->mode == 1) + { *dest = data + _vifRegs->r2; - } else - if (_vifRegs->mode == 2) { - _vifRegs->r2 = data + _vifRegs->r2; + } + else if (_vifRegs->mode == 2) + { + _vifRegs->r2 += data; *dest = _vifRegs->r2; - } else { + } + else + { *dest = data; } break; - case 1: *dest = _vifRegs->r2; break; - case 2: - switch ( _vif->cl ) { - case 0: *dest = _vifRegs->c0; break; - case 1: *dest = _vifRegs->c1; break; - case 2: *dest = _vifRegs->c2; break; - default: *dest = _vifRegs->c3; break; + case 1: + *dest = _vifRegs->r2; + break; + case 2: + switch (_vif->cl) + { + case 0: + *dest = _vifRegs->c0; + break; + case 1: + *dest = _vifRegs->c1; + break; + case 2: + *dest = _vifRegs->c2; + break; + default: + *dest = _vifRegs->c3; + break; } break; } -// VIF_LOG("writeZ %8.8x : Mode %d, r2 = %x, data %8.8x\n", *dest,_vifRegs->mode,_vifRegs->r2,data); +// VIF_LOG("writeZ %8.8x : Mode %d, r2 = %x, data %8.8x", *dest,_vifRegs->mode,_vifRegs->r2,data); } -static __releaseinline void writeW( u32 *dest, u32 data ) { - if (_vifRegs->code & 0x10000000) { - switch ( _vif->cl ) { - case 0: n = (_vifRegs->mask >> 6) & 0x3; break; - case 1: n = (_vifRegs->mask >> 14) & 0x3; break; - case 2: n = (_vifRegs->mask >> 22) & 0x3; break; - default: n = (_vifRegs->mask >> 30) & 0x3; break; - } - } else n = 0; - - switch ( n ) { - case 0: - if((_vif->cmd & 0x6F) == 0x6f) { - *dest = data; +static __releaseinline void writeW(u32 *dest, u32 data) +{ + if (_vifRegs->code & 0x10000000) + { + switch (_vif->cl) + { + case 0: + n = (_vifRegs->mask >> 6) & 0x3; break; + case 1: + n = (_vifRegs->mask >> 14) & 0x3; + break; + case 2: + n = (_vifRegs->mask >> 22) & 0x3; + break; + default: + n = (_vifRegs->mask >> 30) & 0x3; + break; + } + } + else n = 0; + + switch (n) + { + case 0: + if ((_vif->cmd & 0x6F) == 0x6f) + { + *dest = data; } - if (_vifRegs->mode == 1) { + else if (_vifRegs->mode == 1) + { *dest = data + _vifRegs->r3; - } else - if (_vifRegs->mode == 2) { - _vifRegs->r3 = data + _vifRegs->r3; + } + else if (_vifRegs->mode == 2) + { + _vifRegs->r3 += data; *dest = _vifRegs->r3; - } else { + } + else + { *dest = data; } break; - case 1: *dest = _vifRegs->r3; break; - case 2: - switch ( _vif->cl ) { - case 0: *dest = _vifRegs->c0; break; - case 1: *dest = _vifRegs->c1; break; - case 2: *dest = _vifRegs->c2; break; - default: *dest = _vifRegs->c3; break; + case 1: + *dest = _vifRegs->r3; + break; + case 2: + switch (_vif->cl) + { + case 0: + *dest = _vifRegs->c0; + break; + case 1: + *dest = _vifRegs->c1; + break; + case 2: + *dest = _vifRegs->c2; + break; + default: + *dest = _vifRegs->c3; + break; } break; } -// VIF_LOG("writeW %8.8x : Mode %d, r3 = %x, data %8.8x\n", *dest,_vifRegs->mode,_vifRegs->r3,data); +// VIF_LOG("writeW %8.8x : Mode %d, r3 = %x, data %8.8x", *dest,_vifRegs->mode,_vifRegs->r3,data); } -void __fastcall UNPACK_S_32(u32 *dest, u32 *data, int size) { - _UNPACKpart(0, writeX(dest++, *data) ); - _UNPACKpart(1, writeY(dest++, *data) ); - _UNPACKpart(2, writeZ(dest++, *data) ); - _UNPACKpart(3, writeW(dest , *data) ); +void __fastcall UNPACK_S_32(u32 *dest, u32 *data, int size) +{ + _UNPACKpart(0, writeX(dest++, *data)); + _UNPACKpart(1, writeY(dest++, *data)); + _UNPACKpart(2, writeZ(dest++, *data)); + _UNPACKpart(3, writeW(dest , *data)); if (_vifRegs->offset == 4) _vifRegs->offset = 0; } -void __fastcall UNPACK_S_16s( u32 *dest, u32 *data, int size) { +void __fastcall UNPACK_S_16s(u32 *dest, u32 *data, int size) +{ s16 *sdata = (s16*)data; - _UNPACKpart(0, writeX(dest++, *sdata) ); - _UNPACKpart(1, writeY(dest++, *sdata) ); - _UNPACKpart(2, writeZ(dest++, *sdata) ); - _UNPACKpart(3, writeW(dest , *sdata) ); - if (_vifRegs->offset == 4) _vifRegs->offset = 0; + _UNPACKpart(0, writeX(dest++, *sdata)); + _UNPACKpart(1, writeY(dest++, *sdata)); + _UNPACKpart(2, writeZ(dest++, *sdata)); + _UNPACKpart(3, writeW(dest , *sdata)); + if (_vifRegs->offset == 4) _vifRegs->offset = 0; } -void __fastcall UNPACK_S_16u( u32 *dest, u32 *data, int size) { +void __fastcall UNPACK_S_16u(u32 *dest, u32 *data, int size) +{ const u16 *sdata = (u16*)data; - _UNPACKpart(0, writeX(dest++, *sdata) ); - _UNPACKpart(1, writeY(dest++, *sdata) ); - _UNPACKpart(2, writeZ(dest++, *sdata) ); - _UNPACKpart(3, writeW(dest , *sdata) ); + _UNPACKpart(0, writeX(dest++, *sdata)); + _UNPACKpart(1, writeY(dest++, *sdata)); + _UNPACKpart(2, writeZ(dest++, *sdata)); + _UNPACKpart(3, writeW(dest , *sdata)); if (_vifRegs->offset == 4) _vifRegs->offset = 0; } -void __fastcall UNPACK_S_8s(u32 *dest, u32 *data, int size) { +void __fastcall UNPACK_S_8s(u32 *dest, u32 *data, int size) +{ s8 *cdata = (s8*)data; - _UNPACKpart(0, writeX(dest++, *cdata) ); - _UNPACKpart(1, writeY(dest++, *cdata) ); - _UNPACKpart(2, writeZ(dest++, *cdata) ); - _UNPACKpart(3, writeW(dest , *cdata) ); + _UNPACKpart(0, writeX(dest++, *cdata)); + _UNPACKpart(1, writeY(dest++, *cdata)); + _UNPACKpart(2, writeZ(dest++, *cdata)); + _UNPACKpart(3, writeW(dest , *cdata)); if (_vifRegs->offset == 4) _vifRegs->offset = 0; } -void __fastcall UNPACK_S_8u(u32 *dest, u32 *data, int size) { +void __fastcall UNPACK_S_8u(u32 *dest, u32 *data, int size) +{ u8 *cdata = (u8*)data; - _UNPACKpart(0, writeX(dest++, *cdata) ); - _UNPACKpart(1, writeY(dest++, *cdata) ); - _UNPACKpart(2, writeZ(dest++, *cdata) ); - _UNPACKpart(3, writeW(dest , *cdata) ); + _UNPACKpart(0, writeX(dest++, *cdata)); + _UNPACKpart(1, writeY(dest++, *cdata)); + _UNPACKpart(2, writeZ(dest++, *cdata)); + _UNPACKpart(3, writeW(dest , *cdata)); if (_vifRegs->offset == 4) _vifRegs->offset = 0; } -void __fastcall UNPACK_V2_32( u32 *dest, u32 *data, int size ) { +void __fastcall UNPACK_V2_32(u32 *dest, u32 *data, int size) +{ _UNPACKpart(0, writeX(dest++, *data++)); _UNPACKpart(1, writeY(dest++, *data--)); _UNPACKpart_nosize(2, writeZ(dest++, *data)); _UNPACKpart_nosize(3, writeW(dest , 0)); if (_vifRegs->offset == 4) _vifRegs->offset = 0; - + } -void __fastcall UNPACK_V2_16s(u32 *dest, u32 *data, int size) { +void __fastcall UNPACK_V2_16s(u32 *dest, u32 *data, int size) +{ s16 *sdata = (s16*)data; - _UNPACKpart(0, writeX(dest++, *sdata++)); - _UNPACKpart(1, writeY(dest++, *sdata--)); - _UNPACKpart_nosize(2,writeZ(dest++, *sdata++)); - _UNPACKpart_nosize(3,writeW(dest , *sdata)); + _UNPACKpart(0, writeX(dest++, *sdata++)); + _UNPACKpart(1, writeY(dest++, *sdata--)); + _UNPACKpart_nosize(2, writeZ(dest++, *sdata++)); + _UNPACKpart_nosize(3, writeW(dest , *sdata)); if (_vifRegs->offset == 4) _vifRegs->offset = 0; } -void __fastcall UNPACK_V2_16u(u32 *dest, u32 *data, int size) { +void __fastcall UNPACK_V2_16u(u32 *dest, u32 *data, int size) +{ u16 *sdata = (u16*)data; - _UNPACKpart(0, writeX(dest++, *sdata++)); - _UNPACKpart(1, writeY(dest++, *sdata--)); - _UNPACKpart_nosize(2,writeZ(dest++, *sdata++)); - _UNPACKpart_nosize(3,writeW(dest , *sdata)); + _UNPACKpart(0, writeX(dest++, *sdata++)); + _UNPACKpart(1, writeY(dest++, *sdata--)); + _UNPACKpart_nosize(2, writeZ(dest++, *sdata++)); + _UNPACKpart_nosize(3, writeW(dest , *sdata)); if (_vifRegs->offset == 4) _vifRegs->offset = 0; } -void __fastcall UNPACK_V2_8s(u32 *dest, u32 *data, int size) { +void __fastcall UNPACK_V2_8s(u32 *dest, u32 *data, int size) +{ s8 *cdata = (s8*)data; - _UNPACKpart(0, writeX(dest++, *cdata++)); - _UNPACKpart(1, writeY(dest++, *cdata--)); - _UNPACKpart_nosize(2,writeZ(dest++, *cdata++)); - _UNPACKpart_nosize(3,writeW(dest , *cdata)); + _UNPACKpart(0, writeX(dest++, *cdata++)); + _UNPACKpart(1, writeY(dest++, *cdata--)); + _UNPACKpart_nosize(2, writeZ(dest++, *cdata++)); + _UNPACKpart_nosize(3, writeW(dest , *cdata)); if (_vifRegs->offset == 4) _vifRegs->offset = 0; } -void __fastcall UNPACK_V2_8u(u32 *dest, u32 *data, int size) { +void __fastcall UNPACK_V2_8u(u32 *dest, u32 *data, int size) +{ u8 *cdata = (u8*)data; - _UNPACKpart(0, writeX(dest++, *cdata++)); - _UNPACKpart(1, writeY(dest++, *cdata--)); - _UNPACKpart_nosize(2,writeZ(dest++, *cdata++)); - _UNPACKpart_nosize(3,writeW(dest , *cdata)); + _UNPACKpart(0, writeX(dest++, *cdata++)); + _UNPACKpart(1, writeY(dest++, *cdata--)); + _UNPACKpart_nosize(2, writeZ(dest++, *cdata++)); + _UNPACKpart_nosize(3, writeW(dest , *cdata)); if (_vifRegs->offset == 4) _vifRegs->offset = 0; } -void __fastcall UNPACK_V3_32(u32 *dest, u32 *data, int size) { - _UNPACKpart(0, writeX(dest++, *data++); ); - _UNPACKpart(1, writeY(dest++, *data++); ); - _UNPACKpart(2, writeZ(dest++, *data++); ); - _UNPACKpart_nosize(3, writeW(dest, *data); ); +void __fastcall UNPACK_V3_32(u32 *dest, u32 *data, int size) +{ + _UNPACKpart(0, writeX(dest++, *data++);); + _UNPACKpart(1, writeY(dest++, *data++);); + _UNPACKpart(2, writeZ(dest++, *data++);); + _UNPACKpart_nosize(3, writeW(dest, *data);); if (_vifRegs->offset == 4) _vifRegs->offset = 0; } -void __fastcall UNPACK_V3_16s(u32 *dest, u32 *data, int size) { +void __fastcall UNPACK_V3_16s(u32 *dest, u32 *data, int size) +{ s16 *sdata = (s16*)data; - _UNPACKpart(0, writeX(dest++, *sdata++)); - _UNPACKpart(1, writeY(dest++, *sdata++)); - _UNPACKpart(2, writeZ(dest++, *sdata++)); - _UNPACKpart_nosize(3,writeW(dest, *sdata)); + _UNPACKpart(0, writeX(dest++, *sdata++)); + _UNPACKpart(1, writeY(dest++, *sdata++)); + _UNPACKpart(2, writeZ(dest++, *sdata++)); + _UNPACKpart_nosize(3, writeW(dest, *sdata)); if (_vifRegs->offset == 4) _vifRegs->offset = 0; } -void __fastcall UNPACK_V3_16u(u32 *dest, u32 *data, int size) { +void __fastcall UNPACK_V3_16u(u32 *dest, u32 *data, int size) +{ u16 *sdata = (u16*)data; - _UNPACKpart(0, writeX(dest++, *sdata++)); - _UNPACKpart(1, writeY(dest++, *sdata++)); - _UNPACKpart(2, writeZ(dest++, *sdata++)); - _UNPACKpart_nosize(3,writeW(dest, *sdata)); + _UNPACKpart(0, writeX(dest++, *sdata++)); + _UNPACKpart(1, writeY(dest++, *sdata++)); + _UNPACKpart(2, writeZ(dest++, *sdata++)); + _UNPACKpart_nosize(3, writeW(dest, *sdata)); if (_vifRegs->offset == 4) _vifRegs->offset = 0; } -void __fastcall UNPACK_V3_8s(u32 *dest, u32 *data, int size) { +void __fastcall UNPACK_V3_8s(u32 *dest, u32 *data, int size) +{ s8 *cdata = (s8*)data; - _UNPACKpart(0, writeX(dest++, *cdata++)); - _UNPACKpart(1, writeY(dest++, *cdata++)); - _UNPACKpart(2, writeZ(dest++, *cdata++)); - _UNPACKpart_nosize(3,writeW(dest, *cdata)); + _UNPACKpart(0, writeX(dest++, *cdata++)); + _UNPACKpart(1, writeY(dest++, *cdata++)); + _UNPACKpart(2, writeZ(dest++, *cdata++)); + _UNPACKpart_nosize(3, writeW(dest, *cdata)); if (_vifRegs->offset == 4) _vifRegs->offset = 0; } -void __fastcall UNPACK_V3_8u(u32 *dest, u32 *data, int size) { +void __fastcall UNPACK_V3_8u(u32 *dest, u32 *data, int size) +{ u8 *cdata = (u8*)data; - _UNPACKpart(0, writeX(dest++, *cdata++)); - _UNPACKpart(1, writeY(dest++, *cdata++)); - _UNPACKpart(2, writeZ(dest++, *cdata++)); - _UNPACKpart_nosize(3,writeW(dest, *cdata)); + _UNPACKpart(0, writeX(dest++, *cdata++)); + _UNPACKpart(1, writeY(dest++, *cdata++)); + _UNPACKpart(2, writeZ(dest++, *cdata++)); + _UNPACKpart_nosize(3, writeW(dest, *cdata)); if (_vifRegs->offset == 4) _vifRegs->offset = 0; } -void __fastcall UNPACK_V4_32( u32 *dest, u32 *data , int size) { - _UNPACKpart(0, writeX(dest++, *data++) ); - _UNPACKpart(1, writeY(dest++, *data++) ); - _UNPACKpart(2, writeZ(dest++, *data++) ); - _UNPACKpart(3, writeW(dest , *data ) ); +void __fastcall UNPACK_V4_32(u32 *dest, u32 *data , int size) +{ + _UNPACKpart(0, writeX(dest++, *data++)); + _UNPACKpart(1, writeY(dest++, *data++)); + _UNPACKpart(2, writeZ(dest++, *data++)); + _UNPACKpart(3, writeW(dest , *data)); if (_vifRegs->offset == 4) _vifRegs->offset = 0; } -void __fastcall UNPACK_V4_16s(u32 *dest, u32 *data, int size) { +void __fastcall UNPACK_V4_16s(u32 *dest, u32 *data, int size) +{ s16 *sdata = (s16*)data; - _UNPACKpart(0, writeX(dest++, *sdata++) ); - _UNPACKpart(1, writeY(dest++, *sdata++) ); - _UNPACKpart(2, writeZ(dest++, *sdata++) ); - _UNPACKpart(3, writeW(dest , *sdata ) ); - if (_vifRegs->offset == 4) _vifRegs->offset = 0; -} - -void __fastcall UNPACK_V4_16u(u32 *dest, u32 *data, int size) { - u16 *sdata = (u16*)data; - _UNPACKpart(0, writeX(dest++, *sdata++) ); - _UNPACKpart(1, writeY(dest++, *sdata++) ); - _UNPACKpart(2, writeZ(dest++, *sdata++) ); - _UNPACKpart(3, writeW(dest , *sdata ) ); - if (_vifRegs->offset == 4) _vifRegs->offset = 0; -} - -void __fastcall UNPACK_V4_8s(u32 *dest, u32 *data, int size) { - s8 *cdata = (s8*)data; - _UNPACKpart(0, writeX(dest++, *cdata++) ); - _UNPACKpart(1, writeY(dest++, *cdata++) ); - _UNPACKpart(2, writeZ(dest++, *cdata++) ); - _UNPACKpart(3, writeW(dest , *cdata ) ); - if (_vifRegs->offset == 4) _vifRegs->offset = 0; -} - -void __fastcall UNPACK_V4_8u(u32 *dest, u32 *data, int size) { - u8 *cdata = (u8*)data; - _UNPACKpart(0, writeX(dest++, *cdata++) ); - _UNPACKpart(1, writeY(dest++, *cdata++) ); - _UNPACKpart(2, writeZ(dest++, *cdata++) ); - _UNPACKpart(3, writeW(dest , *cdata ) ); - if (_vifRegs->offset == 4) _vifRegs->offset = 0; -} - -void __fastcall UNPACK_V4_5(u32 *dest, u32 *data, int size) { - - _UNPACKpart(0, writeX(dest++, (*data & 0x001f) << 3); ); - _UNPACKpart(1, writeY(dest++, (*data & 0x03e0) >> 2); ); - _UNPACKpart(2, writeZ(dest++, (*data & 0x7c00) >> 7); ); - _UNPACKpart(3, writeW(dest , (*data & 0x8000) >> 8); ); + _UNPACKpart(0, writeX(dest++, *sdata++)); + _UNPACKpart(1, writeY(dest++, *sdata++)); + _UNPACKpart(2, writeZ(dest++, *sdata++)); + _UNPACKpart(3, writeW(dest , *sdata)); if (_vifRegs->offset == 4) _vifRegs->offset = 0; } -static int cycles; -extern int g_vifCycles; -u16 vifqwc = 0; -static __forceinline int mfifoVIF1rbTransfer() { +void __fastcall UNPACK_V4_16u(u32 *dest, u32 *data, int size) +{ + u16 *sdata = (u16*)data; + _UNPACKpart(0, writeX(dest++, *sdata++)); + _UNPACKpart(1, writeY(dest++, *sdata++)); + _UNPACKpart(2, writeZ(dest++, *sdata++)); + _UNPACKpart(3, writeW(dest , *sdata)); + if (_vifRegs->offset == 4) _vifRegs->offset = 0; +} + +void __fastcall UNPACK_V4_8s(u32 *dest, u32 *data, int size) +{ + s8 *cdata = (s8*)data; + _UNPACKpart(0, writeX(dest++, *cdata++)); + _UNPACKpart(1, writeY(dest++, *cdata++)); + _UNPACKpart(2, writeZ(dest++, *cdata++)); + _UNPACKpart(3, writeW(dest , *cdata)); + if (_vifRegs->offset == 4) _vifRegs->offset = 0; +} + +void __fastcall UNPACK_V4_8u(u32 *dest, u32 *data, int size) +{ + u8 *cdata = (u8*)data; + _UNPACKpart(0, writeX(dest++, *cdata++)); + _UNPACKpart(1, writeY(dest++, *cdata++)); + _UNPACKpart(2, writeZ(dest++, *cdata++)); + _UNPACKpart(3, writeW(dest , *cdata)); + if (_vifRegs->offset == 4) _vifRegs->offset = 0; +} + +void __fastcall UNPACK_V4_5(u32 *dest, u32 *data, int size) +{ + + _UNPACKpart(0, writeX(dest++, (*data & 0x001f) << 3);); + _UNPACKpart(1, writeY(dest++, (*data & 0x03e0) >> 2);); + _UNPACKpart(2, writeZ(dest++, (*data & 0x7c00) >> 7);); + _UNPACKpart(3, writeW(dest , (*data & 0x8000) >> 8);); + if (_vifRegs->offset == 4) _vifRegs->offset = 0; +} + +static __forceinline int mfifoVIF1rbTransfer() +{ u32 maddr = psHu32(DMAC_RBOR); u32 ret, msize = psHu32(DMAC_RBOR) + psHu32(DMAC_RBSR) + 16; u16 mfifoqwc = std::min(vif1ch->qwc, vifqwc); u32 *src; - + /* Check if the transfer should wrap around the ring buffer */ - if ((vif1ch->madr+(mfifoqwc << 4)) > (msize)) { + if ((vif1ch->madr + (mfifoqwc << 4)) > (msize)) + { int s1 = ((msize) - vif1ch->madr) >> 2; - - SPR_LOG("Split MFIFO\n"); + + SPR_LOG("Split MFIFO"); /* it does, so first copy 's1' bytes from 'addr' to 'data' */ src = (u32*)PSM(vif1ch->madr); if (src == NULL) return -1; - if(vif1.vifstalled == 1){ - ret = VIF1transfer(src+vif1.irqoffset, s1-vif1.irqoffset, 0); - } + + if (vif1.vifstalled == 1) + ret = VIF1transfer(src + vif1.irqoffset, s1 - vif1.irqoffset, 0); else - ret = VIF1transfer(src, s1, 0); - if(ret == -2) return ret; - + ret = VIF1transfer(src, s1, 0); + + if (ret == -2) return ret; + /* and second copy 's2' bytes from 'maddr' to '&data[s1]' */ vif1ch->madr = maddr; - + src = (u32*)PSM(maddr); if (src == NULL) return -1; - ret = VIF1transfer(src, ((mfifoqwc << 2) - s1), 0); - } else + ret = VIF1transfer(src, ((mfifoqwc << 2) - s1), 0); + } + else { - SPR_LOG("Direct MFIFO\n"); + SPR_LOG("Direct MFIFO"); /* it doesn't, so just transfer 'qwc*4' words */ src = (u32*)PSM(vif1ch->madr); if (src == NULL) return -1; - if(vif1.vifstalled == 1) - ret = VIF1transfer(src+vif1.irqoffset, mfifoqwc*4-vif1.irqoffset, 0); + + if (vif1.vifstalled == 1) + ret = VIF1transfer(src + vif1.irqoffset, mfifoqwc * 4 - vif1.irqoffset, 0); else - ret = VIF1transfer(src, mfifoqwc << 2, 0); - if(ret == -2) return ret; + ret = VIF1transfer(src, mfifoqwc << 2, 0); + + if (ret == -2) return ret; } - return ret; } -static __forceinline int mfifoVIF1chain() { +static __forceinline int mfifoVIF1chain() +{ int ret; - + /* Is QWC = 0? if so there is nothing to transfer */ - if (vif1ch->qwc == 0 && vif1.vifstalled == 0) { + if (vif1ch->qwc == 0 && vif1.vifstalled == 0) + { vif1.inprogress = 0; return 0; } - if (vif1ch->madr >= psHu32(DMAC_RBOR) && - vif1ch->madr <= (psHu32(DMAC_RBOR)+psHu32(DMAC_RBSR))) { + vif1ch->madr <= (psHu32(DMAC_RBOR) + psHu32(DMAC_RBSR))) + { u16 startqwc = vif1ch->qwc; ret = mfifoVIF1rbTransfer(); vifqwc -= startqwc - vif1ch->qwc; - } else { + } + else + { u32 *pMem = (u32*)dmaGetAddr(vif1ch->madr); - SPR_LOG("Non-MFIFO Location\n"); - + SPR_LOG("Non-MFIFO Location"); + if (pMem == NULL) return -1; - if(vif1.vifstalled == 1){ - ret = VIF1transfer(pMem+vif1.irqoffset, vif1ch->qwc*4-vif1.irqoffset, 0); - }else - ret = VIF1transfer(pMem, vif1ch->qwc << 2, 0); + if (vif1.vifstalled == 1) + ret = VIF1transfer(pMem + vif1.irqoffset, vif1ch->qwc * 4 - vif1.irqoffset, 0); + else + ret = VIF1transfer(pMem, vif1ch->qwc << 2, 0); } return ret; } -#define spr0 ((DMACh*)&PS2MEM_HW[0xD000]) - -u32 mfifodmairq = 0; - -void mfifoVIF1transfer(int qwc) { +void mfifoVIF1transfer(int qwc) +{ u32 *ptag; int id; int ret, temp; - - g_vifCycles = 0; - - - if(qwc > 0){ + g_vifCycles = 0; + + if (qwc > 0) + { vifqwc += qwc; - if(vif1.inprogress & 0x10) + if (vif1.inprogress & 0x10) { - if (vif1ch->madr >= psHu32(DMAC_RBOR) && vif1ch->madr <= (psHu32(DMAC_RBOR)+psHu32(DMAC_RBSR))) - { - CPU_INT(10, min( (int)vifqwc, (int)vif1ch->qwc ) * BIAS); - } + if (vif1ch->madr >= psHu32(DMAC_RBOR) && vif1ch->madr <= (psHu32(DMAC_RBOR) + psHu32(DMAC_RBSR))) + CPU_INT(10, min((int)vifqwc, (int)vif1ch->qwc) * BIAS); else - { - CPU_INT(10, vif1ch->qwc * BIAS); - } + CPU_INT(10, vif1ch->qwc * BIAS); + + vif1Regs->stat |= 0x10000000; // FQC=16 } vif1.inprogress &= ~0x10; - SPR_LOG("Added %x qw to mfifo, total now %x - Vif CHCR %x Stalled %x done %x\n", qwc, vifqwc, vif1ch->chcr, vif1.vifstalled, vif1.done); - - /*if((vif1ch->chcr & 0x100) == 0 || vif1.vifstalled == 1 || vif1.done == 1 || vif1.inprogress == 1)*/ return; + SPR_LOG("Added %x qw to mfifo, total now %x - Vif CHCR %x Stalled %x done %x", qwc, vifqwc, vif1ch->chcr, vif1.vifstalled, vif1.done); + return; } mfifodmairq = 0; //Clear any previous TIE interrupt - - if(vif1ch->qwc == 0){ - ptag = (u32*)dmaGetAddr(vif1ch->tadr); + if (vif1ch->qwc == 0) + { + ptag = (u32*)dmaGetAddr(vif1ch->tadr); - if (vif1ch->chcr & 0x40) { - if( vif1.stallontag == 1) ret = VIF1transfer(ptag+(2+vif1.irqoffset), 2-vif1.irqoffset, 1); //Transfer Tag on Stall - else ret = VIF1transfer(ptag+2, 2, 1); //Transfer Tag - if (ret == -2) { - VIF_LOG("MFIFO Stallon tag\n"); - - vif1.stallontag = 1; - //CPU_INT(10,cycles+g_vifCycles); - return; //IRQ set by VIFTransfer - } - } - - id = (ptag[0] >> 28) & 0x7; - vif1ch->qwc = (ptag[0] & 0xffff); - vif1ch->madr = ptag[1]; - cycles += 2; - - vif1ch->chcr = ( vif1ch->chcr & 0xFFFF ) | ( (*ptag) & 0xFFFF0000 ); - - SPR_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx mfifo qwc = %x spr0 madr = %x\n", - ptag[1], ptag[0], vif1ch->qwc, id, vif1ch->madr, vif1ch->tadr, vifqwc, spr0->madr); - vifqwc--; - - switch (id) { - case 0: // Refe - Transfer Packet According to ADDR field - vif1ch->tadr = psHu32(DMAC_RBOR) + ((vif1ch->tadr + 16) & psHu32(DMAC_RBSR)); - vif1.done = 1; //End Transfer - break; - - case 1: // CNT - Transfer QWC following the tag. - vif1ch->madr = psHu32(DMAC_RBOR) + ((vif1ch->tadr + 16) & psHu32(DMAC_RBSR)); //Set MADR to QW after Tag - vif1ch->tadr = psHu32(DMAC_RBOR) + ((vif1ch->madr + (vif1ch->qwc << 4)) & psHu32(DMAC_RBSR)); //Set TADR to QW following the data - vif1.done = 0; - break; - - case 2: // Next - Transfer QWC following tag. TADR = ADDR - temp = vif1ch->madr; //Temporarily Store ADDR - vif1ch->madr = psHu32(DMAC_RBOR) + ((vif1ch->tadr + 16) & psHu32(DMAC_RBSR)); //Set MADR to QW following the tag - vif1ch->tadr = temp; //Copy temporarily stored ADDR to Tag - if((temp & psHu32(DMAC_RBSR)) != psHu32(DMAC_RBOR)) SysPrintf("Next tag = %x outside ring %x size %x\n", temp, psHu32(DMAC_RBOR), psHu32(DMAC_RBSR)); - vif1.done = 0; - break; - - case 3: // Ref - Transfer QWC from ADDR field - case 4: // Refs - Transfer QWC from ADDR field (Stall Control) - vif1ch->tadr = psHu32(DMAC_RBOR) + ((vif1ch->tadr + 16) & psHu32(DMAC_RBSR)); //Set TADR to next tag - vif1.done = 0; - break; - - case 7: // End - Transfer QWC following the tag - vif1ch->madr = psHu32(DMAC_RBOR) + ((vif1ch->tadr + 16) & psHu32(DMAC_RBSR)); //Set MADR to data following the tag - vif1ch->tadr = psHu32(DMAC_RBOR) + ((vif1ch->madr + (vif1ch->qwc << 4)) & psHu32(DMAC_RBSR)); //Set TADR to QW following the data - vif1.done = 1; //End Transfer - break; - } - - if ((vif1ch->chcr & 0x80) && (ptag[0] >> 31)) + if (vif1ch->chcr & 0x40) + { + if (vif1.stallontag == 1) ret = VIF1transfer(ptag + (2 + vif1.irqoffset), 2 - vif1.irqoffset, 1); //Transfer Tag on Stall + else ret = VIF1transfer(ptag + 2, 2, 1); //Transfer Tag + if (ret == -2) { - VIF_LOG("dmaIrq Set\n"); - vif1.done = 1; - mfifodmairq = 1; //Let the handler know we have prematurely ended MFIFO + VIF_LOG("MFIFO Stallon tag"); + vif1.stallontag = 1; + return; //IRQ set by VIFTransfer } - } - vif1.inprogress |= 1; - - /*if (ret == -1) { - SysPrintf("VIF dmaChain error size=%d, madr=%lx, tadr=%lx\n", - vif1ch->qwc, vif1ch->madr, vif1ch->tadr); - vif1.done = 1; - //CPU_INT(10,g_vifCycles); } - if(ret == -2){ - VIF_LOG("MFIFO Stall\n"); - //CPU_INT(10,g_vifCycles); - return; - }*/ - - //if(vif1.done == 2 && vif1ch->qwc == 0) vif1.done = 1; -//CPU_INT(10,g_vifCycles); - SPR_LOG("mfifoVIF1transfer end %x madr %x, tadr %x vifqwc %x\n", vif1ch->chcr, vif1ch->madr, vif1ch->tadr, vifqwc); + + id = (ptag[0] >> 28) & 0x7; + vif1ch->qwc = (ptag[0] & 0xffff); + vif1ch->madr = ptag[1]; + cycles += 2; + + vif1ch->chcr = (vif1ch->chcr & 0xFFFF) | ((*ptag) & 0xFFFF0000); + + SPR_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx mfifo qwc = %x spr0 madr = %x", + ptag[1], ptag[0], vif1ch->qwc, id, vif1ch->madr, vif1ch->tadr, vifqwc, spr0->madr); + vifqwc--; + + switch (id) + { + case 0: // Refe - Transfer Packet According to ADDR field + vif1ch->tadr = psHu32(DMAC_RBOR) + ((vif1ch->tadr + 16) & psHu32(DMAC_RBSR)); + vif1.done = 1; //End Transfer + break; + + case 1: // CNT - Transfer QWC following the tag. + vif1ch->madr = psHu32(DMAC_RBOR) + ((vif1ch->tadr + 16) & psHu32(DMAC_RBSR)); //Set MADR to QW after Tag + vif1ch->tadr = psHu32(DMAC_RBOR) + ((vif1ch->madr + (vif1ch->qwc << 4)) & psHu32(DMAC_RBSR)); //Set TADR to QW following the data + vif1.done = 0; + break; + + case 2: // Next - Transfer QWC following tag. TADR = ADDR + temp = vif1ch->madr; //Temporarily Store ADDR + vif1ch->madr = psHu32(DMAC_RBOR) + ((vif1ch->tadr + 16) & psHu32(DMAC_RBSR)); //Set MADR to QW following the tag + vif1ch->tadr = temp; //Copy temporarily stored ADDR to Tag + if ((temp & psHu32(DMAC_RBSR)) != psHu32(DMAC_RBOR)) Console::WriteLn("Next tag = %x outside ring %x size %x", params temp, psHu32(DMAC_RBOR), psHu32(DMAC_RBSR)); + vif1.done = 0; + break; + + case 3: // Ref - Transfer QWC from ADDR field + case 4: // Refs - Transfer QWC from ADDR field (Stall Control) + vif1ch->tadr = psHu32(DMAC_RBOR) + ((vif1ch->tadr + 16) & psHu32(DMAC_RBSR)); //Set TADR to next tag + vif1.done = 0; + break; + + case 7: // End - Transfer QWC following the tag + vif1ch->madr = psHu32(DMAC_RBOR) + ((vif1ch->tadr + 16) & psHu32(DMAC_RBSR)); //Set MADR to data following the tag + vif1ch->tadr = psHu32(DMAC_RBOR) + ((vif1ch->madr + (vif1ch->qwc << 4)) & psHu32(DMAC_RBSR)); //Set TADR to QW following the data + vif1.done = 1; //End Transfer + break; + } + + if ((vif1ch->chcr & 0x80) && (ptag[0] >> 31)) + { + VIF_LOG("dmaIrq Set"); + vif1.done = 1; + mfifodmairq = 1; //Let the handler know we have prematurely ended MFIFO + } + } + + vif1.inprogress |= 1; + + SPR_LOG("mfifoVIF1transfer end %x madr %x, tadr %x vifqwc %x", vif1ch->chcr, vif1ch->madr, vif1ch->tadr, vifqwc); } void vifMFIFOInterrupt() { g_vifCycles = 0; - - - - if(vif1.inprogress == 1) mfifoVIF1chain(); - - if(vif1.irq && vif1.tag.size == 0) { - vif1Regs->stat|= VIF1_STAT_INT; - hwIntcIrq(INTC_VIF1); - --vif1.irq; - if(vif1Regs->stat & (VIF1_STAT_VSS|VIF1_STAT_VIS|VIF1_STAT_VFS)) - { - vif1Regs->stat&= ~0x1F000000; // FQC=0 - vif1ch->chcr &= ~0x100; - return; - } - } - + if (vif1.inprogress == 1) mfifoVIF1chain(); - if(vif1.done != 1 || vif1.inprogress & 1) { - - if(vifqwc <= 0){ - //SysPrintf("Empty\n"); + if (vif1.irq && vif1.tag.size == 0) + { + vif1Regs->stat |= VIF1_STAT_INT; + hwIntcIrq(INTC_VIF1); + --vif1.irq; + if (vif1Regs->stat & (VIF1_STAT_VSS | VIF1_STAT_VIS | VIF1_STAT_VFS)) + { + vif1Regs->stat &= ~0x1F000000; // FQC=0 + vif1ch->chcr &= ~0x100; + return; + } + } + + if (vif1.done != 1 || vif1.inprogress & 1) + { + if (vifqwc <= 0) + { + //Console::WriteLn("Empty 1"); vif1.inprogress |= 0x10; + vif1Regs->stat &= ~0x1F000000; // FQC=0 hwDmacIrq(14); return; - } - if(!(vif1.inprogress & 0x1)) mfifoVIF1transfer(0); - - if (vif1ch->madr >= psHu32(DMAC_RBOR) && vif1ch->madr <= (psHu32(DMAC_RBOR)+psHu32(DMAC_RBSR))) - { - CPU_INT(10, min( (int)vifqwc, (int)vif1ch->qwc ) * BIAS); } + if (!(vif1.inprogress & 0x1)) mfifoVIF1transfer(0); + + if (vif1ch->madr >= psHu32(DMAC_RBOR) && vif1ch->madr <= (psHu32(DMAC_RBOR) + psHu32(DMAC_RBSR))) + CPU_INT(10, min((int)vifqwc, (int)vif1ch->qwc) * BIAS); else - { - CPU_INT(10, vif1ch->qwc * BIAS); - } + CPU_INT(10, vif1ch->qwc * BIAS); - return; - } else if(vifqwc <= 0){ - //SysPrintf("Empty\n"); - //vif1.inprogress |= 0x10; - hwDmacIrq(14); - //return; - } + } + else if (vifqwc <= 0) + { + //Console::WriteLn("Empty 2"); + vif1.inprogress |= 0x10; + vif1Regs->stat &= ~0x1F000000; // FQC=0 + hwDmacIrq(14); + } //On a TIE break we do not clear the MFIFO (Art of Fighting) //If we dont clear it on MFIFO end, Tekken Tag breaks, understandably (Refraction) - if(mfifodmairq == 0) - vifqwc = 0; + if (mfifodmairq == 0) vifqwc = 0; vif1.done = 1; g_vifCycles = 0; vif1ch->chcr &= ~0x100; hwDmacIrq(DMAC_VIF1); - VIF_LOG("vif mfifo dma end\n"); - - vif1Regs->stat&= ~0x1F000000; // FQC=0 + VIF_LOG("vif mfifo dma end"); + + vif1Regs->stat &= ~0x1F000000; // FQC=0 } diff --git a/pcsx2/VifDma.cpp b/pcsx2/VifDma.cpp index 8f3422e866..806e59f87a 100644 --- a/pcsx2/VifDma.cpp +++ b/pcsx2/VifDma.cpp @@ -5,12 +5,12 @@ * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. - * + * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. - * + * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA @@ -23,16 +23,14 @@ #include "VUmicro.h" #include "GS.h" -#include "VifDma.h" +#include "VifDma.h" -//#ifdef _MSC_VER #include #include -//#endif using namespace std; // for min / max -//#define VIFUNPACKDEBUG //enable unpack debugging output +//#define VIFUNPACKDEBUG //enable unpack debugging output #define gif ((DMACh*)&PS2MEM_HW[0xA000]) @@ -66,24 +64,25 @@ static const unsigned int VIF0dmanum = 0; static const unsigned int VIF1dmanum = 1; int g_vifCycles = 0; -int path3hack = 0; +bool path3hack = FALSE; -typedef void (__fastcall *UNPACKFUNCTYPE)( u32 *dest, u32 *data, int size ); -typedef int (*UNPACKPARTFUNCTYPESSE)( u32 *dest, u32 *data, int size ); +typedef void (__fastcall *UNPACKFUNCTYPE)(u32 *dest, u32 *data, int size); +typedef int (*UNPACKPARTFUNCTYPESSE)(u32 *dest, u32 *data, int size); extern void (*Vif1CMDTLB[82])(); extern void (*Vif0CMDTLB[75])(); extern int (__fastcall *Vif1TransTLB[128])(u32 *data); extern int (__fastcall *Vif0TransTLB[128])(u32 *data); -struct VIFUnpackFuncTable { +struct VIFUnpackFuncTable +{ UNPACKFUNCTYPE funcU; UNPACKFUNCTYPE funcS; int bsize; // currently unused int dsize; // byte size of one channel int gsize; // size of data in bytes used for each write cycle - int qsize; // used for unpack parts, num of vectors that - // will be decompressed from data for 1 cycle + int qsize; // used for unpack parts, num of vectors that + // will be decompressed from data for 1 cycle }; /* block size; data size; group size; qword size; */ @@ -96,21 +95,31 @@ struct VIFUnpackFuncTable { bsize, dsize, gsize, qsize }, // Main table for function unpacking -static const VIFUnpackFuncTable VIFfuncTable[16] = { +static const VIFUnpackFuncTable VIFfuncTable[16] = +{ _UNPACK_TABLE32(S_32, 1, 4, 4, 4) // 0x0 - S-32 _UNPACK_TABLE(S_16, 2, 2, 2, 4) // 0x1 - S-16 _UNPACK_TABLE(S_8, 4, 1, 1, 4) // 0x2 - S-8 - { NULL, NULL, 0, 0, 0, 0 }, // 0x3 + { + NULL, NULL, 0, 0, 0, 0 + } + , // 0x3 _UNPACK_TABLE32(V2_32, 24, 4, 8, 2) // 0x4 - V2-32 _UNPACK_TABLE(V2_16, 12, 2, 4, 2) // 0x5 - V2-16 _UNPACK_TABLE(V2_8, 6, 1, 2, 2) // 0x6 - V2-8 - { NULL, NULL, 0, 0, 0, 0 }, // 0x7 - + { + NULL, NULL, 0, 0, 0, 0 + } + , // 0x7 + _UNPACK_TABLE32(V3_32, 36, 4, 12, 3) // 0x8 - V3-32 _UNPACK_TABLE(V3_16, 18, 2, 6, 3) // 0x9 - V3-16 _UNPACK_TABLE(V3_8, 9, 1, 3, 3) // 0xA - V3-8 - { NULL, NULL, 0, 0, 0, 0 }, // 0xB + { + NULL, NULL, 0, 0, 0, 0 + } + , // 0xB _UNPACK_TABLE32(V4_32, 48, 4, 16, 4) // 0xC - V4-32 _UNPACK_TABLE(V4_16, 24, 2, 8, 4) // 0xD - V4-16 @@ -118,7 +127,8 @@ static const VIFUnpackFuncTable VIFfuncTable[16] = { _UNPACK_TABLE32(V4_5, 6, 2, 2, 4) // 0xF - V4-5 }; -struct VIFSSEUnpackTable { +struct VIFSSEUnpackTable +{ // regular 0, 1, 2; mask 0, 1, 2 UNPACKPARTFUNCTYPESSE funcU[9], funcS[9]; }; @@ -146,7 +156,7 @@ extern "C" { \ UNPACK_SkippingWrite_##name##_##sign##_WriteMask_0, \ UNPACK_SkippingWrite_##name##_##sign##_WriteMask_1, \ UNPACK_SkippingWrite_##name##_##sign##_WriteMask_2 \ - + #define _UNPACK_TABLE_SSE_NULL \ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL @@ -176,7 +186,8 @@ DECL_UNPACK_TABLE_SSE(V4_16, s); DECL_UNPACK_TABLE_SSE(V4_8, s); DECL_UNPACK_TABLE_SSE(V4_5, u); -static const VIFSSEUnpackTable VIFfuncTableSSE[16] = { +static const VIFSSEUnpackTable VIFfuncTableSSE[16] = +{ { _UNPACK_TABLE_SSE(S_32, u), _UNPACK_TABLE_SSE(S_32, u) }, { _UNPACK_TABLE_SSE(S_16, u), _UNPACK_TABLE_SSE(S_16, s) }, { _UNPACK_TABLE_SSE(S_8, u), _UNPACK_TABLE_SSE(S_8, s) }, @@ -198,49 +209,53 @@ static const VIFSSEUnpackTable VIFfuncTableSSE[16] = { { _UNPACK_TABLE_SSE(V4_5, u), _UNPACK_TABLE_SSE(V4_5, u) }, }; - -__forceinline void vif0FLUSH() { - int _cycles; - _cycles = VU0.cycle; - +__forceinline void vif0FLUSH() +{ + int _cycles = VU0.cycle; + // fixme: this code should call _vu0WaitMicro instead? I'm not sure if // it's purposefully ignoring ee cycles or not (see below for more) vu0Finish(); - g_vifCycles+= (VU0.cycle - _cycles)*BIAS; + g_vifCycles += (VU0.cycle - _cycles) * BIAS; } -__forceinline void vif1FLUSH() { - int _cycles; - _cycles = VU1.cycle; +__forceinline void vif1FLUSH() +{ + int _cycles = VU1.cycle; // fixme: Same as above, is this a "stalling" offense? I think the cycles should // be added to cpuRegs.cycle instead of g_vifCycles, but not sure (air) - if( VU0.VI[REG_VPU_STAT].UL & 0x100 ) { - do { + if (VU0.VI[REG_VPU_STAT].UL & 0x100) + { + do + { CpuVU1.ExecuteBlock(); - } while(VU0.VI[REG_VPU_STAT].UL & 0x100); + } + while (VU0.VI[REG_VPU_STAT].UL & 0x100); - g_vifCycles+= (VU1.cycle - _cycles)*BIAS; + g_vifCycles += (VU1.cycle - _cycles) * BIAS; } } -void vifDmaInit() { +void vifDmaInit() +{ } -__forceinline static int _limit( int a, int max ) { - return ( a > max ? max : a ); +__forceinline static int _limit(int a, int max) +{ + return (a > max ? max : a); } -static void ProcessMemSkip(int size, unsigned int unpackType, const unsigned int VIFdmanum){ +static void ProcessMemSkip(int size, unsigned int unpackType, const unsigned int VIFdmanum) +{ const VIFUnpackFuncTable *unpack; vifStruct *vif; VIFregisters *vifRegs; unpack = &VIFfuncTable[ unpackType ]; -// varLog |= 0x00000400; - - if (VIFdmanum == 0) + + if (VIFdmanum == 0) { vif = &vif0; vifRegs = vif0Regs; @@ -251,72 +266,73 @@ static void ProcessMemSkip(int size, unsigned int unpackType, const unsigned int vifRegs = vif1Regs; } - switch(unpackType){ + switch (unpackType) + { case 0x0: - vif->tag.addr += size*4; - VIFUNPACK_LOG("Processing S-32 skip, size = %d\n", size); + vif->tag.addr += size * 4; + VIFUNPACK_LOG("Processing S-32 skip, size = %d", size); break; case 0x1: - vif->tag.addr += size*8; - VIFUNPACK_LOG("Processing S-16 skip, size = %d\n", size); + vif->tag.addr += size * 8; + VIFUNPACK_LOG("Processing S-16 skip, size = %d", size); break; case 0x2: - vif->tag.addr += size*16; - VIFUNPACK_LOG("Processing S-8 skip, size = %d\n", size); + vif->tag.addr += size * 16; + VIFUNPACK_LOG("Processing S-8 skip, size = %d", size); break; case 0x4: vif->tag.addr += size + ((size / unpack->gsize) * 8); - VIFUNPACK_LOG("Processing V2-32 skip, size = %d\n", size); + VIFUNPACK_LOG("Processing V2-32 skip, size = %d", size); break; case 0x5: vif->tag.addr += (size * 2) + ((size / unpack->gsize) * 8); - VIFUNPACK_LOG("Processing V2-16 skip, size = %d\n", size); + VIFUNPACK_LOG("Processing V2-16 skip, size = %d", size); break; case 0x6: vif->tag.addr += (size * 4) + ((size / unpack->gsize) * 8); - VIFUNPACK_LOG("Processing V2-8 skip, size = %d\n", size); + VIFUNPACK_LOG("Processing V2-8 skip, size = %d", size); break; case 0x8: vif->tag.addr += size + ((size / unpack->gsize) * 4); - VIFUNPACK_LOG("Processing V3-32 skip, size = %d\n", size); + VIFUNPACK_LOG("Processing V3-32 skip, size = %d", size); break; case 0x9: vif->tag.addr += (size * 2) + ((size / unpack->gsize) * 4); - VIFUNPACK_LOG("Processing V3-16 skip, size = %d\n", size); + VIFUNPACK_LOG("Processing V3-16 skip, size = %d", size); break; case 0xA: vif->tag.addr += (size * 4) + ((size / unpack->gsize) * 4); - VIFUNPACK_LOG("Processing V3-8 skip, size = %d\n", size); + VIFUNPACK_LOG("Processing V3-8 skip, size = %d", size); break; case 0xC: vif->tag.addr += size; - VIFUNPACK_LOG("Processing V4-32 skip, size = %d, CL = %d, WL = %d\n", size, vif1Regs->cycle.cl, vif1Regs->cycle.wl); + VIFUNPACK_LOG("Processing V4-32 skip, size = %d, CL = %d, WL = %d", size, vif1Regs->cycle.cl, vif1Regs->cycle.wl); break; case 0xD: vif->tag.addr += size * 2; - VIFUNPACK_LOG("Processing V4-16 skip, size = %d\n", size); + VIFUNPACK_LOG("Processing V4-16 skip, size = %d", size); break; case 0xE: vif->tag.addr += size * 4; - VIFUNPACK_LOG("Processing V4-8 skip, size = %d\n", size); + VIFUNPACK_LOG("Processing V4-8 skip, size = %d", size); break; case 0xF: vif->tag.addr += size * 8; - VIFUNPACK_LOG("Processing V4-5 skip, size = %d\n", size); - break; + VIFUNPACK_LOG("Processing V4-5 skip, size = %d", size); + break; default: - SysPrintf("Invalid unpack type %x\n", unpackType); + Console::WriteLn("Invalid unpack type %x", params unpackType); break; } - if((vif->tag.addr & 0xf) == unpack->gsize) { - vif->tag.addr += 16 - unpack->gsize; - } + if ((vif->tag.addr & 0xf) == unpack->gsize) + { + vif->tag.addr += 16 - unpack->gsize; + } } -//u32 unpacktotal = 0; - -static void VIFunpack(u32 *data, vifCode *v, int size, const unsigned int VIFdmanum) { +static void VIFunpack(u32 *data, vifCode *v, int size, const unsigned int VIFdmanum) +{ u32 *dest; unsigned int unpackType; UNPACKFUNCTYPE func; @@ -325,260 +341,271 @@ static void VIFunpack(u32 *data, vifCode *v, int size, const unsigned int VIFdma VIFregisters *vifRegs; VURegs * VU; u8 *cdata = (u8*)data; - //u64 basetick = GetCPUTick(); + #ifdef _DEBUG u32 memsize = VIFdmanum ? 0x4000 : 0x1000; #endif -//#ifdef _MSC_VER _mm_prefetch((char*)data, _MM_HINT_NTA); -//#endif - if (VIFdmanum == 0) + if (VIFdmanum == 0) { VU = &VU0; vif = &vif0; vifRegs = vif0Regs; - assert( v->addr < memsize ); - //v->addr &= 0xfff; - } - else + assert(v->addr < memsize); + } + else { VU = &VU1; vif = &vif1; vifRegs = vif1Regs; - assert( v->addr < memsize ); - //v->addr &= 0x3fff; + assert(v->addr < memsize); - if( vu1MicroIsSkipping() ) { + if (vu1MicroIsSkipping()) + { // don't process since the frame is dummy - vif->tag.addr += (size / (VIFfuncTable[ vif->cmd & 0xf ].gsize* vifRegs->cycle.wl)) * ((vifRegs->cycle.cl - vifRegs->cycle.wl)*16); - // unpacktotal += GetCPUTick()-basetick; + vif->tag.addr += (size / (VIFfuncTable[ vif->cmd & 0xf ].gsize * vifRegs->cycle.wl)) * ((vifRegs->cycle.cl - vifRegs->cycle.wl) * 16); return; } } dest = (u32*)(VU->Mem + v->addr); - - VIF_LOG("VIF%d UNPACK: Mode=%x, v->size=%d, size=%d, v->addr=%x\n", - VIFdmanum, v->cmd & 0xf, v->size, size, v->addr ); + + VIF_LOG("VIF%d UNPACK: Mode=%x, v->size=%d, size=%d, v->addr=%x", + VIFdmanum, v->cmd & 0xf, v->size, size, v->addr); #ifdef _DEBUG - if (v->size != size) { - VIF_LOG("*PCSX2*: warning v->size != size\n"); + if (v->size != size) + { + VIF_LOG("*PCSX2*: warning v->size != size"); } - if ((v->addr+size*4) > memsize) { - SysPrintf("*PCSX2*: fixme unpack overflow\n"); - SysPrintf( "VIF%d UNPACK: Mode=%x, v->size=%d, size=%d, v->addr=%x\n", - VIFdmanum, v->cmd & 0xf, v->size, size, v->addr ); + if ((v->addr + size*4) > memsize) + { + Console::Notice("*PCSX2*: fixme unpack overflow"); + Console::WriteLn("VIF%d UNPACK: Mode=%x, v->size=%d, size=%d, v->addr=%x", + params VIFdmanum, v->cmd & 0xf, v->size, size, v->addr); } #endif + // The unpack type unpackType = v->cmd & 0xf; - if (size == 0) { - VIFUNPACK_LOG("*PCSX2*: Unpack %x with size 0!! v->size = %d cl = %d, wl = %d, mode %d mask %x\n", v->cmd, v->size, vifRegs->cycle.cl, vifRegs->cycle.wl, vifRegs->mode, vifRegs->mask); + if (size == 0) + { + VIFUNPACK_LOG("*PCSX2*: Unpack %x with size 0!! v->size = %d cl = %d, wl = %d, mode %d mask %x", v->cmd, v->size, vifRegs->cycle.cl, vifRegs->cycle.wl, vifRegs->mode, vifRegs->mask); } - -//#ifdef _MSC_VER - _mm_prefetch((char*)data+128, _MM_HINT_NTA); -//#endif + + _mm_prefetch((char*)data + 128, _MM_HINT_NTA); + _vifRegs = (VIFregisters*)vifRegs; _vifMaskRegs = VIFdmanum ? g_vif1Masks : g_vif0Masks; _vif = vif; _vifRow = VIFdmanum ? g_vifRow1 : g_vifRow0; ft = &VIFfuncTable[ unpackType ]; func = _vif->usn ? ft->funcU : ft->funcS; + + size <<= 2; - size<<= 2; #ifdef _DEBUG memsize = size; #endif - if( _vifRegs->offset > 0) - { - int destinc, unpacksize; - - VIFUNPACK_LOG("aligning packet size = %d offset %d addr %x\n", size, vifRegs->offset, vif->tag.addr); - - // SSE doesn't handle such small data - if (v->size != (size>>2)) + + if (_vifRegs->offset > 0) + { + int destinc, unpacksize; + + VIFUNPACK_LOG("aligning packet size = %d offset %d addr %x", size, vifRegs->offset, vif->tag.addr); + + // SSE doesn't handle such small data + if (v->size != (size >> 2)) ProcessMemSkip(size, unpackType, VIFdmanum); - if(vifRegs->offset < (u32)ft->qsize) + if (vifRegs->offset < (u32)ft->qsize) { - if(((u32)size/(u32)ft->dsize) < ((u32)ft->qsize - vifRegs->offset)) + if (((u32)size / (u32)ft->dsize) < ((u32)ft->qsize - vifRegs->offset)) { - SysPrintf("wasnt enough left size/dsize = %x left to write %x\n", (size/ft->dsize), (ft->qsize - vifRegs->offset)); + Console::WriteLn("wasnt enough left size/dsize = %x left to write %x", params(size / ft->dsize), (ft->qsize - vifRegs->offset)); } - unpacksize = min(((u32)size/(u32)ft->dsize), ((u32)ft->qsize - vifRegs->offset)); - } + unpacksize = min(((u32)size / (u32)ft->dsize), ((u32)ft->qsize - vifRegs->offset)); + } else { unpacksize = 0; - SysPrintf("Unpack align offset = 0\n"); + Console::WriteLn("Unpack align offset = 0"); } - destinc = (4 - ft->qsize) + unpacksize; + destinc = (4 - ft->qsize) + unpacksize; - func(dest, (u32*)cdata, unpacksize); - size -= unpacksize*ft->dsize; - cdata += unpacksize*ft->dsize; + func(dest, (u32*)cdata, unpacksize); + size -= unpacksize * ft->dsize; + cdata += unpacksize * ft->dsize; - vifRegs->num--; - ++vif->cl; - if (vif->cl == vifRegs->cycle.wl) { - if(vifRegs->cycle.cl != vifRegs->cycle.wl){ - dest += ((vifRegs->cycle.cl - vifRegs->cycle.wl)<<2) + destinc; - } else { - dest += destinc; - } - vif->cl = 0; - } - else { - dest += destinc; - } - VIFUNPACK_LOG("aligning packet done size = %d offset %d addr %x\n", size, vifRegs->offset, vif->tag.addr); + vifRegs->num--; + ++vif->cl; + if (vif->cl == vifRegs->cycle.wl) + { + if (vifRegs->cycle.cl != vifRegs->cycle.wl) + { + dest += ((vifRegs->cycle.cl - vifRegs->cycle.wl) << 2) + destinc; + } + else + { + dest += destinc; + } + vif->cl = 0; + } + else + { + dest += destinc; + } + VIFUNPACK_LOG("aligning packet done size = %d offset %d addr %x", size, vifRegs->offset, vif->tag.addr); - } - else if (v->size != (size>>2)) + } + else if (v->size != (size >> 2)) ProcessMemSkip(size, unpackType, VIFdmanum); - - if (vifRegs->cycle.cl >= vifRegs->cycle.wl) { // skipping write + + if (vifRegs->cycle.cl >= vifRegs->cycle.wl) // skipping write + { #ifdef _DEBUG - static int s_count=0; + static int s_count = 0; #endif - + int incdest; - if( vif->cl != 0 ) { - // continuation from last stream - - incdest = ((vifRegs->cycle.cl - vifRegs->cycle.wl)<<2) + 4; - while (size >= ft->gsize && vifRegs->num > 0) { - func( dest, (u32*)cdata, ft->qsize); - cdata += ft->gsize; - size -= ft->gsize; - - vifRegs->num--; - ++vif->cl; - if (vif->cl == vifRegs->cycle.wl) { - dest += incdest; + if (vif->cl != 0) + { + // continuation from last stream + + incdest = ((vifRegs->cycle.cl - vifRegs->cycle.wl) << 2) + 4; + while (size >= ft->gsize && vifRegs->num > 0) + { + func(dest, (u32*)cdata, ft->qsize); + cdata += ft->gsize; + size -= ft->gsize; + + vifRegs->num--; + ++vif->cl; + if (vif->cl == vifRegs->cycle.wl) + { + dest += incdest; vif->cl = 0; - break; - } - - dest += 4; - } + break; + } - // have to update - _vifRow[0] = _vifRegs->r0; - _vifRow[1] = _vifRegs->r1; - _vifRow[2] = _vifRegs->r2; - _vifRow[3] = _vifRegs->r3; - - } + dest += 4; + } - if( size >= ft->gsize && !(v->addr&0xf)) { + // have to update + _vifRow[0] = _vifRegs->r0; + _vifRow[1] = _vifRegs->r1; + _vifRow[2] = _vifRegs->r2; + _vifRow[3] = _vifRegs->r3; + + } + + if (size >= ft->gsize && !(v->addr&0xf)) + { const UNPACKPARTFUNCTYPESSE* pfn; int writemask; - //static LARGE_INTEGER lbase, lfinal; - //QueryPerformanceCounter(&lbase); u32 oldcycle = -1; -// u16 tempdata[4] = { 0x8000, 0x7fff, 0x1010, 0xd0d0 }; -// vifRegs->cycle.cl = 4; -// vifRegs->cycle.wl = 1; -// SetNewMask(g_vif1Masks, g_vif1HasMask3, 0x3f, ~0x3f); -// memset(dest, 0xcd, 64*4); -// VIFfuncTableSSE[1].funcS[6](dest, (u32*)tempdata, 8); - #ifdef _MSC_VER - if( VIFdmanum ) { + if (VIFdmanum) + { __asm movaps XMM_ROW, xmmword ptr [g_vifRow1] __asm movaps XMM_COL, xmmword ptr [g_vifCol1] } - else { + else + { __asm movaps XMM_ROW, xmmword ptr [g_vifRow0] __asm movaps XMM_COL, xmmword ptr [g_vifCol0] } #else - if( VIFdmanum ) { + if (VIFdmanum) + { __asm__(".intel_syntax noprefix\n" - "movaps xmm6, xmmword ptr [%[g_vifRow1]]\n" - "movaps xmm7, xmmword ptr [%[g_vifCol1]]\n" - ".att_syntax\n" : :[g_vifRow1]"r"(g_vifRow1), [g_vifCol1]"r"(g_vifCol1) ); + "movaps xmm6, xmmword ptr [%[g_vifRow1]]\n" + "movaps xmm7, xmmword ptr [%[g_vifCol1]]\n" + ".att_syntax\n" : : [g_vifRow1]"r"(g_vifRow1), [g_vifCol1]"r"(g_vifCol1)); } - else { + else + { __asm__(".intel_syntax noprefix\n" - "movaps xmm6, xmmword ptr [%[g_vifRow0]]\n" - "movaps xmm7, xmmword ptr [%[g_vifCol0]]\n" - ".att_syntax\n" : : [g_vifRow0]"r"(g_vifRow0), [g_vifCol0]"r"(g_vifCol0) ); + "movaps xmm6, xmmword ptr [%[g_vifRow0]]\n" + "movaps xmm7, xmmword ptr [%[g_vifCol0]]\n" + ".att_syntax\n" : : [g_vifRow0]"r"(g_vifRow0), [g_vifCol0]"r"(g_vifCol0)); } #endif - if( vifRegs->cycle.cl == 0 || vifRegs->cycle.wl == 0 || (vifRegs->cycle.cl == vifRegs->cycle.wl && !(vifRegs->code&0x10000000)) ) { - oldcycle = *(u32*)&vifRegs->cycle; + if (vifRegs->cycle.cl == 0 || vifRegs->cycle.wl == 0 || (vifRegs->cycle.cl == vifRegs->cycle.wl && !(vifRegs->code&0x10000000))) + { + oldcycle = *(u32*) & vifRegs->cycle; vifRegs->cycle.cl = vifRegs->cycle.wl = 1; } - size = min(size, (int)vifRegs->num*ft->gsize); //size will always be the same or smaller - - pfn = vif->usn ? VIFfuncTableSSE[unpackType].funcU: VIFfuncTableSSE[unpackType].funcS; + size = min(size, (int)vifRegs->num * ft->gsize); //size will always be the same or smaller + + pfn = vif->usn ? VIFfuncTableSSE[unpackType].funcU : VIFfuncTableSSE[unpackType].funcS; writemask = VIFdmanum ? g_vif1HasMask3[min(vifRegs->cycle.wl,(u8)3)] : g_vif0HasMask3[min(vifRegs->cycle.wl,(u8)3)]; writemask = pfn[(((vifRegs->code & 0x10000000)>>28)<mode](dest, (u32*)cdata, size); - if( oldcycle != -1 ) *(u32*)&vifRegs->cycle = oldcycle; + if (oldcycle != -1) *(u32*)&vifRegs->cycle = oldcycle; // if size is left over, update the src,dst pointers - if( writemask > 0 ) { - int left = (size-writemask)/ft->gsize; + if (writemask > 0) + { + int left = (size - writemask) / ft->gsize; cdata += left * ft->gsize; - dest = (u32*)((u8*)dest + ((left/vifRegs->cycle.wl)*vifRegs->cycle.cl + left%vifRegs->cycle.wl)*16); + dest = (u32*)((u8*)dest + ((left / vifRegs->cycle.wl) * vifRegs->cycle.cl + left % vifRegs->cycle.wl) * 16); vifRegs->num -= left; - _vif->cl = (size % (ft->gsize*vifRegs->cycle.wl)) / ft->gsize; + _vif->cl = (size % (ft->gsize * vifRegs->cycle.wl)) / ft->gsize; } - else { - vifRegs->num -= size/ft->gsize; - if(vifRegs->num > 0) _vif->cl = (size % (ft->gsize*vifRegs->cycle.wl)) / ft->gsize; + else + { + vifRegs->num -= size / ft->gsize; + if (vifRegs->num > 0) _vif->cl = (size % (ft->gsize * vifRegs->cycle.wl)) / ft->gsize; } - + size = writemask; _vifRegs->r0 = _vifRow[0]; _vifRegs->r1 = _vifRow[1]; _vifRegs->r2 = _vifRow[2]; _vifRegs->r3 = _vifRow[3]; - //QueryPerformanceCounter(&lfinal); - //((LARGE_INTEGER*)g_nCounters)->QuadPart += lfinal.QuadPart - lbase.QuadPart; } else { - if(unpackType == 0xC && vifRegs->cycle.cl == vifRegs->cycle.wl) { //No use when SSE is available + if (unpackType == 0xC && vifRegs->cycle.cl == vifRegs->cycle.wl) //No use when SSE is available + { // v4-32 - if(vifRegs->mode == 0 && !(vifRegs->code & 0x10000000) && vif->usn == 0){ - vifRegs->num -= size>>4; + if (vifRegs->mode == 0 && !(vifRegs->code & 0x10000000) && vif->usn == 0) + { + vifRegs->num -= size >> 4; memcpy_fast((u8*)dest, cdata, size); size = 0; return; } } - incdest = ((vifRegs->cycle.cl - vifRegs->cycle.wl)<<2) + 4; + incdest = ((vifRegs->cycle.cl - vifRegs->cycle.wl) << 2) + 4; - while (size >= ft->gsize && vifRegs->num > 0) { - func( dest, (u32*)cdata, ft->qsize); + while (size >= ft->gsize && vifRegs->num > 0) + { + func(dest, (u32*)cdata, ft->qsize); cdata += ft->gsize; size -= ft->gsize; - + vifRegs->num--; ++vif->cl; - if (vif->cl == vifRegs->cycle.wl) { + if (vif->cl == vifRegs->cycle.wl) + { dest += incdest; - vif->cl = 0; + vif->cl = 0; } - else - { + else + { dest += 4; } } @@ -599,7 +626,7 @@ static void VIFunpack(u32 *data, vifCode *v, int size, const unsigned int VIFdma // fprintf(ftemp, "%x %x %x\n", vifRegs->code>>24, vifRegs->mode, *(u32*)&vifRegs->cycle); // fprintf(ftemp, "row: %x %x %x %x\n", _vifRow[0], _vifRow[1], _vifRow[2], _vifRow[3]); // //fprintf(ftemp, "row2: %x %x %x %x\n", _vifRegs->r0, _vifRegs->r1, _vifRegs->r2, _vifRegs->r3); -// +// // for(i = 0; i < memsize; ) { // for(k = 0; k < vifRegs->cycle.wl; ++k) { // for(j = 0; j <= ((vifRegs->code>>26)&3); ++j) { @@ -615,96 +642,105 @@ static void VIFunpack(u32 *data, vifCode *v, int size, const unsigned int VIFdma // } // s_count++; - if( size >= ft->dsize && vifRegs->num > 0) { - //VIF_LOG("warning, end with size = %d\n", size); - + if (size >= ft->dsize && vifRegs->num > 0) + { + //VIF_LOG("warning, end with size = %d", size); + /* unpack one qword */ func(dest, (u32*)cdata, size / ft->dsize); size = 0; - VIFUNPACK_LOG("leftover done, size %d, vifnum %d, addr %x\n", size, vifRegs->num, vif->tag.addr); + VIFUNPACK_LOG("leftover done, size %d, vifnum %d, addr %x", size, vifRegs->num, vif->tag.addr); } - + } - else { /* filling write */ - VIF_LOG("VIFunpack - filling write\n"); - - VIFUNPACK_LOG("filling write %d cl %d, wl %d mask %x mode %x unpacktype %x\n", vifRegs->num, vifRegs->cycle.cl, vifRegs->cycle.wl, vifRegs->mask, vifRegs->mode, unpackType); - while (size >= ft->gsize || vifRegs->num > 0) { - if (vif->cl == vifRegs->cycle.wl) { + else /* filling write */ + { + VIF_LOG("VIFunpack - filling write"); + + VIFUNPACK_LOG("filling write %d cl %d, wl %d mask %x mode %x unpacktype %x", vifRegs->num, vifRegs->cycle.cl, vifRegs->cycle.wl, vifRegs->mask, vifRegs->mode, unpackType); + while (size >= ft->gsize || vifRegs->num > 0) + { + if (vif->cl == vifRegs->cycle.wl) + { vif->cl = 0; } - // - if (vif->cl < vifRegs->cycle.cl) { /* unpack one qword */ - func( dest, (u32*)cdata, ft->qsize); + + if (vif->cl < vifRegs->cycle.cl) /* unpack one qword */ + { + func(dest, (u32*)cdata, ft->qsize); cdata += ft->gsize; size -= ft->gsize; vif->cl++; vifRegs->num--; - if (vif->cl == vifRegs->cycle.wl) { - vif->cl = 0; + if (vif->cl == vifRegs->cycle.wl) + { + vif->cl = 0; } - } + } else { - func( dest, (u32*)cdata, ft->qsize); + func(dest, (u32*)cdata, ft->qsize); vif->tag.addr += 16; vifRegs->num--; ++vif->cl; } dest += 4; - if(vifRegs->num == 0) break; + if (vifRegs->num == 0) break; } - } + } } -static void vuExecMicro( u32 addr, const u32 VIFdmanum ) +static void vuExecMicro(u32 addr, const u32 VIFdmanum) { int _cycles; VURegs * VU; - if (VIFdmanum == 0) { + if (VIFdmanum == 0) + { VU = &VU0; vif0FLUSH(); - } else { + } + else + { VU = &VU1; vif1FLUSH(); } - if(VU->vifRegs->itops > (VIFdmanum ? 0x3ffu : 0xffu)) - SysPrintf("VIF%d ITOP overrun! %x\n", VIFdmanum, VU->vifRegs->itops); + if (VU->vifRegs->itops > (VIFdmanum ? 0x3ffu : 0xffu)) + Console::WriteLn("VIF%d ITOP overrun! %x", params VIFdmanum, VU->vifRegs->itops); VU->vifRegs->itop = VU->vifRegs->itops; - if (VIFdmanum == 1) { - /* in case we're handling a VIF1 execMicro - set the top with the tops value */ + if (VIFdmanum == 1) + { + /* in case we're handling a VIF1 execMicro, set the top with the tops value */ VU->vifRegs->top = VU->vifRegs->tops & 0x3ff; /* is DBF flag set in VIF_STAT? */ - if (VU->vifRegs->stat & 0x80) { - /* it is, so set tops with base + ofst - and clear stat DBF flag */ + if (VU->vifRegs->stat & 0x80) + { + /* it is, so set tops with base, and set the stat DBF flag */ VU->vifRegs->tops = VU->vifRegs->base; VU->vifRegs->stat &= ~0x80; - } else { - /* it is not, so set tops with base - and set the stat DBF flag */ + } + else + { + /* it is not, so set tops with base + ofst, and clear stat DBF flag */ VU->vifRegs->tops = VU->vifRegs->base + VU->vifRegs->ofst; VU->vifRegs->stat |= 0x80; } } - if (VIFdmanum == 0) { + if (VIFdmanum == 0) + { _cycles = VU0.cycle; vu0ExecMicro(addr); - // too much delay - //g_vifCycles+= (VU0.cycle - _cycles)*BIAS; - } else { + } + else + { _cycles = VU1.cycle; vu1ExecMicro(addr); - // too much delay - //g_vifCycles+= (VU1.cycle - _cycles)*BIAS; } } @@ -714,58 +750,67 @@ void vif0Init() u32 i; - for(i = 0; i < 256; ++i ) { - s_maskwrite[i] = ((i&3)==3)||((i&0xc)==0xc)||((i&0x30)==0x30)||((i&0xc0)==0xc0); + for (i = 0; i < 256; ++i) + { + s_maskwrite[i] = ((i & 3) == 3) || ((i & 0xc) == 0xc) || ((i & 0x30) == 0x30) || ((i & 0xc0) == 0xc0); } SetNewMask(g_vif0Masks, g_vif0HasMask3, 0, 0xffffffff); } -static __forceinline void vif0UNPACK(u32 *data) { +static __forceinline void vif0UNPACK(u32 *data) +{ int vifNum; - int vl, vn; - int len; + int vl, vn; + int len; - if(vif0Regs->cycle.wl == 0 && vif0Regs->cycle.wl < vif0Regs->cycle.cl){ - SysPrintf("Vif0 CL %d, WL %d\n", vif0Regs->cycle.cl, vif0Regs->cycle.wl); + if (vif0Regs->cycle.wl == 0 && vif0Regs->cycle.wl < vif0Regs->cycle.cl) + { + Console::WriteLn("Vif0 CL %d, WL %d", params vif0Regs->cycle.cl, vif0Regs->cycle.wl); vif0.cmd &= ~0x7f; return; } vif0FLUSH(); - vl = (vif0.cmd ) & 0x3; - vn = (vif0.cmd >> 2) & 0x3; - vif0.tag.addr = (vif0Regs->code & 0x3ff) << 4; - vif0.usn = (vif0Regs->code >> 14) & 0x1; - vifNum = (vif0Regs->code >> 16) & 0xff; - if ( vifNum == 0 ) vifNum = 256; + vl = (vif0.cmd) & 0x3; + vn = (vif0.cmd >> 2) & 0x3; + vif0.tag.addr = (vif0Regs->code & 0x3ff) << 4; + vif0.usn = (vif0Regs->code >> 14) & 0x1; + vifNum = (vif0Regs->code >> 16) & 0xff; + if (vifNum == 0) vifNum = 256; vif0Regs->num = vifNum; - if ( vif0Regs->cycle.wl <= vif0Regs->cycle.cl ) { - len = ((( 32 >> vl ) * ( vn + 1 )) * vifNum + 31) >> 5; - } else { - int n = vif0Regs->cycle.cl * (vifNum / vif0Regs->cycle.wl) + - _limit( vifNum % vif0Regs->cycle.wl, vif0Regs->cycle.cl ); + if (vif0Regs->cycle.wl <= vif0Regs->cycle.cl) + { + len = (((32 >> vl) * (vn + 1)) * vifNum + 31) >> 5; + } + else + { + int n = vif0Regs->cycle.cl * (vifNum / vif0Regs->cycle.wl) + + _limit(vifNum % vif0Regs->cycle.wl, vif0Regs->cycle.cl); - len = ( ((( 32 >> vl ) * ( vn + 1 )) * n) + 31 ) >> 5; - } + len = ((((32 >> vl) * (vn + 1)) * n) + 31) >> 5; + } - vif0.wl = 0; vif0.cl = 0; - vif0.tag.cmd = vif0.cmd; + vif0.wl = 0; + vif0.cl = 0; + vif0.tag.cmd = vif0.cmd; vif0.tag.addr &= 0xfff; - vif0.tag.size = len; - vif0Regs->offset = 0; + vif0.tag.size = len; + vif0Regs->offset = 0; } -static __forceinline void _vif0mpgTransfer(u32 addr, u32 *data, int size) { -/* SysPrintf("_vif0mpgTransfer addr=%x; size=%x\n", addr, size); +static __forceinline void _vif0mpgTransfer(u32 addr, u32 *data, int size) +{ + /* Console::WriteLn("_vif0mpgTransfer addr=%x; size=%x", params addr, size); + { + FILE *f = fopen("vu1.raw", "wb"); + fwrite(data, 1, size*4, f); + fclose(f); + }*/ + if (memcmp(VU0.Micro + addr, data, size << 2)) { - FILE *f = fopen("vu1.raw", "wb"); - fwrite(data, 1, size*4, f); - fclose(f); - }*/ - if (memcmp(VU0.Micro + addr, data, size << 2)) { CpuVU0.Clear(addr, size << 2); // Clear before writing! :/ (cottonvibes) memcpy_fast(VU0.Micro + addr, data, size << 2); } @@ -776,78 +821,106 @@ static __forceinline void _vif0mpgTransfer(u32 addr, u32 *data, int size) { // Vif1 Data Transfer Commands //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// -static int __fastcall Vif0TransNull(u32 *data){ // Shouldnt go here - SysPrintf("VIF0 Shouldnt go here CMD = %x\n", vif0Regs->code); +static int __fastcall Vif0TransNull(u32 *data) // Shouldnt go here +{ + Console::WriteLn("VIF0 Shouldnt go here CMD = %x", params vif0Regs->code); vif0.cmd = 0; return 0; } -static int __fastcall Vif0TransSTMask(u32 *data){ // STMASK +static int __fastcall Vif0TransSTMask(u32 *data) // STMASK +{ SetNewMask(g_vif0Masks, g_vif0HasMask3, data[0], vif0Regs->mask); vif0Regs->mask = data[0]; - VIF_LOG("STMASK == %x\n", vif0Regs->mask); - + VIF_LOG("STMASK == %x", vif0Regs->mask); + vif0.tag.size = 0; vif0.cmd = 0; return 1; } -static int __fastcall Vif0TransSTRow(u32 *data){ // STROW - int ret; - - u32* pmem = &vif0Regs->r0+(vif0.tag.addr<<2); - u32* pmem2 = g_vifRow0+vif0.tag.addr; - assert( vif0.tag.addr < 4 ); - ret = min(4-vif0.tag.addr, vif0.vifpacketsize); - assert( ret > 0 ); - switch(ret) { - case 4: pmem[12] = data[3]; pmem2[3] = data[3]; - case 3: pmem[8] = data[2]; pmem2[2] = data[2]; - case 2: pmem[4] = data[1]; pmem2[1] = data[1]; - case 1: pmem[0] = data[0]; pmem2[0] = data[0]; break; - - jNO_DEFAULT - } - vif0.tag.addr += ret; - vif0.tag.size -= ret; - if(vif0.tag.size == 0) vif0.cmd = 0; - - return ret; -} - -static int __fastcall Vif0TransSTCol(u32 *data){ // STCOL +static int __fastcall Vif0TransSTRow(u32 *data) // STROW +{ int ret; - u32* pmem = &vif0Regs->c0+(vif0.tag.addr<<2); - u32* pmem2 = g_vifCol0+vif0.tag.addr; - ret = min(4-vif0.tag.addr, vif0.vifpacketsize); - switch(ret) { - case 4: pmem[12] = data[3]; pmem2[3] = data[3]; - case 3: pmem[8] = data[2]; pmem2[2] = data[2]; - case 2: pmem[4] = data[1]; pmem2[1] = data[1]; - case 1: pmem[0] = data[0]; pmem2[0] = data[0]; break; + u32* pmem = &vif0Regs->r0 + (vif0.tag.addr << 2); + u32* pmem2 = g_vifRow0 + vif0.tag.addr; + assert(vif0.tag.addr < 4); + ret = min(4 - vif0.tag.addr, vif0.vifpacketsize); + assert(ret > 0); + switch (ret) + { + case 4: + pmem[12] = data[3]; + pmem2[3] = data[3]; + case 3: + pmem[8] = data[2]; + pmem2[2] = data[2]; + case 2: + pmem[4] = data[1]; + pmem2[1] = data[1]; + case 1: + pmem[0] = data[0]; + pmem2[0] = data[0]; + break; - jNO_DEFAULT + jNO_DEFAULT } vif0.tag.addr += ret; - vif0.tag.size -= ret; - if(vif0.tag.size == 0) vif0.cmd = 0; + vif0.tag.size -= ret; + if (vif0.tag.size == 0) vif0.cmd = 0; + return ret; } -static int __fastcall Vif0TransMPG(u32 *data){ // MPG - if (vif0.vifpacketsize < vif0.tag.size) { +static int __fastcall Vif0TransSTCol(u32 *data) // STCOL +{ + int ret; + + u32* pmem = &vif0Regs->c0 + (vif0.tag.addr << 2); + u32* pmem2 = g_vifCol0 + vif0.tag.addr; + ret = min(4 - vif0.tag.addr, vif0.vifpacketsize); + switch (ret) + { + case 4: + pmem[12] = data[3]; + pmem2[3] = data[3]; + case 3: + pmem[8] = data[2]; + pmem2[2] = data[2]; + case 2: + pmem[4] = data[1]; + pmem2[1] = data[1]; + case 1: + pmem[0] = data[0]; + pmem2[0] = data[0]; + break; + + jNO_DEFAULT + } + vif0.tag.addr += ret; + vif0.tag.size -= ret; + if (vif0.tag.size == 0) vif0.cmd = 0; + return ret; +} + +static int __fastcall Vif0TransMPG(u32 *data) // MPG +{ + if (vif0.vifpacketsize < vif0.tag.size) + { _vif0mpgTransfer(vif0.tag.addr, data, vif0.vifpacketsize); - vif0.tag.addr += vif0.vifpacketsize << 2; - vif0.tag.size -= vif0.vifpacketsize; - return vif0.vifpacketsize; - } else { + vif0.tag.addr += vif0.vifpacketsize << 2; + vif0.tag.size -= vif0.vifpacketsize; + return vif0.vifpacketsize; + } + else + { int ret; _vif0mpgTransfer(vif0.tag.addr, data, vif0.tag.size); ret = vif0.tag.size; - vif0.tag.size = 0; + vif0.tag.size = 0; vif0.cmd = 0; return ret; - } + } } static int __fastcall Vif0TransUnpack(u32 *data) // UNPACK @@ -855,10 +928,9 @@ static int __fastcall Vif0TransUnpack(u32 *data) // UNPACK FreezeXMMRegs(1); if (vif0.vifpacketsize < vif0.tag.size) { - /* size is less that the total size, transfer is - 'in pieces' */ + /* size is less that the total size, transfer is 'in pieces' */ VIFunpack(data, &vif0.tag, vif0.vifpacketsize, VIF0dmanum); - vif0.tag.size -= vif0.vifpacketsize; + vif0.tag.size -= vif0.vifpacketsize; FreezeXMMRegs(0); return vif0.vifpacketsize; } @@ -879,180 +951,202 @@ static int __fastcall Vif0TransUnpack(u32 *data) // UNPACK // Vif0 CMD Base Commands //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// -static void Vif0CMDNop(){ // NOP +static void Vif0CMDNop() // NOP +{ vif0.cmd &= ~0x7f; } -static void Vif0CMDSTCycl(){ // STCYCL - vif0Regs->cycle.cl = (u8)vif0Regs->code; - vif0Regs->cycle.wl = (u8)(vif0Regs->code >> 8); +static void Vif0CMDSTCycl() // STCYCL +{ + vif0Regs->cycle.cl = (u8)vif0Regs->code; + vif0Regs->cycle.wl = (u8)(vif0Regs->code >> 8); vif0.cmd &= ~0x7f; } -static void Vif0CMDITop(){ // ITOP +static void Vif0CMDITop() // ITOP +{ vif0Regs->itops = vif0Regs->code & 0x3ff; vif0.cmd &= ~0x7f; } -static void Vif0CMDSTMod(){ // STMOD +static void Vif0CMDSTMod() // STMOD +{ vif0Regs->mode = vif0Regs->code & 0x3; vif0.cmd &= ~0x7f; } -static void Vif0CMDMark(){ // MARK +static void Vif0CMDMark() // MARK +{ vif0Regs->mark = (u16)vif0Regs->code; vif0Regs->stat |= VIF0_STAT_MRK; vif0.cmd &= ~0x7f; } -static void Vif0CMDFlushE(){ // FLUSHE +static void Vif0CMDFlushE() // FLUSHE +{ vif0FLUSH(); vif0.cmd &= ~0x7f; } -static void Vif0CMDMSCALF(){ //MSCAL/F - vuExecMicro( (u16)(vif0Regs->code) << 3, VIF0dmanum ); +static void Vif0CMDMSCALF() //MSCAL/F +{ + vuExecMicro((u16)(vif0Regs->code) << 3, VIF0dmanum); vif0.cmd &= ~0x7f; } -static void Vif0CMDMSCNT(){ // MSCNT - vuExecMicro( -1, VIF0dmanum ); +static void Vif0CMDMSCNT() // MSCNT +{ + vuExecMicro(-1, VIF0dmanum); vif0.cmd &= ~0x7f; } -static void Vif0CMDSTMask(){ // STMASK +static void Vif0CMDSTMask() // STMASK +{ vif0.tag.size = 1; } -static void Vif0CMDSTRowCol(){// STROW / STCOL +static void Vif0CMDSTRowCol() // STROW / STCOL +{ vif0.tag.addr = 0; - vif0.tag.size = 4; + vif0.tag.size = 4; } -static void Vif0CMDMPGTransfer(){ // MPG +static void Vif0CMDMPGTransfer() // MPG +{ int vifNum; vif0FLUSH(); - vifNum = (u8)(vif0Regs->code >> 16); - if (vifNum == 0) vifNum = 256; - vif0.tag.addr = (u16)((vif0Regs->code) << 3) & 0xfff; - vif0.tag.size = vifNum * 2; + vifNum = (u8)(vif0Regs->code >> 16); + if (vifNum == 0) vifNum = 256; + vif0.tag.addr = (u16)((vif0Regs->code) << 3) & 0xfff; + vif0.tag.size = vifNum * 2; } -static void Vif0CMDNull(){ // invalid opcode +static void Vif0CMDNull() // invalid opcode +{ // if ME1, then force the vif to interrupt - if ((vif0Regs->err & 0x4) == 0) { //Ignore vifcode and tag mismatch error - SysPrintf( "UNKNOWN VifCmd: %x\n", vif0.cmd ); - vif0Regs->stat |= 1 << 13; - vif0.irq++; - } - vif0.cmd &= ~0x7f; + if ((vif0Regs->err & 0x4) == 0) //Ignore vifcode and tag mismatch error + { + Console::WriteLn("UNKNOWN VifCmd: %x", params vif0.cmd); + vif0Regs->stat |= 1 << 13; + vif0.irq++; + } + vif0.cmd &= ~0x7f; } -int VIF0transfer(u32 *data, int size, int istag) { +int VIF0transfer(u32 *data, int size, int istag) +{ int ret; - int transferred=vif0.vifstalled ? vif0.irqoffset : 0; // irqoffset necessary to add up the right qws, or else will spin (spiderman) - VIF_LOG( "VIF0transfer: size %x (vif0.cmd %x)\n", size, vif0.cmd ); + int transferred = vif0.vifstalled ? vif0.irqoffset : 0; // irqoffset necessary to add up the right qws, or else will spin (spiderman) + VIF_LOG("VIF0transfer: size %x (vif0.cmd %x)", size, vif0.cmd); vif0.stallontag = 0; vif0.vifstalled = 0; vif0.vifpacketsize = size; - - while (vif0.vifpacketsize > 0) { - if (vif0.cmd) { + while (vif0.vifpacketsize > 0) + { + if (vif0.cmd) + { vif0Regs->stat |= VIF0_STAT_VPS_T; //Decompression has started - } - - if (vif0.cmd) { + ret = Vif0TransTLB[(vif0.cmd & 0x7f)](data); - data+= ret; vif0.vifpacketsize-= ret; - if(vif0.cmd == 0) vif0Regs->stat &= ~VIF0_STAT_VPS_T; //We are once again waiting for a new vifcode as the command has cleared + data += ret; + vif0.vifpacketsize -= ret; + if (vif0.cmd == 0) vif0Regs->stat &= ~VIF0_STAT_VPS_T; //We are once again waiting for a new vifcode as the command has cleared continue; } - - - if(vif0.tag.size != 0) SysPrintf("no vif0 cmd but tag size is left last cmd read %x\n", vif0Regs->code); + if (vif0.tag.size != 0) Console::WriteLn("no vif0 cmd but tag size is left last cmd read %x", params vif0Regs->code); + // if interrupt and new cmd is NOT MARK - if(vif0.irq) break; + if (vif0.irq) break; vif0.cmd = (data[0] >> 24); vif0Regs->code = data[0]; - + vif0Regs->stat |= VIF0_STAT_VPS_D; //We need to set these (Onimusha needs it) - if ((vif0.cmd & 0x60) == 0x60) { + if ((vif0.cmd & 0x60) == 0x60) + { vif0UNPACK(data); - } else { - VIF_LOG( "VIFtransfer: cmd %x, num %x, imm %x, size %x\n", vif0.cmd, (data[0] >> 16) & 0xff, data[0] & 0xffff, size ); - - if((vif0.cmd & 0x7f) > 0x4A){ - if ((vif0Regs->err & 0x4) == 0) { //Ignore vifcode and tag mismatch error - SysPrintf( "UNKNOWN VifCmd: %x\n", vif0.cmd ); - vif0Regs->stat |= 1 << 13; - vif0.irq++; - } - vif0.cmd = 0; - } else Vif0CMDTLB[(vif0.cmd & 0x7f)](); } - ++data; + else + { + VIF_LOG("VIFtransfer: cmd %x, num %x, imm %x, size %x", vif0.cmd, (data[0] >> 16) & 0xff, data[0] & 0xffff, size); + + if ((vif0.cmd & 0x7f) > 0x4A) + { + if ((vif0Regs->err & 0x4) == 0) //Ignore vifcode and tag mismatch error + { + Console::WriteLn("UNKNOWN VifCmd: %x", params vif0.cmd); + vif0Regs->stat |= 1 << 13; + vif0.irq++; + } + vif0.cmd = 0; + } + else Vif0CMDTLB[(vif0.cmd & 0x7f)](); + } + ++data; --vif0.vifpacketsize; - - if ((vif0.cmd & 0x80)) - { + + if ((vif0.cmd & 0x80)) + { vif0.cmd &= 0x7f; - if(!(vif0Regs->err & 0x1)) //i bit on vifcode and not masked by VIF0_ERR + if (!(vif0Regs->err & 0x1)) //i bit on vifcode and not masked by VIF0_ERR { - VIF_LOG( "Interrupt on VIFcmd: %x (INTC_MASK = %x)\n", vif0.cmd, psHu32(INTC_MASK) ); - + VIF_LOG("Interrupt on VIFcmd: %x (INTC_MASK = %x)", vif0.cmd, psHu32(INTC_MASK)); + ++vif0.irq; - if(istag && vif0.tag.size <= vif0.vifpacketsize) vif0.stallontag = 1; + if (istag && vif0.tag.size <= vif0.vifpacketsize) vif0.stallontag = 1; - if(vif0.tag.size == 0) break; - } - } + if (vif0.tag.size == 0) break; + } + } } //End of Transfer loop transferred += size - vif0.vifpacketsize; - g_vifCycles+= (transferred >> 2)*BIAS; /* guessing */ + g_vifCycles += (transferred >> 2) * BIAS; /* guessing */ // use tag.size because some game doesn't like .cmd - //if( !vif0.cmd ) - - if (vif0.irq && vif0.tag.size == 0) { + + if (vif0.irq && vif0.tag.size == 0) + { vif0.vifstalled = 1; - if(((vif0Regs->code >> 24) & 0x7f) != 0x7)vif0Regs->stat|= VIF0_STAT_VIS; - //else SysPrintf("VIF0 IRQ on MARK\n"); + if (((vif0Regs->code >> 24) & 0x7f) != 0x7)vif0Regs->stat |= VIF0_STAT_VIS; + //else Console::WriteLn("VIF0 IRQ on MARK"); // spiderman doesn't break on qw boundaries - vif0.irqoffset = transferred%4; // cannot lose the offset + vif0.irqoffset = transferred % 4; // cannot lose the offset - if( istag ) { + if (istag) + { return -2; } - + transferred = transferred >> 2; - vif0ch->madr+= (transferred << 4); - vif0ch->qwc-= transferred; - //SysPrintf("Stall on vif0, FromSPR = %x, Vif0MADR = %x Sif0MADR = %x STADR = %x\n", psHu32(0x1000d010), vif0ch->madr, psHu32(0x1000c010), psHu32(DMAC_STADR)); + vif0ch->madr += (transferred << 4); + vif0ch->qwc -= transferred; + //Console::WriteLn("Stall on vif0, FromSPR = %x, Vif0MADR = %x Sif0MADR = %x STADR = %x", params psHu32(0x1000d010), vif0ch->madr, psHu32(0x1000c010), psHu32(DMAC_STADR)); return -2; } vif0Regs->stat &= ~VIF0_STAT_VPS; //Vif goes idle as the stall happened between commands; - if( vif0.cmd ) vif0Regs->stat |= VIF0_STAT_VPS_W; //Otherwise we wait for the data + if (vif0.cmd) vif0Regs->stat |= VIF0_STAT_VPS_W; //Otherwise we wait for the data - if( !istag ) { + if (!istag) + { transferred = transferred >> 2; - vif0ch->madr+= (transferred << 4); - vif0ch->qwc-= transferred; + vif0ch->madr += (transferred << 4); + vif0ch->qwc -= transferred; } - + return 0; } -int _VIF0chain() { +int _VIF0chain() +{ u32 *pMem; u32 ret; @@ -1062,61 +1156,57 @@ int _VIF0chain() { if (pMem == NULL) return -1; - if( vif0.vifstalled ) { - ret = VIF0transfer(pMem+vif0.irqoffset, vif0ch->qwc*4-vif0.irqoffset, 0); - } - else { - ret = VIF0transfer(pMem, vif0ch->qwc*4, 0); - } - + if (vif0.vifstalled) + ret = VIF0transfer(pMem + vif0.irqoffset, vif0ch->qwc * 4 - vif0.irqoffset, 0); + else + ret = VIF0transfer(pMem, vif0ch->qwc * 4, 0); + return ret; } u32 *vif0ptag; -int _chainVIF0() { - int id; - //int done=0; - int ret; - +int _chainVIF0() +{ + int id, ret; + vif0ptag = (u32*)dmaGetAddr(vif0ch->tadr); //Set memory pointer to TADR - if (vif0ptag == NULL) { //Is vif0ptag empty? - SysPrintf("Vif0 Tag BUSERR\n"); - vif0ch->chcr = ( vif0ch->chcr & 0xFFFF ) | ( (*vif0ptag) & 0xFFFF0000 ); //Transfer upper part of tag to CHCR bits 31-15 - psHu32(DMAC_STAT)|= 1<<15; //If yes, set BEIS (BUSERR) in DMAC_STAT register + if (vif0ptag == NULL) //Is vif0ptag empty? + { + Console::Error("Vif0 Tag BUSERR"); + vif0ch->chcr = (vif0ch->chcr & 0xFFFF) | ((*vif0ptag) & 0xFFFF0000); //Transfer upper part of tag to CHCR bits 31-15 + psHu32(DMAC_STAT) |= 1 << 15; //If yes, set BEIS (BUSERR) in DMAC_STAT register return -1; //Return -1 as an error has occurred } - - id = (vif0ptag[0] >> 28) & 0x7; //ID for DmaChain copied from bit 28 of the tag + + id = (vif0ptag[0] >> 28) & 0x7; //ID for DmaChain copied from bit 28 of the tag vif0ch->qwc = (u16)vif0ptag[0]; //QWC set to lower 16bits of the tag vif0ch->madr = vif0ptag[1]; //MADR = ADDR field - g_vifCycles+=1; // Add 1 g_vifCycles from the QW read for the tag - VIF_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx\n", - vif0ptag[1], vif0ptag[0], vif0ch->qwc, id, vif0ch->madr, vif0ch->tadr); - - vif0ch->chcr = ( vif0ch->chcr & 0xFFFF ) | ( (*vif0ptag) & 0xFFFF0000 ); //Transfer upper part of tag to CHCR bits 31-15 + g_vifCycles += 1; // Add 1 g_vifCycles from the QW read for the tag + VIF_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx", + vif0ptag[1], vif0ptag[0], vif0ch->qwc, id, vif0ch->madr, vif0ch->tadr); + + vif0ch->chcr = (vif0ch->chcr & 0xFFFF) | ((*vif0ptag) & 0xFFFF0000); //Transfer upper part of tag to CHCR bits 31-15 // Transfer dma tag if tte is set - - if (vif0ch->chcr & 0x40) { - if(vif0.vifstalled == 1) ret = VIF0transfer(vif0ptag+(2+vif0.irqoffset), 2-vif0.irqoffset, 1); //Transfer Tag on stall - else ret = VIF0transfer(vif0ptag+2, 2, 1); //Transfer Tag + + if (vif0ch->chcr & 0x40) + { + if (vif0.vifstalled == 1) ret = VIF0transfer(vif0ptag + (2 + vif0.irqoffset), 2 - vif0.irqoffset, 1); //Transfer Tag on stall + else ret = VIF0transfer(vif0ptag + 2, 2, 1); //Transfer Tag if (ret == -1) return -1; //There has been an error - if (ret == -2) { - return -2; //IRQ set by VIFTransfer - } + if (ret == -2) return -2; //IRQ set by VIFTransfer } - + vif0.done |= hwDmacSrcChainWithStack(vif0ch, id); - VIF_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx\n", - vif0ptag[1], vif0ptag[0], vif0ch->qwc, id, vif0ch->madr, vif0ch->tadr); - + VIF_LOG("dmaChain %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx", + vif0ptag[1], vif0ptag[0], vif0ch->qwc, id, vif0ch->madr, vif0ch->tadr); ret = _VIF0chain(); //Transfers the data set by the switch - - if ((vif0ch->chcr & 0x80) && (vif0ptag[0] >> 31)) { //Check TIE bit of CHCR and IRQ bit of tag - VIF_LOG( "dmaIrq Set\n" ); + if ((vif0ch->chcr & 0x80) && (vif0ptag[0] >> 31)) //Check TIE bit of CHCR and IRQ bit of tag + { + VIF_LOG("dmaIrq Set\n"); vif0.done = 1; return vif0.done; //End Transfer @@ -1124,61 +1214,61 @@ int _chainVIF0() { return vif0.done; //Return Done } -void vif0Interrupt() { -// int ret; +void vif0Interrupt() +{ g_vifCycles = 0; //Reset the cycle count, Wouldnt reset on stall if put lower down. - VIF_LOG("vif0Interrupt: %8.8x\n", cpuRegs.cycle); + VIF_LOG("vif0Interrupt: %8.8x", cpuRegs.cycle); + if (vif0.irq && vif0.tag.size == 0) + { + vif0Regs->stat |= VIF0_STAT_INT; + hwIntcIrq(VIF0intc); + --vif0.irq; - if(vif0.irq && vif0.tag.size == 0) { - vif0Regs->stat|= VIF0_STAT_INT; - hwIntcIrq(VIF0intc); - --vif0.irq; - - if (vif0Regs->stat & (VIF0_STAT_VSS|VIF0_STAT_VIS|VIF0_STAT_VFS)) - { - vif0Regs->stat&= ~0xF000000; // FQC=0 - vif0ch->chcr &= ~0x100; - return; - } - if(vif0ch->qwc > 0 || vif0.irqoffset > 0){ - if(vif0.stallontag == 1) { - _chainVIF0(); - } - else _VIF0chain(); - CPU_INT(0, g_vifCycles); - return; - } + if (vif0Regs->stat & (VIF0_STAT_VSS | VIF0_STAT_VIS | VIF0_STAT_VFS)) + { + vif0Regs->stat &= ~0xF000000; // FQC=0 + vif0ch->chcr &= ~0x100; + return; } - + if (vif0ch->qwc > 0 || vif0.irqoffset > 0) + { + if (vif0.stallontag == 1) + _chainVIF0(); + else + _VIF0chain(); + + CPU_INT(0, g_vifCycles); + return; + } + } - if((vif0ch->chcr & 0x100) == 0) SysPrintf("Vif0 running when CHCR = %x\n", vif0ch->chcr); - + if ((vif0ch->chcr & 0x100) == 0) Console::WriteLn("Vif0 running when CHCR = %x", params vif0ch->chcr); - if (vif0ch->chcr & 0x4 && vif0.done == 0 && vif0.vifstalled == 0) { + if ((vif0ch->chcr & 0x4) && (vif0.done == 0) && (vif0.vifstalled == 0)) + { - if( !(psHu32(DMAC_CTRL) & 0x1) ) { - SysPrintf("vif0 dma masked\n"); + if (!(psHu32(DMAC_CTRL) & 0x1)) + { + Console::WriteLn("vif0 dma masked"); return; } - if(vif0ch->qwc > 0) _VIF0chain(); + if (vif0ch->qwc > 0) _VIF0chain(); else _chainVIF0(); CPU_INT(0, g_vifCycles); return; } - - if(vif0ch->qwc > 0) SysPrintf("VIF0 Ending with QWC left\n"); - if(vif0.cmd != 0) SysPrintf("vif0.cmd still set %x\n", vif0.cmd); + if (vif0ch->qwc > 0) Console::WriteLn("VIF0 Ending with QWC left"); + if (vif0.cmd != 0) Console::WriteLn("vif0.cmd still set %x", params vif0.cmd); vif0ch->chcr &= ~0x100; hwDmacIrq(DMAC_VIF0); - vif0Regs->stat&= ~0xF000000; // FQC=0 - + vif0Regs->stat &= ~0xF000000; // FQC=0 } // Vif1 Data Transfer Table -int (__fastcall *Vif0TransTLB[128])(u32 *data) = +int (__fastcall *Vif0TransTLB[128])(u32 *data) = { Vif0TransNull , Vif0TransNull , Vif0TransNull , Vif0TransNull , Vif0TransNull , Vif0TransNull , Vif0TransNull , Vif0TransNull , /*0x7*/ Vif0TransNull , Vif0TransNull , Vif0TransNull , Vif0TransNull , Vif0TransNull , Vif0TransNull , Vif0TransNull , Vif0TransNull , /*0xF*/ @@ -1199,7 +1289,7 @@ int (__fastcall *Vif0TransTLB[128])(u32 *data) = }; // Vif1 CMD Table -void (*Vif0CMDTLB[75])() = +void (*Vif0CMDTLB[75])() = { Vif0CMDNop , Vif0CMDSTCycl , Vif0CMDNull , Vif0CMDNull , Vif0CMDITop , Vif0CMDSTMod , Vif0CMDNull, Vif0CMDMark , /*0x7*/ Vif0CMDNull , Vif0CMDNull , Vif0CMDNull , Vif0CMDNull , Vif0CMDNull , Vif0CMDNull , Vif0CMDNull , Vif0CMDNull , /*0xF*/ @@ -1213,20 +1303,22 @@ void (*Vif0CMDTLB[75])() = Vif0CMDNull , Vif0CMDNull , Vif0CMDMPGTransfer }; -void dmaVIF0() { +void dmaVIF0() +{ VIF_LOG("dmaVIF0 chcr = %lx, madr = %lx, qwc = %lx\n" - " tadr = %lx, asr0 = %lx, asr1 = %lx\n", - vif0ch->chcr, vif0ch->madr, vif0ch->qwc, - vif0ch->tadr, vif0ch->asr0, vif0ch->asr1 ); + " tadr = %lx, asr0 = %lx, asr1 = %lx\n", + vif0ch->chcr, vif0ch->madr, vif0ch->qwc, + vif0ch->tadr, vif0ch->asr0, vif0ch->asr1); g_vifCycles = 0; - - vif0Regs->stat|= 0x8000000; // FQC=8 + vif0Regs->stat |= 0x8000000; // FQC=8 - if (!(vif0ch->chcr & 0x4) || vif0ch->qwc > 0) { // Normal Mode - if(_VIF0chain() == -2) { - SysPrintf("Stall on normal %x\n", vif0Regs->stat); + if (!(vif0ch->chcr & 0x4) || vif0ch->qwc > 0) // Normal Mode + { + if (_VIF0chain() == -2) + { + Console::WriteLn("Stall on normal %x", params vif0Regs->stat); vif0.vifstalled = 1; return; } @@ -1240,21 +1332,24 @@ void dmaVIF0() { CPU_INT(0, 0); } - -void vif0Write32(u32 mem, u32 value) { - if (mem == 0x10003830) { // MARK - VIF_LOG("VIF0_MARK write32 0x%8.8x\n", value); +void vif0Write32(u32 mem, u32 value) +{ + if (mem == 0x10003830) // MARK + { + VIF_LOG("VIF0_MARK write32 0x%8.8x", value); /* Clear mark flag in VIF0_STAT and set mark with 'value' */ - vif0Regs->stat&= ~VIF0_STAT_MRK; + vif0Regs->stat &= ~VIF0_STAT_MRK; vif0Regs->mark = value; - } else - if (mem == 0x10003810) { // FBRST - VIF_LOG("VIF0_FBRST write32 0x%8.8x\n", value); - - if (value & 0x1) { + } + else if (mem == 0x10003810) // FBRST + { + VIF_LOG("VIF0_FBRST write32 0x%8.8x", value); + + if (value & 0x1) + { /* Reset VIF */ - //SysPrintf("Vif0 Reset %x\n", vif0Regs->stat); + //Console::WriteLn("Vif0 Reset %x", params vif0Regs->stat); memzero_obj(vif0); vif0ch->qwc = 0; //? cpuRegs.interrupt &= ~1; //Stop all vif0 DMA's @@ -1262,76 +1357,87 @@ void vif0Write32(u32 mem, u32 value) { psHu64(0x10004008) = 0; vif0.done = 1; vif0Regs->err = 0; - vif0Regs->stat&= ~(0xF000000|VIF0_STAT_INT|VIF0_STAT_VSS|VIF0_STAT_VIS|VIF0_STAT_VFS|VIF0_STAT_VPS); // FQC=0 + vif0Regs->stat &= ~(0xF000000 | VIF0_STAT_INT | VIF0_STAT_VSS | VIF0_STAT_VIS | VIF0_STAT_VFS | VIF0_STAT_VPS); // FQC=0 } - if (value & 0x2) { + if (value & 0x2) + { /* Force Break the VIF */ - /* I guess we should stop the VIF dma here - but not 100% sure (linuz) */ + /* I guess we should stop the VIF dma here, but not 100% sure (linuz) */ cpuRegs.interrupt &= ~1; //Stop all vif0 DMA's vif0Regs->stat |= VIF0_STAT_VFS; vif0Regs->stat &= ~VIF0_STAT_VPS; vif0.vifstalled = 1; - SysPrintf("vif0 force break\n"); + Console::WriteLn("vif0 force break"); } - if (value & 0x4) { + if (value & 0x4) + { /* Stop VIF */ - /* Not completly sure about this, can't remember what game - used this, but 'draining' the VIF helped it, instead of - just stoppin the VIF (linuz) */ + // Not completely sure about this, can't remember what game, used this, but 'draining' the VIF helped it, instead of + // just stoppin the VIF (linuz). vif0Regs->stat |= VIF0_STAT_VSS; vif0Regs->stat &= ~VIF0_STAT_VPS; vif0.vifstalled = 1; } - if (value & 0x8) { + if (value & 0x8) + { int cancel = 0; - /* Cancel stall, first check if there is a stall to cancel, - and then clear VIF0_STAT VSS|VFS|VIS|INT|ER0|ER1 bits */ - if (vif0Regs->stat & (VIF0_STAT_VSS|VIF0_STAT_VIS|VIF0_STAT_VFS)) { + /* Cancel stall, first check if there is a stall to cancel, and then clear VIF0_STAT VSS|VFS|VIS|INT|ER0|ER1 bits */ + if (vif0Regs->stat & (VIF0_STAT_VSS | VIF0_STAT_VIS | VIF0_STAT_VFS)) cancel = 1; - } vif0Regs->stat &= ~(VIF0_STAT_VSS | VIF0_STAT_VFS | VIF0_STAT_VIS | - VIF0_STAT_INT | VIF0_STAT_ER0 | VIF0_STAT_ER1); - if (cancel) { - - if( vif0.vifstalled ) { + VIF0_STAT_INT | VIF0_STAT_ER0 | VIF0_STAT_ER1); + if (cancel) + { + if (vif0.vifstalled) + { g_vifCycles = 0; + // loop necessary for spiderman - if(vif0.stallontag == 1){ - _chainVIF0(); - } else _VIF0chain(); - + if (vif0.stallontag == 1) + _chainVIF0(); + else + _VIF0chain(); + vif0ch->chcr |= 0x100; CPU_INT(0, g_vifCycles); // Gets the timing right - Flatout } } - } - } else - if (mem == 0x10003820) { // ERR - VIF_LOG("VIF0_ERR write32 0x%8.8x\n", value); - + } + } + else if (mem == 0x10003820) + { // ERR + VIF_LOG("VIF0_ERR write32 0x%8.8x", value); + /* Set VIF0_ERR with 'value' */ vif0Regs->err = value; - } else{ - SysPrintf("Unknown Vif0 write to %x\n", mem); - if( mem >= 0x10003900 && mem < 0x10003980 ) { - - assert( (mem&0xf) == 0 ); - if( mem < 0x10003940 ) + } + else + { + Console::WriteLn("Unknown Vif0 write to %x", params mem); + if (mem >= 0x10003900 && mem < 0x10003980) + { + assert((mem&0xf) == 0); + + if (mem < 0x10003940) g_vifRow0[(mem>>4)&3] = value; else g_vifCol0[(mem>>4)&3] = value; - } else psHu32(mem) = value; + + } + else + { + psHu32(mem) = value; + } } /* Other registers are read-only so do nothing for them */ } -void vif0Reset() { - /* Reset the whole VIF, meaning the internal pcsx2 vars - and all the registers */ +void vif0Reset() +{ + /* Reset the whole VIF, meaning the internal pcsx2 vars and all the registers */ memzero_obj(vif0); memzero_obj(*vif0Regs); SetNewMask(g_vif0Masks, g_vif0HasMask3, 0, 0xffffffff); @@ -1339,22 +1445,22 @@ void vif0Reset() { psHu64(0x10004008) = 0; vif0Regs->stat &= ~VIF0_STAT_VPS; vif0.done = 1; - vif0Regs->stat&= ~0xF000000; // FQC=0 + vif0Regs->stat &= ~0xF000000; // FQC=0 } void SaveState::vif0Freeze() { - FreezeTag( "VIFdma" ); + FreezeTag("VIFdma"); // Dunno if this one is needed, but whatever, it's small. :) - Freeze( g_vifCycles ); + Freeze(g_vifCycles); - Freeze( vif0 ); + Freeze(vif0); - Freeze( g_vif0HasMask3 ); - Freeze( g_vif0Masks ); - Freeze( g_vifRow0 ); - Freeze( g_vifCol0 ); + Freeze(g_vif0HasMask3); + Freeze(g_vif0Masks); + Freeze(g_vifRow0); + Freeze(g_vifCol0); } ////////////////////////////////////////////////////////////////////////////// @@ -1366,57 +1472,68 @@ void SaveState::vif0Freeze() ////////////////////////////////////////////////////////////////////////////// -void vif1Init() { +void vif1Init() +{ SetNewMask(g_vif1Masks, g_vif1HasMask3, 0, 0xffffffff); } -static __forceinline void vif1UNPACK(u32 *data) { +static __forceinline void vif1UNPACK(u32 *data) +{ int vifNum; - int vl, vn; - //int len; - if(vif1Regs->cycle.wl == 0){ - if(vif1Regs->cycle.wl < vif1Regs->cycle.cl){ - SysPrintf("Vif1 CL %d, WL %d\n", vif1Regs->cycle.cl, vif1Regs->cycle.wl); + int vl, vn; + + if (vif1Regs->cycle.wl == 0) + { + if (vif1Regs->cycle.wl < vif1Regs->cycle.cl) + { + Console::WriteLn("Vif1 CL %d, WL %d", params vif1Regs->cycle.cl, vif1Regs->cycle.wl); vif1.cmd &= ~0x7f; return; -} + } } vif1FLUSH(); - vl = (vif1.cmd ) & 0x3; - vn = (vif1.cmd >> 2) & 0x3; - - vif1.usn = (vif1Regs->code >> 14) & 0x1; - vifNum = (vif1Regs->code >> 16) & 0xff; - if ( vifNum == 0 ) vifNum = 256; + vl = (vif1.cmd) & 0x3; + vn = (vif1.cmd >> 2) & 0x3; + + vif1.usn = (vif1Regs->code >> 14) & 0x1; + vifNum = (vif1Regs->code >> 16) & 0xff; + + if (vifNum == 0) vifNum = 256; vif1Regs->num = vifNum; - if ( vif1Regs->cycle.wl <= vif1Regs->cycle.cl ) { - vif1.tag.size = ((( 32 >> vl ) * ( vn + 1 )) * vifNum + 31) >> 5; - } else { - int n = vif1Regs->cycle.cl * (vifNum / vif1Regs->cycle.wl) + - _limit( vifNum % vif1Regs->cycle.wl, vif1Regs->cycle.cl ); - vif1.tag.size = ( ((( 32 >> vl ) * ( vn + 1 )) * n) + 31 ) >> 5; - } - if ( ( vif1Regs->code >> 15) & 0x1 ) { - vif1.tag.addr = (vif1Regs->code + vif1Regs->tops) & 0x3ff; - } else vif1.tag.addr = vif1Regs->code & 0x3ff; - - vif1.cl = 0; - vif1.tag.addr <<= 4; - - vif1.tag.cmd = vif1.cmd; + if (vif1Regs->cycle.wl <= vif1Regs->cycle.cl) + { + vif1.tag.size = (((32 >> vl) * (vn + 1)) * vifNum + 31) >> 5; + } + else + { + int n = vif1Regs->cycle.cl * (vifNum / vif1Regs->cycle.wl) + + _limit(vifNum % vif1Regs->cycle.wl, vif1Regs->cycle.cl); + vif1.tag.size = ((((32 >> vl) * (vn + 1)) * n) + 31) >> 5; + } + if ((vif1Regs->code >> 15) & 0x1) + vif1.tag.addr = (vif1Regs->code + vif1Regs->tops) & 0x3ff; + else + vif1.tag.addr = vif1Regs->code & 0x3ff; + + vif1.cl = 0; + vif1.tag.addr <<= 4; + + vif1.tag.cmd = vif1.cmd; } -static __forceinline void _vif1mpgTransfer(u32 addr, u32 *data, int size) { -/* SysPrintf("_vif1mpgTransfer addr=%x; size=%x\n", addr, size); +static __forceinline void _vif1mpgTransfer(u32 addr, u32 *data, int size) +{ + /* Console::WriteLn("_vif1mpgTransfer addr=%x; size=%x", params addr, size); + { + FILE *f = fopen("vu1.raw", "wb"); + fwrite(data, 1, size*4, f); + fclose(f); + }*/ + assert(VU1.Micro > 0); + if (memcmp(VU1.Micro + addr, data, size << 2)) { - FILE *f = fopen("vu1.raw", "wb"); - fwrite(data, 1, size*4, f); - fclose(f); - }*/ - assert( VU1.Micro > 0 ); - if (memcmp(VU1.Micro + addr, data, size << 2)) { CpuVU1.Clear(addr, size << 2); // Clear before writing! :/ memcpy_fast(VU1.Micro + addr, data, size << 2); } @@ -1426,100 +1543,130 @@ static __forceinline void _vif1mpgTransfer(u32 addr, u32 *data, int size) { // Vif1 Data Transfer Commands //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// -static int __fastcall Vif1TransNull(u32 *data){ // Shouldnt go here - SysPrintf("Shouldnt go here CMD = %x\n", vif1Regs->code); +static int __fastcall Vif1TransNull(u32 *data) // Shouldnt go here +{ + Console::WriteLn("Shouldnt go here CMD = %x", params vif1Regs->code); vif1.cmd = 0; return 0; } -static int __fastcall Vif1TransSTMask(u32 *data){ // STMASK +static int __fastcall Vif1TransSTMask(u32 *data) // STMASK +{ SetNewMask(g_vif1Masks, g_vif1HasMask3, data[0], vif1Regs->mask); vif1Regs->mask = data[0]; - VIF_LOG("STMASK == %x\n", vif1Regs->mask); - + VIF_LOG("STMASK == %x", vif1Regs->mask); + vif1.tag.size = 0; vif1.cmd = 0; return 1; } -static int __fastcall Vif1TransSTRow(u32 *data){ - int ret; - - u32* pmem = &vif1Regs->r0+(vif1.tag.addr<<2); - u32* pmem2 = g_vifRow1+vif1.tag.addr; - assert( vif1.tag.addr < 4 ); - ret = min(4-vif1.tag.addr, vif1.vifpacketsize); - assert( ret > 0 ); - switch(ret) { - case 4: pmem[12] = data[3]; pmem2[3] = data[3]; - case 3: pmem[8] = data[2]; pmem2[2] = data[2]; - case 2: pmem[4] = data[1]; pmem2[1] = data[1]; - case 1: pmem[0] = data[0]; pmem2[0] = data[0]; break; - jNO_DEFAULT; - } - vif1.tag.addr += ret; - vif1.tag.size -= ret; - if(vif1.tag.size == 0) vif1.cmd = 0; - - return ret; -} - -static int __fastcall Vif1TransSTCol(u32 *data){ +static int __fastcall Vif1TransSTRow(u32 *data) +{ int ret; - u32* pmem = &vif1Regs->c0+(vif1.tag.addr<<2); - u32* pmem2 = g_vifCol1+vif1.tag.addr; - ret = min(4-vif1.tag.addr, vif1.vifpacketsize); - switch(ret) { - case 4: pmem[12] = data[3]; pmem2[3] = data[3]; - case 3: pmem[8] = data[2]; pmem2[2] = data[2]; - case 2: pmem[4] = data[1]; pmem2[1] = data[1]; - case 1: pmem[0] = data[0]; pmem2[0] = data[0]; break; - jNO_DEFAULT; + u32* pmem = &vif1Regs->r0 + (vif1.tag.addr << 2); + u32* pmem2 = g_vifRow1 + vif1.tag.addr; + assert(vif1.tag.addr < 4); + ret = min(4 - vif1.tag.addr, vif1.vifpacketsize); + assert(ret > 0); + switch (ret) + { + case 4: + pmem[12] = data[3]; + pmem2[3] = data[3]; + case 3: + pmem[8] = data[2]; + pmem2[2] = data[2]; + case 2: + pmem[4] = data[1]; + pmem2[1] = data[1]; + case 1: + pmem[0] = data[0]; + pmem2[0] = data[0]; + break; + jNO_DEFAULT; } vif1.tag.addr += ret; - vif1.tag.size -= ret; - if(vif1.tag.size == 0) vif1.cmd = 0; + vif1.tag.size -= ret; + if (vif1.tag.size == 0) vif1.cmd = 0; + return ret; } -static int __fastcall Vif1TransMPG(u32 *data){ - if (vif1.vifpacketsize < vif1.tag.size) { +static int __fastcall Vif1TransSTCol(u32 *data) +{ + int ret; + + u32* pmem = &vif1Regs->c0 + (vif1.tag.addr << 2); + u32* pmem2 = g_vifCol1 + vif1.tag.addr; + ret = min(4 - vif1.tag.addr, vif1.vifpacketsize); + switch (ret) + { + case 4: + pmem[12] = data[3]; + pmem2[3] = data[3]; + case 3: + pmem[8] = data[2]; + pmem2[2] = data[2]; + case 2: + pmem[4] = data[1]; + pmem2[1] = data[1]; + case 1: + pmem[0] = data[0]; + pmem2[0] = data[0]; + break; + jNO_DEFAULT; + } + vif1.tag.addr += ret; + vif1.tag.size -= ret; + if (vif1.tag.size == 0) vif1.cmd = 0; + return ret; +} + +static int __fastcall Vif1TransMPG(u32 *data) +{ + if (vif1.vifpacketsize < vif1.tag.size) + { _vif1mpgTransfer(vif1.tag.addr, data, vif1.vifpacketsize); - vif1.tag.addr += vif1.vifpacketsize << 2; - vif1.tag.size -= vif1.vifpacketsize; - return vif1.vifpacketsize; - } else { + vif1.tag.addr += vif1.vifpacketsize << 2; + vif1.tag.size -= vif1.vifpacketsize; + return vif1.vifpacketsize; + } + else + { int ret; _vif1mpgTransfer(vif1.tag.addr, data, vif1.tag.size); ret = vif1.tag.size; - vif1.tag.size = 0; + vif1.tag.size = 0; vif1.cmd = 0; return ret; - } + } } u32 splittransfer[4]; u32 splitptr = 0; -static int __fastcall Vif1TransDirectHL(u32 *data){ +static int __fastcall Vif1TransDirectHL(u32 *data) +{ int ret = 0; - - - if(splitptr > 0){ //Leftover data from the last packet, filling the rest and sending to the GS - if(splitptr < 4 && vif1.vifpacketsize >= (4-splitptr)){ - - while(splitptr < 4){ + + if (splitptr > 0) //Leftover data from the last packet, filling the rest and sending to the GS + { + if ((splitptr < 4) && (vif1.vifpacketsize >= (4 - splitptr))) + { + while (splitptr < 4) + { splittransfer[splitptr++] = (u32)data++; ret++; vif1.tag.size--; } } - if( mtgsThread != NULL ) + if (mtgsThread != NULL) { // copy 16 bytes the fast way: const u64* src = (u64*)splittransfer[0]; - const uint count = mtgsThread->PrepDataPacket( GIF_PATH_2, src, 1); - jASSUME( count == 1 ); + const uint count = mtgsThread->PrepDataPacket(GIF_PATH_2, src, 1); + jASSUME(count == 1); u64* dst = (u64*)mtgsThread->GetDataPacketPtr(); dst[0] = src[0]; dst[1] = src[1]; @@ -1532,42 +1679,46 @@ static int __fastcall Vif1TransDirectHL(u32 *data){ GSGIFTRANSFER2((u32*)splittransfer[0], 1); FreezeRegs(0); } - - if(vif1.tag.size == 0) vif1.cmd = 0; + + if (vif1.tag.size == 0) vif1.cmd = 0; splitptr = 0; return ret; } - if (vif1.vifpacketsize < vif1.tag.size) { - if(vif1.vifpacketsize < 4 && splitptr != 4) { //Not a full QW left in the buffer, saving left over data + if (vif1.vifpacketsize < vif1.tag.size) + { + if (vif1.vifpacketsize < 4 && splitptr != 4) //Not a full QW left in the buffer, saving left over data + { ret = vif1.vifpacketsize; - while(ret > 0){ - splittransfer[splitptr++] = (u32)data++; - vif1.tag.size--; - ret--; - } - - return vif1.vifpacketsize; - } - - vif1.tag.size-= vif1.vifpacketsize; + while (ret > 0) + { + splittransfer[splitptr++] = (u32)data++; + vif1.tag.size--; + ret--; + } + return vif1.vifpacketsize; + } + vif1.tag.size -= vif1.vifpacketsize; ret = vif1.vifpacketsize; - } else { - ret = vif1.tag.size; - vif1.tag.size = 0; + } + else + { + ret = vif1.tag.size; + vif1.tag.size = 0; vif1.cmd = 0; - } + } //TODO: ret is guaranteed to be qword aligned ? - - if( mtgsThread != NULL ) + + if (mtgsThread != NULL) { //unaligned copy.VIF handling is -very- messy, so i'l use this code til i fix it :) // Round ret up, just in case it's not 128bit aligned. - const uint count = mtgsThread->PrepDataPacket( GIF_PATH_2, data, (ret+3)>>2 ); - memcpy_fast( mtgsThread->GetDataPacketPtr(), data, count<<4 ); + const uint count = mtgsThread->PrepDataPacket(GIF_PATH_2, data, (ret + 3) >> 2); + memcpy_fast(mtgsThread->GetDataPacketPtr(), data, count << 4); mtgsThread->SendDataPacket(); } - else { + else + { FreezeRegs(1); GSGIFTRANSFER2(data, (ret >> 2)); FreezeRegs(0); @@ -1576,16 +1727,16 @@ static int __fastcall Vif1TransDirectHL(u32 *data){ return ret; } - -static int __fastcall Vif1TransUnpack(u32 *data){ +static int __fastcall Vif1TransUnpack(u32 *data) +{ FreezeXMMRegs(1); if (vif1.vifpacketsize < vif1.tag.size) { - /* size is less that the total size, transfer is + /* size is less that the total size, transfer is 'in pieces' */ VIFunpack(data, &vif1.tag, vif1.vifpacketsize, VIF1dmanum); - vif1.tag.size -= vif1.vifpacketsize; + vif1.tag.size -= vif1.vifpacketsize; FreezeXMMRegs(0); return vif1.vifpacketsize; } @@ -1594,150 +1745,177 @@ static int __fastcall Vif1TransUnpack(u32 *data){ int ret; /* we got all the data, transfer it fully */ VIFunpack(data, &vif1.tag, vif1.tag.size, VIF1dmanum); - //g_vifCycles+= vif1.tag.size >> 1; ret = vif1.tag.size; vif1.tag.size = 0; vif1.cmd = 0; FreezeXMMRegs(0); return ret; } - + } //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// // Vif1 CMD Base Commands //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// int transferred = 0; -int Path3transfer=0; -static void Vif1CMDNop(){ // NOP +bool Path3transfer = FALSE; +static void Vif1CMDNop() // NOP +{ vif1.cmd &= ~0x7f; } -static void Vif1CMDSTCycl(){ // STCYCL - vif1Regs->cycle.cl = (u8)vif1Regs->code; - vif1Regs->cycle.wl = (u8)(vif1Regs->code >> 8); +static void Vif1CMDSTCycl() // STCYCL +{ + vif1Regs->cycle.cl = (u8)vif1Regs->code; + vif1Regs->cycle.wl = (u8)(vif1Regs->code >> 8); vif1.cmd &= ~0x7f; } -static void Vif1CMDOffset(){ // OFFSET +static void Vif1CMDOffset() // OFFSET +{ vif1Regs->ofst = vif1Regs->code & 0x3ff; - vif1Regs->stat &= ~0x80; - vif1Regs->tops = vif1Regs->base; + vif1Regs->stat &= ~0x80; + vif1Regs->tops = vif1Regs->base; vif1.cmd &= ~0x7f; } -static void Vif1CMDBase(){ // BASE +static void Vif1CMDBase() // BASE +{ vif1Regs->base = vif1Regs->code & 0x3ff; vif1.cmd &= ~0x7f; } -static void Vif1CMDITop(){ // ITOP +static void Vif1CMDITop() // ITOP +{ vif1Regs->itops = vif1Regs->code & 0x3ff; vif1.cmd &= ~0x7f; } -static void Vif1CMDSTMod(){ // STMOD +static void Vif1CMDSTMod() // STMOD +{ vif1Regs->mode = vif1Regs->code & 0x3; vif1.cmd &= ~0x7f; } -static void Vif1CMDMskPath3(){ // MSKPATH3 +static void Vif1CMDMskPath3() // MSKPATH3 +{ + + vif1Regs->mskpath3 = (vif1Regs->code >> 15) & 0x1; + //Console::WriteLn("VIF MSKPATH3 %x", params vif1Regs->mskpath3); - vif1Regs->mskpath3 = (vif1Regs->code >> 15) & 0x1; - //SysPrintf("VIF MSKPATH3 %x\n", vif1Regs->mskpath3); #ifdef GSPATH3FIX - - if ( (vif1Regs->code >> 15) & 0x1 ) { - while((gif->chcr & 0x100)){ //Can be done 2 different ways, depends on the game/company - if(path3hack == 0)if(Path3transfer == 0 && gif->qwc == 0) break; - + if ((vif1Regs->code >> 15) & 0x1) + { + while ((gif->chcr & 0x100)) //Can be done 2 different ways, depends on the game/company + { + if (!path3hack && !Path3transfer && (gif->qwc == 0)) break; + gsInterrupt(); - if(path3hack == 1)if(gif->qwc == 0) break; //add games not working with it to elfheader.c to enable this instead + if (path3hack && (gif->qwc == 0)) break; //add games not working with it to elfheader.c to enable this instead } - //while(gif->chcr & 0x100) gsInterrupt(); // Finish the transfer first psHu32(GIF_STAT) |= 0x2; - } else { - if(gif->chcr & 0x100) CPU_INT(2, (transferred>>2) * BIAS); // Restart Path3 on its own, time it right! + } + else + { + if (gif->chcr & 0x100) CPU_INT(2, (transferred >> 2) * BIAS); // Restart Path3 on its own, time it right! psHu32(GIF_STAT) &= ~0x2; - } + } #else - if ( vif1Regs->mskpath3 ) { - if(gif->qwc) _GIFchain(); // Finish the transfer first - psHu32(GIF_STAT) |= 0x2; - } else { + if (vif1Regs->mskpath3) + { + if (gif->qwc) _GIFchain(); // Finish the transfer first + psHu32(GIF_STAT) |= 0x2; + } + else + { psHu32(GIF_STAT) &= ~0x2; - if(gif->qwc) _GIFchain(); // Finish the transfer first - } + if (gif->qwc) _GIFchain(); // Finish the transfer first + } #endif vif1.cmd &= ~0x7f; } -static void Vif1CMDMark(){ // MARK +static void Vif1CMDMark() // MARK +{ vif1Regs->mark = (u16)vif1Regs->code; vif1Regs->stat |= VIF1_STAT_MRK; vif1.cmd &= ~0x7f; } -static void Vif1CMDFlush(){ // FLUSH/E/A +static void Vif1CMDFlush() // FLUSH/E/A +{ vif1FLUSH(); - if((vif1.cmd & 0x7f) == 0x13) { - while((gif->chcr & 0x100)){ - if(Path3transfer == 0 && gif->qwc == 0) break; + if ((vif1.cmd & 0x7f) == 0x13) + { + while ((gif->chcr & 0x100)) + { + if (!Path3transfer && gif->qwc == 0) break; gsInterrupt(); } } - + vif1.cmd &= ~0x7f; } -static void Vif1CMDMSCALF(){ //MSCAL/F - vuExecMicro( (u16)(vif1Regs->code) << 3, VIF1dmanum ); +static void Vif1CMDMSCALF() //MSCAL/F +{ + vuExecMicro((u16)(vif1Regs->code) << 3, VIF1dmanum); vif1.cmd &= ~0x7f; } -static void Vif1CMDMSCNT(){ // MSCNT - vuExecMicro( -1, VIF1dmanum ); +static void Vif1CMDMSCNT() // MSCNT +{ + vuExecMicro(-1, VIF1dmanum); vif1.cmd &= ~0x7f; } -static void Vif1CMDSTMask(){ // STMASK +static void Vif1CMDSTMask() // STMASK +{ vif1.tag.size = 1; } -static void Vif1CMDSTRowCol(){// STROW / STCOL +static void Vif1CMDSTRowCol() // STROW / STCOL +{ vif1.tag.addr = 0; - vif1.tag.size = 4; + vif1.tag.size = 4; } -static void Vif1CMDMPGTransfer(){ // MPG +static void Vif1CMDMPGTransfer() // MPG +{ int vifNum; vif1FLUSH(); - vifNum = (u8)(vif1Regs->code >> 16); - if (vifNum == 0) vifNum = 256; - vif1.tag.addr = (u16)((vif1Regs->code) << 3) & 0x3fff; - vif1.tag.size = vifNum * 2; + vifNum = (u8)(vif1Regs->code >> 16); + + if (vifNum == 0) vifNum = 256; + + vif1.tag.addr = (u16)((vif1Regs->code) << 3) & 0x3fff; + vif1.tag.size = vifNum * 2; } -static void Vif1CMDDirectHL(){ // DIRECT/HL +static void Vif1CMDDirectHL() // DIRECT/HL +{ int vifImm; vifImm = (u16)vif1Regs->code; - if (vifImm == 0) { + + if (vifImm == 0) vif1.tag.size = 65536 << 2; - } else { + else vif1.tag.size = vifImm << 2; + + while ((gif->chcr & 0x100) && (vif1.cmd & 0x7f) == 0x51) + { + gsInterrupt(); //DirectHL flushes the lot } - while((gif->chcr & 0x100) && (vif1.cmd & 0x7f) == 0x51){ - gsInterrupt(); //DirectHL flushes the lot - //if((psHu32(GIF_STAT) & 0xE00) == 0) break; - } } -static void Vif1CMDNull(){ // invalid opcode - // if ME1, then force the vif to interrupt - - if ((vif1Regs->err & 0x4) == 0) { //Ignore vifcode and tag mismatch error - SysPrintf( "UNKNOWN VifCmd: %x\n", vif1.cmd ); - vif1Regs->stat |= 1 << 13; - vif1.irq++; - } - vif1.cmd = 0; +static void Vif1CMDNull() // invalid opcode +{ + // if ME1, then force the vif to interrupt + + if ((vif1Regs->err & 0x4) == 0) //Ignore vifcode and tag mismatch error + { + Console::WriteLn("UNKNOWN VifCmd: %x\n", params vif1.cmd); + vif1Regs->stat |= 1 << 13; + vif1.irq++; + } + vif1.cmd = 0; } // Vif1 Data Transfer Table -int (__fastcall *Vif1TransTLB[128])(u32 *data) = +int (__fastcall *Vif1TransTLB[128])(u32 *data) = { Vif1TransNull , Vif1TransNull , Vif1TransNull , Vif1TransNull , Vif1TransNull , Vif1TransNull , Vif1TransNull , Vif1TransNull , /*0x7*/ Vif1TransNull , Vif1TransNull , Vif1TransNull , Vif1TransNull , Vif1TransNull , Vif1TransNull , Vif1TransNull , Vif1TransNull , /*0xF*/ @@ -1761,7 +1939,7 @@ int (__fastcall *Vif1TransTLB[128])(u32 *data) = // Vif1 CMD Table //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// -void (*Vif1CMDTLB[82])() = +void (*Vif1CMDTLB[82])() = { Vif1CMDNop , Vif1CMDSTCycl , Vif1CMDOffset , Vif1CMDBase , Vif1CMDITop , Vif1CMDSTMod , Vif1CMDMskPath3, Vif1CMDMark , /*0x7*/ Vif1CMDNull , Vif1CMDNull , Vif1CMDNull , Vif1CMDNull , Vif1CMDNull , Vif1CMDNull , Vif1CMDNull , Vif1CMDNull , /*0xF*/ @@ -1778,207 +1956,229 @@ void (*Vif1CMDTLB[82])() = //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// -int VIF1transfer(u32 *data, int size, int istag) { +int VIF1transfer(u32 *data, int size, int istag) +{ int ret; - transferred=vif1.vifstalled ? vif1.irqoffset : 0; // irqoffset necessary to add up the right qws, or else will spin (spiderman) - - VIF_LOG( "VIF1transfer: size %x (vif1.cmd %x)\n", size, vif1.cmd ); - + transferred = vif1.vifstalled ? vif1.irqoffset : 0; // irqoffset necessary to add up the right qws, or else will spin (spiderman) + + VIF_LOG("VIF1transfer: size %x (vif1.cmd %x)", size, vif1.cmd); + vif1.irqoffset = 0; vif1.vifstalled = 0; vif1.stallontag = 0; vif1.vifpacketsize = size; - - while (vif1.vifpacketsize > 0) { - - if (vif1.cmd) { + + while (vif1.vifpacketsize > 0) + { + if (vif1.cmd) + { vif1Regs->stat |= VIF1_STAT_VPS_T; //Decompression has started } - if (vif1.cmd) { + if (vif1.cmd) + { ret = Vif1TransTLB[vif1.cmd](data); - data+= ret; vif1.vifpacketsize-= ret; - if(vif1.cmd == 0) vif1Regs->stat &= ~VIF1_STAT_VPS_T; //We are once again waiting for a new vifcode as the command has cleared + data += ret; + vif1.vifpacketsize -= ret; + if (vif1.cmd == 0) vif1Regs->stat &= ~VIF1_STAT_VPS_T; //We are once again waiting for a new vifcode as the command has cleared continue; - } - - if(vif1.tag.size != 0) DevCon::Error("no vif1 cmd but tag size is left last cmd read %x\n", params vif1Regs->code); + } + + if (vif1.tag.size != 0) DevCon::Error("no vif1 cmd but tag size is left last cmd read %x", params vif1Regs->code); + + if (vif1.irq) break; - if(vif1.irq) break; - vif1.cmd = (data[0] >> 24); vif1Regs->code = data[0]; - vif1Regs->stat |= VIF1_STAT_VPS_D; - if ((vif1.cmd & 0x60) == 0x60) { + vif1Regs->stat |= VIF1_STAT_VPS_D; + if ((vif1.cmd & 0x60) == 0x60) + { vif1UNPACK(data); - } else { - VIF_LOG( "VIFtransfer: cmd %x, num %x, imm %x, size %x\n", vif1.cmd, (data[0] >> 16) & 0xff, data[0] & 0xffff, vif1.vifpacketsize ); - - if((vif1.cmd & 0x7f) > 0x51){ - if ((vif1Regs->err & 0x4) == 0) { //Ignore vifcode and tag mismatch error - SysPrintf( "UNKNOWN VifCmd: %x\n", vif1.cmd ); - vif1Regs->stat |= 1 << 13; - vif1.irq++; - } + } + else + { + VIF_LOG("VIFtransfer: cmd %x, num %x, imm %x, size %x", vif1.cmd, (data[0] >> 16) & 0xff, data[0] & 0xffff, vif1.vifpacketsize); + + if ((vif1.cmd & 0x7f) > 0x51) + { + if ((vif1Regs->err & 0x4) == 0) //Ignore vifcode and tag mismatch error + { + Console::WriteLn("UNKNOWN VifCmd: %x", params vif1.cmd); + vif1Regs->stat |= 1 << 13; + vif1.irq++; + } vif1.cmd = 0; - } else Vif1CMDTLB[(vif1.cmd & 0x7f)](); + } + else Vif1CMDTLB[(vif1.cmd & 0x7f)](); } - ++data; + ++data; --vif1.vifpacketsize; - - if ((vif1.cmd & 0x80)) - { + if ((vif1.cmd & 0x80)) + { vif1.cmd &= 0x7f; - if(!(vif1Regs->err & 0x1)) //i bit on vifcode and not masked by VIF1_ERR + if (!(vif1Regs->err & 0x1)) //i bit on vifcode and not masked by VIF1_ERR { - VIF_LOG( "Interrupt on VIFcmd: %x (INTC_MASK = %x)\n", vif1.cmd, psHu32(INTC_MASK) ); + VIF_LOG("Interrupt on VIFcmd: %x (INTC_MASK = %x)", vif1.cmd, psHu32(INTC_MASK)); - ++vif1.irq; + ++vif1.irq; - if(istag && vif1.tag.size <= vif1.vifpacketsize) vif1.stallontag = 1; + if (istag && vif1.tag.size <= vif1.vifpacketsize) vif1.stallontag = 1; - if(vif1.tag.size == 0) break; - } - } + if (vif1.tag.size == 0) break; + } + } } // End of Transfer loop transferred += size - vif1.vifpacketsize; - g_vifCycles+= (transferred>>2)*BIAS; /* guessing */ + g_vifCycles += (transferred >> 2) * BIAS; /* guessing */ - vif1.irqoffset = transferred%4; // cannot lose the offset + vif1.irqoffset = transferred % 4; // cannot lose the offset - if (vif1.irq && vif1.cmd == 0) { + + if (vif1.irq && vif1.cmd == 0) + { vif1.vifstalled = 1; - if(((vif1Regs->code >> 24) & 0x7f) != 0x7)vif1Regs->stat|= VIF1_STAT_VIS; // Note: commenting this out fixes WALL-E + if (((vif1Regs->code >> 24) & 0x7f) != 0x7)vif1Regs->stat |= VIF1_STAT_VIS; // Note: commenting this out fixes WALL-E + if (vif1ch->qwc == 0 && (vif1.irqoffset == 0 || istag == 1)) + vif1.inprogress = 0; // spiderman doesn't break on qw boundaries - - if( istag ) { - return -2; - } + + if (istag) return -2; transferred = transferred >> 2; - vif1ch->madr+= (transferred << 4); - vif1ch->qwc-= transferred; - if(vif1ch->qwc == 0 && vif1.irqoffset == 0) vif1.inprogress = 0; - //SysPrintf("Stall on vif1, FromSPR = %x, Vif1MADR = %x Sif0MADR = %x STADR = %x\n", psHu32(0x1000d010), vif1ch->madr, psHu32(0x1000c010), psHu32(DMAC_STADR)); + vif1ch->madr += (transferred << 4); + vif1ch->qwc -= transferred; + + if (vif1ch->qwc == 0 && vif1.irqoffset == 0) vif1.inprogress = 0; + //Console::WriteLn("Stall on vif1, FromSPR = %x, Vif1MADR = %x Sif0MADR = %x STADR = %x", params psHu32(0x1000d010), vif1ch->madr, psHu32(0x1000c010), psHu32(DMAC_STADR)); return -2; } - - vif1Regs->stat &= ~VIF1_STAT_VPS; //Vif goes idle as the stall happened between commands; - if( vif1.cmd ) vif1Regs->stat |= VIF1_STAT_VPS_W; //Otherwise we wait for the data - if( !istag ) { - + vif1Regs->stat &= ~VIF1_STAT_VPS; //Vif goes idle as the stall happened between commands; + if (vif1.cmd) vif1Regs->stat |= VIF1_STAT_VPS_W; //Otherwise we wait for the data + + if (!istag) + { transferred = transferred >> 2; - vif1ch->madr+= (transferred << 4); - vif1ch->qwc-= transferred; - if(vif1ch->qwc == 0 && vif1.irqoffset == 0) vif1.inprogress = 0; + vif1ch->madr += (transferred << 4); + vif1ch->qwc -= transferred; } + + if (vif1ch->qwc == 0 && (vif1.irqoffset == 0 || istag == 1)) + vif1.inprogress = 0; + return 0; } -void vif1TransferFromMemory(){ - int size; - u64* pMem = (u64*)dmaGetAddr(vif1ch->madr); +void vif1TransferFromMemory() +{ + int size; + u64* pMem = (u64*)dmaGetAddr(vif1ch->madr); - // VIF from gsMemory + // VIF from gsMemory + if (pMem == NULL) //Is vif0ptag empty? + { + Console::WriteLn("Vif1 Tag BUSERR"); + psHu32(DMAC_STAT) |= 1 << 15; //If yes, set BEIS (BUSERR) in DMAC_STAT register + vif1.done = 1; + vif1Regs->stat &= ~0x1f000000; + vif1ch->qwc = 0; + CPU_INT(1, 0); - if (pMem == NULL) { //Is vif0ptag empty? - SysPrintf("Vif1 Tag BUSERR\n"); - psHu32(DMAC_STAT)|= 1<<15; //If yes, set BEIS (BUSERR) in DMAC_STAT register - vif1.done = 1; - vif1Regs->stat&= ~0x1f000000; - vif1ch->qwc = 0; - CPU_INT(1, 0); + return; //Return -1 as an error has occurred + } - return; //Return -1 as an error has occurred - } + // MTGS concerns: The MTGS is inherently disagreeable with the idea of downloading + // stuff from the GS. The *only* way to handle this case safely is to flush the GS + // completely and execute the transfer there-after. - // MTGS concerns: The MTGS is inherently disagreeable with the idea of downloading - // stuff from the GS. The *only* way to handle this case safely is to flush the GS - // completely and execute the transfer there-after. - - FreezeXMMRegs(1); - if( GSreadFIFO2 == NULL ) { - for (size=vif1ch->qwc; size>0; --size) { - if (size > 1 ) { - mtgsWaitGS(); - GSreadFIFO((u64*)&PS2MEM_HW[0x5000]); - } - pMem[0] = psHu64(0x5000); - pMem[1] = psHu64(0x5008); pMem+= 2; - } - } - else { + FreezeXMMRegs(1); + if (GSreadFIFO2 == NULL) + { + for (size = vif1ch->qwc; size > 0; --size) + { + if (size > 1) + { mtgsWaitGS(); - GSreadFIFO2(pMem, vif1ch->qwc); - - // set incase read - psHu64(0x5000) = pMem[2*vif1ch->qwc-2]; - psHu64(0x5008) = pMem[2*vif1ch->qwc-1]; + GSreadFIFO((u64*)&PS2MEM_HW[0x5000]); } - FreezeXMMRegs(0); + pMem[0] = psHu64(0x5000); + pMem[1] = psHu64(0x5008); + pMem += 2; + } + } + else + { + mtgsWaitGS(); + GSreadFIFO2(pMem, vif1ch->qwc); - if(vif1Regs->mskpath3 == 0)vif1Regs->stat&= ~0x1f000000; - g_vifCycles += vif1ch->qwc * 2; - vif1ch->madr += vif1ch->qwc * 16; // mgs3 scene changes - vif1ch->qwc = 0; + // set incase read + psHu64(0x5000) = pMem[2*vif1ch->qwc-2]; + psHu64(0x5008) = pMem[2*vif1ch->qwc-1]; + } + FreezeXMMRegs(0); + + if (vif1Regs->mskpath3 == 0)vif1Regs->stat &= ~0x1f000000; + g_vifCycles += vif1ch->qwc * 2; + vif1ch->madr += vif1ch->qwc * 16; // mgs3 scene changes + vif1ch->qwc = 0; } -int _VIF1chain() { +int _VIF1chain() +{ u32 *pMem; - //u32 qwc = vif1ch->qwc; u32 ret; - if (vif1ch->qwc == 0 && vif1.vifstalled == 0 && vif1.irqoffset == 0) { - vif1.inprogress = 0; + if (vif1ch->qwc == 0 && vif1.vifstalled == 0 && vif1.irqoffset == 0) + { + vif1.inprogress = 0; return 0; } - if(vif1.dmamode == 1){ + if (vif1.dmamode == 1) + { vif1TransferFromMemory(); vif1.inprogress = 0; return 0; } - + pMem = (u32*)dmaGetAddr(vif1ch->madr); if (pMem == NULL) return -1; - VIF_LOG("VIF1chain size=%d, madr=%lx, tadr=%lx\n", - vif1ch->qwc, vif1ch->madr, vif1ch->tadr); + VIF_LOG("VIF1chain size=%d, madr=%lx, tadr=%lx", + vif1ch->qwc, vif1ch->madr, vif1ch->tadr); + + if (vif1.vifstalled) + ret = VIF1transfer(pMem + vif1.irqoffset, vif1ch->qwc * 4 - vif1.irqoffset, 0); + else + ret = VIF1transfer(pMem, vif1ch->qwc * 4, 0); - if( vif1.vifstalled ) { - ret = VIF1transfer(pMem+vif1.irqoffset, vif1ch->qwc*4-vif1.irqoffset, 0); - } - else { - ret = VIF1transfer(pMem, vif1ch->qwc*4, 0); - } - /*vif1ch->madr+= (vif1ch->qwc << 4); - vif1ch->qwc-= qwc;*/ - return ret; } static int prevvifcycles = 0; static u32* prevviftag = NULL; u32 *vif1ptag; -int _chainVIF1() { - + +int _chainVIF1() +{ return vif1.done;//Return Done } -__forceinline void vif1SetupTransfer() { +__forceinline void vif1SetupTransfer() +{ - switch(vif1.dmamode){ + switch (vif1.dmamode) + { case 0: //Normal case 1: //Normal (From memory) vif1.inprogress = 1; @@ -1989,56 +2189,60 @@ __forceinline void vif1SetupTransfer() { int id; int ret; - - vif1ptag = (u32*)dmaGetAddr(vif1ch->tadr); //Set memory pointer to TADR - if (vif1ptag == NULL) { //Is vif0ptag empty? - SysPrintf("Vif1 Tag BUSERR\n"); - vif1ch->chcr = ( vif1ch->chcr & 0xFFFF ) | ( (*vif1ptag) & 0xFFFF0000 ); //Transfer upper part of tag to CHCR bits 31-15 - psHu32(DMAC_STAT)|= 1<<15; //If yes, set BEIS (BUSERR) in DMAC_STAT register - return; //Return -1 as an error has occurred + if (vif1ptag == NULL) //Is vif0ptag empty? + { + Console::Error("Vif1 Tag BUSERR"); + vif1ch->chcr = (vif1ch->chcr & 0xFFFF) | ((*vif1ptag) & 0xFFFF0000); //Transfer upper part of tag to CHCR bits 31-15 + psHu32(DMAC_STAT) |= 1 << 15; //If yes, set BEIS (BUSERR) in DMAC_STAT register + return; //Return -1 as an error has occurred } - - id = (vif1ptag[0] >> 28) & 0x7; //ID for DmaChain copied from bit 28 of the tag + + id = (vif1ptag[0] >> 28) & 0x7; //ID for DmaChain copied from bit 28 of the tag vif1ch->qwc = (u16)vif1ptag[0]; //QWC set to lower 16bits of the tag vif1ch->madr = vif1ptag[1]; //MADR = ADDR field - g_vifCycles+=1; // Add 1 g_vifCycles from the QW read for the tag + g_vifCycles += 1; // Add 1 g_vifCycles from the QW read for the tag - vif1ch->chcr = ( vif1ch->chcr & 0xFFFF ) | ( (*vif1ptag) & 0xFFFF0000 ); //Transfer upper part of tag to CHCR bits 31-15 + vif1ch->chcr = (vif1ch->chcr & 0xFFFF) | ((*vif1ptag) & 0xFFFF0000); //Transfer upper part of tag to CHCR bits 31-15 // Transfer dma tag if tte is set - + VIF_LOG("VIF1 Tag %8.8x_%8.8x size=%d, id=%d, madr=%lx, tadr=%lx\n", - vif1ptag[1], vif1ptag[0], vif1ch->qwc, id, vif1ch->madr, vif1ch->tadr); + vif1ptag[1], vif1ptag[0], vif1ch->qwc, id, vif1ch->madr, vif1ch->tadr); - //} else - - - if (!vif1.done && (psHu32(DMAC_CTRL) & 0xC0) == 0x40 && id == 4) { // STD == VIF1 - //vif1.done |= hwDmacSrcChainWithStack(vif1ch, id); - // there are still bugs, need to also check if gif->madr +16*qwc >= stadr, if not, stall - if( (vif1ch->madr + vif1ch->qwc * 16) >= psHu32(DMAC_STADR) ) { - // stalled - - hwDmacIrq(13); - return; - } - } - - if (vif1ch->chcr & 0x40) { - if(vif1.vifstalled == 1) ret = VIF1transfer(vif1ptag+(2+vif1.irqoffset), 2-vif1.irqoffset, 1); //Transfer Tag on stall - else ret = VIF1transfer(vif1ptag+2, 2, 1); //Transfer Tag - if (ret == -1) return; //There has been an error - if (ret == -2) { - return; //IRQ set by VIFTransfer + if (!vif1.done && (psHu32(DMAC_CTRL) & 0xC0) == 0x40 && id == 4) // STD == VIF1 + { + // there are still bugs, need to also check if gif->madr +16*qwc >= stadr, if not, stall + if ((vif1ch->madr + vif1ch->qwc * 16) >= psHu32(DMAC_STADR)) + { + // stalled + hwDmacIrq(13); + return; } } vif1.inprogress = 1; - vif1.done |= hwDmacSrcChainWithStack(vif1ch, id); + + if (vif1ch->chcr & 0x40) + { + + if (vif1.vifstalled == 1) + ret = VIF1transfer(vif1ptag + (2 + vif1.irqoffset), 2 - vif1.irqoffset, 1); //Transfer Tag on stall + else + ret = VIF1transfer(vif1ptag + 2, 2, 1); //Transfer Tag + + if (ret < 0) + { + vif1.inprogress = 0; //Better clear this so it has to do it again (Jak 1) + return; //There has been an error or an interrupt + } + } - if ((vif1ch->chcr & 0x80) && (vif1ptag[0] >> 31)) { //Check TIE bit of CHCR and IRQ bit of tag - VIF_LOG( "dmaIrq Set\n" ); + vif1.done |= hwDmacSrcChainWithStack(vif1ch, id); + + if ((vif1ch->chcr & 0x80) && (vif1ptag[0] >> 31)) //Check TIE bit of CHCR and IRQ bit of tag + { + VIF_LOG("dmaIrq Set"); vif1.done = 1; return; //End Transfer @@ -2046,59 +2250,61 @@ __forceinline void vif1SetupTransfer() { break; } } -__forceinline void vif1Interrupt() { - VIF_LOG("vif1Interrupt: %8.8x\n", cpuRegs.cycle); +__forceinline void vif1Interrupt() +{ + VIF_LOG("vif1Interrupt: %8.8x", cpuRegs.cycle); g_vifCycles = 0; - - - - - - //} - if((vif1ch->chcr & 0x100) == 0) SysPrintf("Vif1 running when CHCR == %x\n", vif1ch->chcr); - if(vif1.inprogress == 1) _VIF1chain(); - - if(vif1.irq && vif1.tag.size == 0) + if ((vif1ch->chcr & 0x100) == 0) Console::WriteLn("Vif1 running when CHCR == %x", params vif1ch->chcr); + + if (vif1.irq && vif1.tag.size == 0) { - vif1Regs->stat|= VIF1_STAT_INT; + vif1Regs->stat |= VIF1_STAT_INT; hwIntcIrq(VIF1intc); --vif1.irq; - if(vif1Regs->stat & (VIF1_STAT_VSS|VIF1_STAT_VIS|VIF1_STAT_VFS)) + if (vif1Regs->stat & (VIF1_STAT_VSS | VIF1_STAT_VIS | VIF1_STAT_VFS)) { - vif1Regs->stat&= ~0x1F000000; // FQC=0 - // One game doesnt like vif stalling at end, cant remember what. Spiderman isnt keen on it tho - vif1ch->chcr &= ~0x100; - return; - } - else if(vif1ch->qwc > 0 || vif1.irqoffset > 0) + vif1Regs->stat &= ~0x1F000000; // FQC=0 + + // One game doesnt like vif stalling at end, cant remember what. Spiderman isnt keen on it tho + vif1ch->chcr &= ~0x100; + return; + } + else if (vif1ch->qwc > 0 || vif1.irqoffset > 0) { - if(vif1.stallontag == 1) - { + if (vif1.stallontag == 1) vif1SetupTransfer(); - } - else _VIF1chain();//CPU_INT(13, vif1ch->qwc * BIAS); - + else + _VIF1chain();//CPU_INT(13, vif1ch->qwc * BIAS); } } - if (vif1.done == 0 || vif1.inprogress == 1) { + if (vif1.inprogress == 1) _VIF1chain(); - if( !(psHu32(DMAC_CTRL) & 0x1) ) { - SysPrintf("vif1 dma masked\n"); + if (vif1.done == 0 || vif1.inprogress == 1) + { + + if (!(psHu32(DMAC_CTRL) & 0x1)) + { + Console::WriteLn("vif1 dma masked"); return; } - //_chainVIF1(); - if(vif1.inprogress == 0)vif1SetupTransfer(); - - CPU_INT(1, vif1ch->qwc * BIAS); + if (vif1.inprogress == 0)vif1SetupTransfer(); + + CPU_INT(1, vif1ch->qwc * BIAS); return; } + + if(vif1.vifstalled && vif1.irq) + { + CPU_INT(1, 0); + return; //Dont want to end if vif is stalled. + } #ifdef PCSX2_DEVBUILD - if(vif1ch->qwc > 0) SysPrintf("VIF1 Ending with %x QWC left\n"); - if(vif1.cmd != 0) SysPrintf("vif1.cmd still set %x\n", vif1.cmd); + if (vif1ch->qwc > 0) Console::WriteLn("VIF1 Ending with %x QWC left"); + if (vif1.cmd != 0) Console::WriteLn("vif1.cmd still set %x", params vif1.cmd); #endif prevviftag = NULL; @@ -2106,104 +2312,54 @@ __forceinline void vif1Interrupt() { vif1ch->chcr &= ~0x100; g_vifCycles = 0; hwDmacIrq(DMAC_VIF1); - if(vif1Regs->mskpath3 == 0 || (vif1ch->chcr & 0x1) == 0x1)vif1Regs->stat&= ~0x1F000000; // FQC=0 + if (vif1Regs->mskpath3 == 0 || (vif1ch->chcr & 0x1) == 0x1)vif1Regs->stat &= ~0x1F000000; // FQC=0 } #define spr0 ((DMACh*)&PS2MEM_HW[0xD000]) void dmaVIF1() { - - VIF_LOG("dmaVIF1 chcr = %lx, madr = %lx, qwc = %lx\n" - " tadr = %lx, asr0 = %lx, asr1 = %lx\n", - vif1ch->chcr, vif1ch->madr, vif1ch->qwc, - vif1ch->tadr, vif1ch->asr0, vif1ch->asr1 ); - + VIF_LOG("dmaVIF1 chcr = %lx, madr = %lx, qwc = %lx\n" + " tadr = %lx, asr0 = %lx, asr1 = %lx", + vif1ch->chcr, vif1ch->madr, vif1ch->qwc, + vif1ch->tadr, vif1ch->asr0, vif1ch->asr1); + g_vifCycles = 0; vif1.inprogress = 0; - - if (((psHu32(DMAC_CTRL) & 0xC) == 0x8)) { // VIF MFIFO - //SysPrintf("VIFMFIFO\n"); - if(!(vif1ch->chcr & 0x4)) SysPrintf("MFIFO mode != Chain! %x\n", vif1ch->chcr); - /*if(vif1ch->madr != spr0->madr)*/vifMFIFOInterrupt(); - //else vif1.inprogress |= 0x10; + + vif1Regs->stat |= 0x10000000; // FQC=16 + + if (((psHu32(DMAC_CTRL) & 0xC) == 0x8)) // VIF MFIFO + { +// Console::WriteLn("VIFMFIFO\n"); + if (!(vif1ch->chcr & 0x4)) Console::WriteLn("MFIFO mode != Chain! %x", params vif1ch->chcr); + vifMFIFOInterrupt(); return; } #ifdef PCSX2_DEVBUILD - if ((psHu32(DMAC_CTRL) & 0xC0) == 0x40) { // STD == VIF1 - //SysPrintf("VIF Stall Control Source = %x, Drain = %x\n", (psHu32(0xe000) >> 4) & 0x3, (psHu32(0xe000) >> 6) & 0x3); - //return; + if ((psHu32(DMAC_CTRL) & 0xC0) == 0x40) // STD == VIF1 + { + //DevCon::WriteLn("VIF Stall Control Source = %x, Drain = %x", params (psHu32(0xe000) >> 4) & 0x3, (psHu32(0xe000) >> 6) & 0x3); } #endif - vif1Regs->stat|= 0x10000000; // FQC=16 + if (!(vif1ch->chcr & 0x4) || vif1ch->qwc > 0) // Normal Mode + { - if (!(vif1ch->chcr & 0x4) || vif1ch->qwc > 0) { // Normal Mode - - if ((psHu32(DMAC_CTRL) & 0xC0) == 0x40) { - SysPrintf("DMA Stall Control on VIF1 normal\n"); - } - if ((vif1ch->chcr & 0x1)) { // to Memory - /*if(_VIF1chain() == -2) { - SysPrintf("Stall on normal\n"); - //vif1.vifstalled = 1; - } - CPU_INT(1, g_vifCycles);*/ + if ((psHu32(DMAC_CTRL) & 0xC0) == 0x40) + Console::WriteLn("DMA Stall Control on VIF1 normal"); + + if ((vif1ch->chcr & 0x1)) // to Memory vif1.dmamode = 0; - } else { + else vif1.dmamode = 1; - /*int size; - u64* pMem = (u64*)dmaGetAddr(vif1ch->madr); - - // VIF from gsMemory - - if (pMem == NULL) { //Is vif0ptag empty? - SysPrintf("Vif1 Tag BUSERR\n"); - psHu32(DMAC_STAT)|= 1<<15; //If yes, set BEIS (BUSERR) in DMAC_STAT register - vif1.done = 1; - vif1Regs->stat&= ~0x1f000000; - vif1ch->qwc = 0; - CPU_INT(1, 0); - - return; //Return -1 as an error has occurred - } - - // MTGS concerns: The MTGS is inherently disagreeable with the idea of downloading - // stuff from the GS. The *only* way to handle this case safely is to flush the GS - // completely and execute the transfer there-after. - - FreezeXMMRegs(1); - if( GSreadFIFO2 == NULL ) { - for (size=vif1ch->qwc; size>0; --size) { - if (size > 1 ) { - mtgsWaitGS(); - GSreadFIFO((u64*)&PS2MEM_HW[0x5000]); - } - pMem[0] = psHu64(0x5000); - pMem[1] = psHu64(0x5008); pMem+= 2; - } - } - else { - mtgsWaitGS(); - GSreadFIFO2(pMem, vif1ch->qwc); - - // set incase read - psHu64(0x5000) = pMem[2*vif1ch->qwc-2]; - psHu64(0x5008) = pMem[2*vif1ch->qwc-1]; - } - FreezeXMMRegs(0); - - if(vif1Regs->mskpath3 == 0)vif1Regs->stat&= ~0x1f000000; - g_vifCycles += vif1ch->qwc * 2; - vif1ch->madr += vif1ch->qwc * 16; // mgs3 scene changes - vif1ch->qwc = 0; - CPU_INT(1, g_vifCycles);*/ - } - /*vif1.done = 1; - return;*/ - } else vif1.dmamode = 2; + } + else + { + vif1.dmamode = 2; + } // Chain Mode vif1.done = 0; @@ -2211,131 +2367,145 @@ void dmaVIF1() } -void vif1Write32(u32 mem, u32 value) { - if (mem == 0x10003c30) { // MARK - VIF_LOG("VIF1_MARK write32 0x%8.8x\n", value); - - /* Clear mark flag in VIF1_STAT and set mark with 'value' */ - vif1Regs->stat&= ~VIF1_STAT_MRK; - vif1Regs->mark = value; - } else - if (mem == 0x10003c10) { // FBRST - VIF_LOG("VIF1_FBRST write32 0x%8.8x\n", value); +void vif1Write32(u32 mem, u32 value) +{ + if (mem == 0x10003c30) // MARK + { + VIF_LOG("VIF1_MARK write32 0x%8.8x", value); - if (value & 0x1) { + /* Clear mark flag in VIF1_STAT and set mark with 'value' */ + vif1Regs->stat &= ~VIF1_STAT_MRK; + vif1Regs->mark = value; + } + else if (mem == 0x10003c10) // FBRST + { + VIF_LOG("VIF1_FBRST write32 0x%8.8x", value); + + if (value & 0x1) + { /* Reset VIF */ memzero_obj(vif1); - cpuRegs.interrupt &= ~((1<<1) | (1<<10)); //Stop all vif1 DMA's + cpuRegs.interrupt &= ~((1 << 1) | (1 << 10)); //Stop all vif1 DMA's vif1ch->qwc = 0; //? psHu64(0x10005000) = 0; psHu64(0x10005008) = 0; vif1.done = 1; vif1Regs->err = 0; vif1.inprogress = 0; - vif1Regs->stat&= ~(0x1F800000|VIF1_STAT_INT|VIF1_STAT_VSS|VIF1_STAT_VIS|VIF1_STAT_VFS|VIF1_STAT_VPS); // FQC=0 + vif1Regs->stat &= ~(0x1F800000 | VIF1_STAT_INT | VIF1_STAT_VSS | VIF1_STAT_VIS | VIF1_STAT_VFS | VIF1_STAT_VPS); // FQC=0 } - if (value & 0x2) { + if (value & 0x2) + { /* Force Break the VIF */ - /* I guess we should stop the VIF dma here - but not 100% sure (linuz) */ + /* I guess we should stop the VIF dma here, but not 100% sure (linuz) */ vif1Regs->stat |= VIF1_STAT_VFS; - vif1Regs->stat &= ~VIF1_STAT_VPS; - cpuRegs.interrupt &= ~((1<<1) | (1<<10)); //Stop all vif1 DMA's + vif1Regs->stat &= ~VIF1_STAT_VPS; + cpuRegs.interrupt &= ~((1 << 1) | (1 << 10)); //Stop all vif1 DMA's vif1.vifstalled = 1; - SysPrintf("vif1 force break\n"); + Console::WriteLn("vif1 force break"); } - if (value & 0x4) { + if (value & 0x4) + { /* Stop VIF */ - /* Not completly sure about this, can't remember what game - used this, but 'draining' the VIF helped it, instead of - just stoppin the VIF (linuz) */ + // Not completly sure about this, can't remember what game used this, but 'draining' the VIF helped it, instead of + // just stoppin the VIF (linuz). vif1Regs->stat |= VIF1_STAT_VSS; - vif1Regs->stat &= ~VIF1_STAT_VPS; + vif1Regs->stat &= ~VIF1_STAT_VPS; + vif1.inprogress = 0; vif1.vifstalled = 1; } - if (value & 0x8) { + if (value & 0x8) + { int cancel = 0; - /* Cancel stall, first check if there is a stall to cancel, - and then clear VIF1_STAT VSS|VFS|VIS|INT|ER0|ER1 bits */ - if (vif1Regs->stat & (VIF1_STAT_VSS|VIF1_STAT_VIS|VIF1_STAT_VFS)) { + /* Cancel stall, first check if there is a stall to cancel, and then clear VIF1_STAT VSS|VFS|VIS|INT|ER0|ER1 bits */ + if (vif1Regs->stat & (VIF1_STAT_VSS | VIF1_STAT_VIS | VIF1_STAT_VFS)) + { cancel = 1; } vif1Regs->stat &= ~(VIF1_STAT_VSS | VIF1_STAT_VFS | VIF1_STAT_VIS | - VIF1_STAT_INT | VIF1_STAT_ER0 | VIF1_STAT_ER1); - if (cancel) { - - if( vif1.vifstalled ) { + VIF1_STAT_INT | VIF1_STAT_ER0 | VIF1_STAT_ER1); + if (cancel) + { + if (vif1.vifstalled) + { g_vifCycles = 0; // loop necessary for spiderman - if((psHu32(DMAC_CTRL) & 0xC) == 0x8){ + if ((psHu32(DMAC_CTRL) & 0xC) == 0x8) + { - //SysPrintf("MFIFO Stall\n"); - //CPU_INT(10, 0); + //Console::WriteLn("MFIFO Stall"); CPU_INT(10, vif1ch->qwc * BIAS); - }else { - /*if(vif1.stallontag == 1){ - //SysPrintf("Sorting VIF Stall on tag\n"); - vif1SetupTransfer(); - } *///else _VIF1chain(); - - //CPU_INT(1, g_vifCycles); // Gets the timing right - Flatout + } + else + { + // Gets the timing right - Flatout CPU_INT(1, vif1ch->qwc * BIAS); } vif1ch->chcr |= 0x100; } } - } - } else - if (mem == 0x10003c20) { // ERR - VIF_LOG("VIF1_ERR write32 0x%8.8x\n", value); + } + } + else if (mem == 0x10003c20) // ERR + { + VIF_LOG("VIF1_ERR write32 0x%8.8x", value); /* Set VIF1_ERR with 'value' */ vif1Regs->err = value; - } else - if (mem == 0x10003c00) { // STAT - VIF_LOG("VIF1_STAT write32 0x%8.8x\n", value); + } + else if (mem == 0x10003c00) // STAT + { + VIF_LOG("VIF1_STAT write32 0x%8.8x", value); #ifdef PCSX2_DEVBUILD /* Only FDR bit is writable, so mask the rest */ - if( (vif1Regs->stat & VIF1_STAT_FDR) ^ (value & VIF1_STAT_FDR) ) { + if ((vif1Regs->stat & VIF1_STAT_FDR) ^(value & VIF1_STAT_FDR)) + { // different so can't be stalled - if (vif1Regs->stat & (VIF1_STAT_INT|VIF1_STAT_VSS|VIF1_STAT_VIS|VIF1_STAT_VFS)) { - SysPrintf("changing dir when vif1 fifo stalled\n"); + if (vif1Regs->stat & (VIF1_STAT_INT | VIF1_STAT_VSS | VIF1_STAT_VIS | VIF1_STAT_VFS)) + { + Console::WriteLn("changing dir when vif1 fifo stalled"); } } #endif vif1Regs->stat = (vif1Regs->stat & ~VIF1_STAT_FDR) | (value & VIF1_STAT_FDR); - if (vif1Regs->stat & VIF1_STAT_FDR) { - vif1Regs->stat|= 0x01000000; - } else { + if (vif1Regs->stat & VIF1_STAT_FDR) + { + vif1Regs->stat |= 0x01000000; + } + else + { vif1ch->qwc = 0; vif1.vifstalled = 0; vif1.done = 1; - vif1Regs->stat&= ~0x1F000000; // FQC=0 + vif1Regs->stat &= ~0x1F000000; // FQC=0 } } - else - if (mem == 0x10003c50) { // MODE + else if (mem == 0x10003c50) // MODE + { vif1Regs->mode = value; } - else { - SysPrintf("Unknown Vif1 write to %x\n", mem); - if( mem >= 0x10003d00 && mem < 0x10003d80 ) { - assert( (mem&0xf) == 0 ); - if( mem < 0x10003d40) g_vifRow1[(mem>>4)&3] = value; + else + { + Console::WriteLn("Unknown Vif1 write to %x", params mem); + if (mem >= 0x10003d00 && mem < 0x10003d80) + { + assert((mem&0xf) == 0); + if (mem < 0x10003d40) g_vifRow1[(mem>>4)&3] = value; else g_vifCol1[(mem>>4)&3] = value; - } else psHu32(mem) = value; + } + else psHu32(mem) = value; } /* Other registers are read-only so do nothing for them */ } -void vif1Reset() { - /* Reset the whole VIF, meaning the internal pcsx2 vars - and all the registers */ +void vif1Reset() +{ + /* Reset the whole VIF, meaning the internal pcsx2 vars, and all the registers */ memzero_obj(vif1); memzero_obj(*vif1Regs); SetNewMask(g_vif1Masks, g_vif1HasMask3, 0, 0xffffffff); @@ -2343,16 +2513,16 @@ void vif1Reset() { psHu64(0x10005008) = 0; vif1Regs->stat &= ~VIF1_STAT_VPS; vif1.done = 1; - cpuRegs.interrupt &= ~((1<<1) | (1<<10)); //Stop all vif1 DMA's - vif1Regs->stat&= ~0x1F000000; // FQC=0 + cpuRegs.interrupt &= ~((1 << 1) | (1 << 10)); //Stop all vif1 DMA's + vif1Regs->stat &= ~0x1F000000; // FQC=0 } void SaveState::vif1Freeze() { Freeze(vif1); - - Freeze( g_vif1HasMask3 ); - Freeze( g_vif1Masks ); - Freeze( g_vifRow1 ); - Freeze( g_vifCol1 ); + + Freeze(g_vif1HasMask3); + Freeze(g_vif1Masks); + Freeze(g_vifRow1); + Freeze(g_vifCol1); } diff --git a/pcsx2/VifDma.h b/pcsx2/VifDma.h index 86fe63f102..a7fed1c30b 100644 --- a/pcsx2/VifDma.h +++ b/pcsx2/VifDma.h @@ -34,9 +34,12 @@ struct vifStruct { int cl; int wl; u8 usn; + + // The next three should be boolean, and will be next time I break savestate compatability. --arcum42 u8 done; u8 vifstalled; u8 stallontag; + u8 irqoffset; // 32bit offset where next vif code is u32 savedtag; // need this for backwards compat with save states u32 vifpacketsize; @@ -45,7 +48,7 @@ struct vifStruct { }; extern vifStruct vif0, vif1; -extern int Path3transfer; +extern bool Path3transfer; #define vif0ch ((DMACh*)&PS2MEM_HW[0x8000]) #define vif1ch ((DMACh*)&PS2MEM_HW[0x9000]) diff --git a/pcsx2/configure.ac b/pcsx2/configure.ac index a7a972cece..1cb25f88f6 100644 --- a/pcsx2/configure.ac +++ b/pcsx2/configure.ac @@ -1,5 +1,5 @@ -AC_INIT(pcsx2,0.9.5,zerofrog@gmail.com) -AM_INIT_AUTOMAKE(pcsx2,0.9.5) +AC_INIT(pcsx2,0.9.6,zerofrog@gmail.com) +AM_INIT_AUTOMAKE(pcsx2,0.9.6) AC_PROG_CC([gcc g++ cl KCC CC cxx cc++ xlC aCC c++]) AC_PROG_CXX([gcc g++ cl KCC CC cxx cc++ xlC aCC c++]) diff --git a/pcsx2/vtlb.cpp b/pcsx2/vtlb.cpp index 5bc06b18a9..f34df81bf4 100644 --- a/pcsx2/vtlb.cpp +++ b/pcsx2/vtlb.cpp @@ -104,7 +104,7 @@ __forceinline DataType __fastcall MemOp_r0(u32 addr) //has to: translate, find function, call function u32 hand=(u8)vmv; u32 paddr=ppf-hand+0x80000000; - //SysPrintf("Translated 0x%08X to 0x%08X\n",addr,paddr); + //Console::WriteLn("Translated 0x%08X to 0x%08X",params addr,paddr); //return reinterpret_cast::HandlerType*>(vtlbdata.RWFT[TemplateHelper::sidx][0][hand])(paddr,data); switch( DataSize ) @@ -135,7 +135,7 @@ __forceinline void __fastcall MemOp_r1(u32 addr, DataType* data) //has to: translate, find function, call function u32 hand=(u8)vmv; u32 paddr=ppf-hand+0x80000000; - //SysPrintf("Translated 0x%08X to 0x%08X\n",addr,paddr); + //Console::WriteLn("Translated 0x%08X to 0x%08X",params addr,paddr); //return reinterpret_cast::HandlerType*>(RWFT[TemplateHelper::sidx][0][hand])(paddr,data); switch( DataSize ) @@ -162,7 +162,7 @@ __forceinline void __fastcall MemOp_w0(u32 addr, DataType data) //has to: translate, find function, call function u32 hand=(u8)vmv; u32 paddr=ppf-hand+0x80000000; - //SysPrintf("Translated 0x%08X to 0x%08X\n",addr,paddr); + //Console::WriteLn("Translated 0x%08X to 0x%08X",params addr,paddr); switch( DataSize ) { @@ -191,7 +191,7 @@ __forceinline void __fastcall MemOp_w1(u32 addr,const DataType* data) //has to: translate, find function, call function u32 hand=(u8)vmv; u32 paddr=ppf-hand+0x80000000; - //SysPrintf("Translated 0x%08X to 0x%08X\n",addr,paddr); + //Console::WriteLn("Translated 0x%08X to 0x%08X",params addr,paddr); switch( DataSize ) { case 64: return ((vtlbMemW64FP*)vtlbdata.RWFT[3][1][hand])(paddr, data); diff --git a/pcsx2/windows/VCprojects/pcsx2_2008.vcproj b/pcsx2/windows/VCprojects/pcsx2_2008.vcproj index 24fa21865b..26c17012ff 100644 --- a/pcsx2/windows/VCprojects/pcsx2_2008.vcproj +++ b/pcsx2/windows/VCprojects/pcsx2_2008.vcproj @@ -20,8 +20,9 @@ + + diff --git a/pcsx2/windows/VCprojects/vsprops/common.vsprops b/pcsx2/windows/VCprojects/vsprops/common.vsprops index 26d3306dd2..3dfbb5e8ba 100644 --- a/pcsx2/windows/VCprojects/vsprops/common.vsprops +++ b/pcsx2/windows/VCprojects/vsprops/common.vsprops @@ -8,11 +8,8 @@ Name="VCCLCompilerTool" AdditionalIncludeDirectories="./;../../;../../x86;"../../x86/ix86-32";../libs;../../IPU" PreprocessorDefinitions="__i386__;ENABLE_NLS;PACKAGE=\"pcsx2\";TIXML_USE_STL" - StructMemberAlignment="5" RuntimeTypeInfo="false" PrecompiledHeaderFile="$(IntDir)/pcsx2.pch" - WarningLevel="3" - DebugInformationFormat="3" CompileAs="0" /> chcr, p->madr, p->qwc, p->tadr, p->sadr); + __Log("dma%d c%x m%x q%x t%x s%x", i, p->chcr, p->madr, p->qwc, p->tadr, p->sadr); } - __Log("dmac %x %x %x %x\n", psHu32(DMAC_CTRL), psHu32(DMAC_STAT), psHu32(DMAC_RBSR), psHu32(DMAC_RBOR)); - __Log("intc %x %x\n", psHu32(INTC_STAT), psHu32(INTC_MASK)); - __Log("sif: %x %x %x %x %x\n", psHu32(0xf200), psHu32(0xf220), psHu32(0xf230), psHu32(0xf240), psHu32(0xf260)); + __Log("dmac %x %x %x %x", psHu32(DMAC_CTRL), psHu32(DMAC_STAT), psHu32(DMAC_RBSR), psHu32(DMAC_RBOR)); + __Log("intc %x %x", psHu32(INTC_STAT), psHu32(INTC_MASK)); + __Log("sif: %x %x %x %x %x", psHu32(0xf200), psHu32(0xf220), psHu32(0xf230), psHu32(0xf240), psHu32(0xf260)); #endif } diff --git a/pcsx2/x86/iFPU.cpp b/pcsx2/x86/iFPU.cpp index 7e02e4877c..601159d52c 100644 --- a/pcsx2/x86/iFPU.cpp +++ b/pcsx2/x86/iFPU.cpp @@ -681,7 +681,7 @@ static void (*recComOpXMM_to_XMM[] )(x86SSERegType, x86SSERegType) = { int recCommutativeOp(int info, int regd, int op) { int t0reg = _allocTempXMMreg(XMMT_FPS, -1); - //if (t0reg == -1) {SysPrintf("FPU: CommutativeOp Allocation Error!\n");} + //if (t0reg == -1) {Console::WriteLn("FPU: CommutativeOp Allocation Error!");} switch(info & (PROCESS_EE_S|PROCESS_EE_T) ) { case PROCESS_EE_S: @@ -805,7 +805,7 @@ void recC_EQ_xmm(int info) int tempReg; int t0reg; - //SysPrintf("recC_EQ_xmm()\n"); + //Console::WriteLn("recC_EQ_xmm()"); switch(info & (PROCESS_EE_S|PROCESS_EE_T) ) { case PROCESS_EE_S: @@ -875,7 +875,7 @@ void recC_LE_xmm(int info ) int tempReg; //tempX86reg int t0reg; //tempXMMreg - //SysPrintf("recC_LE_xmm()\n"); + //Console::WriteLn("recC_LE_xmm()"); switch(info & (PROCESS_EE_S|PROCESS_EE_T) ) { case PROCESS_EE_S: @@ -949,7 +949,7 @@ void recC_LT_xmm(int info) int tempReg; int t0reg; - //SysPrintf("recC_LT_xmm()\n"); + //Console::WriteLn("recC_LT_xmm()"); switch(info & (PROCESS_EE_S|PROCESS_EE_T) ) { case PROCESS_EE_S: @@ -1141,10 +1141,10 @@ void recDIV_S_xmm(int info) int roundmodeFlag = 0; int t0reg = _allocTempXMMreg(XMMT_FPS, -1); //if (t0reg == -1) {Console::Error("FPU: DIV Allocation Error!");} - //SysPrintf("DIV\n"); + //Console::WriteLn("DIV"); if ((g_sseMXCSR & 0x00006000) != 0x00000000) { // Set roundmode to nearest if it isn't already - //SysPrintf("div to nearest\n"); + //Console::WriteLn("div to nearest"); roundmode_temp[0] = (g_sseMXCSR & 0xFFFF9FFF); // Set new roundmode roundmode_temp[1] = g_sseMXCSR; // Backup old Roundmode SSE_LDMXCSR ((uptr)&roundmode_temp[0]); // Recompile Roundmode Change @@ -1153,14 +1153,14 @@ void recDIV_S_xmm(int info) switch(info & (PROCESS_EE_S|PROCESS_EE_T) ) { case PROCESS_EE_S: - //SysPrintf("FPU: DIV case 1\n"); + //Console::WriteLn("FPU: DIV case 1"); SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Ft_]); if (CHECK_FPU_EXTRA_FLAGS) recDIVhelper1(EEREC_D, t0reg); else recDIVhelper2(EEREC_D, t0reg); break; case PROCESS_EE_T: - //SysPrintf("FPU: DIV case 2\n"); + //Console::WriteLn("FPU: DIV case 2"); if (EEREC_D == EEREC_T) { SSE_MOVSS_XMM_to_XMM(t0reg, EEREC_T); SSE_MOVSS_M32_to_XMM(EEREC_D, (uptr)&fpuRegs.fpr[_Fs_]); @@ -1174,7 +1174,7 @@ void recDIV_S_xmm(int info) } break; case (PROCESS_EE_S|PROCESS_EE_T): - //SysPrintf("FPU: DIV case 3\n"); + //Console::WriteLn("FPU: DIV case 3"); if (EEREC_D == EEREC_T) { SSE_MOVSS_XMM_to_XMM(t0reg, EEREC_T); SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); @@ -1188,7 +1188,7 @@ void recDIV_S_xmm(int info) } break; default: - //SysPrintf("FPU: DIV case 4\n"); + //Console::WriteLn("FPU: DIV case 4"); SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Ft_]); SSE_MOVSS_M32_to_XMM(EEREC_D, (uptr)&fpuRegs.fpr[_Fs_]); if (CHECK_FPU_EXTRA_FLAGS) recDIVhelper1(EEREC_D, t0reg); @@ -1626,19 +1626,19 @@ void recSUBhelper(int regd, int regt) void recSUBop(int info, int regd) { int t0reg = _allocTempXMMreg(XMMT_FPS, -1); - //if (t0reg == -1) {SysPrintf("FPU: SUB Allocation Error!\n");} + //if (t0reg == -1) {Console::Error("FPU: SUB Allocation Error!");} //AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO|FPUflagU)); // Clear O and U flags switch(info & (PROCESS_EE_S|PROCESS_EE_T) ) { case PROCESS_EE_S: - //SysPrintf("FPU: SUB case 1\n"); + //Console::WriteLn("FPU: SUB case 1"); if (regd != EEREC_S) SSE_MOVSS_XMM_to_XMM(regd, EEREC_S); SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Ft_]); recSUBhelper(regd, t0reg); break; case PROCESS_EE_T: - //SysPrintf("FPU: SUB case 2\n"); + //Console::WriteLn("FPU: SUB case 2"); if (regd == EEREC_T) { SSE_MOVSS_XMM_to_XMM(t0reg, EEREC_T); SSE_MOVSS_M32_to_XMM(regd, (uptr)&fpuRegs.fpr[_Fs_]); @@ -1650,7 +1650,7 @@ void recSUBop(int info, int regd) } break; case (PROCESS_EE_S|PROCESS_EE_T): - //SysPrintf("FPU: SUB case 3\n"); + //Console::WriteLn("FPU: SUB case 3"); if (regd == EEREC_T) { SSE_MOVSS_XMM_to_XMM(t0reg, EEREC_T); SSE_MOVSS_XMM_to_XMM(regd, EEREC_S); @@ -1698,10 +1698,10 @@ void recSQRT_S_xmm(int info) u8* pjmp; static u32 PCSX2_ALIGNED16(roundmode_temp[4]) = { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }; int roundmodeFlag = 0; - //SysPrintf("FPU: SQRT\n"); + //Console::WriteLn("FPU: SQRT"); if ((g_sseMXCSR & 0x00006000) != 0x00000000) { // Set roundmode to nearest if it isn't already - //SysPrintf("sqrt to nearest\n"); + //Console::WriteLn("sqrt to nearest"); roundmode_temp[0] = (g_sseMXCSR & 0xFFFF9FFF); // Set new roundmode roundmode_temp[1] = g_sseMXCSR; // Backup old Roundmode SSE_LDMXCSR ((uptr)&roundmode_temp[0]); // Recompile Roundmode Change @@ -1749,6 +1749,7 @@ void recRSQRThelper1(int regd, int t0reg) // Preforms the RSQRT function when re { u8 *pjmp1, *pjmp2; u32 *pjmp32; + u8 *qjmp1, *qjmp2; int t1reg = _allocTempXMMreg(XMMT_FPS, -1); int tempReg = _allocX86reg(-1, X86TYPE_TEMP, 0, 0); //if (t1reg == -1) {Console::Error("FPU: RSQRT Allocation Error!");} @@ -1756,20 +1757,7 @@ void recRSQRThelper1(int regd, int t0reg) // Preforms the RSQRT function when re AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagI|FPUflagD)); // Clear I and D flags - /*--- Check for zero ---*/ - SSE_XORPS_XMM_to_XMM(t1reg, t1reg); - SSE_CMPEQSS_XMM_to_XMM(t1reg, t0reg); - SSE_MOVMSKPS_XMM_to_R32(tempReg, t1reg); - AND32ItoR(tempReg, 1); //Check sign (if t0reg == zero, sign will be set) - pjmp1 = JZ8(0); //Skip if not set - OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagD|FPUflagSD); // Set D and SD flags - SSE_XORPS_XMM_to_XMM(regd, t0reg); // Make regd Positive or Negative - SSE_ANDPS_M128_to_XMM(regd, (uptr)&s_neg[0]); // Get the sign bit - SSE_ORPS_M128_to_XMM(regd, (uptr)&g_maxvals[0]); // regd = +/- Maximum - pjmp32 = JMP32(0); - x86SetJ8(pjmp1); - - /*--- Check for negative SQRT ---*/ + /*--- (first) Check for negative SQRT ---*/ SSE_MOVMSKPS_XMM_to_R32(tempReg, t0reg); AND32ItoR(tempReg, 1); //Check sign pjmp2 = JZ8(0); //Skip if not set @@ -1777,6 +1765,30 @@ void recRSQRThelper1(int regd, int t0reg) // Preforms the RSQRT function when re SSE_ANDPS_M128_to_XMM(t0reg, (uptr)&s_pos[0]); // Make t0reg Positive x86SetJ8(pjmp2); + /*--- Check for zero ---*/ + SSE_XORPS_XMM_to_XMM(t1reg, t1reg); + SSE_CMPEQSS_XMM_to_XMM(t1reg, t0reg); + SSE_MOVMSKPS_XMM_to_R32(tempReg, t1reg); + AND32ItoR(tempReg, 1); //Check sign (if t0reg == zero, sign will be set) + pjmp1 = JZ8(0); //Skip if not set + /*--- Check for 0/0 ---*/ + SSE_XORPS_XMM_to_XMM(t1reg, t1reg); + SSE_CMPEQSS_XMM_to_XMM(t1reg, regd); + SSE_MOVMSKPS_XMM_to_R32(tempReg, t1reg); + AND32ItoR(tempReg, 1); //Check sign (if regd == zero, sign will be set) + qjmp1 = JZ8(0); //Skip if not set + OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagI|FPUflagSI); // Set I and SI flags ( 0/0 ) + qjmp2 = JMP8(0); + x86SetJ8(qjmp1); //x/0 but not 0/0 + OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagD|FPUflagSD); // Set D and SD flags ( x/0 ) + x86SetJ8(qjmp2); + + /*--- Make regd +/- Maximum ---*/ + SSE_ANDPS_M128_to_XMM(regd, (uptr)&s_neg[0]); // Get the sign bit + SSE_ORPS_M128_to_XMM(regd, (uptr)&g_maxvals[0]); // regd = +/- Maximum + pjmp32 = JMP32(0); + x86SetJ8(pjmp1); + if (CHECK_FPU_EXTRA_OVERFLOW) { SSE_MINSS_M32_to_XMM(t0reg, (uptr)&g_maxvals[0]); // Only need to do positive clamp, since t0reg is positive fpuFloat2(regd); @@ -1808,32 +1820,32 @@ void recRSQRT_S_xmm(int info) { int t0reg = _allocTempXMMreg(XMMT_FPS, -1); //if (t0reg == -1) {Console::Error("FPU: RSQRT Allocation Error!");} - //SysPrintf("FPU: RSQRT\n"); + //Console::WriteLn("FPU: RSQRT"); switch(info & (PROCESS_EE_S|PROCESS_EE_T) ) { case PROCESS_EE_S: - //SysPrintf("FPU: RSQRT case 1\n"); + //Console::WriteLn("FPU: RSQRT case 1"); SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Ft_]); if (CHECK_FPU_EXTRA_FLAGS) recRSQRThelper1(EEREC_D, t0reg); else recRSQRThelper2(EEREC_D, t0reg); break; case PROCESS_EE_T: - //SysPrintf("FPU: RSQRT case 2\n"); + //Console::WriteLn("FPU: RSQRT case 2"); SSE_MOVSS_XMM_to_XMM(t0reg, EEREC_T); SSE_MOVSS_M32_to_XMM(EEREC_D, (uptr)&fpuRegs.fpr[_Fs_]); if (CHECK_FPU_EXTRA_FLAGS) recRSQRThelper1(EEREC_D, t0reg); else recRSQRThelper2(EEREC_D, t0reg); break; case (PROCESS_EE_S|PROCESS_EE_T): - //SysPrintf("FPU: RSQRT case 3\n"); + //Console::WriteLn("FPU: RSQRT case 3"); SSE_MOVSS_XMM_to_XMM(t0reg, EEREC_T); SSE_MOVSS_XMM_to_XMM(EEREC_D, EEREC_S); if (CHECK_FPU_EXTRA_FLAGS) recRSQRThelper1(EEREC_D, t0reg); else recRSQRThelper2(EEREC_D, t0reg); break; default: - //SysPrintf("FPU: RSQRT case 4\n"); + //Console::WriteLn("FPU: RSQRT case 4"); SSE_MOVSS_M32_to_XMM(t0reg, (uptr)&fpuRegs.fpr[_Ft_]); SSE_MOVSS_M32_to_XMM(EEREC_D, (uptr)&fpuRegs.fpr[_Fs_]); if (CHECK_FPU_EXTRA_FLAGS) recRSQRThelper1(EEREC_D, t0reg); diff --git a/pcsx2/x86/iFPUd.cpp b/pcsx2/x86/iFPUd.cpp index 7b9e0edb68..cbd8ca19e2 100644 --- a/pcsx2/x86/iFPUd.cpp +++ b/pcsx2/x86/iFPUd.cpp @@ -191,7 +191,7 @@ void ToDouble(int reg) // converts really large normal numbers to PS2 signed max // converts really small normal numbers to zero (flush) // doesn't handle inf/nan/denormal -void ToPS2FPU_Full(int reg, bool flags, int absreg, bool acc) +void ToPS2FPU_Full(int reg, bool flags, int absreg, bool acc, bool addsub) { if (flags) AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagO | FPUflagU)); @@ -229,6 +229,7 @@ void ToPS2FPU_Full(int reg, bool flags, int absreg, bool acc) u8 *end3 = JMP8(0); x86SetJ8(to_underflow); + u8 *end4; if (flags && FPU_FLAGS_UNDERFLOW) //set underflow flags if not zero { SSE2_XORPD_XMM_to_XMM(absreg, absreg); @@ -236,6 +237,19 @@ void ToPS2FPU_Full(int reg, bool flags, int absreg, bool acc) u8 *is_zero = JE8(0); OR32ItoM((uptr)&fpuRegs.fprc[31], (FPUflagU | FPUflagSU)); + if (addsub) + { + //On ADD/SUB, the PS2 simply leaves the mantissa bits as they are (after normalization) + //IEEE either clears them (FtZ) or returns the denormalized result. + //not thoroughly tested : other operations such as MUL and DIV seem to clear all mantissa bits? + SSE_MOVAPS_XMM_to_XMM(absreg, reg); + SSE2_PSLLQ_I8_to_XMM(reg, 12); //mantissa bits + SSE2_PSRLQ_I8_to_XMM(reg, 41); + SSE2_PSRLQ_I8_to_XMM(absreg, 63); //sign bit + SSE2_PSLLQ_I8_to_XMM(absreg, 31); + SSE2_POR_XMM_to_XMM(reg, absreg); + end4 = JMP8(0); + } x86SetJ8(is_zero); } @@ -245,13 +259,15 @@ void ToPS2FPU_Full(int reg, bool flags, int absreg, bool acc) x86SetJ8(end); x86SetJ8(end2); x86SetJ8(end3); + if (flags && FPU_FLAGS_UNDERFLOW && addsub) + x86SetJ8(end4); } //mustn't use EAX/ECX/EDX/x86regs (MUL) -void ToPS2FPU(int reg, bool flags, int absreg, bool acc) +void ToPS2FPU(int reg, bool flags, int absreg, bool acc, bool addsub = false) { if (FPU_RESULT) - ToPS2FPU_Full(reg, flags, absreg, acc); + ToPS2FPU_Full(reg, flags, absreg, acc, addsub); else { SSE2_CVTSD2SS_XMM_to_XMM(reg, reg); //clamp @@ -415,24 +431,24 @@ void FPU_MUL(int info, int regd, int sreg, int treg, bool acc) } //------------------------------------------------------------------ -// CommutativeOp XMM (used for ADD, MUL, MAX, MIN and SUB opcodes) +// CommutativeOp XMM (used for ADD and SUB opcodes. that's it.) //------------------------------------------------------------------ static void (*recFPUOpXMM_to_XMM[] )(x86SSERegType, x86SSERegType) = { - SSE2_ADDSD_XMM_to_XMM, NULL, NULL, NULL, SSE2_SUBSD_XMM_to_XMM }; + SSE2_ADDSD_XMM_to_XMM, SSE2_SUBSD_XMM_to_XMM }; void recFPUOp(int info, int regd, int op, bool acc) { int sreg, treg; ALLOC_S(sreg); ALLOC_T(treg); - if (FPU_ADD_SUB_HACK && (op == 0 || op == 4)) //ADD or SUB + if (FPU_ADD_SUB_HACK) //ADD or SUB FPU_ADD_SUB(sreg, treg); ToDouble(sreg); ToDouble(treg); recFPUOpXMM_to_XMM[op](sreg, treg); - ToPS2FPU(sreg, true, treg, acc); + ToPS2FPU(sreg, true, treg, acc, true); SSE_MOVSS_XMM_to_XMM(regd, sreg); _freeXMMreg(sreg); _freeXMMreg(treg); @@ -629,10 +645,10 @@ void recDIV_S_xmm(int info) static u32 PCSX2_ALIGNED16(roundmode_temp[4]) = { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }; int roundmodeFlag = 0; //if (t0reg == -1) {Console::Error("FPU: DIV Allocation Error!");} - //SysPrintf("DIV\n"); + //Console::WriteLn("DIV"); if ((g_sseMXCSR & 0x00006000) != 0x00000000) { // Set roundmode to nearest if it isn't already - //SysPrintf("div to nearest\n"); + //Console::WriteLn("div to nearest"); roundmode_temp[0] = (g_sseMXCSR & 0xFFFF9FFF); // Set new roundmode roundmode_temp[1] = g_sseMXCSR; // Backup old Roundmode SSE_LDMXCSR ((uptr)&roundmode_temp[0]); // Recompile Roundmode Change @@ -715,7 +731,7 @@ void recMaddsub(int info, int regd, int op, bool acc) else SSE2_ADDSD_XMM_to_XMM(treg, sreg); - ToPS2FPU(treg, true, sreg, acc); + ToPS2FPU(treg, true, sreg, acc, true); x86SetJ32(skipall); SSE_MOVSS_XMM_to_XMM(regd, treg); @@ -865,7 +881,7 @@ FPURECOMPILE_CONSTCODE(NEG_S, XMMINFO_WRITED|XMMINFO_READS); void recSUB_S_xmm(int info) { - recFPUOp(info, EEREC_D, 4, false); + recFPUOp(info, EEREC_D, 1, false); } FPURECOMPILE_CONSTCODE(SUB_S, XMMINFO_WRITED|XMMINFO_READS|XMMINFO_READT); @@ -873,7 +889,7 @@ FPURECOMPILE_CONSTCODE(SUB_S, XMMINFO_WRITED|XMMINFO_READS|XMMINFO_READT); void recSUBA_S_xmm(int info) { - recFPUOp(info, EEREC_ACC, 4, true); + recFPUOp(info, EEREC_ACC, 1, true); } FPURECOMPILE_CONSTCODE(SUBA_S, XMMINFO_WRITEACC|XMMINFO_READS|XMMINFO_READT); @@ -886,17 +902,16 @@ FPURECOMPILE_CONSTCODE(SUBA_S, XMMINFO_WRITEACC|XMMINFO_READS|XMMINFO_READT); void recSQRT_S_xmm(int info) { u8 *pjmp; - u32 *pjmpx; static u32 PCSX2_ALIGNED16(roundmode_temp[4]) = { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }; int roundmodeFlag = 0; int tempReg = _allocX86reg(-1, X86TYPE_TEMP, 0, 0); if (tempReg == -1) {Console::Error("FPU: SQRT Allocation Error!"); tempReg = EAX;} int t1reg = _allocTempXMMreg(XMMT_FPS, -1); if (t1reg == -1) {Console::Error("FPU: SQRT Allocation Error!");} - //SysPrintf("FPU: SQRT\n"); + //Console::WriteLn("FPU: SQRT"); if ((g_sseMXCSR & 0x00006000) != 0x00000000) { // Set roundmode to nearest if it isn't already - //SysPrintf("sqrt to nearest\n"); + //Console::WriteLn("sqrt to nearest"); roundmode_temp[0] = (g_sseMXCSR & 0xFFFF9FFF); // Set new roundmode roundmode_temp[1] = g_sseMXCSR; // Backup old Roundmode SSE_LDMXCSR ((uptr)&roundmode_temp[0]); // Recompile Roundmode Change @@ -907,15 +922,8 @@ void recSQRT_S_xmm(int info) if (FPU_FLAGS_ID) { AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagI|FPUflagD)); // Clear I and D flags - - //--- Check for zero (skip sqrt if zero) - SSE_XORPS_XMM_to_XMM(t1reg, t1reg); - SSE_CMPEQSS_XMM_to_XMM(t1reg, EEREC_D); - SSE_MOVMSKPS_XMM_to_R32(tempReg, t1reg); - AND32ItoR(tempReg, 1); - pjmpx = JNE32(0); - - //--- Check for negative SQRT --- + + //--- Check for negative SQRT --- (sqrt(-0) = 0, unlike what the docs say) SSE_MOVMSKPS_XMM_to_R32(tempReg, EEREC_D); AND32ItoR(tempReg, 1); //Check sign pjmp = JZ8(0); //Skip if none are @@ -934,9 +942,7 @@ void recSQRT_S_xmm(int info) SSE2_SQRTSD_XMM_to_XMM(EEREC_D, EEREC_D); ToPS2FPU(EEREC_D, false, t1reg, false); - - x86SetJ32(pjmpx); - + if (roundmodeFlag == 1) { // Set roundmode back if it was changed SSE_LDMXCSR ((uptr)&roundmode_temp[1]); } @@ -954,6 +960,7 @@ FPURECOMPILE_CONSTCODE(SQRT_S, XMMINFO_WRITED|XMMINFO_READT); void recRSQRThelper1(int regd, int regt) // Preforms the RSQRT function when regd <- Fs and regt <- Ft (Sets correct flags) { u8 *pjmp1, *pjmp2; + u8 *qjmp1, *qjmp2; u32 *pjmp32; int t1reg = _allocTempXMMreg(XMMT_FPS, -1); int tempReg = _allocX86reg(-1, X86TYPE_TEMP, 0, 0); @@ -962,19 +969,7 @@ void recRSQRThelper1(int regd, int regt) // Preforms the RSQRT function when reg AND32ItoM((uptr)&fpuRegs.fprc[31], ~(FPUflagI|FPUflagD)); // Clear I and D flags - //--- Check for zero --- - SSE_XORPS_XMM_to_XMM(t1reg, t1reg); - SSE_CMPEQSS_XMM_to_XMM(t1reg, regt); - SSE_MOVMSKPS_XMM_to_R32(tempReg, t1reg); - AND32ItoR(tempReg, 1); //Check sign (if regt == zero, sign will be set) - pjmp1 = JZ8(0); //Skip if not set - OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagD|FPUflagSD); // Set D and SD flags (even when 0/0) - SSE_XORPS_XMM_to_XMM(regd, regt); // Make regd Positive or Negative - SetMaxValue(regd); //clamp to max - pjmp32 = JMP32(0); - x86SetJ8(pjmp1); - - //--- Check for negative SQRT --- + //--- (first) Check for negative SQRT --- SSE_MOVMSKPS_XMM_to_R32(tempReg, regt); AND32ItoR(tempReg, 1); //Check sign pjmp2 = JZ8(0); //Skip if not set @@ -982,6 +977,29 @@ void recRSQRThelper1(int regd, int regt) // Preforms the RSQRT function when reg SSE_ANDPS_M128_to_XMM(regt, (uptr)&s_pos[0]); // Make regt Positive x86SetJ8(pjmp2); + //--- Check for zero --- + SSE_XORPS_XMM_to_XMM(t1reg, t1reg); + SSE_CMPEQSS_XMM_to_XMM(t1reg, regt); + SSE_MOVMSKPS_XMM_to_R32(tempReg, t1reg); + AND32ItoR(tempReg, 1); //Check sign (if regt == zero, sign will be set) + pjmp1 = JZ8(0); //Skip if not set + + //--- Check for 0/0 --- + SSE_XORPS_XMM_to_XMM(t1reg, t1reg); + SSE_CMPEQSS_XMM_to_XMM(t1reg, regd); + SSE_MOVMSKPS_XMM_to_R32(tempReg, t1reg); + AND32ItoR(tempReg, 1); //Check sign (if regd == zero, sign will be set) + qjmp1 = JZ8(0); //Skip if not set + OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagI|FPUflagSI); // Set I and SI flags ( 0/0 ) + qjmp2 = JMP8(0); + x86SetJ8(qjmp1); //x/0 but not 0/0 + OR32ItoM((uptr)&fpuRegs.fprc[31], FPUflagD|FPUflagSD); // Set D and SD flags ( x/0 ) + x86SetJ8(qjmp2); + + SetMaxValue(regd); //clamp to max + pjmp32 = JMP32(0); + x86SetJ8(pjmp1); + ToDouble(regt); ToDouble(regd); SSE2_SQRTSD_XMM_to_XMM(regt, regt); @@ -1013,7 +1031,7 @@ void recRSQRT_S_xmm(int info) static u32 PCSX2_ALIGNED16(roundmode_temp[4]) = { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }; int roundmodeFlag = 0; if ((g_sseMXCSR & 0x00006000) != 0x00000000) { // Set roundmode to nearest if it isn't already - //SysPrintf("rsqrt to nearest\n"); + //Console::WriteLn("rsqrt to nearest"); roundmode_temp[0] = (g_sseMXCSR & 0xFFFF9FFF); // Set new roundmode roundmode_temp[1] = g_sseMXCSR; // Backup old Roundmode SSE_LDMXCSR ((uptr)&roundmode_temp[0]); // Recompile Roundmode Change diff --git a/pcsx2/x86/iMMI.cpp b/pcsx2/x86/iMMI.cpp index 2ffd8f789e..4fe4632b0a 100644 --- a/pcsx2/x86/iMMI.cpp +++ b/pcsx2/x86/iMMI.cpp @@ -1497,7 +1497,7 @@ CPU_SSE_XMMCACHE_END _deleteEEreg(_Rd_, 0); //Done - Refraction - Crude but quicker than int - //SysPrintf("PEXTLB\n"); + //Console::WriteLn("PEXTLB"); //Rs = cpuRegs.GPR.r[_Rs_]; Rt = cpuRegs.GPR.r[_Rt_]; MOV8MtoR(EAX, (uptr)&cpuRegs.GPR.r[_Rs_].UC[7]); MOV8RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UC[15], EAX); @@ -1617,23 +1617,29 @@ REC_FUNC_DEL( QFSRV, _Rd_); PCSX2_ALIGNED16(int s_MaskHighBitD[4]) = { 0x80000000, 0x80000000, 0x80000000, 0x80000000 }; PCSX2_ALIGNED16(int s_MaskHighBitW[4]) = { 0x80008000, 0x80008000, 0x80008000, 0x80008000 }; -void recPABSW() +void recPABSW() //needs clamping { if( !_Rd_ ) return; CPU_SSE2_XMMCACHE_START(XMMINFO_READT|XMMINFO_WRITED) + int t0reg = _allocTempXMMreg(XMMT_INT, -1); + SSE2_PCMPEQD_XMM_to_XMM(t0reg, t0reg); + SSE2_PSLLD_I8_to_XMM(t0reg, 31); + SSE2_PCMPEQD_XMM_to_XMM(t0reg, EEREC_T); //0xffffffff if equal to 0x80000000 if( cpucaps.hasSupplementalStreamingSIMD3Extensions ) { - SSSE3_PABSD_XMM_to_XMM(EEREC_D, EEREC_T); + SSSE3_PABSD_XMM_to_XMM(EEREC_D, EEREC_T); //0x80000000 -> 0x80000000 } else { - int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_T); + int t1reg = _allocTempXMMreg(XMMT_INT, -1); + SSEX_MOVDQA_XMM_to_XMM(t1reg, EEREC_T); SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PSRAD_I8_to_XMM(t0reg, 31); - SSEX_PXOR_XMM_to_XMM(EEREC_D, t0reg); - SSE2_PSUBD_XMM_to_XMM(EEREC_D, t0reg); - _freeXMMreg(t0reg); + SSE2_PSRAD_I8_to_XMM(t1reg, 31); + SSEX_PXOR_XMM_to_XMM(EEREC_D, t1reg); + SSE2_PSUBD_XMM_to_XMM(EEREC_D, t1reg); //0x80000000 -> 0x80000000 + _freeXMMreg(t1reg); } + SSE2_PXOR_XMM_to_XMM(EEREC_D, t0reg); //0x80000000 -> 0x7fffffff + _freeXMMreg(t0reg); CPU_SSE_XMMCACHE_END _deleteEEreg(_Rt_, 1); @@ -1645,24 +1651,31 @@ CPU_SSE_XMMCACHE_END CALLFunc( (uptr)R5900::Interpreter::OpcodeImpl::MMI::PABSW ); } + //////////////////////////////////////////////////// -void recPABSH() +void recPABSH() { if( !_Rd_ ) return; CPU_SSE2_XMMCACHE_START(XMMINFO_READT|XMMINFO_WRITED) + int t0reg = _allocTempXMMreg(XMMT_INT, -1); + SSE2_PCMPEQW_XMM_to_XMM(t0reg, t0reg); + SSE2_PSLLW_I8_to_XMM(t0reg, 15); + SSE2_PCMPEQW_XMM_to_XMM(t0reg, EEREC_T); //0xffff if equal to 0x8000 if( cpucaps.hasSupplementalStreamingSIMD3Extensions ) { - SSSE3_PABSW_XMM_to_XMM(EEREC_D, EEREC_T); + SSSE3_PABSW_XMM_to_XMM(EEREC_D, EEREC_T); //0x8000 -> 0x8000 } else { - int t0reg = _allocTempXMMreg(XMMT_INT, -1); - SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_T); + int t1reg = _allocTempXMMreg(XMMT_INT, -1); + SSEX_MOVDQA_XMM_to_XMM(t1reg, EEREC_T); SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); - SSE2_PSRAW_I8_to_XMM(t0reg, 15); - SSEX_PXOR_XMM_to_XMM(EEREC_D, t0reg); - SSE2_PSUBW_XMM_to_XMM(EEREC_D, t0reg); - _freeXMMreg(t0reg); + SSE2_PSRAW_I8_to_XMM(t1reg, 15); + SSEX_PXOR_XMM_to_XMM(EEREC_D, t1reg); + SSE2_PSUBW_XMM_to_XMM(EEREC_D, t1reg); //0x8000 -> 0x8000 + _freeXMMreg(t1reg); } + SSE2_PXOR_XMM_to_XMM(EEREC_D, t0reg); //0x8000 -> 0x7fff + _freeXMMreg(t0reg); CPU_SSE_XMMCACHE_END _deleteEEreg(_Rt_, 1); @@ -1956,7 +1969,7 @@ CPU_SSE_XMMCACHE_END void recQFSRV() { if ( !_Rd_ ) return; - //SysPrintf("recQFSRV()\n"); + //Console::WriteLn("recQFSRV()"); CPU_SSE2_XMMCACHE_START( XMMINFO_READS | XMMINFO_READT | XMMINFO_WRITED ) @@ -1968,7 +1981,7 @@ void recQFSRV() SSE2_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_T); MOV32MtoR(EAX, (uptr)&cpuRegs.sa); - SHL32ItoR(EAX, 1); // Multiply SA bytes by 16 bytes (the amount of bytes in QFSRVhelper() macros) + SHL32ItoR(EAX, 4); // Multiply SA bytes by 16 bytes (the amount of bytes in QFSRVhelper() macros) AND32I8toR(EAX, 0xf0); // This can possibly be removed but keeping it incase theres garbage in SA (cottonvibes) ADD32ItoEAX((uptr)x86Ptr[0] + 7); // ADD32 = 5 bytes, JMPR = 2 bytes JMPR(EAX); // Jumps to a QFSRVhelper() case below (a total of 16 different cases) @@ -2402,8 +2415,8 @@ CPU_SSE2_XMMCACHE_START((_Rs_?XMMINFO_READS:0)|(_Rt_?XMMINFO_READT:0)|XMMINFO_WR // shamt is 5-bit SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_S); - SSE2_PSLLQ_I8_to_XMM(t0reg, 27); - SSE2_PSRLQ_I8_to_XMM(t0reg, 27); + SSE2_PSLLQ_I8_to_XMM(t0reg, 27+32); + SSE2_PSRLQ_I8_to_XMM(t0reg, 27+32); // EEREC_D[0] <- Rt[0], t1reg[0] <- Rt[2] SSE_MOVHLPS_XMM_to_XMM(t1reg, EEREC_T); @@ -2470,8 +2483,8 @@ CPU_SSE2_XMMCACHE_START((_Rs_?XMMINFO_READS:0)|(_Rt_?XMMINFO_READT:0)|XMMINFO_WR // shamt is 5-bit SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_S); - SSE2_PSLLQ_I8_to_XMM(t0reg, 27); - SSE2_PSRLQ_I8_to_XMM(t0reg, 27); + SSE2_PSLLQ_I8_to_XMM(t0reg, 27+32); + SSE2_PSRLQ_I8_to_XMM(t0reg, 27+32); // EEREC_D[0] <- Rt[0], t1reg[0] <- Rt[2] SSE_MOVHLPS_XMM_to_XMM(t1reg, EEREC_T); @@ -2619,9 +2632,18 @@ void recPDIVBW() //////////////////////////////////////////////////// PCSX2_ALIGNED16(int s_mask1[4]) = {~0, 0, ~0, 0}; +//upper word of each doubleword in LO and HI is undocumented/undefined +//contains the upper multiplication result (before the addition with the lower multiplication result) void recPHMADH() { CPU_SSE2_XMMCACHE_START((_Rd_?XMMINFO_WRITED:0)|XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITELO|XMMINFO_WRITEHI) + int t0reg = _allocTempXMMreg(XMMT_INT, -1); + + SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_S); + SSE2_PSRLD_I8_to_XMM(t0reg, 16); + SSE2_PSLLD_I8_to_XMM(t0reg, 16); + SSE2_PMADDWD_XMM_to_XMM(t0reg, EEREC_T); + if( _Rd_ ) { if( EEREC_D == EEREC_S ) { SSE2_PMADDWD_XMM_to_XMM(EEREC_D, EEREC_T); @@ -2641,14 +2663,22 @@ CPU_SSE2_XMMCACHE_START((_Rd_?XMMINFO_WRITED:0)|XMMINFO_READS|XMMINFO_READT|XMMI } SSEX_MOVDQA_XMM_to_XMM(EEREC_HI, EEREC_LO); - SSE2_PSRLQ_I8_to_XMM(EEREC_HI, 32); + SSE_SHUFPS_XMM_to_XMM(EEREC_LO, t0reg, 0x88); + SSE_SHUFPS_XMM_to_XMM(EEREC_LO, EEREC_LO, 0xd8); + + SSE_SHUFPS_XMM_to_XMM(EEREC_HI, t0reg, 0xdd); + SSE_SHUFPS_XMM_to_XMM(EEREC_HI, EEREC_HI, 0xd8); + + _freeXMMreg(t0reg); CPU_SSE_XMMCACHE_END recCall( Interp::PHMADH, _Rd_ ); } //////////////////////////////////////////////////// +//upper word of each doubleword in LO and HI is undocumented/undefined +//contains the NOT of the upper multiplication result (before the substraction of the lower multiplication result) void recPMSUBH() { CPU_SSE2_XMMCACHE_START((_Rd_?XMMINFO_WRITED:0)|XMMINFO_READS|XMMINFO_READT|XMMINFO_READLO|XMMINFO_READHI|XMMINFO_WRITELO|XMMINFO_WRITEHI) @@ -2710,22 +2740,41 @@ CPU_SSE_XMMCACHE_END } //////////////////////////////////////////////////// + +// rs = ... a1 a0 +// rt = ... b1 b0 +// rd = ... a1*b1 - a0*b0 +// hi = ... +// lo = ... (undefined by doc)NOT(a1*b1), a1*b1 - a0*b0 void recPHMSBH() { CPU_SSE2_XMMCACHE_START((_Rd_?XMMINFO_WRITED:0)|XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITELO|XMMINFO_WRITEHI) + int t0reg = _allocTempXMMreg(XMMT_INT, -1); + SSE2_PCMPEQD_XMM_to_XMM(EEREC_LO, EEREC_LO); - SSE2_PSRLD_XMM_to_XMM(EEREC_LO, 16); + SSE2_PSRLD_I8_to_XMM(EEREC_LO, 16); SSEX_MOVDQA_XMM_to_XMM(EEREC_HI, EEREC_S); SSE2_PAND_XMM_to_XMM(EEREC_HI, EEREC_LO); SSE2_PMADDWD_XMM_to_XMM(EEREC_HI, EEREC_T); - SSE2_PSLLD_XMM_to_XMM(EEREC_LO, 16); + SSE2_PSLLD_I8_to_XMM(EEREC_LO, 16); SSE2_PAND_XMM_to_XMM(EEREC_LO, EEREC_S); SSE2_PMADDWD_XMM_to_XMM(EEREC_LO, EEREC_T); + SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_LO); SSE2_PSUBD_XMM_to_XMM(EEREC_LO, EEREC_HI); if( _Rd_ ) SSEX_MOVDQA_XMM_to_XMM(EEREC_D, EEREC_LO); + SSE2_PCMPEQD_XMM_to_XMM(EEREC_HI, EEREC_HI); + SSE2_PXOR_XMM_to_XMM(t0reg, EEREC_HI); + SSEX_MOVDQA_XMM_to_XMM(EEREC_HI, EEREC_LO); - SSE2_PSRLQ_I8_to_XMM(EEREC_HI, 32); + + SSE_SHUFPS_XMM_to_XMM(EEREC_LO, t0reg, 0x88); + SSE_SHUFPS_XMM_to_XMM(EEREC_LO, EEREC_LO, 0xd8); + + SSE_SHUFPS_XMM_to_XMM(EEREC_HI, t0reg, 0xdd); + SSE_SHUFPS_XMM_to_XMM(EEREC_HI, EEREC_HI, 0xd8); + + _freeXMMreg(t0reg); CPU_SSE_XMMCACHE_END recCall( Interp::PHMSBH, _Rd_ ); @@ -3278,8 +3327,8 @@ CPU_SSE2_XMMCACHE_START((_Rs_?XMMINFO_READS:0)|(_Rt_?XMMINFO_READT:0)|XMMINFO_WR // shamt is 5-bit SSEX_MOVDQA_XMM_to_XMM(t0reg, EEREC_S); - SSE2_PSLLQ_I8_to_XMM(t0reg, 27); - SSE2_PSRLQ_I8_to_XMM(t0reg, 27); + SSE2_PSLLQ_I8_to_XMM(t0reg, 27+32); + SSE2_PSRLQ_I8_to_XMM(t0reg, 27+32); // EEREC_D[0] <- Rt[0], t1reg[0] <- Rt[2] SSE_MOVHLPS_XMM_to_XMM(t1reg, EEREC_T); diff --git a/pcsx2/x86/iR3000A.cpp b/pcsx2/x86/iR3000A.cpp index db7ede34c4..a1b1ec756d 100644 --- a/pcsx2/x86/iR3000A.cpp +++ b/pcsx2/x86/iR3000A.cpp @@ -116,7 +116,7 @@ static void iIopDumpBlock( int startpc, u8 * ptr ) u8 used[34]; int numused, count; - SysPrintf( "dump1 %x:%x, %x\n", startpc, psxpc, psxRegs.cycle ); + Console::WriteLn( "dump1 %x:%x, %x", params startpc, psxpc, psxRegs.cycle ); Path::CreateDirectory( "dumps" ); string filename( Path::Combine( "dumps", fmt_string( "psxdump%.8X.txt", startpc ) ) ); @@ -847,7 +847,7 @@ static void checkcodefn() #else __asm__("movl %%eax, %[pctemp]" : : [pctemp]"m"(pctemp) ); #endif - SysPrintf("iop code changed! %x\n", pctemp); + Console::WriteLn("iop code changed! %x", params pctemp); } #endif @@ -940,23 +940,23 @@ void iDumpPsxRegisters(u32 startpc, u32 temp) int i; const char* pstr = temp ? "t" : ""; - __Log("%spsxreg: %x %x ra:%x k0: %x %x\n", pstr, startpc, psxRegs.cycle, psxRegs.GPR.n.ra, psxRegs.GPR.n.k0, *(int*)PSXM(0x13c128)); - for(i = 0; i < 34; i+=2) __Log("%spsx%s: %x %x\n", pstr, disRNameGPR[i], psxRegs.GPR.r[i], psxRegs.GPR.r[i+1]); - __Log("%scycle: %x %x %x; counters %x %x\n", pstr, psxRegs.cycle, g_psxNextBranchCycle, EEsCycle, + __Log("%spsxreg: %x %x ra:%x k0: %x %x", pstr, startpc, psxRegs.cycle, psxRegs.GPR.n.ra, psxRegs.GPR.n.k0, *(int*)PSXM(0x13c128)); + for(i = 0; i < 34; i+=2) __Log("%spsx%s: %x %x", pstr, disRNameGPR[i], psxRegs.GPR.r[i], psxRegs.GPR.r[i+1]); + __Log("%scycle: %x %x %x; counters %x %x", pstr, psxRegs.cycle, g_psxNextBranchCycle, EEsCycle, psxNextsCounter, psxNextCounter); - __Log("psxdma%d c%x b%x m%x t%x\n", 2, HW_DMA2_CHCR, HW_DMA2_BCR, HW_DMA2_MADR, HW_DMA2_TADR); - __Log("psxdma%d c%x b%x m%x\n", 3, HW_DMA3_CHCR, HW_DMA3_BCR, HW_DMA3_MADR); - __Log("psxdma%d c%x b%x m%x t%x\n", 4, HW_DMA4_CHCR, HW_DMA4_BCR, HW_DMA4_MADR, HW_DMA4_TADR); - __Log("psxdma%d c%x b%x m%x\n", 6, HW_DMA6_CHCR, HW_DMA6_BCR, HW_DMA6_MADR); - __Log("psxdma%d c%x b%x m%x\n", 7, HW_DMA7_CHCR, HW_DMA7_BCR, HW_DMA7_MADR); - __Log("psxdma%d c%x b%x m%x\n", 8, HW_DMA8_CHCR, HW_DMA8_BCR, HW_DMA8_MADR); - __Log("psxdma%d c%x b%x m%x t%x\n", 9, HW_DMA9_CHCR, HW_DMA9_BCR, HW_DMA9_MADR, HW_DMA9_TADR); - __Log("psxdma%d c%x b%x m%x\n", 10, HW_DMA10_CHCR, HW_DMA10_BCR, HW_DMA10_MADR); - __Log("psxdma%d c%x b%x m%x\n", 11, HW_DMA11_CHCR, HW_DMA11_BCR, HW_DMA11_MADR); - __Log("psxdma%d c%x b%x m%x\n", 12, HW_DMA12_CHCR, HW_DMA12_BCR, HW_DMA12_MADR); + __Log("psxdma%d c%x b%x m%x t%x", 2, HW_DMA2_CHCR, HW_DMA2_BCR, HW_DMA2_MADR, HW_DMA2_TADR); + __Log("psxdma%d c%x b%x m%x", 3, HW_DMA3_CHCR, HW_DMA3_BCR, HW_DMA3_MADR); + __Log("psxdma%d c%x b%x m%x t%x", 4, HW_DMA4_CHCR, HW_DMA4_BCR, HW_DMA4_MADR, HW_DMA4_TADR); + __Log("psxdma%d c%x b%x m%x", 6, HW_DMA6_CHCR, HW_DMA6_BCR, HW_DMA6_MADR); + __Log("psxdma%d c%x b%x m%x", 7, HW_DMA7_CHCR, HW_DMA7_BCR, HW_DMA7_MADR); + __Log("psxdma%d c%x b%x m%x", 8, HW_DMA8_CHCR, HW_DMA8_BCR, HW_DMA8_MADR); + __Log("psxdma%d c%x b%x m%x t%x", 9, HW_DMA9_CHCR, HW_DMA9_BCR, HW_DMA9_MADR, HW_DMA9_TADR); + __Log("psxdma%d c%x b%x m%x", 10, HW_DMA10_CHCR, HW_DMA10_BCR, HW_DMA10_MADR); + __Log("psxdma%d c%x b%x m%x", 11, HW_DMA11_CHCR, HW_DMA11_BCR, HW_DMA11_MADR); + __Log("psxdma%d c%x b%x m%x", 12, HW_DMA12_CHCR, HW_DMA12_BCR, HW_DMA12_MADR); for(i = 0; i < 7; ++i) - __Log("%scounter%d: mode %x count %I64x rate %x scycle %x target %I64x\n", pstr, i, psxCounters[i].mode, psxCounters[i].count, psxCounters[i].rate, psxCounters[i].sCycleT, psxCounters[i].target); + __Log("%scounter%d: mode %x count %I64x rate %x scycle %x target %I64x", pstr, i, psxCounters[i].mode, psxCounters[i].count, psxCounters[i].rate, psxCounters[i].sCycleT, psxCounters[i].target); #endif } diff --git a/pcsx2/x86/iR3000Atables.cpp b/pcsx2/x86/iR3000Atables.cpp index ef66b115dc..1b1f4486e6 100644 --- a/pcsx2/x86/iR3000Atables.cpp +++ b/pcsx2/x86/iR3000Atables.cpp @@ -1775,7 +1775,7 @@ static void rpsxCOP0() { rpsxCP0[_Rs_](); } //static void rpsxBASIC() { rpsxCP2BSC[_Rs_](); } static void rpsxNULL() { - SysPrintf("psxUNK: %8.8x\n", psxRegs.code); + Console::WriteLn("psxUNK: %8.8x", params psxRegs.code); } void (*rpsxBSC[64])() = { diff --git a/pcsx2/x86/iR5900Misc.cpp b/pcsx2/x86/iR5900Misc.cpp index 1580c54658..e496a1d311 100644 --- a/pcsx2/x86/iR5900Misc.cpp +++ b/pcsx2/x86/iR5900Misc.cpp @@ -94,10 +94,11 @@ void recMFSA( void ) } } +// SA is 4-bit and contains the amount of bytes to shift void recMTSA( void ) { if( GPR_IS_CONST1(_Rs_) ) { - MOV32ItoM((uptr)&cpuRegs.sa, g_cpuConstRegs[_Rs_].UL[0] ); + MOV32ItoM((uptr)&cpuRegs.sa, g_cpuConstRegs[_Rs_].UL[0] & 0xf ); } else { int mmreg; @@ -113,19 +114,19 @@ void recMTSA( void ) MOV32MtoR(EAX, (uptr)&cpuRegs.GPR.r[_Rs_].UL[0]); MOV32RtoM((uptr)&cpuRegs.sa, EAX); } + AND32ItoM((uptr)&cpuRegs.sa, 0xf); } } void recMTSAB( void ) { if( GPR_IS_CONST1(_Rs_) ) { - MOV32ItoM((uptr)&cpuRegs.sa, ((g_cpuConstRegs[_Rs_].UL[0] & 0xF) ^ (_Imm_ & 0xF)) << 3); + MOV32ItoM((uptr)&cpuRegs.sa, ((g_cpuConstRegs[_Rs_].UL[0] & 0xF) ^ (_Imm_ & 0xF)) ); } else { _eeMoveGPRtoR(EAX, _Rs_); AND32ItoR(EAX, 0xF); XOR32ItoR(EAX, _Imm_&0xf); - SHL32ItoR(EAX, 3); MOV32RtoM((uptr)&cpuRegs.sa, EAX); } } @@ -133,13 +134,13 @@ void recMTSAB( void ) void recMTSAH( void ) { if( GPR_IS_CONST1(_Rs_) ) { - MOV32ItoM((uptr)&cpuRegs.sa, ((g_cpuConstRegs[_Rs_].UL[0] & 0x7) ^ (_Imm_ & 0x7)) << 4); + MOV32ItoM((uptr)&cpuRegs.sa, ((g_cpuConstRegs[_Rs_].UL[0] & 0x7) ^ (_Imm_ & 0x7)) << 1); } else { _eeMoveGPRtoR(EAX, _Rs_); AND32ItoR(EAX, 0x7); XOR32ItoR(EAX, _Imm_&0x7); - SHL32ItoR(EAX, 4); + SHL32ItoR(EAX, 1); MOV32RtoM((uptr)&cpuRegs.sa, EAX); } } diff --git a/pcsx2/x86/iVU1micro.cpp b/pcsx2/x86/iVU1micro.cpp index a16c33387c..c56eae133c 100644 --- a/pcsx2/x86/iVU1micro.cpp +++ b/pcsx2/x86/iVU1micro.cpp @@ -63,7 +63,7 @@ namespace VU1micro mkdir("dumps", 0755); sprintf( filename, "dumps/vu%.4X.txt", VU1.VI[ REG_TPC ].UL ); #endif - SysPrintf( "dump1 %x => %x (%s)\n", VU1.VI[ REG_TPC ].UL, pc, filename ); + Console::WriteLn( "dump1 %x => %x (%s)", params VU1.VI[ REG_TPC ].UL, pc, filename ); f = fopen( filename, "wb" ); for ( i = VU1.VI[REG_TPC].UL; i < pc; i += 8 ) { @@ -97,11 +97,11 @@ namespace VU1micro #ifdef _DEBUG static u32 vuprogcount = 0; vuprogcount++; - if( vudump & 8 ) __Log("start vu1: %x %x\n", VU1.VI[ REG_TPC ].UL, vuprogcount); + if( vudump & 8 ) __Log("start vu1: %x %x", VU1.VI[ REG_TPC ].UL, vuprogcount); #endif if((VU0.VI[REG_VPU_STAT].UL & 0x100) == 0){ - //SysPrintf("Execute block VU1, VU1 not busy\n"); + //Console::WriteLn("Execute block VU1, VU1 not busy"); return; } diff --git a/pcsx2/x86/iVUmicro.cpp b/pcsx2/x86/iVUmicro.cpp index 5f7ea3ee20..3e24cd6930 100644 --- a/pcsx2/x86/iVUmicro.cpp +++ b/pcsx2/x86/iVUmicro.cpp @@ -144,13 +144,13 @@ void _recvuFMACflush(VURegs * VU, bool intermediate) { if( intermediate ) { if ((vucycle - VU->fmac[i].sCycle) > VU->fmac[i].Cycle) { -// VUM_LOG("flushing FMAC pipe[%d]\n", i); +// VUM_LOG("flushing FMAC pipe[%d]", i); VU->fmac[i].enable = 0; } } else { if ((vucycle - VU->fmac[i].sCycle) >= VU->fmac[i].Cycle) { -// VUM_LOG("flushing FMAC pipe[%d]\n", i); +// VUM_LOG("flushing FMAC pipe[%d]", i); VU->fmac[i].enable = 0; } } @@ -162,13 +162,13 @@ void _recvuFDIVflush(VURegs * VU, bool intermediate) { if( intermediate ) { if ((vucycle - VU->fdiv.sCycle) > VU->fdiv.Cycle) { -// SysPrintf("flushing FDIV pipe\n"); +// Console::WriteLn("flushing FDIV pipe"); VU->fdiv.enable = 0; } } else { if ((vucycle - VU->fdiv.sCycle) >= VU->fdiv.Cycle) { -// SysPrintf("flushing FDIV pipe\n"); +// Console::WriteLn("flushing FDIV pipe"); VU->fdiv.enable = 0; } } @@ -179,13 +179,13 @@ void _recvuEFUflush(VURegs * VU, bool intermediate) { if( intermediate ) { if ((vucycle - VU->efu.sCycle) > VU->efu.Cycle) { -// SysPrintf("flushing FDIV pipe\n"); +// Console::WriteLn("flushing FDIV pipe"); VU->efu.enable = 0; } } else { if ((vucycle - VU->efu.sCycle) >= VU->efu.Cycle) { -// SysPrintf("flushing FDIV pipe\n"); +// Console::WriteLn("flushing FDIV pipe"); VU->efu.enable = 0; } } @@ -199,13 +199,13 @@ void _recvuIALUflush(VURegs * VU, bool intermediate) { if( intermediate ) { if ((vucycle - VU->ialu[i].sCycle) > VU->ialu[i].Cycle) { -// VUM_LOG("flushing IALU pipe[%d]\n", i); +// VUM_LOG("flushing IALU pipe[%d]", i); VU->ialu[i].enable = 0; } } else { if ((vucycle - VU->ialu[i].sCycle) >= VU->ialu[i].Cycle) { -// VUM_LOG("flushing IALU pipe[%d]\n", i); +// VUM_LOG("flushing IALU pipe[%d]", i); VU->ialu[i].enable = 0; } } @@ -291,8 +291,8 @@ void _recvuFMACAdd(VURegs * VU, int reg, int xyzw) { break; } - if (i==8) SysPrintf("*PCSX2*: error , out of fmacs\n"); -// VUM_LOG("adding FMAC pipe[%d]; reg %d\n", i, reg); + if (i==8) Console::Error("*PCSX2*: error , out of fmacs"); +// VUM_LOG("adding FMAC pipe[%d]; reg %d", i, reg); VU->fmac[i].enable = 1; VU->fmac[i].sCycle = vucycle; @@ -302,14 +302,14 @@ void _recvuFMACAdd(VURegs * VU, int reg, int xyzw) { } void _recvuFDIVAdd(VURegs * VU, int cycles) { -// SysPrintf("adding FDIV pipe\n"); +// Console::WriteLn("adding FDIV pipe"); VU->fdiv.enable = 1; VU->fdiv.sCycle = vucycle; VU->fdiv.Cycle = cycles; } void _recvuEFUAdd(VURegs * VU, int cycles) { -// SysPrintf("adding EFU pipe\n"); +// Console::WriteLn("adding EFU pipe"); VU->efu.enable = 1; VU->efu.sCycle = vucycle; VU->efu.Cycle = cycles; @@ -324,7 +324,7 @@ void _recvuIALUAdd(VURegs * VU, int reg, int cycles) { break; } - if (i==8) SysPrintf("*PCSX2*: error , out of ialus\n"); + if (i==8) Console::Error("*PCSX2*: error , out of ialus"); VU->ialu[i].enable = 1; VU->ialu[i].sCycle = vucycle; @@ -388,7 +388,7 @@ void _recvuFlushFDIV(VURegs * VU) { if (VU->fdiv.enable == 0) return; cycle = VU->fdiv.Cycle - (vucycle - VU->fdiv.sCycle); -// SysPrintf("waiting FDIV pipe %d\n", cycle); +// Console::WriteLn("waiting FDIV pipe %d", params cycle); VU->fdiv.enable = 0; vucycle+= cycle; } @@ -399,7 +399,7 @@ void _recvuFlushEFU(VURegs * VU) { if (VU->efu.enable == 0) return; cycle = VU->efu.Cycle - (vucycle - VU->efu.sCycle); -// SysPrintf("waiting FDIV pipe %d\n", cycle); +// Console::WriteLn("waiting FDIV pipe %d", params cycle); VU->efu.enable = 0; vucycle+= cycle; } @@ -1724,9 +1724,9 @@ void testPrintOverflow() { tempRegX[2] &= 0xff800000; tempRegX[3] &= 0xff800000; if ( (tempRegX[0] == 0x7f800000) || (tempRegX[1] == 0x7f800000) || (tempRegX[2] == 0x7f800000) || (tempRegX[3] == 0x7f800000) ) - SysPrintf( "VU OVERFLOW!: Changing to +Fmax!!!!!!!!!!!!\n" ); + Console::Notice( "VU OVERFLOW!: Changing to +Fmax!!!!!!!!!!!!" ); if ( (tempRegX[0] == 0xff800000) || (tempRegX[1] == 0xff800000) || (tempRegX[2] == 0xff800000) || (tempRegX[3] == 0xff800000) ) - SysPrintf( "VU OVERFLOW!: Changing to -Fmax!!!!!!!!!!!!\n" ); + Console::Notice( "VU OVERFLOW!: Changing to -Fmax!!!!!!!!!!!!" ); } // Outputs to the console when overflow has occured. diff --git a/pcsx2/x86/iVUmicroLower.cpp b/pcsx2/x86/iVUmicroLower.cpp index e6a455033b..58156d0926 100644 --- a/pcsx2/x86/iVUmicroLower.cpp +++ b/pcsx2/x86/iVUmicroLower.cpp @@ -91,7 +91,7 @@ void recVUMI_DIV(VURegs *VU, int info) u8 *pjmp, *pjmp1; u32 *ajmp32, *bjmp32; - //SysPrintf("recVUMI_DIV()\n"); + //Console::WriteLn("recVUMI_DIV()"); AND32ItoM(VU_VI_ADDR(REG_STATUS_FLAG, 2), 0xFCF); // Clear D/I flags // FT can be zero here! so we need to check if its zero and set the correct flag. @@ -154,7 +154,7 @@ void recVUMI_DIV(VURegs *VU, int info) void recVUMI_SQRT( VURegs *VU, int info ) { u8* pjmp; - //SysPrintf("recVUMI_SQRT()\n"); + //Console::WriteLn("recVUMI_SQRT()"); _unpackVFSS_xyzw(EEREC_TEMP, EEREC_T, _Ftf_); AND32ItoM(VU_VI_ADDR(REG_STATUS_FLAG, 2), 0xFCF); // Clear D/I flags @@ -181,8 +181,9 @@ PCSX2_ALIGNED16(u64 RSQRT_TEMP_XMM[2]); void recVUMI_RSQRT(VURegs *VU, int info) { u8 *ajmp8, *bjmp8; + u8 *qjmp1, *qjmp2; int t1reg, t1boolean; - //SysPrintf("recVUMI_RSQRT()\n"); + //Console::WriteLn("recVUMI_RSQRT()"); _unpackVFSS_xyzw(EEREC_TEMP, EEREC_T, _Ftf_); AND32ItoM(VU_VI_ADDR(REG_STATUS_FLAG, 2), 0xFCF); // Clear D/I flags @@ -215,11 +216,24 @@ void recVUMI_RSQRT(VURegs *VU, int info) AND32ItoR( EAX, 0x01 ); // Grab "Is Zero" bits from the previous calculation ajmp8 = JZ8(0); // Skip if none are - OR32ItoM(VU_VI_ADDR(REG_STATUS_FLAG, 2), 0x820); // Zero divide flag - + + //check for 0/0 _unpackVFSS_xyzw(EEREC_TEMP, EEREC_S, _Fsf_); + + SSE_XORPS_XMM_to_XMM(t1reg, t1reg); // Clear EEREC_TEMP + SSE_CMPEQPS_XMM_to_XMM(t1reg, EEREC_TEMP); // Set all F's if each vector is zero + SSE_MOVMSKPS_XMM_to_R32(EAX, t1reg); // Move the sign bits of the previous calculation + + AND32ItoR( EAX, 0x01 ); // Grab "Is Zero" bits from the previous calculation + qjmp1 = JZ8(0); + OR32ItoM( VU_VI_ADDR(REG_STATUS_FLAG, 2), 0x410 ); // Set invalid flag (0/0) + qjmp2 = JMP8(0); + x86SetJ8(qjmp1); + OR32ItoM( VU_VI_ADDR(REG_STATUS_FLAG, 2), 0x820 ); // Zero divide (only when not 0/0) + x86SetJ8(qjmp2); + SSE_ANDPS_M128_to_XMM(EEREC_TEMP, (uptr)&const_clip[4]); - SSE_ORPS_M128_to_XMM(EEREC_TEMP, (uptr)&g_maxvals[0]); // EEREC_TEMP = +/-Max + SSE_ORPS_M128_to_XMM(EEREC_TEMP, (uptr)&g_maxvals[0]); // If division by zero, then EEREC_TEMP = +/- fmax SSE_MOVSS_XMM_to_M32(VU_VI_ADDR(REG_Q, 0), EEREC_TEMP); bjmp8 = JMP8(0); x86SetJ8(ajmp8); @@ -278,7 +292,7 @@ void recVUMI_IADDI(VURegs *VU, int info) s16 imm; if ( _Ft_ == 0 ) return; - //SysPrintf("recVUMI_IADDI \n"); + //Console::WriteLn("recVUMI_IADDI"); imm = ( VU->code >> 6 ) & 0x1f; imm = ( imm & 0x10 ? 0xfff0 : 0) | ( imm & 0xf ); _addISIMMtoIT(VU, imm, info); @@ -294,7 +308,7 @@ void recVUMI_IADDIU(VURegs *VU, int info) s16 imm; if ( _Ft_ == 0 ) return; - //SysPrintf("recVUMI_IADDIU \n"); + //Console::WriteLn("recVUMI_IADDIU"); imm = ( ( VU->code >> 10 ) & 0x7800 ) | ( VU->code & 0x7ff ); _addISIMMtoIT(VU, imm, info); } @@ -308,7 +322,7 @@ void recVUMI_IADD( VURegs *VU, int info ) { int fdreg, fsreg = -1, ftreg = -1; if ( _Fd_ == 0 ) return; - //SysPrintf("recVUMI_IADD \n"); + //Console::WriteLn("recVUMI_IADD"); if ( ( _Ft_ == 0 ) && ( _Fs_ == 0 ) ) { fdreg = ALLOCVI(_Fd_, MODE_WRITE); XOR32RtoR(fdreg, fdreg); @@ -354,7 +368,7 @@ void recVUMI_IAND( VURegs *VU, int info ) { int fdreg, fsreg = -1, ftreg = -1; if ( _Fd_ == 0 ) return; - //SysPrintf("recVUMI_IAND \n"); + //Console::WriteLn("recVUMI_IAND"); if ( ( _Fs_ == 0 ) || ( _Ft_ == 0 ) ) { fdreg = ALLOCVI(_Fd_, MODE_WRITE); XOR32RtoR(fdreg, fdreg); @@ -385,7 +399,7 @@ void recVUMI_IOR( VURegs *VU, int info ) { int fdreg, fsreg = -1, ftreg = -1; if ( _Fd_ == 0 ) return; - //SysPrintf("recVUMI_IOR \n"); + //Console::WriteLn("recVUMI_IOR"); if ( ( _Ft_ == 0 ) && ( _Fs_ == 0 ) ) { fdreg = ALLOCVI(_Fd_, MODE_WRITE); XOR32RtoR(fdreg, fdreg); @@ -433,7 +447,7 @@ void recVUMI_ISUB( VURegs *VU, int info ) { int fdreg, fsreg = -1, ftreg = -1; if ( _Fd_ == 0 ) return; - //SysPrintf("recVUMI_ISUB \n"); + //Console::WriteLn("recVUMI_ISUB"); if ( ( _Ft_ == 0 ) && ( _Fs_ == 0 ) ) { fdreg = ALLOCVI(_Fd_, MODE_WRITE); XOR32RtoR(fdreg, fdreg); @@ -485,7 +499,7 @@ void recVUMI_ISUBIU( VURegs *VU, int info ) s16 imm; if ( _Ft_ == 0 ) return; - //SysPrintf("recVUMI_ISUBIU \n"); + //Console::WriteLn("recVUMI_ISUBIU"); imm = ( ( VU->code >> 10 ) & 0x7800 ) | ( VU->code & 0x7ff ); imm = -imm; _addISIMMtoIT(VU, imm, info); @@ -499,7 +513,7 @@ void recVUMI_ISUBIU( VURegs *VU, int info ) void recVUMI_MOVE( VURegs *VU, int info ) { if ( (_Ft_ == 0) || (_X_Y_Z_W == 0) ) return; - //SysPrintf("recVUMI_MOVE \n"); + //Console::WriteLn("recVUMI_MOVE"); if (_X_Y_Z_W == 0x8) SSE_MOVSS_XMM_to_XMM(EEREC_T, EEREC_S); else if (_X_Y_Z_W == 0xf) SSE_MOVAPS_XMM_to_XMM(EEREC_T, EEREC_S); else { @@ -516,7 +530,7 @@ void recVUMI_MOVE( VURegs *VU, int info ) void recVUMI_MFIR( VURegs *VU, int info ) { if ( (_Ft_ == 0) || (_X_Y_Z_W == 0) ) return; - //SysPrintf("recVUMI_MFIR \n"); + //Console::WriteLn("recVUMI_MFIR"); _deleteX86reg(X86TYPE_VI|((VU==&VU1)?X86TYPE_VU1:0), _Fs_, 1); if( _XYZW_SS ) { @@ -547,7 +561,7 @@ void recVUMI_MFIR( VURegs *VU, int info ) void recVUMI_MTIR( VURegs *VU, int info ) { if ( _Ft_ == 0 ) return; - //SysPrintf("recVUMI_MTIR \n"); + //Console::WriteLn("recVUMI_MTIR"); _deleteX86reg(X86TYPE_VI|((VU==&VU1)?X86TYPE_VU1:0), _Ft_, 2); if( _Fsf_ == 0 ) { @@ -569,7 +583,7 @@ void recVUMI_MTIR( VURegs *VU, int info ) void recVUMI_MR32( VURegs *VU, int info ) { if ( (_Ft_ == 0) || (_X_Y_Z_W == 0) ) return; - //SysPrintf("recVUMI_MR32 \n"); + //Console::WriteLn("recVUMI_MR32"); if (_X_Y_Z_W != 0xf) { SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); SSE_SHUFPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP, 0x39); @@ -707,7 +721,7 @@ void recVUMI_LQ(VURegs *VU, int info) { s16 imm; if ( _Ft_ == 0 ) return; - //SysPrintf("recVUMI_LQ \n"); + //Console::WriteLn("recVUMI_LQ"); imm = (VU->code & 0x400) ? (VU->code & 0x3ff) | 0xfc00 : (VU->code & 0x3ff); if (_Fs_ == 0) { _loadEAX(VU, -1, (uptr)GET_VU_MEM(VU, (u32)imm*16), info); @@ -726,7 +740,7 @@ void recVUMI_LQ(VURegs *VU, int info) void recVUMI_LQD( VURegs *VU, int info ) { int fsreg; - //SysPrintf("recVUMI_LQD \n"); + //Console::WriteLn("recVUMI_LQD"); if ( _Fs_ != 0 ) { fsreg = ALLOCVI(_Fs_, MODE_READ|MODE_WRITE); SUB16ItoR( fsreg, 1 ); @@ -746,7 +760,7 @@ void recVUMI_LQD( VURegs *VU, int info ) void recVUMI_LQI(VURegs *VU, int info) { int fsreg; - //SysPrintf("recVUMI_LQI \n"); + //Console::WriteLn("recVUMI_LQI"); if ( _Ft_ == 0 ) { if( _Fs_ != 0 ) { if( (fsreg = _checkX86reg(X86TYPE_VI|(VU==&VU1?X86TYPE_VU1:0), _Fs_, MODE_WRITE|MODE_READ)) >= 0 ) { @@ -937,7 +951,7 @@ void _saveEAX(VURegs *VU, int x86reg, uptr offset, int info) void recVUMI_SQ(VURegs *VU, int info) { s16 imm; - //SysPrintf("recVUMI_SQ \n"); + //Console::WriteLn("recVUMI_SQ"); imm = ( VU->code & 0x400) ? ( VU->code & 0x3ff) | 0xfc00 : ( VU->code & 0x3ff); if ( _Ft_ == 0 ) _saveEAX(VU, -1, (uptr)GET_VU_MEM(VU, (int)imm * 16), info); else { @@ -953,7 +967,7 @@ void recVUMI_SQ(VURegs *VU, int info) //------------------------------------------------------------------ void recVUMI_SQD(VURegs *VU, int info) { - //SysPrintf("recVUMI_SQD \n"); + //Console::WriteLn("recVUMI_SQD"); if (_Ft_ == 0) _saveEAX(VU, -1, (uptr)VU->Mem, info); else { int ftreg = ALLOCVI(_Ft_, MODE_READ|MODE_WRITE); @@ -969,7 +983,7 @@ void recVUMI_SQD(VURegs *VU, int info) //------------------------------------------------------------------ void recVUMI_SQI(VURegs *VU, int info) { - //SysPrintf("recVUMI_SQI \n"); + //Console::WriteLn("recVUMI_SQI"); if (_Ft_ == 0) _saveEAX(VU, -1, (uptr)VU->Mem, info); else { int ftreg = ALLOCVI(_Ft_, MODE_READ|MODE_WRITE); @@ -989,7 +1003,7 @@ void recVUMI_ILW(VURegs *VU, int info) s16 imm, off; if ( ( _Ft_ == 0 ) || ( _X_Y_Z_W == 0 ) ) return; - //SysPrintf("recVUMI_ILW \n"); + //Console::WriteLn("recVUMI_ILW"); imm = ( VU->code & 0x400) ? ( VU->code & 0x3ff) | 0xfc00 : ( VU->code & 0x3ff); if (_X) off = 0; else if (_Y) off = 4; @@ -1016,7 +1030,7 @@ void recVUMI_ILW(VURegs *VU, int info) void recVUMI_ISW( VURegs *VU, int info ) { s16 imm; - //SysPrintf("recVUMI_ISW \n"); + //Console::WriteLn("recVUMI_ISW"); imm = ( VU->code & 0x400) ? ( VU->code & 0x3ff) | 0xfc00 : ( VU->code & 0x3ff); if (_Fs_ == 0) { @@ -1054,7 +1068,7 @@ void recVUMI_ILWR( VURegs *VU, int info ) int off, ftreg; if ( ( _Ft_ == 0 ) || ( _X_Y_Z_W == 0 ) ) return; - //SysPrintf("recVUMI_ILWR \n"); + //Console::WriteLn("recVUMI_ILWR"); if (_X) off = 0; else if (_Y) off = 4; else if (_Z) off = 8; @@ -1080,7 +1094,7 @@ void recVUMI_ILWR( VURegs *VU, int info ) void recVUMI_ISWR( VURegs *VU, int info ) { int ftreg; - //SysPrintf("recVUMI_ISWR \n"); + //Console::WriteLn("recVUMI_ISWR"); ADD_VI_NEEDED(_Fs_); ftreg = ALLOCVI(_Ft_, MODE_READ); @@ -1109,7 +1123,7 @@ void recVUMI_ISWR( VURegs *VU, int info ) //------------------------------------------------------------------ void recVUMI_RINIT(VURegs *VU, int info) { - //SysPrintf("recVUMI_RINIT()\n"); + //Console::WriteLn("recVUMI_RINIT()"); if( (xmmregs[EEREC_S].mode & MODE_WRITE) && (xmmregs[EEREC_S].mode & MODE_NOFLUSH) ) { _deleteX86reg(X86TYPE_VI|(VU==&VU1?X86TYPE_VU1:0), REG_R, 2); _unpackVFSS_xyzw(EEREC_TEMP, EEREC_S, _Fsf_); @@ -1141,7 +1155,7 @@ void recVUMI_RINIT(VURegs *VU, int info) //------------------------------------------------------------------ void recVUMI_RGET(VURegs *VU, int info) { - //SysPrintf("recVUMI_RGET()\n"); + //Console::WriteLn("recVUMI_RGET()"); if ( (_Ft_ == 0) || (_X_Y_Z_W == 0) ) return; _deleteX86reg(X86TYPE_VI|(VU==&VU1?X86TYPE_VU1:0), REG_R, 1); @@ -1165,7 +1179,7 @@ void recVUMI_RGET(VURegs *VU, int info) void recVUMI_RNEXT( VURegs *VU, int info ) { int rreg, x86temp0, x86temp1; - //SysPrintf("recVUMI_RNEXT()\n"); + //Console::WriteLn("recVUMI_RNEXT()"); rreg = ALLOCVI(REG_R, MODE_WRITE|MODE_READ); @@ -1206,7 +1220,7 @@ void recVUMI_RNEXT( VURegs *VU, int info ) //------------------------------------------------------------------ void recVUMI_RXOR( VURegs *VU, int info ) { - //SysPrintf("recVUMI_RXOR()\n"); + //Console::WriteLn("recVUMI_RXOR()"); if( (xmmregs[EEREC_S].mode & MODE_WRITE) && (xmmregs[EEREC_S].mode & MODE_NOFLUSH) ) { _deleteX86reg(X86TYPE_VI|(VU==&VU1?X86TYPE_VU1:0), REG_R, 1); _unpackVFSS_xyzw(EEREC_TEMP, EEREC_S, _Fsf_); @@ -1239,7 +1253,7 @@ void recVUMI_RXOR( VURegs *VU, int info ) //------------------------------------------------------------------ void recVUMI_WAITQ( VURegs *VU, int info ) { - //SysPrintf("recVUMI_WAITQ \n"); + //Console::WriteLn("recVUMI_WAITQ"); // if( info & PROCESS_VU_SUPER ) { // //CALLFunc(waitqfn); // SuperVUFlush(0, 1); @@ -1255,7 +1269,7 @@ void recVUMI_FSAND( VURegs *VU, int info ) { int ftreg; u16 imm; - //SysPrintf("recVUMI_FSAND \n"); + //Console::WriteLn("recVUMI_FSAND"); imm = (((VU->code >> 21 ) & 0x1) << 11) | (VU->code & 0x7ff); if(_Ft_ == 0) return; @@ -1274,7 +1288,7 @@ void recVUMI_FSEQ( VURegs *VU, int info ) int ftreg; u16 imm; if ( _Ft_ == 0 ) return; - //SysPrintf("recVUMI_FSEQ\n"); + //Console::WriteLn("recVUMI_FSEQ"); imm = (((VU->code >> 21 ) & 0x1) << 11) | (VU->code & 0x7ff); ftreg = ALLOCVI(_Ft_, MODE_WRITE|MODE_8BITREG); @@ -1295,7 +1309,7 @@ void recVUMI_FSOR( VURegs *VU, int info ) int ftreg; u32 imm; if(_Ft_ == 0) return; - //SysPrintf("recVUMI_FSOR \n"); + //Console::WriteLn("recVUMI_FSOR"); imm = (((VU->code >> 21 ) & 0x1) << 11) | (VU->code & 0x7ff); ftreg = ALLOCVI(_Ft_, MODE_WRITE); @@ -1315,7 +1329,7 @@ void recVUMI_FSSET(VURegs *VU, int info) u32 prevaddr = VU_VI_ADDR(REG_STATUS_FLAG, 2); u16 imm = 0; - //SysPrintf("recVUMI_FSSET \n"); + //Console::WriteLn("recVUMI_FSSET"); imm = (((VU->code >> 21 ) & 0x1) << 11) | (VU->code & 0x7FF); // keep the low 6 bits ONLY if the upper instruction is an fmac instruction (otherwise rewrite) - metal gear solid 3 @@ -1339,7 +1353,7 @@ void recVUMI_FMAND( VURegs *VU, int info ) { int fsreg, ftreg; if ( _Ft_ == 0 ) return; - //SysPrintf("recVUMI_FMAND \n"); + //Console::WriteLn("recVUMI_FMAND"); fsreg = _checkX86reg(X86TYPE_VI|(VU==&VU1?X86TYPE_VU1:0), _Fs_, MODE_READ); ftreg = ALLOCVI(_Ft_, MODE_WRITE);//|MODE_8BITREG); @@ -1360,7 +1374,7 @@ void recVUMI_FMEQ( VURegs *VU, int info ) { int ftreg, fsreg; if ( _Ft_ == 0 ) return; - //SysPrintf("recVUMI_FMEQ \n"); + //Console::WriteLn("recVUMI_FMEQ"); if( _Ft_ == _Fs_ ) { ftreg = ALLOCVI(_Ft_, MODE_WRITE|MODE_READ);//|MODE_8BITREG @@ -1389,7 +1403,7 @@ void recVUMI_FMOR( VURegs *VU, int info ) { int fsreg, ftreg; if ( _Ft_ == 0 ) return; - //SysPrintf("recVUMI_FMOR \n"); + //Console::WriteLn("recVUMI_FMOR"); if( _Fs_ == 0 ) { ftreg = ALLOCVI(_Ft_, MODE_WRITE);//|MODE_8BITREG); MOVZX32M16toR( ftreg, VU_VI_ADDR(REG_MAC_FLAG, 1) ); @@ -1419,7 +1433,7 @@ void recVUMI_FMOR( VURegs *VU, int info ) void recVUMI_FCAND( VURegs *VU, int info ) { int ftreg = ALLOCVI(1, MODE_WRITE|MODE_8BITREG); - //SysPrintf("recVUMI_FCAND \n"); + //Console::WriteLn("recVUMI_FCAND"); MOV32MtoR( EAX, VU_VI_ADDR(REG_CLIP_FLAG, 1) ); XOR32RtoR( ftreg, ftreg ); AND32ItoR( EAX, VU->code & 0xFFFFFF ); @@ -1435,7 +1449,7 @@ void recVUMI_FCAND( VURegs *VU, int info ) void recVUMI_FCEQ( VURegs *VU, int info ) { int ftreg = ALLOCVI(1, MODE_WRITE|MODE_8BITREG); - //SysPrintf("recVUMI_FCEQ \n"); + //Console::WriteLn("recVUMI_FCEQ"); MOV32MtoR( EAX, VU_VI_ADDR(REG_CLIP_FLAG, 1) ); AND32ItoR( EAX, 0xffffff ); XOR32RtoR( ftreg, ftreg ); @@ -1452,7 +1466,7 @@ void recVUMI_FCEQ( VURegs *VU, int info ) void recVUMI_FCOR( VURegs *VU, int info ) { int ftreg; - //SysPrintf("recVUMI_FCOR\n"); + //Console::WriteLn("recVUMI_FCOR"); ftreg = ALLOCVI(1, MODE_WRITE); MOV32MtoR( ftreg, VU_VI_ADDR(REG_CLIP_FLAG, 1) ); OR32ItoR ( ftreg, VU->code ); @@ -1469,7 +1483,7 @@ void recVUMI_FCOR( VURegs *VU, int info ) void recVUMI_FCSET( VURegs *VU, int info ) { u32 addr = VU_VI_ADDR(REG_CLIP_FLAG, 0); - //SysPrintf("recVUMI_FCSET \n"); + //Console::WriteLn("recVUMI_FCSET"); MOV32ItoM(addr ? addr : VU_VI_ADDR(REG_CLIP_FLAG, 2), VU->code&0xffffff ); if( !(info & (PROCESS_VU_SUPER|PROCESS_VU_COP2)) ) @@ -1485,7 +1499,7 @@ void recVUMI_FCGET( VURegs *VU, int info ) { int ftreg; if(_Ft_ == 0) return; - //SysPrintf("recVUMI_FCGET \n"); + //Console::WriteLn("recVUMI_FCGET"); ftreg = ALLOCVI(_Ft_, MODE_WRITE); MOV32MtoR(ftreg, VU_VI_ADDR(REG_CLIP_FLAG, 1)); @@ -1507,7 +1521,7 @@ void recVUMI_FCGET( VURegs *VU, int info ) void recVUMI_MFP(VURegs *VU, int info) { if ( (_Ft_ == 0) || (_X_Y_Z_W == 0) ) return; - //SysPrintf("recVUMI_MFP \n"); + //Console::WriteLn("recVUMI_MFP"); if( _XYZW_SS ) { _vuFlipRegSS(VU, EEREC_T); SSE_MOVSS_M32_to_XMM(EEREC_TEMP, VU_VI_ADDR(REG_P, 1)); @@ -1533,7 +1547,7 @@ void recVUMI_MFP(VURegs *VU, int info) static PCSX2_ALIGNED16(float s_tempmem[4]); void recVUMI_WAITP(VURegs *VU, int info) { - //SysPrintf("recVUMI_WAITP \n"); + //Console::WriteLn("recVUMI_WAITP"); // if( info & PROCESS_VU_SUPER ) // SuperVUFlush(1, 1); } @@ -1547,7 +1561,7 @@ void recVUMI_WAITP(VURegs *VU, int info) //------------------------------------------------------------------ void vuSqSumXYZ(int regd, int regs, int regtemp) // regd.x = x ^ 2 + y ^ 2 + z ^ 2 { - //SysPrintf("VU: SUMXYZ\n"); + //Console::WriteLn("VU: SUMXYZ"); if( cpucaps.hasStreamingSIMD4Extensions ) { SSE_MOVAPS_XMM_to_XMM(regd, regs); @@ -1582,7 +1596,7 @@ void vuSqSumXYZ(int regd, int regs, int regtemp) // regd.x = x ^ 2 + y ^ 2 + z //------------------------------------------------------------------ void recVUMI_ESADD( VURegs *VU, int info) { - //SysPrintf("VU: ESADD\n"); + //Console::WriteLn("VU: ESADD"); assert( VU == &VU1 ); if( EEREC_TEMP == EEREC_D ) { // special code to reset P ( FixMe: don't know if this is still needed! (cottonvibes) ) Console::Notice("ESADD: Resetting P reg!!!\n"); @@ -1601,7 +1615,7 @@ void recVUMI_ESADD( VURegs *VU, int info) //------------------------------------------------------------------ void recVUMI_ERSADD( VURegs *VU, int info ) { - //SysPrintf("VU: ERSADD\n"); + //Console::WriteLn("VU: ERSADD"); assert( VU == &VU1 ); vuSqSumXYZ(EEREC_D, EEREC_S, EEREC_TEMP); // don't use RCPSS (very bad precision) @@ -1618,7 +1632,7 @@ void recVUMI_ERSADD( VURegs *VU, int info ) //------------------------------------------------------------------ void recVUMI_ELENG( VURegs *VU, int info ) { - //SysPrintf("VU: ELENG\n"); + //Console::WriteLn("VU: ELENG"); assert( VU == &VU1 ); vuSqSumXYZ(EEREC_D, EEREC_S, EEREC_TEMP); if (CHECK_VU_OVERFLOW) SSE_MINSS_M32_to_XMM(EEREC_D, (uptr)g_maxvals); // Only need to do positive clamp since (x ^ 2 + y ^ 2 + z ^ 2) is positive @@ -1633,7 +1647,7 @@ void recVUMI_ELENG( VURegs *VU, int info ) //------------------------------------------------------------------ void recVUMI_ERLENG( VURegs *VU, int info ) { - //SysPrintf("VU: ERLENG\n"); + //Console::WriteLn("VU: ERLENG"); assert( VU == &VU1 ); vuSqSumXYZ(EEREC_D, EEREC_S, EEREC_TEMP); if (CHECK_VU_OVERFLOW) SSE_MINSS_M32_to_XMM(EEREC_D, (uptr)g_maxvals); // Only need to do positive clamp since (x ^ 2 + y ^ 2 + z ^ 2) is positive @@ -1652,7 +1666,7 @@ void recVUMI_ERLENG( VURegs *VU, int info ) void recVUMI_EATANxy( VURegs *VU, int info ) { assert( VU == &VU1 ); - //SysPrintf("recVUMI_EATANxy \n"); + //Console::WriteLn("recVUMI_EATANxy"); if( (xmmregs[EEREC_S].mode & MODE_WRITE) && (xmmregs[EEREC_S].mode&MODE_NOFLUSH) ) { SSE_MOVLPS_XMM_to_M64((uptr)s_tempmem, EEREC_S); FLD32((uptr)&s_tempmem[0]); @@ -1680,7 +1694,7 @@ void recVUMI_EATANxy( VURegs *VU, int info ) void recVUMI_EATANxz( VURegs *VU, int info ) { assert( VU == &VU1 ); - //SysPrintf("recVUMI_EATANxz \n"); + //Console::WriteLn("recVUMI_EATANxz"); if( (xmmregs[EEREC_S].mode & MODE_WRITE) && (xmmregs[EEREC_S].mode&MODE_NOFLUSH) ) { SSE_MOVLPS_XMM_to_M64((uptr)s_tempmem, EEREC_S); FLD32((uptr)&s_tempmem[0]); @@ -1706,7 +1720,7 @@ void recVUMI_EATANxz( VURegs *VU, int info ) //------------------------------------------------------------------ void recVUMI_ESUM( VURegs *VU, int info ) { - //SysPrintf("VU: ESUM\n"); + //Console::WriteLn("VU: ESUM"); assert( VU == &VU1 ); if( cpucaps.hasStreamingSIMD3Extensions ) { @@ -1735,7 +1749,7 @@ void recVUMI_ESUM( VURegs *VU, int info ) void recVUMI_ERCPR( VURegs *VU, int info ) { assert( VU == &VU1 ); - //SysPrintf("VU1: ERCPR\n"); + //Console::WriteLn("VU1: ERCPR"); // don't use RCPSS (very bad precision) switch ( _Fsf_ ) { @@ -1780,7 +1794,7 @@ void recVUMI_ESQRT( VURegs *VU, int info ) { assert( VU == &VU1 ); - //SysPrintf("VU1: ESQRT\n"); + //Console::WriteLn("VU1: ESQRT"); _unpackVFSS_xyzw(EEREC_TEMP, EEREC_S, _Fsf_); SSE_ANDPS_M128_to_XMM(EEREC_TEMP, (uptr)const_clip); // abs(x) if (CHECK_VU_OVERFLOW) SSE_MINSS_M32_to_XMM(EEREC_TEMP, (uptr)g_maxvals); // Only need to do positive clamp @@ -1799,7 +1813,7 @@ void recVUMI_ERSQRT( VURegs *VU, int info ) int t1reg = _vuGetTempXMMreg(info); assert( VU == &VU1 ); - //SysPrintf("VU1: ERSQRT\n"); + //Console::WriteLn("VU1: ERSQRT"); _unpackVFSS_xyzw(EEREC_TEMP, EEREC_S, _Fsf_); SSE_ANDPS_M128_to_XMM(EEREC_TEMP, (uptr)const_clip); // abs(x) @@ -1833,7 +1847,7 @@ void recVUMI_ESIN( VURegs *VU, int info ) { assert( VU == &VU1 ); - //SysPrintf("recVUMI_ESIN \n"); + //Console::WriteLn("recVUMI_ESIN"); if( (xmmregs[EEREC_S].mode & MODE_WRITE) && (xmmregs[EEREC_S].mode&MODE_NOFLUSH) ) { switch(_Fsf_) { case 0: SSE_MOVSS_XMM_to_M32((uptr)s_tempmem, EEREC_S); @@ -1864,7 +1878,7 @@ void recVUMI_EATAN( VURegs *VU, int info ) { assert( VU == &VU1 ); - //SysPrintf("recVUMI_EATAN \n"); + //Console::WriteLn("recVUMI_EATAN"); if( (xmmregs[EEREC_S].mode & MODE_WRITE) && (xmmregs[EEREC_S].mode&MODE_NOFLUSH) ) { switch(_Fsf_) { case 0: SSE_MOVSS_XMM_to_M32((uptr)s_tempmem, EEREC_S); @@ -1894,7 +1908,7 @@ void recVUMI_EATAN( VURegs *VU, int info ) void recVUMI_EEXP( VURegs *VU, int info ) { assert( VU == &VU1 ); - //SysPrintf("recVUMI_EEXP \n"); + //Console::WriteLn("recVUMI_EEXP"); FLDL2E(); if( (xmmregs[EEREC_S].mode & MODE_WRITE) && (xmmregs[EEREC_S].mode&MODE_NOFLUSH) ) { @@ -1937,7 +1951,7 @@ void recVUMI_XITOP( VURegs *VU, int info ) { int ftreg; if (_Ft_ == 0) return; - //SysPrintf("recVUMI_XITOP \n"); + //Console::WriteLn("recVUMI_XITOP"); ftreg = ALLOCVI(_Ft_, MODE_WRITE); MOVZX32M16toR( ftreg, (uptr)&VU->vifRegs->itop ); } @@ -1951,7 +1965,7 @@ void recVUMI_XTOP( VURegs *VU, int info ) { int ftreg; if ( _Ft_ == 0 ) return; - //SysPrintf("recVUMI_XTOP \n"); + //Console::WriteLn("recVUMI_XTOP"); ftreg = ALLOCVI(_Ft_, MODE_WRITE); MOVZX32M16toR( ftreg, (uptr)&VU->vifRegs->top ); } diff --git a/pcsx2/x86/iVUmicroUpper.cpp b/pcsx2/x86/iVUmicroUpper.cpp index 5c7e49e26e..26e3f1604d 100644 --- a/pcsx2/x86/iVUmicroUpper.cpp +++ b/pcsx2/x86/iVUmicroUpper.cpp @@ -156,7 +156,7 @@ void recUpdateFlags(VURegs * VU, int reg, int info) return; } - //SysPrintf ("recUpdateFlags\n"); + //Console::WriteLn ("recUpdateFlags"); macaddr = VU_VI_ADDR(REG_MAC_FLAG, 0); stataddr = VU_VI_ADDR(REG_STATUS_FLAG, 0); // write address @@ -164,7 +164,7 @@ void recUpdateFlags(VURegs * VU, int reg, int info) if( stataddr == 0 ) stataddr = prevstataddr; if( macaddr == 0 ) { - SysPrintf( "VU ALLOCATION WARNING: Using Mac Flag Previous Address!\n" ); + Console::WriteLn( "VU ALLOCATION WARNING: Using Mac Flag Previous Address!" ); macaddr = VU_VI_ADDR(REG_MAC_FLAG, 2); } @@ -174,7 +174,7 @@ void recUpdateFlags(VURegs * VU, int reg, int info) if (reg == EEREC_TEMP) { t1reg = _vuGetTempXMMreg(info); if (t1reg < 0) { - //SysPrintf( "VU ALLOCATION ERROR: Temp reg can't be allocated!!!!\n" ); + //Console::WriteLn( "VU ALLOCATION ERROR: Temp reg can't be allocated!!!!" ); t1reg = (reg == 0) ? 1 : 0; // Make t1reg != reg SSE_MOVAPS_XMM_to_M128( (uptr)TEMPXMMData, t1reg ); // Backup data to temp address t1regBoolean = 1; @@ -333,12 +333,23 @@ void recUpdateFlags(VURegs * VU, int reg, int info) static PCSX2_ALIGNED16(u32 VU_addsuband[2][4]); static PCSX2_ALIGNED16(u32 VU_addsub_reg[2][4]); +static u32 tempECX; + void VU_ADD_SUB(u32 regd, u32 regt, int is_sub, int info) { u8 *localptr[4][8]; - int temp1 = _allocX86reg(ECX, X86TYPE_TEMP, 0, 0); //receives regd + + MOV32RtoM((uptr)&tempECX, ECX); + + int temp1 = ECX; //receives regd int temp2 = ALLOCTEMPX86(0); + if (temp2 == ECX) + { + temp2 = ALLOCTEMPX86(0); + _freeX86reg(ECX); + } + SSE_MOVAPS_XMM_to_M128((uptr)&VU_addsub_reg[0][0], regd); SSE_MOVAPS_XMM_to_M128((uptr)&VU_addsub_reg[1][0], regt); @@ -413,98 +424,26 @@ void VU_ADD_SUB(u32 regd, u32 regt, int is_sub, int info) SSE_MOVAPS_M128_to_XMM(regt, (uptr)&VU_addsub_reg[1][0]); - _freeX86reg(temp1); _freeX86reg(temp2); -} -void VU_ADD_SUB_SSE4(u32 regd, u32 regt, int is_sub, int info) -{ - u8 *localptr[4][8]; - int temp1 = _allocX86reg(ECX, X86TYPE_TEMP, 0, 0); //receives regd - int temp2 = ALLOCTEMPX86(0); - - SSE_MOVAPS_XMM_to_M128((uptr)&VU_addsub_reg[0][0], regd); - SSE_MOVAPS_XMM_to_M128((uptr)&VU_addsub_reg[1][0], regt); - - SSE2_PSLLD_I8_to_XMM(regd, 1); - SSE2_PSLLD_I8_to_XMM(regt, 1); - - SSE2_PSRLD_I8_to_XMM(regd, 24); - SSE2_PSRLD_I8_to_XMM(regt, 24); - - SSE2_PSUBD_XMM_to_XMM(regd, regt); - -#define PERFORM_SSE4(i) \ - \ - SSE_PEXTRW_XMM_to_R32(temp1, regd, i*2); \ - MOVSX32R16toR(temp1, temp1); \ - CMP32ItoR(temp1, 25);\ - localptr[i][0] = JGE8(0);\ - CMP32ItoR(temp1, 0);\ - localptr[i][1] = JG8(0);\ - localptr[i][2] = JE8(0);\ - CMP32ItoR(temp1, -25);\ - localptr[i][3] = JLE8(0);\ - \ - NEG32R(temp1); \ - DEC32R(temp1);\ - MOV32ItoR(temp2, 0xffffffff); \ - SHL32CLtoR(temp2); \ - SSE4_PINSRD_R32_to_XMM(regd, temp2, i); \ - localptr[i][4] = JMP8(0);\ - \ - x86SetJ8(localptr[i][0]);\ - MOV32ItoR(temp2, 0xffffffff); \ - SSE4_PINSRD_R32_to_XMM(regd, temp2, i); \ - SHL32ItoR(temp2, 31); \ - SSE4_PINSRD_R32_to_XMM(regt, temp2, i); \ - localptr[i][5] = JMP8(0);\ - \ - x86SetJ8(localptr[i][1]);\ - DEC32R(temp1);\ - MOV32ItoR(temp2, 0xffffffff);\ - SSE4_PINSRD_R32_to_XMM(regd, temp2, i); \ - SHL32CLtoR(temp2); \ - SSE4_PINSRD_R32_to_XMM(regt, temp2, i); \ - localptr[i][6] = JMP8(0);\ - \ - x86SetJ8(localptr[i][3]);\ - MOV32ItoR(temp2, 0x80000000); \ - SSE4_PINSRD_R32_to_XMM(regd, temp2, i); \ - localptr[i][7] = JMP8(0);\ - \ - x86SetJ8(localptr[i][2]);\ - \ - x86SetJ8(localptr[i][4]);\ - x86SetJ8(localptr[i][5]);\ - x86SetJ8(localptr[i][6]);\ - x86SetJ8(localptr[i][7]); - - SSE2_PCMPEQB_XMM_to_XMM(regt, regt); - PERFORM_SSE4(0); - PERFORM_SSE4(1); - PERFORM_SSE4(2); - PERFORM_SSE4(3); -#undef PERFORM_SSE4 - - SSE_ANDPS_M128_to_XMM(regd, (uptr)&VU_addsub_reg[0][0]); //regd contains mask - SSE_ANDPS_M128_to_XMM(regt, (uptr)&VU_addsub_reg[1][0]); //regt contains mask - - if (is_sub) SSE_SUBPS_XMM_to_XMM(regd, regt); - else SSE_ADDPS_XMM_to_XMM(regd, regt); - - SSE_MOVAPS_M128_to_XMM(regt, (uptr)&VU_addsub_reg[1][0]); - - _freeX86reg(temp1); - _freeX86reg(temp2); + MOV32MtoR(ECX, (uptr)&tempECX); } void VU_ADD_SUB_SS(u32 regd, u32 regt, int is_sub, int is_mem, int info) { u8 *localptr[8]; u32 addrt = regt; //for case is_mem - int temp1 = _allocX86reg(ECX, X86TYPE_TEMP, 0, 0); //receives regd //_allocX86reg(ECX, X86TYPE_TEMP, 0, ((info&PROCESS_VU_SUPER)?0:MODE_NOFRAME)|mode); + + MOV32RtoM((uptr)&tempECX, ECX); + + int temp1 = ECX; //receives regd int temp2 = ALLOCTEMPX86(0); + + if (temp2 == ECX) + { + temp2 = ALLOCTEMPX86(0); + _freeX86reg(ECX); + } SSE_MOVAPS_XMM_to_M128((uptr)&VU_addsub_reg[0][0], regd); if (!is_mem) SSE_MOVAPS_XMM_to_M128((uptr)&VU_addsub_reg[1][0], regt); @@ -617,167 +556,44 @@ void VU_ADD_SUB_SS(u32 regd, u32 regt, int is_sub, int is_mem, int info) SSE_MOVAPS_M128_to_XMM(regt, (uptr)&VU_addsub_reg[1][0]); } - _freeX86reg(temp1); _freeX86reg(temp2); -} -void VU_ADD_SUB_SS_SSE4(u32 regd, u32 regt, int is_sub, int is_mem, int info) -{ - u8 *localptr[8]; - u32 addrt = regt; //for case is_mem - int temp1 = _allocX86reg(ECX, X86TYPE_TEMP, 0, 0); //receives regd //_allocX86reg(ECX, X86TYPE_TEMP, 0, ((info&PROCESS_VU_SUPER)?0:MODE_NOFRAME)|mode); - int temp2 = ALLOCTEMPX86(0); - - SSE_MOVAPS_XMM_to_M128((uptr)&VU_addsub_reg[0][0], regd); - if (!is_mem) SSE_MOVAPS_XMM_to_M128((uptr)&VU_addsub_reg[1][0], regt); - - SSE2_MOVD_XMM_to_R(temp1, regd); - SHR32ItoR(temp1, 23); - - if (is_mem) { - MOV32MtoR(temp2, addrt); - MOV32RtoM((uptr)&VU_addsub_reg[1][0], temp2); - SHR32ItoR(temp2, 23); - } - else { - SSE2_MOVD_XMM_to_R(temp2, regt); - SHR32ItoR(temp2, 23); - } - - AND32ItoR(temp1, 0xff); - AND32ItoR(temp2, 0xff); - - SUB32RtoR(temp1, temp2); //temp1 = exponent difference - - CMP32ItoR(temp1, 25); - localptr[0] = JGE8(0); - CMP32ItoR(temp1, 0); - localptr[1] = JG8(0); - localptr[2] = JE8(0); - CMP32ItoR(temp1, -25); - localptr[3] = JLE8(0); - - NEG32R(temp1); - DEC32R(temp1); - MOV32ItoR(temp2, 0xffffffff); - SHL32CLtoR(temp2); - SSE2_PCMPEQB_XMM_to_XMM(regd, regd); - SSE4_PINSRD_R32_to_XMM(regd, temp2, 0); - if (!is_mem) - SSE2_PCMPEQB_XMM_to_XMM(regt, regt); - localptr[4] = JMP8(0); - - x86SetJ8(localptr[0]); - MOV32ItoR(temp2, 0x80000000); - if (is_mem) - AND32RtoM((uptr)&VU_addsub_reg[1][0], temp2); - else { - SSE2_PCMPEQB_XMM_to_XMM(regt, regt); - SSE4_PINSRD_R32_to_XMM(regt, temp2, 0); - } - SSE2_PCMPEQB_XMM_to_XMM(regd, regd); - localptr[5] = JMP8(0); - - x86SetJ8(localptr[1]); - DEC32R(temp1); - MOV32ItoR(temp2, 0xffffffff); - SHL32CLtoR(temp2); - if (is_mem) - AND32RtoM((uptr)&VU_addsub_reg[1][0], temp2); - else { - SSE2_PCMPEQB_XMM_to_XMM(regt, regt); - SSE4_PINSRD_R32_to_XMM(regt, temp2, 0); - } - SSE2_PCMPEQB_XMM_to_XMM(regd, regd); - localptr[6] = JMP8(0); - - x86SetJ8(localptr[3]); - MOV32ItoR(temp2, 0x80000000); - SSE2_PCMPEQB_XMM_to_XMM(regd, regd); - SSE4_PINSRD_R32_to_XMM(regd, temp2, 0); - if (!is_mem) - SSE2_PCMPEQB_XMM_to_XMM(regt, regt); - localptr[7] = JMP8(0); - - x86SetJ8(localptr[2]); - x86SetJ8(localptr[4]); - x86SetJ8(localptr[5]); - x86SetJ8(localptr[6]); - x86SetJ8(localptr[7]); - - if (is_mem) - { - SSE_ANDPS_M128_to_XMM(regd, (uptr)&VU_addsub_reg[0][0]); //regd contains mask - - if (is_sub) SSE_SUBSS_M32_to_XMM(regd, (uptr)&VU_addsub_reg[1][0]); - else SSE_ADDSS_M32_to_XMM(regd, (uptr)&VU_addsub_reg[1][0]); - } - else - { - SSE_ANDPS_M128_to_XMM(regd, (uptr)&VU_addsub_reg[0][0]); //regd contains mask - SSE_ANDPS_M128_to_XMM(regt, (uptr)&VU_addsub_reg[1][0]); //regt contains mask - - if (is_sub) SSE_SUBSS_XMM_to_XMM(regd, regt); - else SSE_ADDSS_XMM_to_XMM(regd, regt); - - SSE_MOVAPS_M128_to_XMM(regt, (uptr)&VU_addsub_reg[1][0]); - } - - _freeX86reg(temp1); - _freeX86reg(temp2); + MOV32MtoR(ECX, (uptr)&tempECX); } void SSE_ADDPS_XMM_to_XMM_custom(int info, int regd, int regt) { if (CHECK_VUADDSUBHACK) { - if ( cpucaps.hasStreamingSIMD4Extensions ) - VU_ADD_SUB_SSE4(regd, regt, 0, info); - else - VU_ADD_SUB(regd, regt, 0, info); + VU_ADD_SUB(regd, regt, 0, info); } else SSE_ADDPS_XMM_to_XMM(regd, regt); } void SSE_SUBPS_XMM_to_XMM_custom(int info, int regd, int regt) { if (CHECK_VUADDSUBHACK) { - if ( cpucaps.hasStreamingSIMD4Extensions ) - VU_ADD_SUB_SSE4(regd, regt, 1, info); - else - VU_ADD_SUB(regd, regt, 1, info); + VU_ADD_SUB(regd, regt, 1, info); } else SSE_SUBPS_XMM_to_XMM(regd, regt); } void SSE_ADDSS_XMM_to_XMM_custom(int info, int regd, int regt) { if (CHECK_VUADDSUBHACK) { - if ( cpucaps.hasStreamingSIMD4Extensions ) - VU_ADD_SUB_SS_SSE4(regd, regt, 0, 0, info); - else - VU_ADD_SUB_SS(regd, regt, 0, 0, info); + VU_ADD_SUB_SS(regd, regt, 0, 0, info); } else SSE_ADDSS_XMM_to_XMM(regd, regt); } void SSE_SUBSS_XMM_to_XMM_custom(int info, int regd, int regt) { if (CHECK_VUADDSUBHACK) { - if ( cpucaps.hasStreamingSIMD4Extensions ) - VU_ADD_SUB_SS_SSE4(regd, regt, 1, 0, info); - else - VU_ADD_SUB_SS(regd, regt, 1, 0, info); + VU_ADD_SUB_SS(regd, regt, 1, 0, info); } else SSE_SUBSS_XMM_to_XMM(regd, regt); } void SSE_ADDSS_M32_to_XMM_custom(int info, int regd, int regt) { if (CHECK_VUADDSUBHACK) { - if ( cpucaps.hasStreamingSIMD4Extensions ) - VU_ADD_SUB_SS_SSE4(regd, regt, 0, 1, info); - else - VU_ADD_SUB_SS(regd, regt, 0, 1, info); + VU_ADD_SUB_SS(regd, regt, 0, 1, info); } else SSE_ADDSS_M32_to_XMM(regd, regt); } void SSE_SUBSS_M32_to_XMM_custom(int info, int regd, int regt) { if (CHECK_VUADDSUBHACK) { - if ( cpucaps.hasStreamingSIMD4Extensions ) - VU_ADD_SUB_SS_SSE4(regd, regt, 1, 1, info); - else - VU_ADD_SUB_SS(regd, regt, 1, 1, info); + VU_ADD_SUB_SS(regd, regt, 1, 1, info); } else SSE_SUBSS_M32_to_XMM(regd, regt); } @@ -796,7 +612,7 @@ void SSE_SUBSS_M32_to_XMM_custom(int info, int regd, int regt) { //------------------------------------------------------------------ void recVUMI_ABS(VURegs *VU, int info) { - //SysPrintf("recVUMI_ABS()\n"); + //Console::WriteLn("recVUMI_ABS()"); if ( (_Ft_ == 0) || (_X_Y_Z_W == 0) ) return; if ((_X_Y_Z_W == 0x8) || (_X_Y_Z_W == 0xf)) { @@ -818,7 +634,7 @@ void recVUMI_ABS(VURegs *VU, int info) PCSX2_ALIGNED16(float s_two[4]) = {0,0,0,2}; void recVUMI_ADD(VURegs *VU, int info) { - //SysPrintf("recVUMI_ADD()\n"); + //Console::WriteLn("recVUMI_ADD()"); if ( _X_Y_Z_W == 0 ) goto flagUpdate; // Don't do anything and just clear flags if ( !_Fd_ ) info = (info & ~PROCESS_EE_SET_D(0xf)) | PROCESS_EE_SET_D(EEREC_TEMP); @@ -862,7 +678,7 @@ flagUpdate: void recVUMI_ADD_iq(VURegs *VU, uptr addr, int info) { - //SysPrintf("recVUMI_ADD_iq()\n"); + //Console::WriteLn("recVUMI_ADD_iq()"); if ( _X_Y_Z_W == 0 ) goto flagUpdate; if ( !_Fd_ ) info = (info & ~PROCESS_EE_SET_D(0xf)) | PROCESS_EE_SET_D(EEREC_TEMP); if (CHECK_VU_EXTRA_OVERFLOW) { @@ -922,7 +738,7 @@ flagUpdate: void recVUMI_ADD_xyzw(VURegs *VU, int xyzw, int info) { - //SysPrintf("recVUMI_ADD_xyzw()\n"); + //Console::WriteLn("recVUMI_ADD_xyzw()"); if ( _X_Y_Z_W == 0 ) goto flagUpdate; if ( !_Fd_ ) info = (info & ~PROCESS_EE_SET_D(0xf)) | PROCESS_EE_SET_D(EEREC_TEMP); if (CHECK_VU_EXTRA_OVERFLOW) { @@ -986,7 +802,7 @@ void recVUMI_ADDw(VURegs *VU, int info) { recVUMI_ADD_xyzw(VU, 3, info); } //------------------------------------------------------------------ void recVUMI_ADDA(VURegs *VU, int info) { - //SysPrintf("recVUMI_ADDA()\n"); + //Console::WriteLn("recVUMI_ADDA()"); if ( _X_Y_Z_W == 0 ) goto flagUpdate; if (CHECK_VU_EXTRA_OVERFLOW) { if (_Fs_) vuFloat5_useEAX( EEREC_S, EEREC_TEMP, _X_Y_Z_W ); @@ -1021,7 +837,7 @@ flagUpdate: void recVUMI_ADDA_iq(VURegs *VU, uptr addr, int info) { - //SysPrintf("recVUMI_ADDA_iq()\n"); + //Console::WriteLn("recVUMI_ADDA_iq()"); if ( _X_Y_Z_W == 0 ) goto flagUpdate; if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat3(addr); @@ -1073,7 +889,7 @@ flagUpdate: void recVUMI_ADDA_xyzw(VURegs *VU, int xyzw, int info) { - //SysPrintf("recVUMI_ADDA_xyzw()\n"); + //Console::WriteLn("recVUMI_ADDA_xyzw()"); if ( _X_Y_Z_W == 0 ) goto flagUpdate; if (CHECK_VU_EXTRA_OVERFLOW) { if (_Fs_) vuFloat5_useEAX( EEREC_S, EEREC_TEMP, _X_Y_Z_W ); @@ -1131,7 +947,7 @@ void recVUMI_ADDAw(VURegs *VU, int info) { recVUMI_ADDA_xyzw(VU, 3, info); } //------------------------------------------------------------------ void recVUMI_SUB(VURegs *VU, int info) { - //SysPrintf("recVUMI_SUB()\n"); + //Console::WriteLn("recVUMI_SUB()"); if ( _X_Y_Z_W == 0 ) goto flagUpdate; if ( !_Fd_ ) info = (info & ~PROCESS_EE_SET_D(0xf)) | PROCESS_EE_SET_D(EEREC_TEMP); @@ -1190,7 +1006,7 @@ flagUpdate: void recVUMI_SUB_iq(VURegs *VU, uptr addr, int info) { - //SysPrintf("recVUMI_SUB_iq()\n"); + //Console::WriteLn("recVUMI_SUB_iq()"); if ( _X_Y_Z_W == 0 ) goto flagUpdate; if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat3(addr); @@ -1263,7 +1079,7 @@ flagUpdate: void recVUMI_SUB_xyzw(VURegs *VU, int xyzw, int info) { - //SysPrintf("recVUMI_SUB_xyzw()\n"); + //Console::WriteLn("recVUMI_SUB_xyzw()"); if ( _X_Y_Z_W == 0 ) goto flagUpdate; if ( !_Fd_ ) info = (info & ~PROCESS_EE_SET_D(0xf)) | PROCESS_EE_SET_D(EEREC_TEMP); if (CHECK_VU_EXTRA_OVERFLOW) { @@ -1341,7 +1157,7 @@ void recVUMI_SUBw(VURegs *VU, int info) { recVUMI_SUB_xyzw(VU, 3, info); } //------------------------------------------------------------------ void recVUMI_SUBA(VURegs *VU, int info) { - //SysPrintf("recVUMI_SUBA()\n"); + //Console::WriteLn("recVUMI_SUBA()"); if ( _X_Y_Z_W == 0 ) goto flagUpdate; if (CHECK_VU_EXTRA_OVERFLOW) { if (_Fs_) vuFloat5_useEAX( EEREC_S, EEREC_TEMP, _X_Y_Z_W ); @@ -1388,7 +1204,7 @@ flagUpdate: void recVUMI_SUBA_iq(VURegs *VU, uptr addr, int info) { - //SysPrintf ("recVUMI_SUBA_iq \n"); + //Console::WriteLn ("recVUMI_SUBA_iq"); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat3(addr); if (_Fs_) vuFloat5_useEAX( EEREC_S, EEREC_TEMP, _X_Y_Z_W ); @@ -1445,7 +1261,7 @@ void recVUMI_SUBA_iq(VURegs *VU, uptr addr, int info) void recVUMI_SUBA_xyzw(VURegs *VU, int xyzw, int info) { - //SysPrintf ("recVUMI_SUBA_xyzw \n"); + //Console::WriteLn ("recVUMI_SUBA_xyzw"); if (CHECK_VU_EXTRA_OVERFLOW) { if (_Fs_) vuFloat5_useEAX( EEREC_S, EEREC_TEMP, _X_Y_Z_W ); if (_Ft_) vuFloat5_useEAX( EEREC_T, EEREC_TEMP, ( 1 << (3 - xyzw) ) ); @@ -1504,7 +1320,7 @@ void recVUMI_SUBAw(VURegs *VU, int info) { recVUMI_SUBA_xyzw(VU, 3, info); } //------------------------------------------------------------------ void recVUMI_MUL_toD(VURegs *VU, int regd, int info) { - //SysPrintf ("recVUMI_MUL_toD \n"); + //Console::WriteLn ("recVUMI_MUL_toD"); if (CHECK_VU_EXTRA_OVERFLOW) { if (_Fs_) vuFloat5_useEAX( EEREC_S, EEREC_TEMP, _X_Y_Z_W ); if (_Ft_) vuFloat5_useEAX( EEREC_T, EEREC_TEMP, _X_Y_Z_W ); @@ -1545,7 +1361,7 @@ void recVUMI_MUL_toD(VURegs *VU, int regd, int info) void recVUMI_MUL_iq_toD(VURegs *VU, uptr addr, int regd, int info) { - //SysPrintf ("recVUMI_MUL_iq_toD \n"); + //Console::WriteLn ("recVUMI_MUL_iq_toD"); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat3(addr); if (_Fs_) vuFloat5_useEAX( EEREC_S, EEREC_TEMP, _X_Y_Z_W ); @@ -1601,7 +1417,7 @@ void recVUMI_MUL_iq_toD(VURegs *VU, uptr addr, int regd, int info) void recVUMI_MUL_xyzw_toD(VURegs *VU, int xyzw, int regd, int info) { - //SysPrintf ("recVUMI_MUL_xyzw_toD \n"); + //Console::WriteLn ("recVUMI_MUL_xyzw_toD"); if (CHECK_VU_EXTRA_OVERFLOW) { if (_Ft_) vuFloat5_useEAX( EEREC_T, EEREC_TEMP, ( 1 << (3 - xyzw) ) ); } @@ -1669,7 +1485,7 @@ void recVUMI_MUL_xyzw_toD(VURegs *VU, int xyzw, int regd, int info) void recVUMI_MUL(VURegs *VU, int info) { - //SysPrintf ("recVUMI_MUL \n"); + //Console::WriteLn ("recVUMI_MUL"); if( !_Fd_ ) info |= PROCESS_EE_SET_D(EEREC_TEMP); recVUMI_MUL_toD(VU, EEREC_D, info); recUpdateFlags(VU, EEREC_D, info); @@ -1677,7 +1493,7 @@ void recVUMI_MUL(VURegs *VU, int info) void recVUMI_MUL_iq(VURegs *VU, int addr, int info) { - //SysPrintf ("recVUMI_MUL_iq \n"); + //Console::WriteLn ("recVUMI_MUL_iq"); if( !_Fd_ ) info |= PROCESS_EE_SET_D(EEREC_TEMP); recVUMI_MUL_iq_toD(VU, addr, EEREC_D, info); recUpdateFlags(VU, EEREC_D, info); @@ -1686,7 +1502,7 @@ void recVUMI_MUL_iq(VURegs *VU, int addr, int info) void recVUMI_MUL_xyzw(VURegs *VU, int xyzw, int info) { - //SysPrintf ("recVUMI_MUL_xyzw \n"); + //Console::WriteLn ("recVUMI_MUL_xyzw"); if( !_Fd_ ) info |= PROCESS_EE_SET_D(EEREC_TEMP); recVUMI_MUL_xyzw_toD(VU, xyzw, EEREC_D, info); recUpdateFlags(VU, EEREC_D, info); @@ -1706,21 +1522,21 @@ void recVUMI_MULw(VURegs *VU, int info) { recVUMI_MUL_xyzw(VU, 3, info); } //------------------------------------------------------------------ void recVUMI_MULA( VURegs *VU, int info ) { - //SysPrintf ("recVUMI_MULA \n"); + //Console::WriteLn ("recVUMI_MULA"); recVUMI_MUL_toD(VU, EEREC_ACC, info); recUpdateFlags(VU, EEREC_ACC, info); } void recVUMI_MULA_iq(VURegs *VU, int addr, int info) { - //SysPrintf ("recVUMI_MULA_iq \n"); + //Console::WriteLn ("recVUMI_MULA_iq"); recVUMI_MUL_iq_toD(VU, addr, EEREC_ACC, info); recUpdateFlags(VU, EEREC_ACC, info); } void recVUMI_MULA_xyzw(VURegs *VU, int xyzw, int info) { - //SysPrintf ("recVUMI_MULA_xyzw \n"); + //Console::WriteLn ("recVUMI_MULA_xyzw"); recVUMI_MUL_xyzw_toD(VU, xyzw, EEREC_ACC, info); recUpdateFlags(VU, EEREC_ACC, info); } @@ -1739,7 +1555,7 @@ void recVUMI_MULAw(VURegs *VU, int info) { recVUMI_MULA_xyzw(VU, 3, info); } //------------------------------------------------------------------ void recVUMI_MADD_toD(VURegs *VU, int regd, int info) { - //SysPrintf ("recVUMI_MADD_toD \n"); + //Console::WriteLn ("recVUMI_MADD_toD"); if (CHECK_VU_EXTRA_OVERFLOW) { if (_Fs_) vuFloat5_useEAX( EEREC_S, EEREC_TEMP, _X_Y_Z_W ); if (_Ft_) vuFloat5_useEAX( EEREC_T, EEREC_TEMP, _X_Y_Z_W ); @@ -1807,7 +1623,7 @@ void recVUMI_MADD_toD(VURegs *VU, int regd, int info) void recVUMI_MADD_iq_toD(VURegs *VU, uptr addr, int regd, int info) { - //SysPrintf ("recVUMI_MADD_iq_toD \n"); + //Console::WriteLn ("recVUMI_MADD_iq_toD"); if (CHECK_VU_EXTRA_OVERFLOW) { vuFloat3(addr); if (_Fs_) vuFloat5_useEAX( EEREC_S, EEREC_TEMP, _X_Y_Z_W ); @@ -1905,7 +1721,7 @@ void recVUMI_MADD_iq_toD(VURegs *VU, uptr addr, int regd, int info) void recVUMI_MADD_xyzw_toD(VURegs *VU, int xyzw, int regd, int info) { - //SysPrintf ("recVUMI_MADD_xyzw_toD \n"); + //Console::WriteLn ("recVUMI_MADD_xyzw_toD"); if (CHECK_VU_EXTRA_OVERFLOW) { if (_Ft_) vuFloat5_useEAX( EEREC_T, EEREC_TEMP, ( 1 << (3 - xyzw) ) ); vuFloat5_useEAX( EEREC_ACC, EEREC_TEMP, _X_Y_Z_W ); @@ -2018,7 +1834,7 @@ void recVUMI_MADD_xyzw_toD(VURegs *VU, int xyzw, int regd, int info) void recVUMI_MADD(VURegs *VU, int info) { - //SysPrintf ("recVUMI_MADD \n"); + //Console::WriteLn ("recVUMI_MADD"); if( !_Fd_ ) info |= PROCESS_EE_SET_D(EEREC_TEMP); recVUMI_MADD_toD(VU, EEREC_D, info); recUpdateFlags(VU, EEREC_D, info); @@ -2026,7 +1842,7 @@ void recVUMI_MADD(VURegs *VU, int info) void recVUMI_MADD_iq(VURegs *VU, int addr, int info) { - //SysPrintf ("recVUMI_MADD_iq \n"); + //Console::WriteLn ("recVUMI_MADD_iq"); if( !_Fd_ ) info |= PROCESS_EE_SET_D(EEREC_TEMP); recVUMI_MADD_iq_toD(VU, addr, EEREC_D, info); recUpdateFlags(VU, EEREC_D, info); @@ -2034,7 +1850,7 @@ void recVUMI_MADD_iq(VURegs *VU, int addr, int info) void recVUMI_MADD_xyzw(VURegs *VU, int xyzw, int info) { - //SysPrintf ("recVUMI_MADD_xyzw \n"); + //Console::WriteLn ("recVUMI_MADD_xyzw"); if( !_Fd_ ) info |= PROCESS_EE_SET_D(EEREC_TEMP); recVUMI_MADD_xyzw_toD(VU, xyzw, EEREC_D, info); recUpdateFlags(VU, EEREC_D, info); @@ -2055,49 +1871,49 @@ void recVUMI_MADDw(VURegs *VU, int info) { recVUMI_MADD_xyzw(VU, 3, info); } //------------------------------------------------------------------ void recVUMI_MADDA( VURegs *VU, int info ) { - //SysPrintf ("recVUMI_MADDA \n"); + //Console::WriteLn ("recVUMI_MADDA"); recVUMI_MADD_toD(VU, EEREC_ACC, info); recUpdateFlags(VU, EEREC_ACC, info); } void recVUMI_MADDAi( VURegs *VU , int info) { - //SysPrintf ("recVUMI_MADDAi \n"); + //Console::WriteLn ("recVUMI_MADDAi"); recVUMI_MADD_iq_toD( VU, VU_VI_ADDR(REG_I, 1), EEREC_ACC, info); recUpdateFlags(VU, EEREC_ACC, info); } void recVUMI_MADDAq( VURegs *VU , int info) { - //SysPrintf ("recVUMI_MADDAq \n"); + //Console::WriteLn ("recVUMI_MADDAq "); recVUMI_MADD_iq_toD( VU, VU_REGQ_ADDR, EEREC_ACC, info); recUpdateFlags(VU, EEREC_ACC, info); } void recVUMI_MADDAx( VURegs *VU , int info) { - //SysPrintf ("recVUMI_MADDAx \n"); + //Console::WriteLn ("recVUMI_MADDAx"); recVUMI_MADD_xyzw_toD(VU, 0, EEREC_ACC, info); recUpdateFlags(VU, EEREC_ACC, info); } void recVUMI_MADDAy( VURegs *VU , int info) { - //SysPrintf ("recVUMI_MADDAy \n"); + //Console::WriteLn ("recVUMI_MADDAy"); recVUMI_MADD_xyzw_toD(VU, 1, EEREC_ACC, info); recUpdateFlags(VU, EEREC_ACC, info); } void recVUMI_MADDAz( VURegs *VU , int info) { - //SysPrintf ("recVUMI_MADDAz \n"); + //Console::WriteLn ("recVUMI_MADDAz"); recVUMI_MADD_xyzw_toD(VU, 2, EEREC_ACC, info); recUpdateFlags(VU, EEREC_ACC, info); } void recVUMI_MADDAw( VURegs *VU , int info) { - //SysPrintf ("recVUMI_MADDAw \n"); + //Console::WriteLn ("recVUMI_MADDAw"); recVUMI_MADD_xyzw_toD(VU, 3, EEREC_ACC, info); recUpdateFlags(VU, EEREC_ACC, info); } @@ -2109,7 +1925,7 @@ void recVUMI_MADDAw( VURegs *VU , int info) //------------------------------------------------------------------ void recVUMI_MSUB_toD(VURegs *VU, int regd, int info) { - //SysPrintf ("recVUMI_MSUB_toD \n"); + //Console::WriteLn ("recVUMI_MSUB_toD"); if (CHECK_VU_EXTRA_OVERFLOW) { if (_Fs_) vuFloat5_useEAX( EEREC_S, EEREC_TEMP, _X_Y_Z_W ); if (_Ft_) vuFloat5_useEAX( EEREC_T, EEREC_TEMP, _X_Y_Z_W ); @@ -2170,7 +1986,7 @@ void recVUMI_MSUB_toD(VURegs *VU, int regd, int info) void recVUMI_MSUB_temp_toD(VURegs *VU, int regd, int info) { - //SysPrintf ("recVUMI_MSUB_temp_toD \n"); + //Console::WriteLn ("recVUMI_MSUB_temp_toD"); if (_X_Y_Z_W != 0xf) { int t1reg = _vuGetTempXMMreg(info); @@ -2222,7 +2038,7 @@ void recVUMI_MSUB_temp_toD(VURegs *VU, int regd, int info) void recVUMI_MSUB_iq_toD(VURegs *VU, int regd, int addr, int info) { - //SysPrintf ("recVUMI_MSUB_iq_toD \n"); + //Console::WriteLn ("recVUMI_MSUB_iq_toD"); if (CHECK_VU_EXTRA_OVERFLOW) { if (_Fs_) vuFloat5_useEAX( EEREC_S, EEREC_TEMP, _X_Y_Z_W ); vuFloat5_useEAX( EEREC_ACC, EEREC_TEMP, _X_Y_Z_W ); @@ -2235,7 +2051,7 @@ void recVUMI_MSUB_iq_toD(VURegs *VU, int regd, int addr, int info) void recVUMI_MSUB_xyzw_toD(VURegs *VU, int regd, int xyzw, int info) { - //SysPrintf ("recVUMI_MSUB_xyzw_toD \n"); + //Console::WriteLn ("recVUMI_MSUB_xyzw_toD"); if (CHECK_VU_EXTRA_OVERFLOW) { if (_Fs_) vuFloat5_useEAX( EEREC_S, EEREC_TEMP, _X_Y_Z_W ); if (_Ft_) vuFloat5_useEAX( EEREC_T, EEREC_TEMP, 1 << (3 - xyzw)); @@ -2247,7 +2063,7 @@ void recVUMI_MSUB_xyzw_toD(VURegs *VU, int regd, int xyzw, int info) void recVUMI_MSUB(VURegs *VU, int info) { - //SysPrintf ("recVUMI_MSUB \n"); + //Console::WriteLn ("recVUMI_MSUB"); if( !_Fd_ ) info |= PROCESS_EE_SET_D(EEREC_TEMP); recVUMI_MSUB_toD(VU, EEREC_D, info); recUpdateFlags(VU, EEREC_D, info); @@ -2255,7 +2071,7 @@ void recVUMI_MSUB(VURegs *VU, int info) void recVUMI_MSUB_iq(VURegs *VU, int addr, int info) { - //SysPrintf ("recVUMI_MSUB_iq \n"); + //Console::WriteLn ("recVUMI_MSUB_iq"); if( !_Fd_ ) info |= PROCESS_EE_SET_D(EEREC_TEMP); recVUMI_MSUB_iq_toD(VU, EEREC_D, addr, info); recUpdateFlags(VU, EEREC_D, info); @@ -2265,7 +2081,7 @@ void recVUMI_MSUBi(VURegs *VU, int info) { recVUMI_MSUB_iq(VU, VU_VI_ADDR(REG_I, void recVUMI_MSUBq(VURegs *VU, int info) { recVUMI_MSUB_iq(VU, VU_REGQ_ADDR, info); } void recVUMI_MSUBx(VURegs *VU, int info) { - //SysPrintf ("recVUMI_MSUBx \n"); + //Console::WriteLn ("recVUMI_MSUBx"); if( !_Fd_ ) info |= PROCESS_EE_SET_D(EEREC_TEMP); recVUMI_MSUB_xyzw_toD(VU, EEREC_D, 0, info); recUpdateFlags(VU, EEREC_D, info); @@ -2273,7 +2089,7 @@ void recVUMI_MSUBx(VURegs *VU, int info) void recVUMI_MSUBy(VURegs *VU, int info) { - //SysPrintf ("recVUMI_MSUBy \n"); + //Console::WriteLn ("recVUMI_MSUBy"); if( !_Fd_ ) info |= PROCESS_EE_SET_D(EEREC_TEMP); recVUMI_MSUB_xyzw_toD(VU, EEREC_D, 1, info); recUpdateFlags(VU, EEREC_D, info); @@ -2281,7 +2097,7 @@ void recVUMI_MSUBy(VURegs *VU, int info) void recVUMI_MSUBz(VURegs *VU, int info) { - //SysPrintf ("recVUMI_MSUBz \n"); + //Console::WriteLn ("recVUMI_MSUBz"); if( !_Fd_ ) info |= PROCESS_EE_SET_D(EEREC_TEMP); recVUMI_MSUB_xyzw_toD(VU, EEREC_D, 2, info); recUpdateFlags(VU, EEREC_D, info); @@ -2289,7 +2105,7 @@ void recVUMI_MSUBz(VURegs *VU, int info) void recVUMI_MSUBw(VURegs *VU, int info) { - //SysPrintf ("recVUMI_MSUBw \n"); + //Console::WriteLn ("recVUMI_MSUBw"); if( !_Fd_ ) info |= PROCESS_EE_SET_D(EEREC_TEMP); recVUMI_MSUB_xyzw_toD(VU, EEREC_D, 3, info); recUpdateFlags(VU, EEREC_D, info); @@ -2302,49 +2118,49 @@ void recVUMI_MSUBw(VURegs *VU, int info) //------------------------------------------------------------------ void recVUMI_MSUBA( VURegs *VU, int info ) { - //SysPrintf ("recVUMI_MSUBA \n"); + //Console::WriteLn ("recVUMI_MSUBA"); recVUMI_MSUB_toD(VU, EEREC_ACC, info); recUpdateFlags(VU, EEREC_ACC, info); } void recVUMI_MSUBAi( VURegs *VU, int info ) { - //SysPrintf ("recVUMI_MSUBAi \n"); + //Console::WriteLn ("recVUMI_MSUBAi "); recVUMI_MSUB_iq_toD( VU, EEREC_ACC, VU_VI_ADDR(REG_I, 1), info ); recUpdateFlags(VU, EEREC_ACC, info); } void recVUMI_MSUBAq( VURegs *VU, int info ) { - //SysPrintf ("recVUMI_MSUBAq \n"); + //Console::WriteLn ("recVUMI_MSUBAq"); recVUMI_MSUB_iq_toD( VU, EEREC_ACC, VU_REGQ_ADDR, info ); recUpdateFlags(VU, EEREC_ACC, info); } void recVUMI_MSUBAx( VURegs *VU, int info ) { - //SysPrintf ("recVUMI_MSUBAx \n"); + //Console::WriteLn ("recVUMI_MSUBAx"); recVUMI_MSUB_xyzw_toD(VU, EEREC_ACC, 0, info); recUpdateFlags(VU, EEREC_ACC, info); } void recVUMI_MSUBAy( VURegs *VU, int info ) { - //SysPrintf ("recVUMI_MSUBAy \n"); + //Console::WriteLn ("recVUMI_MSUBAy"); recVUMI_MSUB_xyzw_toD(VU, EEREC_ACC, 1, info); recUpdateFlags(VU, EEREC_ACC, info); } void recVUMI_MSUBAz( VURegs *VU, int info ) { - //SysPrintf ("recVUMI_MSUBAz \n"); + //Console::WriteLn ("recVUMI_MSUBAz "); recVUMI_MSUB_xyzw_toD(VU, EEREC_ACC, 2, info); recUpdateFlags(VU, EEREC_ACC, info); } void recVUMI_MSUBAw( VURegs *VU, int info ) { - //SysPrintf ("recVUMI_MSUBAw \n"); + //Console::WriteLn ("recVUMI_MSUBAw"); recVUMI_MSUB_xyzw_toD(VU, EEREC_ACC, 3, info); recUpdateFlags(VU, EEREC_ACC, info); } @@ -2460,7 +2276,7 @@ void MINMAXlogical(VURegs *VU, int info, int min, int mode, uptr addr = 0, int x void recVUMI_MAX(VURegs *VU, int info) { if ( _Fd_ == 0 ) return; - //SysPrintf ("recVUMI_MAX \n"); + //Console::WriteLn ("recVUMI_MAX"); if (MINMAXFIX) MINMAXlogical(VU, info, 0, 0); @@ -2498,7 +2314,7 @@ void recVUMI_MAX(VURegs *VU, int info) void recVUMI_MAX_iq(VURegs *VU, uptr addr, int info) { if ( _Fd_ == 0 ) return; - //SysPrintf ("recVUMI_MAX_iq \n"); + //Console::WriteLn ("recVUMI_MAX_iq"); if (MINMAXFIX) MINMAXlogical(VU, info, 0, 1, addr); @@ -2561,7 +2377,7 @@ void recVUMI_MAX_iq(VURegs *VU, uptr addr, int info) void recVUMI_MAX_xyzw(VURegs *VU, int xyzw, int info) { if ( _Fd_ == 0 ) return; - //SysPrintf ("recVUMI_MAX_xyzw \n"); + //Console::WriteLn ("recVUMI_MAX_xyzw"); if (_Fs_ == 0 && _Ft_ == 0) { @@ -2645,7 +2461,7 @@ void recVUMI_MAXw(VURegs *VU, int info) { recVUMI_MAX_xyzw(VU, 3, info); } void recVUMI_MINI(VURegs *VU, int info) { if ( _Fd_ == 0 ) return; - //SysPrintf ("recVUMI_MINI\n"); + //Console::WriteLn ("recVUMI_MINI"); if (MINMAXFIX) MINMAXlogical(VU, info, 1, 0); @@ -2689,7 +2505,7 @@ void recVUMI_MINI(VURegs *VU, int info) void recVUMI_MINI_iq(VURegs *VU, uptr addr, int info) { if ( _Fd_ == 0 ) return; - //SysPrintf ("recVUMI_MINI_iq \n"); + //Console::WriteLn ("recVUMI_MINI_iq"); if (MINMAXFIX) MINMAXlogical(VU, info, 1, 1, addr); @@ -2753,7 +2569,7 @@ void recVUMI_MINI_iq(VURegs *VU, uptr addr, int info) void recVUMI_MINI_xyzw(VURegs *VU, int xyzw, int info) { if ( _Fd_ == 0 ) return; - //SysPrintf ("recVUMI_MINI_xyzw \n"); + //Console::WriteLn ("recVUMI_MINI_xyzw"); if (_Fs_ == 0 && _Ft_ == 0) { @@ -2825,7 +2641,7 @@ void recVUMI_MINIw(VURegs *VU, int info) { recVUMI_MINI_xyzw(VU, 3, info); } //------------------------------------------------------------------ void recVUMI_OPMULA( VURegs *VU, int info ) { - //SysPrintf ("recVUMI_OPMULA \n"); + //Console::WriteLn ("recVUMI_OPMULA"); if (CHECK_VU_EXTRA_OVERFLOW) { if (_Fs_) vuFloat5_useEAX( EEREC_S, EEREC_TEMP, 0xE); if (_Ft_) vuFloat5_useEAX( EEREC_T, EEREC_TEMP, 0xE); @@ -2852,7 +2668,7 @@ void recVUMI_OPMULA( VURegs *VU, int info ) //------------------------------------------------------------------ void recVUMI_OPMSUB( VURegs *VU, int info ) { - //SysPrintf ("recVUMI_OPMSUB \n"); + //Console::WriteLn ("recVUMI_OPMSUB"); if (CHECK_VU_EXTRA_OVERFLOW) { if (_Fs_) vuFloat5_useEAX( EEREC_S, EEREC_TEMP, 0xE); if (_Ft_) vuFloat5_useEAX( EEREC_T, EEREC_TEMP, 0xE); @@ -2882,7 +2698,7 @@ void recVUMI_OPMSUB( VURegs *VU, int info ) //------------------------------------------------------------------ void recVUMI_NOP( VURegs *VU, int info ) { - //SysPrintf ("recVUMI_NOP \n"); + //Console::WriteLn ("recVUMI_NOP"); } //------------------------------------------------------------------ @@ -2894,7 +2710,7 @@ static const PCSX2_ALIGNED16(int rec_const_0x8000000[4]) = { 0x80000000, 0x80000 void recVUMI_FTOI_Saturate(int rec_s, int rec_t, int rec_tmp1, int rec_tmp2) { - //SysPrintf ("recVUMI_FTOI_Saturate \n"); + //Console::WriteLn ("recVUMI_FTOI_Saturate"); //Duplicate the xor'd sign bit to the whole value //FFFF FFFF for positive, 0 for negative SSE_MOVAPS_XMM_to_XMM(rec_tmp1, rec_s); @@ -2929,7 +2745,7 @@ void recVUMI_FTOI0(VURegs *VU, int info) if ( _Ft_ == 0 ) return; - //SysPrintf ("recVUMI_FTOI0 \n"); + //Console::WriteLn ("recVUMI_FTOI0"); if (_X_Y_Z_W != 0xf) { SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); @@ -3030,7 +2846,7 @@ void recVUMI_FTOIX(VURegs *VU, int addr, int info) if ( _Ft_ == 0 ) return; - //SysPrintf ("recVUMI_FTOIX \n"); + //Console::WriteLn ("recVUMI_FTOIX"); if (_X_Y_Z_W != 0xf) { SSE_MOVAPS_XMM_to_XMM(EEREC_TEMP, EEREC_S); SSE_MULPS_M128_to_XMM(EEREC_TEMP, addr); @@ -3140,7 +2956,7 @@ void recVUMI_ITOF0( VURegs *VU, int info ) { if ( _Ft_ == 0 ) return; - //SysPrintf ("recVUMI_ITOF0 \n"); + //Console::WriteLn ("recVUMI_ITOF0"); if (_X_Y_Z_W != 0xf) { SSE2_CVTDQ2PS_XMM_to_XMM(EEREC_TEMP, EEREC_S); vuFloat_useEAX( info, EEREC_TEMP, 15); // Clamp infinities @@ -3157,7 +2973,7 @@ void recVUMI_ITOFX(VURegs *VU, int addr, int info) { if ( _Ft_ == 0 ) return; - //SysPrintf ("recVUMI_ITOFX \n"); + //Console::WriteLn ("recVUMI_ITOFX"); if (_X_Y_Z_W != 0xf) { SSE2_CVTDQ2PS_XMM_to_XMM(EEREC_TEMP, EEREC_S); SSE_MULPS_M128_to_XMM(EEREC_TEMP, addr); @@ -3191,7 +3007,7 @@ void recVUMI_CLIP(VURegs *VU, int info) u32 prevclipaddr = VU_VI_ADDR(REG_CLIP_FLAG, 2); if( clipaddr == 0 ) { // battle star has a clip right before fcset - SysPrintf("skipping vu clip\n"); + Console::WriteLn("skipping vu clip"); return; } @@ -3208,7 +3024,7 @@ void recVUMI_CLIP(VURegs *VU, int info) x86temp1 = ALLOCTEMPX86(MODE_8BITREG); x86temp2 = ALLOCTEMPX86(MODE_8BITREG); - //if ( (x86temp1 == 0) || (x86temp2 == 0) ) SysPrintf("VU CLIP Allocation Error: EAX being allocated! \n"); + //if ( (x86temp1 == 0) || (x86temp2 == 0) ) Console::Error("VU CLIP Allocation Error: EAX being allocated!"); _freeXMMreg(t1reg); // These should have been freed at allocation in eeVURecompileCode() _freeXMMreg(t2reg); // but if they've been used since then, then free them. (just doing this incase :p (cottonvibes)) diff --git a/pcsx2/x86/iVUzerorec.cpp b/pcsx2/x86/iVUzerorec.cpp index f4998b113e..db9ff78fbb 100644 --- a/pcsx2/x86/iVUzerorec.cpp +++ b/pcsx2/x86/iVUzerorec.cpp @@ -445,7 +445,7 @@ void __fastcall SuperVUClear(u32 startpc, u32 size, int vuindex) plist->push_back(*it); if( plist->size() > 30 ) { // list is too big, delete - //SysPrintf("Performance warning: deleting cached VU programm!\n"); + //Console::Notice("Performance warning: deleting cached VU program!"); delete plist->front(); plist->pop_front(); } @@ -516,7 +516,7 @@ void SuperVUDumpBlock(list& blocks, int vuindex) Path::CreateDirectory( "dumps" ); string filename( Path::Combine( "dumps", fmt_string( "svu%cdump%.4X.txt", s_vu?'0':'1', s_pFnHeader->startpc ) ) ); - //SysPrintf( "dump1 %x => %s\n", s_pFnHeader->startpc, filename ); + //Console::WriteLn( "dump1 %x => %s", params s_pFnHeader->startpc, filename ); f = fopen( filename.c_str(), "w" ); @@ -611,7 +611,7 @@ void SuperVUDumpBlock(list& blocks, int vuindex) if( (*itblock)->pcode != NULL ) { char command[255]; FILE* fasm = fopen( "mydump1", "wb" ); - //SysPrintf("writing: %x, %x\n", (*itblock)->startpc, (uptr)(*itblock)->pendcode - (uptr)(*itblock)->pcode); + //Console::WriteLn("writing: %x, %x", params (*itblock)->startpc, (uptr)(*itblock)->pendcode - (uptr)(*itblock)->pcode); fwrite( (*itblock)->pcode, 1, (uptr)(*itblock)->pendcode - (uptr)(*itblock)->pcode, fasm ); fclose( fasm ); sprintf( command, "objdump -D --target=binary --architecture=i386 -M intel mydump1 > tempdump"); @@ -769,11 +769,11 @@ static VuFunctionHeader* SuperVURecompileProgram(u32 startpc, int vuindex) { assert( vuindex < 2 ); assert( s_recVUPtr != NULL ); - //SysPrintf("svu%c rec: %x\n", '0'+vuindex, startpc); + //Console::WriteLn("svu%c rec: %x", params '0'+vuindex, startpc); // if recPtr reached the mem limit reset whole mem if ( ( (uptr)s_recVUPtr - (uptr)s_recVUMem ) >= VU_EXESIZE-0x40000 ) { - //SysPrintf("SuperVU reset mem\n"); + //Console::WriteLn("SuperVU reset mem"); SuperVUReset(0); SuperVUReset(1); SuperVUReset(-1); @@ -871,7 +871,7 @@ static int _recbranchAddr(u32 vucode) { s32 bpc = pc + (_Imm11_ << 3); /* if ( bpc < 0 ) { - SysPrintf("zerorec branch warning: bpc < 0 ( %x ); Using unsigned imm11\n", bpc); + Console::WriteLn("zerorec branch warning: bpc < 0 ( %x ); Using unsigned imm11", params bpc); bpc = pc + (_UImm11_ << 3); }*/ bpc &= (s_MemSize[s_vu]-1); @@ -943,7 +943,7 @@ static VuInstruction* getDelayInst(VuInstruction* pInst) static VuBaseBlock* SuperVUBuildBlocks(VuBaseBlock* parent, u32 startpc, const VUPIPELINES& pipes) { // check if block already exists - //SysPrintf("startpc %x\n", startpc); + //Console::WriteLn("startpc %x", params startpc); startpc &= (s_vu ? 0x3fff : 0xfff); VuBlockHeader* pbh = &recVUBlocks[s_vu][startpc/8]; @@ -1097,7 +1097,7 @@ static VuBaseBlock* SuperVUBuildBlocks(VuBaseBlock* parent, u32 startpc, const V case 0x16: // fsand if( (ptr[0]&0xc0) ) { // sometimes full sticky bits are needed (simple series 2000 - oane chapara) - //SysPrintf("needSticky: %x-%x\n", s_pFnHeader->startpc, startpc); + //Console::WriteLn("needSticky: %x-%x", params s_pFnHeader->startpc, startpc); needFullStatusFlag = 2; } break; @@ -3000,7 +3000,7 @@ void VuInstruction::Recompile(list::iterator& itinst, u32 vuxyz) if( type & INST_CLIP_WRITE ) { if( nParentPc < s_pCurBlock->startpc || nParentPc >= (int)pc ) { - if( pparentinst != NULL ) { + if( !CHECK_VUCLIPFLAGHACK && pparentinst != NULL ) { if( nParentCheckForExecution >= 0 ) { if( pparentinst->pClipWrite == 0 ) @@ -3023,7 +3023,7 @@ void VuInstruction::Recompile(list::iterator& itinst, u32 vuxyz) } else { s_ClipRead = s_pCurBlock->GetInstIterAtPc(nParentPc)->pClipWrite; - if (s_ClipRead == 0) SysPrintf("super ClipRead allocation error! \n"); + if (s_ClipRead == 0) Console::WriteLn("super ClipRead allocation error!"); } } @@ -3085,7 +3085,7 @@ void VuInstruction::Recompile(list::iterator& itinst, u32 vuxyz) } else { s_StatusRead = s_pCurBlock->GetInstIterAtPc(nParentPc)->pStatusWrite; - if (s_StatusRead == 0) SysPrintf("super StatusRead allocation error! \n"); + if (s_StatusRead == 0) Console::WriteLn("super StatusRead allocation error!"); // if( pc >= (u32)s_pCurBlock->endpc-8 ) { // // towards the end, so variable might be leaded to another block (silent hill 4) // uptr tempstatus = (uptr)SuperVUStaticAlloc(4); @@ -3389,7 +3389,7 @@ void VuInstruction::Recompile(list::iterator& itinst, u32 vuxyz) #ifdef PCSX2_DEVBUILD if ( regs[1].VIread & regs[0].VIwrite & ~((1<startpc); + Console::Notice("*PCSX2*: Warning, VI write to the same reg %x in both lower/upper cycle %x", params regs[1].VIread & regs[0].VIwrite, s_pCurBlock->startpc); } #endif @@ -3404,7 +3404,7 @@ void VuInstruction::Recompile(list::iterator& itinst, u32 vuxyz) assert( regs[1].VFwrite > 0 ); if (vfwrite[0] == vfwrite[1]) { - //SysPrintf("*PCSX2*: Warning, VF write to the same reg in both lower/upper cycle %x\n", s_pCurBlock->startpc); + //Console::WriteLn("*PCSX2*: Warning, VF write to the same reg in both lower/upper cycle %x", params s_pCurBlock->startpc); } if (vfread0[0] == vfwrite[1] || vfread1[0] == vfwrite[1] ) { @@ -3475,7 +3475,7 @@ void VuInstruction::Recompile(list::iterator& itinst, u32 vuxyz) // // CALLFunc((u32)branchfn); // assert( itinst->regs[0].VIwrite & 0xffff ); -// SysPrintf("vi write before branch\n"); +// Console::WriteLn("vi write before branch"); // for(s_CacheVIReg = 0; s_CacheVIReg < 16; ++s_CacheVIReg) { // if( itinst->regs[0].VIwrite & (1<::HandlerType*>(RWFT[TemplateHelper::sidx][0][hand])(paddr,data); } diff --git a/pcsx2/x86/microVU.cpp b/pcsx2/x86/microVU.cpp index cd96ba9259..4613a13acb 100644 --- a/pcsx2/x86/microVU.cpp +++ b/pcsx2/x86/microVU.cpp @@ -169,8 +169,9 @@ __forceinline int mVUfindLeastUsedProg(microVU* mVU) { __forceinline int mVUsearchProg(microVU* mVU) { if (mVU->prog.cleared) { // If cleared, we need to search for new program for (int i = 0; i <= mVU->prog.total; i++) { - if (i == mVU->prog.cur) continue; // We can skip the current program. (ToDo: Verify that games don't clear, and send the same microprogram :/) + //if (i == mVU->prog.cur) continue; // We can skip the current program. (ToDo: Verify that games don't clear, and send the same microprogram :/) if (!memcmp_mmx(mVU->prog.prog[i].data, mVU->regs->Micro, mVU->microSize)) { + if (i == mVU->prog.cur) SysPrintf("microVU: Same micro program sent!\n"); mVU->prog.cur = i; mVU->prog.cleared = 0; mVU->prog.prog[i].used++; @@ -265,13 +266,13 @@ __declspec(naked) void __fastcall endVU0(u32 startPC, u32 cycles) { } } #else -extern "C" -{ -extern void __fastcall startVU0(u32 startPC, u32 cycles); -extern void __fastcall startVU1(u32 startPC, u32 cycles); -extern void __fastcall endVU0(u32 startPC, u32 cycles); +extern "C" { + extern void __fastcall startVU0(u32 startPC, u32 cycles); + extern void __fastcall startVU1(u32 startPC, u32 cycles); + extern void __fastcall endVU0(u32 startPC, u32 cycles); } #endif + //------------------------------------------------------------------ // Wrapper Functions - Called by other parts of the Emu //------------------------------------------------------------------ diff --git a/pcsx2/x86/microVU.h b/pcsx2/x86/microVU.h index d755d28b61..c37a084043 100644 --- a/pcsx2/x86/microVU.h +++ b/pcsx2/x86/microVU.h @@ -24,6 +24,7 @@ #include "GS.h" #include "ix86/ix86.h" #include "microVU_Alloc.h" +#include "microVU_Misc.h" struct microBlock { microRegInfo pState; // Detailed State of Pipeline @@ -124,6 +125,7 @@ struct microVU { u32 code; // Contains the current Instruction u32 iReg; // iReg (only used in recompilation, not execution) u32 clipFlag[4]; // 4 instances of clip flag (used in execution) + u32 divFlag; // 1 instance of I/D flags /* uptr x86eax; // Accumulator register. Used in arithmetic operations. @@ -155,7 +157,9 @@ microVUt(void) mVUreset(); microVUt(void) mVUclose(); #endif -#include "microVU_Misc.h" +// Include all the *.inl files (Needed because C++ sucks with templates and *.cpp files) +#include "microVU_Misc.inl" +#include "microVU_Analyze.inl" #include "microVU_Alloc.inl" #include "microVU_Tables.inl" #include "microVU_Compile.inl" diff --git a/pcsx2/x86/microVU_Alloc.h b/pcsx2/x86/microVU_Alloc.h index 81e1ce9fa0..4361ea0e74 100644 --- a/pcsx2/x86/microVU_Alloc.h +++ b/pcsx2/x86/microVU_Alloc.h @@ -30,40 +30,50 @@ union regInfo { struct microRegInfo { regInfo VF[32]; - regInfo Acc; u8 VI[32]; - u8 i; u8 q; u8 p; - u8 r; +}; + +struct microTempRegInfo { + regInfo VF[2]; // Holds cycle info for Fd, VF[0] = Upper Instruction, VF[1] = Lower Instruction + u8 VFreg[2]; // Index of the VF reg + u8 VI; // Holds cycle info for Id + u8 VIreg; // Index of the VI reg }; template struct microAllocInfo { - microRegInfo regs; - u8 branch; // 0 = No Branch, 1 = Branch, 2 = Conditional Branch, 3 = Jump (JALR/JR) - u32 curPC; // Current PC - u32 cycles; // Cycles for current block - u32 info[pSize];// bit 00 = Lower Instruction is NOP - // bit 01 - // bit 02 - // bit 03 - // bit 04 - // bit 05 = Write to Q1 or Q2? - // bit 06 = Read Q1 or Q2? - // bit 07 = Read/Write to P1 or P2? - // bit 08 = Update Mac Flags? - // bit 09 = Update Status Flags? - // bit 10 = Used with bit 11 to make a 2-bit key for mac flag instance - // bit 11 - // bit 12 = Used with bit 13 to make a 2-bit key for status flag instance - // bit 13 - // bit 14 = Used with bit 15 to make a 2-bit key for clip flag instance - // bit 15 - // bit 16 = Used with bit 17 to make a 2-bit key for mac flag instance - // bit 17 - // bit 18 = Used with bit 19 to make a 2-bit key for status flag instance - // bit 19 - // bit 20 = Read VI(Fs) from backup memory? - // bit 21 = Read VI(Ft) from backup memory? + microRegInfo regs; // Pipeline info + microTempRegInfo regsTemp; // Temp Pipeline info (used so that new pipeline info isn't conflicting between upper and lower instructions in the same cycle) + u8 branch; // 0 = No Branch, 1 = Branch, 2 = Conditional Branch, 3 = Jump (JALR/JR) + u8 divFlag; // 0 = Transfer DS/IS flags normally, 1 = Clear DS/IS Flags, > 1 = set DS/IS flags to bit 2::1 of divFlag + u8 divFlagTimer; // Used to ensure divFlag's contents are merged at the appropriate time. + u32 curPC; // Current PC + u32 cycles; // Cycles for current block + u32 maxStall; // Helps in computing stalls (stores the max amount of cycles to stall for the current opcodes) + u32 info[pSize]; // bit 00 = Lower Instruction is NOP + // bit 01 + // bit 02 + // bit 03 + // bit 04 + // bit 05 = Write to Q1 or Q2? + // bit 06 = Read Q1 or Q2? + // bit 07 = Read/Write to P1 or P2? + // bit 08 = Update Mac Flags? + // bit 09 = Update Status Flags? + // bit 10 = Used with bit 11 to make a 2-bit key for mac flag instance + // bit 11 + // bit 12 = Used with bit 13 to make a 2-bit key for status flag instance + // bit 13 + // bit 14 = Used with bit 15 to make a 2-bit key for clip flag instance + // bit 15 + // bit 16 = Used with bit 17 to make a 2-bit key for mac flag instance + // bit 17 + // bit 18 = Used with bit 19 to make a 2-bit key for status flag instance + // bit 19 + // bit 20 = Used with bit 21 to make a 2-bit key for clip flag instance + // bit 21 + // bit 22 = Read VI(Fs) from backup memory? + // bit 23 = Read VI(Ft) from backup memory? }; diff --git a/pcsx2/x86/microVU_Alloc.inl b/pcsx2/x86/microVU_Alloc.inl index ccd8a9221c..ca6cee9e09 100644 --- a/pcsx2/x86/microVU_Alloc.inl +++ b/pcsx2/x86/microVU_Alloc.inl @@ -19,10 +19,6 @@ #pragma once #ifdef PCSX2_MICROVU -//------------------------------------------------------------------ -// Micro VU - recPass 0 Functions -//------------------------------------------------------------------ - //------------------------------------------------------------------ // Micro VU - recPass 1 Functions //------------------------------------------------------------------ @@ -76,7 +72,7 @@ microVUt(void) mVUallocFMAC2a(int& Fs, int& Ft) { microVUt(void) mVUallocFMAC2b(int& Ft) { microVU* mVU = mVUx; - if (!_Ft_) return; + if (!_Ft_) { SysPrintf("microVU: If a game does this, its retarded...\n"); return; } //if (CHECK_VU_OVERFLOW) mVUclamp1(Ft, xmmT1, _X_Y_Z_W); mVUsaveReg(Ft, (uptr)&mVU->regs->VF[_Ft_].UL[0], _X_Y_Z_W); } @@ -146,12 +142,7 @@ microVUt(void) mVUallocFMAC3b(int& Fd) { if (_W) { mVUloadReg(reg, (uptr)&mVU->regs->VF[0].UL[0], _xyzw_ACC); } \ else { SSE_XORPS_XMM_to_XMM(reg, reg); } \ } -/* -#define getACC(reg) { \ - reg = xmmACC0 + writeACC; \ - if (_X_Y_Z_W != 15) { SSE_MOVAPS_XMM_to_XMM(reg, (xmmACC0 + prevACC)); } \ -} -*/ + microVUt(void) mVUallocFMAC4a(int& ACC, int& Fs, int& Ft) { microVU* mVU = mVUx; ACC = xmmACC; @@ -499,6 +490,24 @@ microVUt(void) mVUallocFMAC16b(int& ACCw, int& ACCr) { mVUallocFMAC14b(ACCw, ACCr); } +//------------------------------------------------------------------ +// FMAC17 - CLIP FMAC Opcode +//------------------------------------------------------------------ + +#define getReg9(reg, _reg_) { \ + mVUloadReg(reg, (uptr)&mVU->regs->VF[_reg_].UL[0], 1); \ + if (CHECK_VU_EXTRA_OVERFLOW) mVUclamp2(reg, xmmT1, 1); \ + mVUunpack_xyzw(reg, reg, 3); \ +} + +microVUt(void) mVUallocFMAC17a(int& Fs, int& Ft) { + microVU* mVU = mVUx; + Fs = xmmFs; + Ft = xmmFt; + getReg6(Fs, _Fs_); + getReg9(Ft, _Ft_); +} + //------------------------------------------------------------------ // FMAC18 - OPMULA FMAC Opcode //------------------------------------------------------------------ @@ -666,6 +675,7 @@ microVUt(void) mVUallocFMAC26b(int& ACCw, int& ACCr) { } microVUt(void) mVUallocSFLAGa(int reg, int fInstance) { + microVU* mVU = mVUx; getFlagReg(fInstance, fInstance); MOVZX32R16toR(reg, fInstance); } @@ -698,7 +708,19 @@ microVUt(void) mVUallocCFLAGb(int reg, int fInstance) { microVU* mVU = mVUx; MOV32RtoM(mVU->clipFlag[fInstance], reg); } +/* +microVUt(void) mVUallocDFLAGa(int reg) { + microVU* mVU = mVUx; + //if (!mVUdivFlag) { MOV32MtoR(reg, (uptr)&mVU->divFlag[readQ]); AND32ItoR(reg, 0xc00); } + //else if (mVUdivFlag & 1) { XOR32RtoR(reg, reg); } + //else { MOV32ItoR(reg, (u32)((mVUdivFlag << 9) & 0xc00)); } +} +microVUt(void) mVUallocDFLAGb(int reg) { + microVU* mVU = mVUx; + //MOV32RtoM((uptr)&mVU->divFlag[writeQ], reg); +} +*/ //------------------------------------------------------------------ // VI Reg Allocators //------------------------------------------------------------------ @@ -752,4 +774,5 @@ microVUt(void) mVUallocVIb(int GPRreg, int _reg_) { if (!_reg_ && (_fxf_ < 3)) { XOR32RtoR(GPRreg, GPRreg); } \ else { MOV32MtoR(GPRreg, (uptr)&mVU->regs->VF[_reg_].UL[0]); } \ } + #endif //PCSX2_MICROVU diff --git a/pcsx2/x86/microVU_Analyze.inl b/pcsx2/x86/microVU_Analyze.inl new file mode 100644 index 0000000000..23050cd585 --- /dev/null +++ b/pcsx2/x86/microVU_Analyze.inl @@ -0,0 +1,126 @@ +/* Pcsx2 - Pc Ps2 Emulator +* Copyright (C) 2009 Pcsx2-Playground Team +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA +*/ + +#pragma once +#ifdef PCSX2_MICROVU + +//------------------------------------------------------------------ +// Micro VU - recPass 0 Functions +//------------------------------------------------------------------ + +//------------------------------------------------------------------ +// FMAC1 - Normal FMAC Opcodes +//------------------------------------------------------------------ + +#define aReg(x) mVUallocInfo.regs.VF[x] +#define bReg(x) mVUallocInfo.regsTemp.VFreg[0] = x; mVUallocInfo.regsTemp.VF[0] +#define aMax(x, y) ((x > y) ? x : y) + +#define analyzeReg1(reg) { \ + if (reg) { \ + if (_X) { mVUstall = aMax(mVUstall, aReg(reg).x); } \ + if (_Y) { mVUstall = aMax(mVUstall, aReg(reg).y); } \ + if (_Z) { mVUstall = aMax(mVUstall, aReg(reg).z); } \ + if (_W) { mVUstall = aMax(mVUstall, aReg(reg).w); } \ + } \ +} + +#define analyzeReg2(reg) { \ + if (reg) { \ + if (_X) { bReg(reg).x = 4; } \ + if (_Y) { bReg(reg).y = 4; } \ + if (_Z) { bReg(reg).z = 4; } \ + if (_W) { bReg(reg).w = 4; } \ + } \ +} + +microVUt(void) mVUanalyzeFMAC1(int Fd, int Fs, int Ft) { + microVU* mVU = mVUx; + mVUinfo |= _doStatus; + analyzeReg1(Fs); + analyzeReg1(Ft); + analyzeReg2(Fd); +} + +//------------------------------------------------------------------ +// FMAC2 - ABS/FTOI/ITOF Opcodes +//------------------------------------------------------------------ + +microVUt(void) mVUanalyzeFMAC2(int Fs, int Ft) { + microVU* mVU = mVUx; + analyzeReg1(Fs); + analyzeReg2(Ft); +} + +//------------------------------------------------------------------ +// FMAC3 - BC(xyzw) FMAC Opcodes +//------------------------------------------------------------------ + +#define analyzeReg3(reg) { \ + if (reg) { \ + if (_bc_x) { mVUstall = aMax(mVUstall, aReg(reg).x); } \ + else if (_bc_y) { mVUstall = aMax(mVUstall, aReg(reg).y); } \ + else if (_bc_z) { mVUstall = aMax(mVUstall, aReg(reg).z); } \ + else { mVUstall = aMax(mVUstall, aReg(reg).w); } \ + } \ +} + +microVUt(void) mVUanalyzeFMAC3(int Fd, int Fs, int Ft) { + microVU* mVU = mVUx; + mVUinfo |= _doStatus; + analyzeReg1(Fs); + analyzeReg3(Ft); + analyzeReg2(Fd); +} + +//------------------------------------------------------------------ +// FMAC4 - Clip FMAC Opcode +//------------------------------------------------------------------ + +#define analyzeReg4(reg) { \ + if (reg) { mVUstall = aMax(mVUstall, aReg(reg).w); } \ +} + +microVUt(void) mVUanalyzeFMAC4(int Fs, int Ft) { + microVU* mVU = mVUx; + analyzeReg1(Fs); + analyzeReg4(Ft); +} + +//------------------------------------------------------------------ +// FDIV - DIV/SQRT/RSQRT Opcodes +//------------------------------------------------------------------ + +#define analyzeReg5(reg, fxf) { \ + if (reg) { \ + switch (fxf) { \ + case 0: mVUstall = aMax(mVUstall, aReg(reg).x); break; \ + case 1: mVUstall = aMax(mVUstall, aReg(reg).y); break; \ + case 2: mVUstall = aMax(mVUstall, aReg(reg).z); break; \ + case 3: mVUstall = aMax(mVUstall, aReg(reg).w); break; \ + } \ + } \ +} + +microVUt(void) mVUanalyzeFDIV(int Fs, int Fsf, int Ft, int Ftf) { + microVU* mVU = mVUx; + analyzeReg5(Fs, Fsf); + analyzeReg5(Ft, Ftf); +} + +#endif //PCSX2_MICROVU diff --git a/pcsx2/x86/microVU_Compile.inl b/pcsx2/x86/microVU_Compile.inl index 0574d9faa3..e07dff38e8 100644 --- a/pcsx2/x86/microVU_Compile.inl +++ b/pcsx2/x86/microVU_Compile.inl @@ -31,10 +31,6 @@ #define mVUdebugStuff1() {} #endif -#define curI mVUcurProg.data[iPC] -#define setCode() { mVU->code = curI; } -#define incPC(x) { iPC = ((iPC + x) & (mVU->progSize-1)); setCode(); } - #define createBlock(blockEndPtr) { \ block.pipelineState = pipelineState; \ block.x86ptrStart = x86ptrStart; \ @@ -45,9 +41,23 @@ } \ } +#define curI mVUcurProg.data[iPC] +#define setCode() { mVU->code = curI; } +#define incPC(x) { iPC = ((iPC + x) & (mVU->progSize-1)); setCode(); } +#define startLoop() { mVUdebugStuff1(); mVUstall = 0; memset(&mVUregsTemp, 0, sizeof(mVUregsTemp)); } + +microVUt(void) mVUsetCycles() { + microVU* mVU = mVUx; + incCycles(mVUstall); + mVUregs.VF[mVUregsTemp.VFreg[0]].reg = mVUregsTemp.VF[0].reg; + mVUregs.VF[mVUregsTemp.VFreg[1]].reg = mVUregsTemp.VF[1].reg; + mVUregs.VI[mVUregsTemp.VIreg] = mVUregsTemp.VI; +} + microVUx(void) mVUcompile(u32 startPC, u32 pipelineState, microRegInfo* pState, u8* x86ptrStart) { microVU* mVU = mVUx; microBlock block; + int branch; iPC = startPC / 4; // Searches for Existing Compiled Block (if found, then returns; else, compile) @@ -56,28 +66,32 @@ microVUx(void) mVUcompile(u32 startPC, u32 pipelineState, microRegInfo* pState, // First Pass setCode(); + branch = 0; + mVUbranch = 0; + mVUcycles = 1; // Skips "M" phase, and starts counting cycles at "T" stage for (;;) { - mVUdebugStuff1(); + startLoop(); mVUopU(); - if (curI & _Ebit_) { mVUbranch = 5; } - if (curI & _MDTbit_) { mVUbranch = 4; } - if (curI & _Ibit_) { incPC(1); mVUinfo |= _isNOP; } - else { incPC(1); mVUopL(); } - if (mVUbranch == 4) { mVUbranch = 0; mVUinfo |= _isEOB; break; } - else if (mVUbranch == 5) { mVUbranch = 4; } - else if (mVUbranch) { mVUbranch = 4; mVUinfo |= _isBranch; } + if (curI & _Ebit_) { branch = 1; } + if (curI & _MDTbit_) { branch = 2; } + if (curI & _Ibit_) { incPC(1); mVUinfo |= _isNOP; } + else { incPC(1); mVUopL(); } + mVUsetCycles(); + if (branch >= 2) { mVUinfo |= _isEOB | ((branch == 3) ? _isBdelay : 0); if (mVUbranch) { Console::Error("microVU Warning: Branch in E-bit/Branch delay slot!"); mVUinfo |= _isNOP; } break; } + else if (branch == 1) { branch = 2; } + if (mVUbranch) { branch = 3; mVUbranch = 0; mVUinfo |= _isBranch; } incPC(1); } // Second Pass iPC = startPC; setCode(); - for (bool x = 1; x==1; ) { + for (bool x = 1; x; ) { if (isEOB) { x = 0; } else if (isBranch) { mVUopU(); incPC(2); } mVUopU(); - if (isNop) { incPC(1); } + if (isNop) { if (curI & _Ibit_) { incPC(1); mVU->iReg = curI; } else { incPC(1); } } else { incPC(1); mVUopL(); } if (!isBdelay) { incPC(1); } else { diff --git a/pcsx2/x86/microVU_Lower.inl b/pcsx2/x86/microVU_Lower.inl index 817cc46b1d..70e5b1832e 100644 --- a/pcsx2/x86/microVU_Lower.inl +++ b/pcsx2/x86/microVU_Lower.inl @@ -23,111 +23,108 @@ // Micro VU Micromode Lower instructions //------------------------------------------------------------------ +#define testZero(xmmReg, xmmTemp, gprTemp) { \ + SSE_XORPS_XMM_to_XMM(xmmTemp, xmmTemp); /* Clear xmmTemp (make it 0) */ \ + SSE_CMPEQPS_XMM_to_XMM(xmmTemp, xmmReg); /* Set all F's if each vector is zero */ \ + SSE_MOVMSKPS_XMM_to_R32(gprTemp, xmmTemp); /* Move the sign bits */ \ + TEST32ItoR(gprTemp, 1); /* Test "Is Zero" bit */ \ +} + microVUf(void) mVU_DIV() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) { mVUanalyzeFDIV(_Fs_, _Fsf_, _Ft_, _Ftf_); } else { - //u8 *pjmp;, *pjmp1; - u32 *ajmp32, *bjmp32; - + u8 *ajmp, *bjmp, *cjmp, *djmp; getReg5(xmmFs, _Fs_, _Fsf_); getReg5(xmmFt, _Ft_, _Ftf_); - //AND32ItoM(VU_VI_ADDR(REG_STATUS_FLAG, 2), 0xFCF); // Clear D/I flags + testZero(xmmFt, xmmT1, gprT1); // Test if Ft is zero + cjmp = JZ8(0); // Skip if not zero - // FT can be zero here! so we need to check if its zero and set the correct flag. - SSE_XORPS_XMM_to_XMM(xmmT1, xmmT1); // Clear xmmT1 - SSE_CMPEQPS_XMM_to_XMM(xmmT1, xmmFt); // Set all F's if each vector is zero - SSE_MOVMSKPS_XMM_to_R32(gprT1, xmmT1); // Move the sign bits of the previous calculation - - AND32ItoR(gprT1, 1); // Grab "Is Zero" bits from the previous calculation - ajmp32 = JZ32(0); // Skip if none are - //SSE_XORPS_XMM_to_XMM(xmmT1, xmmT1); // Clear xmmT1 - //SSE_CMPEQPS_XMM_to_XMM(xmmT1, xmmFs); // Set all F's if each vector is zero - //SSE_MOVMSKPS_XMM_to_R32(gprT1, xmmT1); // Move the sign bits of the previous calculation - - //AND32ItoR(gprT1, 1); // Grab "Is Zero" bits from the previous calculation - //pjmp = JZ8(0); - // OR32ItoM( VU_VI_ADDR(REG_STATUS_FLAG, 2), 0x410 ); // Set invalid flag (0/0) - // pjmp1 = JMP8(0); - //x86SetJ8(pjmp); - // OR32ItoM( VU_VI_ADDR(REG_STATUS_FLAG, 2), 0x820 ); // Zero divide (only when not 0/0) - //x86SetJ8(pjmp1); + testZero(xmmFs, xmmT1, gprT1); // Test if Fs is zero + ajmp = JZ8(0); + MOV32ItoM((uptr)&mVU->divFlag, 0x410); // Set invalid flag (0/0) + bjmp = JMP8(0); + x86SetJ8(ajmp); + MOV32ItoM((uptr)&mVU->divFlag, 0x820); // Zero divide (only when not 0/0) + x86SetJ8(bjmp); SSE_XORPS_XMM_to_XMM(xmmFs, xmmFt); SSE_ANDPS_M128_to_XMM(xmmFs, (uptr)mVU_signbit); SSE_ORPS_XMM_to_XMM(xmmFs, xmmMax); // If division by zero, then xmmFs = +/- fmax - bjmp32 = JMP32(0); - x86SetJ32(ajmp32); - - SSE_DIVSS_XMM_to_XMM(xmmFs, xmmFt); - mVUclamp1(xmmFs, xmmFt, 8); - - x86SetJ32(bjmp32); + djmp = JMP8(0); + x86SetJ8(cjmp); + MOV32ItoM((uptr)&mVU->divFlag, 0); // Clear I/D flags + SSE_DIVSS_XMM_to_XMM(xmmFs, xmmFt); + mVUclamp1(xmmFs, xmmFt, 8); + x86SetJ8(djmp); mVUunpack_xyzw(xmmFs, xmmFs, 0); mVUmergeRegs(xmmPQ, xmmFs, writeQ ? 4 : 8); } } + microVUf(void) mVU_SQRT() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) { mVUanalyzeFDIV(0, 0, _Ft_, _Ftf_); } else { - //u8* pjmp; + u8* ajmp; getReg5(xmmFt, _Ft_, _Ftf_); + MOV32ItoM((uptr)&mVU->divFlag, 0); // Clear I/D flags - //AND32ItoM(VU_VI_ADDR(REG_STATUS_FLAG, 2), 0xFCF); // Clear D/I flags /* Check for negative sqrt */ - //SSE_MOVMSKPS_XMM_to_R32(gprT1, xmmFt); - //AND32ItoR(gprT1, 1); //Check sign - //pjmp = JZ8(0); //Skip if none are - // OR32ItoM(VU_VI_ADDR(REG_STATUS_FLAG, 2), 0x410); // Invalid Flag - Negative number sqrt - //x86SetJ8(pjmp); + SSE_MOVMSKPS_XMM_to_R32(gprT1, xmmFt); + AND32ItoR(gprT1, 1); //Check sign + ajmp = JZ8(0); //Skip if none are + MOV32ItoM((uptr)&mVU->divFlag, 0x410); // Invalid Flag - Negative number sqrt + SSE_ANDPS_M128_to_XMM(xmmFt, (uptr)mVU_absclip); // Do a cardinal sqrt + x86SetJ8(ajmp); - SSE_ANDPS_M128_to_XMM(xmmFt, (uptr)mVU_absclip); // Do a cardinal sqrt if (CHECK_VU_OVERFLOW) SSE_MINSS_XMM_to_XMM(xmmFt, xmmMax); // Clamp infinities (only need to do positive clamp since xmmFt is positive) SSE_SQRTSS_XMM_to_XMM(xmmFt, xmmFt); mVUunpack_xyzw(xmmFt, xmmFt, 0); mVUmergeRegs(xmmPQ, xmmFt, writeQ ? 4 : 8); } } + microVUf(void) mVU_RSQRT() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) { mVUanalyzeFDIV(_Fs_, _Fsf_, _Ft_, _Ftf_); } else { - u8 *ajmp8, *bjmp8; - + u8 *ajmp8, *bjmp8, *cjmp8, *djmp8; getReg5(xmmFs, _Fs_, _Fsf_); getReg5(xmmFt, _Ft_, _Ftf_); + MOV32ItoM((uptr)&mVU->divFlag, 0); // Clear I/D flags - //AND32ItoM(VU_VI_ADDR(REG_STATUS_FLAG, 2), 0xFCF); // Clear D/I flags /* Check for negative divide */ - //SSE_MOVMSKPS_XMM_to_R32(gprT1, xmmT1); - //AND32ItoR(gprT1, 1); //Check sign - //ajmp8 = JZ8(0); //Skip if none are - // OR32ItoM(VU_VI_ADDR(REG_STATUS_FLAG, 2), 0x410); // Invalid Flag - Negative number sqrt - //x86SetJ8(ajmp8); + SSE_MOVMSKPS_XMM_to_R32(gprT1, xmmT1); + AND32ItoR(gprT1, 1); //Check sign + ajmp8 = JZ8(0); //Skip if none are + MOV32ItoM((uptr)&mVU->divFlag, 0x410); // Invalid Flag - Negative number sqrt + SSE_ANDPS_M128_to_XMM(xmmFt, (uptr)mVU_absclip); // Do a cardinal sqrt + x86SetJ8(ajmp8); - SSE_ANDPS_M128_to_XMM(xmmFt, (uptr)mVU_absclip); // Do a cardinal sqrt SSE_SQRTSS_XMM_to_XMM(xmmFt, xmmFt); + testZero(xmmFt, xmmT1, gprT1); // Test if Ft is zero + ajmp8 = JZ8(0); // Skip if not zero - // Ft can still be zero here! so we need to check if its zero and set the correct flag. - SSE_XORPS_XMM_to_XMM(xmmT1, xmmT1); // Clear t1reg - SSE_CMPEQSS_XMM_to_XMM(xmmT1, xmmFt); // Set all F's if each vector is zero + testZero(xmmFs, xmmT1, gprT1); // Test if Fs is zero + bjmp8 = JZ8(0); // Skip if none are + MOV32ItoM((uptr)&mVU->divFlag, 0x410); // Set invalid flag (0/0) + cjmp8 = JMP8(0); + x86SetJ8(bjmp8); + MOV32ItoM((uptr)&mVU->divFlag, 0x820); // Zero divide flag (only when not 0/0) + x86SetJ8(cjmp8); - SSE_MOVMSKPS_XMM_to_R32(gprT1, xmmT1); // Move the sign bits of the previous calculation - - AND32ItoR(gprT1, 1); // Grab "Is Zero" bits from the previous calculation - ajmp8 = JZ8(0); // Skip if none are - //OR32ItoM(VU_VI_ADDR(REG_STATUS_FLAG, 2), 0x820); // Zero divide flag SSE_ANDPS_M128_to_XMM(xmmFs, (uptr)mVU_signbit); - SSE_ORPS_XMM_to_XMM(xmmFs, xmmMax); // EEREC_TEMP = +/-Max - bjmp8 = JMP8(0); + SSE_ORPS_XMM_to_XMM(xmmFs, xmmMax); // xmmFs = +/-Max + + djmp8 = JMP8(0); x86SetJ8(ajmp8); SSE_DIVSS_XMM_to_XMM(xmmFs, xmmFt); mVUclamp1(xmmFs, xmmFt, 8); - x86SetJ8(bjmp8); + x86SetJ8(djmp8); mVUunpack_xyzw(xmmFs, xmmFs, 0); mVUmergeRegs(xmmPQ, xmmFs, writeQ ? 4 : 8); @@ -141,6 +138,7 @@ microVUf(void) mVU_RSQRT() { SSE_MULSS_M32_to_XMM(xmmFt, (uptr)addr); \ SSE_ADDSS_XMM_to_XMM(xmmPQ, xmmFt); \ } + microVUt(void) mVU_EATAN_() { microVU* mVU = mVUx; @@ -160,9 +158,10 @@ microVUt(void) mVU_EATAN_() { SSE_ADDSS_M32_to_XMM(xmmPQ, (uptr)mVU_Pi4); SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); } + microVUf(void) mVU_EATAN() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { getReg5(xmmFs, _Fs_, _Fsf_); SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip xmmPQ to get Valid P instance @@ -175,9 +174,10 @@ microVUf(void) mVU_EATAN() { mVU_EATAN_(); } } + microVUf(void) mVU_EATANxy() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { getReg6(xmmFt, _Fs_); SSE2_PSHUFD_XMM_to_XMM(xmmFs, xmmFt, 0x01); @@ -191,9 +191,10 @@ microVUf(void) mVU_EATANxy() { mVU_EATAN_(); } } + microVUf(void) mVU_EATANxz() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { getReg6(xmmFt, _Fs_); SSE2_PSHUFD_XMM_to_XMM(xmmFs, xmmFt, 0x02); @@ -207,15 +208,17 @@ microVUf(void) mVU_EATANxz() { mVU_EATAN_(); } } + #define eexpHelper(addr) { \ SSE_MULSS_XMM_to_XMM(xmmT1, xmmFs); \ SSE_MOVAPS_XMM_to_XMM(xmmFt, xmmT1); \ SSE_MULSS_M32_to_XMM(xmmFt, (uptr)addr); \ SSE_ADDSS_XMM_to_XMM(xmmPQ, xmmFt); \ } + microVUf(void) mVU_EEXP() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { getReg5(xmmFs, _Fs_, _Fsf_); SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip xmmPQ to get Valid P instance @@ -244,6 +247,7 @@ microVUf(void) mVU_EEXP() { SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip back } } + microVUt(void) mVU_sumXYZ() { // regd.x = x ^ 2 + y ^ 2 + z ^ 2 if( cpucaps.hasStreamingSIMD4Extensions ) { @@ -259,9 +263,10 @@ microVUt(void) mVU_sumXYZ() { SSE_ADDSS_XMM_to_XMM(xmmPQ, xmmFs); // x ^ 2 + y ^ 2 + z ^ 2 } } + microVUf(void) mVU_ELENG() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { getReg6(xmmFs, _Fs_); SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip xmmPQ to get Valid P instance @@ -270,9 +275,10 @@ microVUf(void) mVU_ELENG() { SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip back } } + microVUf(void) mVU_ERCPR() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { getReg5(xmmFs, _Fs_, _Fsf_); SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip xmmPQ to get Valid P instance @@ -283,9 +289,10 @@ microVUf(void) mVU_ERCPR() { SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip back } } + microVUf(void) mVU_ERLENG() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { getReg6(xmmFs, _Fs_); SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip xmmPQ to get Valid P instance @@ -297,9 +304,10 @@ microVUf(void) mVU_ERLENG() { SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip back } } + microVUf(void) mVU_ERSADD() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { getReg6(xmmFs, _Fs_); SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip xmmPQ to get Valid P instance @@ -311,9 +319,10 @@ microVUf(void) mVU_ERSADD() { SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip back } } + microVUf(void) mVU_ERSQRT() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { getReg5(xmmFs, _Fs_, _Fsf_); SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip xmmPQ to get Valid P instance @@ -324,9 +333,10 @@ microVUf(void) mVU_ERSQRT() { SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip back } } + microVUf(void) mVU_ESADD() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { getReg6(xmmFs, _Fs_); SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip xmmPQ to get Valid P instance @@ -334,15 +344,17 @@ microVUf(void) mVU_ESADD() { SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip back } } + #define esinHelper(addr) { \ SSE_MULSS_XMM_to_XMM(xmmT1, xmmFt); \ SSE_MOVAPS_XMM_to_XMM(xmmFs, xmmT1); \ SSE_MULSS_M32_to_XMM(xmmFs, (uptr)addr); \ SSE_ADDSS_XMM_to_XMM(xmmPQ, xmmFs); \ } + microVUf(void) mVU_ESIN() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { getReg5(xmmFs, _Fs_, _Fsf_); SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip xmmPQ to get Valid P instance @@ -365,9 +377,10 @@ microVUf(void) mVU_ESIN() { SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip back } } + microVUf(void) mVU_ESQRT() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { getReg5(xmmFs, _Fs_, _Fsf_); SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip xmmPQ to get Valid P instance @@ -375,9 +388,10 @@ microVUf(void) mVU_ESQRT() { SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip back } } + microVUf(void) mVU_ESUM() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { getReg6(xmmFs, _Fs_); SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6); // Flip xmmPQ to get Valid P instance @@ -392,7 +406,7 @@ microVUf(void) mVU_ESUM() { microVUf(void) mVU_FCAND() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { mVUallocCFLAGa(gprT1, fvcInstance); AND32ItoR(gprT1, _Imm24_); @@ -401,9 +415,10 @@ microVUf(void) mVU_FCAND() { mVUallocVIb(gprT1, 1); } } + microVUf(void) mVU_FCEQ() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { mVUallocCFLAGa(gprT1, fvcInstance); XOR32ItoR(gprT1, _Imm24_); @@ -412,18 +427,20 @@ microVUf(void) mVU_FCEQ() { mVUallocVIb(gprT1, 1); } } + microVUf(void) mVU_FCGET() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { mVUallocCFLAGa(gprT1, fvcInstance); AND32ItoR(gprT1, 0xfff); mVUallocVIb(gprT1, _Ft_); } } + microVUf(void) mVU_FCOR() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { mVUallocCFLAGa(gprT1, fvcInstance); OR32ItoR(gprT1, _Imm24_); @@ -432,9 +449,10 @@ microVUf(void) mVU_FCOR() { mVUallocVIb(gprT1, 1); } } + microVUf(void) mVU_FCSET() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { MOV32ItoR(gprT1, _Imm24_); mVUallocCFLAGb(gprT1, fcInstance); @@ -443,7 +461,7 @@ microVUf(void) mVU_FCSET() { microVUf(void) mVU_FMAND() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { mVUallocMFLAGa(gprT1, fvmInstance); mVUallocVIa(gprT2, _Fs_); @@ -451,9 +469,10 @@ microVUf(void) mVU_FMAND() { mVUallocVIb(gprT1, _Ft_); } } + microVUf(void) mVU_FMEQ() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { mVUallocMFLAGa(gprT1, fvmInstance); mVUallocVIa(gprT2, _Fs_); @@ -463,9 +482,10 @@ microVUf(void) mVU_FMEQ() { mVUallocVIb(gprT1, _Ft_); } } + microVUf(void) mVU_FMOR() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { mVUallocMFLAGa(gprT1, fvmInstance); mVUallocVIa(gprT2, _Fs_); @@ -476,16 +496,17 @@ microVUf(void) mVU_FMOR() { microVUf(void) mVU_FSAND() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { mVUallocSFLAGa(gprT1, fvsInstance); AND16ItoR(gprT1, _Imm12_); mVUallocVIb(gprT1, _Ft_); } } + microVUf(void) mVU_FSEQ() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { mVUallocSFLAGa(gprT1, fvsInstance); XOR16ItoR(gprT1, _Imm12_); @@ -494,28 +515,33 @@ microVUf(void) mVU_FSEQ() { mVUallocVIb(gprT1, _Ft_); } } + microVUf(void) mVU_FSOR() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { mVUallocSFLAGa(gprT1, fvsInstance); OR16ItoR(gprT1, _Imm12_); mVUallocVIb(gprT1, _Ft_); } } + microVUf(void) mVU_FSSET() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { int flagReg; getFlagReg(flagReg, fsInstance); MOV16ItoR(gprT1, (_Imm12_ & 0xfc0)); + //if (_Imm12_ & 0xc00) { mVUdivFlag = _Imm12_ >> 9; } + //else { mVUdivFlag = 1; } + //mVUdivFlagT = 4; } } microVUf(void) mVU_IADD() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { mVUallocVIa(gprT1, _Fs_); if (_Ft_ != _Fs_) { @@ -526,27 +552,30 @@ microVUf(void) mVU_IADD() { mVUallocVIb(gprT1, _Fd_); } } + microVUf(void) mVU_IADDI() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { mVUallocVIa(gprT1, _Fs_); ADD16ItoR(gprT1, _Imm5_); mVUallocVIb(gprT1, _Ft_); } } + microVUf(void) mVU_IADDIU() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { mVUallocVIa(gprT1, _Fs_); ADD16ItoR(gprT1, _Imm12_); mVUallocVIb(gprT1, _Ft_); } } + microVUf(void) mVU_IAND() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { mVUallocVIa(gprT1, _Fs_); if (_Ft_ != _Fs_) { @@ -556,9 +585,10 @@ microVUf(void) mVU_IAND() { mVUallocVIb(gprT1, _Fd_); } } + microVUf(void) mVU_IOR() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { mVUallocVIa(gprT1, _Fs_); if (_Ft_ != _Fs_) { @@ -568,9 +598,10 @@ microVUf(void) mVU_IOR() { mVUallocVIb(gprT1, _Fd_); } } + microVUf(void) mVU_ISUB() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { if (_Ft_ != _Fs_) { mVUallocVIa(gprT1, _Fs_); @@ -584,9 +615,10 @@ microVUf(void) mVU_ISUB() { else { PXORRtoR(mmVI(_Fd_), mmVI(_Fd_)); } } } + microVUf(void) mVU_ISUBIU() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { mVUallocVIa(gprT1, _Fs_); SUB16ItoR(gprT1, _Imm12_); @@ -596,15 +628,16 @@ microVUf(void) mVU_ISUBIU() { microVUf(void) mVU_MOVE() { microVU* mVU = mVUx; - if (recPass == 0) { /*If (!_Ft_ || (_Ft_ == _Fs_)) nop();*/ } + if (!recPass) { /*If (!_Ft_ || (_Ft_ == _Fs_)) nop();*/ } else { mVUloadReg(xmmT1, (uptr)&mVU->regs->VF[_Fs_].UL[0], _X_Y_Z_W); mVUsaveReg(xmmT1, (uptr)&mVU->regs->VF[_Ft_].UL[0], _X_Y_Z_W); } } + microVUf(void) mVU_MFIR() { microVU* mVU = mVUx; - if (recPass == 0) { /*If (!_Ft_) nop();*/ } + if (!recPass) { /*If (!_Ft_) nop();*/ } else { mVUallocVIa(gprT1, _Fs_); MOVSX32R16toR(gprT1, gprT1); @@ -613,25 +646,28 @@ microVUf(void) mVU_MFIR() { mVUsaveReg(xmmT1, (uptr)&mVU->regs->VF[_Ft_].UL[0], _X_Y_Z_W); } } + microVUf(void) mVU_MFP() { microVU* mVU = mVUx; - if (recPass == 0) { /*If (!_Ft_) nop();*/ } + if (!recPass) { /*If (!_Ft_) nop();*/ } else { getPreg(xmmFt); mVUsaveReg(xmmFt, (uptr)&mVU->regs->VF[_Ft_].UL[0], _X_Y_Z_W); } } + microVUf(void) mVU_MTIR() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { MOVZX32M16toR(gprT1, (uptr)&mVU->regs->VF[_Fs_].UL[_Fsf_]); mVUallocVIb(gprT1, _Ft_); } } + microVUf(void) mVU_MR32() { microVU* mVU = mVUx; - if (recPass == 0) { /*If (!_Ft_) nop();*/ } + if (!recPass) { /*If (!_Ft_) nop();*/ } else { mVUloadReg(xmmT1, (uptr)&mVU->regs->VF[_Fs_].UL[0], (_X_Y_Z_W == 8) ? 4 : 15); if (_X_Y_Z_W != 8) { SSE2_PSHUFD_XMM_to_XMM(xmmT1, xmmT1, 0x39); } @@ -641,7 +677,7 @@ microVUf(void) mVU_MR32() { microVUf(void) mVU_ILW() { microVU* mVU = mVUx; - if (recPass == 0) { /*If (!_Ft_) nop();*/ } + if (!recPass) { /*If (!_Ft_) nop();*/ } else { if (!_Fs_) { MOVZX32M16toR( gprT1, (uptr)mVU->regs->Mem + getVUmem(_Imm11_) + offsetSS ); @@ -657,9 +693,10 @@ microVUf(void) mVU_ILW() { } } } + microVUf(void) mVU_ILWR() { microVU* mVU = mVUx; - if (recPass == 0) { /*If (!_Ft_) nop();*/ } + if (!recPass) { /*If (!_Ft_) nop();*/ } else { if (!_Fs_) { MOVZX32M16toR( gprT1, (uptr)mVU->regs->Mem + offsetSS ); @@ -674,9 +711,10 @@ microVUf(void) mVU_ILWR() { } } } + microVUf(void) mVU_ISW() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { if (!_Fs_) { int imm = getVUmem(_Imm11_); @@ -698,9 +736,10 @@ microVUf(void) mVU_ISW() { } } } + microVUf(void) mVU_ISWR() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { if (!_Fs_) { mVUallocVIa(gprT1, _Ft_); @@ -723,7 +762,7 @@ microVUf(void) mVU_ISWR() { microVUf(void) mVU_LQ() { microVU* mVU = mVUx; - if (recPass == 0) { /*If (!_Ft_) nop();*/ } + if (!recPass) { /*If (!_Ft_) nop();*/ } else { if (!_Fs_) { mVUloadReg(xmmFt, (uptr)mVU->regs->Mem + getVUmem(_Imm11_), _X_Y_Z_W); @@ -738,9 +777,10 @@ microVUf(void) mVU_LQ() { } } } + microVUf(void) mVU_LQD() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { if (!_Fs_ && _Ft_) { mVUloadReg(xmmFt, (uptr)mVU->regs->Mem, _X_Y_Z_W); @@ -758,9 +798,10 @@ microVUf(void) mVU_LQD() { } } } + microVUf(void) mVU_LQI() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { if (!_Fs_ && _Ft_) { mVUloadReg(xmmFt, (uptr)mVU->regs->Mem, _X_Y_Z_W); @@ -779,9 +820,10 @@ microVUf(void) mVU_LQI() { } } } + microVUf(void) mVU_SQ() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { if (!_Ft_) { getReg7(xmmFs, _Fs_); @@ -796,9 +838,10 @@ microVUf(void) mVU_SQ() { } } } + microVUf(void) mVU_SQD() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { if (!_Ft_) { getReg7(xmmFs, _Fs_); @@ -814,9 +857,10 @@ microVUf(void) mVU_SQD() { } } } + microVUf(void) mVU_SQI() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { if (!_Ft_) { getReg7(xmmFs, _Fs_); @@ -836,7 +880,7 @@ microVUf(void) mVU_SQI() { microVUf(void) mVU_RINIT() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { if (_Fs_ || (_Fsf_ == 3)) { getReg8(gprR, _Fs_, _Fsf_); @@ -846,6 +890,7 @@ microVUf(void) mVU_RINIT() { else MOV32ItoR(gprR, 0x3f800000); } } + microVUt(void) mVU_RGET_() { microVU* mVU = mVUx; if (_Ft_) { @@ -855,14 +900,16 @@ microVUt(void) mVU_RGET_() { if (_W) MOV32RtoM((uptr)&mVU->regs->VF[_Ft_].UL[3], gprR); } } + microVUf(void) mVU_RGET() { microVU* mVU = mVUx; - if (recPass == 0) { /*if (!_Ft_) nop();*/ } + if (!recPass) { /*if (!_Ft_) nop();*/ } else { mVU_RGET_(); } } + microVUf(void) mVU_RNEXT() { microVU* mVU = mVUx; - if (recPass == 0) { /*if (!_Ft_) nop();*/ } + if (!recPass) { /*if (!_Ft_) nop();*/ } else { // algorithm from www.project-fao.org MOV32RtoR(gprT1, gprR); @@ -881,9 +928,10 @@ microVUf(void) mVU_RNEXT() { mVU_RGET_(); } } + microVUf(void) mVU_RXOR() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { if (_Fs_ || (_Fsf_ == 3)) { getReg8(gprT1, _Fs_, _Fsf_); @@ -895,26 +943,28 @@ microVUf(void) mVU_RXOR() { microVUf(void) mVU_WAITP() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else {} } + microVUf(void) mVU_WAITQ() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else {} } microVUf(void) mVU_XTOP() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { MOVZX32M16toR( gprT1, (uptr)&mVU->regs->vifRegs->top); mVUallocVIb(gprT1, _Ft_); } } + microVUf(void) mVU_XITOP() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { MOVZX32M16toR( gprT1, (uptr)&mVU->regs->vifRegs->itop ); mVUallocVIb(gprT1, _Ft_); @@ -934,7 +984,7 @@ void __fastcall mVU_XGKICK1(u32 addr) { mVU_XGKICK_<1>(addr); } microVUf(void) mVU_XGKICK() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else { mVUallocVIa(gprT2, _Fs_); // gprT2 = ECX for __fastcall if (!vuIndex) CALLFunc((uptr)mVU_XGKICK0); diff --git a/pcsx2/x86/microVU_Misc.h b/pcsx2/x86/microVU_Misc.h index 47558d2d3c..28231ca34e 100644 --- a/pcsx2/x86/microVU_Misc.h +++ b/pcsx2/x86/microVU_Misc.h @@ -79,11 +79,11 @@ declareAllVariables #define _X_Y_Z_W (((mVU->code >> 21 ) & 0xF )) #define _xyzw_ACC ((_XYZW_SS && !_X) ? 15 : _X_Y_Z_W) -#define _bc_ (mVU->code & 0x03) -#define _bc_x ((mVU->code & 0x03) == 0) -#define _bc_y ((mVU->code & 0x03) == 1) -#define _bc_z ((mVU->code & 0x03) == 2) -#define _bc_w ((mVU->code & 0x03) == 3) +#define _bc_ (mVU->code & 0x3) +#define _bc_x ((mVU->code & 0x3) == 0) +#define _bc_y ((mVU->code & 0x3) == 1) +#define _bc_z ((mVU->code & 0x3) == 2) +#define _bc_w ((mVU->code & 0x3) == 3) #define _Fsf_ ((mVU->code >> 21) & 0x03) #define _Ftf_ ((mVU->code >> 23) & 0x03) @@ -142,9 +142,16 @@ declareAllVariables #define mVUblock mVU->prog.prog[mVU->prog.cur].block #define mVUallocInfo mVU->prog.prog[mVU->prog.cur].allocInfo #define mVUbranch mVUallocInfo.branch +#define mVUcycles mVUallocInfo.cycles +#define mVUstall mVUallocInfo.maxStall +#define mVUdivFlag mVUallocInfo.divFlag +#define mVUdivFlagT mVUallocInfo.divFlagTimer +#define mVUregs mVUallocInfo.regs +#define mVUregsTemp mVUallocInfo.regsTemp #define mVUinfo mVUallocInfo.info[mVUallocInfo.curPC / 2] #define iPC mVUallocInfo.curPC #define xPC ((iPC / 2) * 8) +#define incCycles(x) { mVUcycles += x; } #define _isNOP (1<<0) // Skip Lower Instruction #define _isBranch (1<<1) // Cur Instruction is a Branch @@ -181,9 +188,10 @@ declareAllVariables #define fsInstance ((mVUinfo >> 12) & 3) #define fpsInstance ((((mVUinfo>>12) & 3) - 1) & 0x3) #define fcInstance ((mVUinfo >> 14) & 3) -#define fvcInstance ((mVUinfo >> 14) & 3) +#define fpcInstance ((((mVUinfo>>14) & 3) - 1) & 0x3) #define fvmInstance ((mVUinfo >> 16) & 3) #define fvsInstance ((mVUinfo >> 18) & 3) +#define fvcInstance ((mVUinfo >> 20) & 3) //#define getFs (mVUinfo & (1<<13)) //#define getFt (mVUinfo & (1<<14)) @@ -192,4 +200,3 @@ declareAllVariables #define isMMX(_VIreg_) (_VIreg_ >= 1 && _VIreg_ <=9) #define mmVI(_VIreg_) (_VIreg_ - 1) -#include "microVU_Misc.inl" diff --git a/pcsx2/x86/microVU_Upper.inl b/pcsx2/x86/microVU_Upper.inl index df8e7aa406..1b02f1f37e 100644 --- a/pcsx2/x86/microVU_Upper.inl +++ b/pcsx2/x86/microVU_Upper.inl @@ -22,7 +22,9 @@ // mVUupdateFlags() - Updates status/mac flags //------------------------------------------------------------------ -#define AND_XYZW ((_XYZW_SS && modXYZW) ? (1) : (doMac ? (_X_Y_Z_W) : (flipMask[_X_Y_Z_W]))) +#define AND_XYZW ((_XYZW_SS && modXYZW) ? (1) : (doMac ? (_X_Y_Z_W) : (flipMask[_X_Y_Z_W]))) +#define ADD_XYZW ((_XYZW_SS && modXYZW) ? (_X ? 3 : (_Y ? 2 : (_Z ? 1 : 0))) : 0) +#define SHIFT_XYZW(gprReg) { if (_XYZW_SS && modXYZW && !_W) { SHL16ItoR(gprReg, ADD_XYZW); } } // Note: If modXYZW is true, then it adjusts XYZW for Single Scalar operations microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modXYZW) { @@ -31,11 +33,9 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX static u8 *pjmp, *pjmp2; static const int flipMask[16] = {0, 8, 4, 12, 2, 10, 6, 14, 1, 9, 5, 13, 3, 11, 7, 15}; - //SysPrintf ("mVUupdateFlags\n"); - if( !(doFlags) ) return; - + if (!doFlags) return; if (!doMac) { regT1 = reg; } - else SSE2_PSHUFD_XMM_to_XMM(regT1, reg, 0x1B); // Flip wzyx to xyzw + else { SSE2_PSHUFD_XMM_to_XMM(regT1, reg, 0x1B); } // Flip wzyx to xyzw if (doStatus) { getFlagReg(sReg, fsInstance); // Set sReg to valid GPR by Cur Flag Instance mVUallocSFLAGa(sReg, fpsInstance); // Get Prev Status Flag @@ -54,7 +54,7 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX AND16ItoR(mReg, AND_XYZW ); // Grab "Is Signed" bits from the previous calculation pjmp = JZ8(0); // Skip if none are - if (doMac) SHL16ItoR(mReg, 4); + if (doMac) SHL16ItoR(mReg, 4 + ADD_XYZW); if (doStatus) OR16ItoR(sReg, 0x82); // SS, S flags if (_XYZW_SS) pjmp2 = JMP8(0); // If negative and not Zero, we can skip the Zero Flag checking x86SetJ8(pjmp); @@ -63,11 +63,11 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX AND16ItoR(gprT2, AND_XYZW ); // Grab "Is Zero" bits from the previous calculation pjmp = JZ8(0); // Skip if none are - if (doMac) OR32RtoR(mReg, gprT2); - if (doStatus) OR16ItoR(sReg, 0x41); // ZS, Z flags + if (doMac) { SHIFT_XYZW(gprT2); OR32RtoR(mReg, gprT2); } + if (doStatus) { OR16ItoR(sReg, 0x41); } // ZS, Z flags x86SetJ8(pjmp); - //-------------------------Finally: Send the Flags to the Mac Flag Address------------------------------ + //-------------------------Write back flags------------------------------ if (_XYZW_SS) x86SetJ8(pjmp2); // If we skipped the Zero Flag Checking, return here @@ -81,7 +81,7 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX // FMAC1 - Normal FMAC Opcodes #define mVU_FMAC1(operation) { \ microVU* mVU = mVUx; \ - if (recPass == 0) {} \ + if (!recPass) { mVUanalyzeFMAC1(_Fd_, _Fs_, _Ft_); } \ else { \ int Fd, Fs, Ft; \ mVUallocFMAC1a(Fd, Fs, Ft); \ @@ -94,7 +94,7 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX // FMAC3 - BC(xyzw) FMAC Opcodes #define mVU_FMAC3(operation) { \ microVU* mVU = mVUx; \ - if (recPass == 0) {} \ + if (!recPass) { mVUanalyzeFMAC3(_Fd_, _Fs_, _Ft_); } \ else { \ int Fd, Fs, Ft; \ mVUallocFMAC3a(Fd, Fs, Ft); \ @@ -107,7 +107,7 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX // FMAC4 - FMAC Opcodes Storing Result to ACC #define mVU_FMAC4(operation) { \ microVU* mVU = mVUx; \ - if (recPass == 0) {} \ + if (!recPass) { mVUanalyzeFMAC1(0, _Fs_, _Ft_); } \ else { \ int ACC, Fs, Ft; \ mVUallocFMAC4a(ACC, Fs, Ft); \ @@ -120,11 +120,11 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX // FMAC5 - FMAC BC(xyzw) Opcodes Storing Result to ACC #define mVU_FMAC5(operation) { \ microVU* mVU = mVUx; \ - if (recPass == 0) {} \ + if (!recPass) { mVUanalyzeFMAC3(0, _Fs_, _Ft_); } \ else { \ int ACC, Fs, Ft; \ mVUallocFMAC5a(ACC, Fs, Ft); \ - if (_X_Y_Z_W == 8) SSE_##operation##SS_XMM_to_XMM(Fs, Ft); \ + if (_X_Y_Z_W == 8) SSE_##operation##SS_XMM_to_XMM(Fs, Ft); \ else SSE_##operation##PS_XMM_to_XMM(Fs, Ft); \ mVUupdateFlags(Fs, xmmT1, Ft, _X_Y_Z_W, 0); \ mVUallocFMAC5b(ACC, Fs); \ @@ -133,7 +133,7 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX // FMAC6 - Normal FMAC Opcodes (I Reg) #define mVU_FMAC6(operation) { \ microVU* mVU = mVUx; \ - if (recPass == 0) {} \ + if (!recPass) { mVUanalyzeFMAC1(_Fd_, _Fs_, 0); } \ else { \ int Fd, Fs, Ft; \ mVUallocFMAC6a(Fd, Fs, Ft); \ @@ -146,11 +146,11 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX // FMAC7 - FMAC Opcodes Storing Result to ACC (I Reg) #define mVU_FMAC7(operation) { \ microVU* mVU = mVUx; \ - if (recPass == 0) {} \ + if (!recPass) { mVUanalyzeFMAC1(0, _Fs_, 0); } \ else { \ int ACC, Fs, Ft; \ mVUallocFMAC7a(ACC, Fs, Ft); \ - if (_X_Y_Z_W == 8) SSE_##operation##SS_XMM_to_XMM(Fs, Ft); \ + if (_X_Y_Z_W == 8) SSE_##operation##SS_XMM_to_XMM(Fs, Ft); \ else SSE_##operation##PS_XMM_to_XMM(Fs, Ft); \ mVUupdateFlags(Fs, xmmT1, Ft, _X_Y_Z_W, 0); \ mVUallocFMAC7b(ACC, Fs); \ @@ -159,7 +159,7 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX // FMAC8 - MADD FMAC Opcode Storing Result to Fd #define mVU_FMAC8(operation) { \ microVU* mVU = mVUx; \ - if (recPass == 0) {} \ + if (!recPass) { mVUanalyzeFMAC1(_Fd_, _Fs_, _Ft_); } \ else { \ int Fd, ACC, Fs, Ft; \ mVUallocFMAC8a(Fd, ACC, Fs, Ft); \ @@ -178,7 +178,7 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX // FMAC9 - MSUB FMAC Opcode Storing Result to Fd #define mVU_FMAC9(operation) { \ microVU* mVU = mVUx; \ - if (recPass == 0) {} \ + if (!recPass) { mVUanalyzeFMAC1(_Fd_, _Fs_, _Ft_); } \ else { \ int Fd, ACC, Fs, Ft; \ mVUallocFMAC9a(Fd, ACC, Fs, Ft); \ @@ -197,7 +197,7 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX // FMAC10 - MADD FMAC BC(xyzw) Opcode Storing Result to Fd #define mVU_FMAC10(operation) { \ microVU* mVU = mVUx; \ - if (recPass == 0) {} \ + if (!recPass) { mVUanalyzeFMAC3(_Fd_, _Fs_, _Ft_); } \ else { \ int Fd, ACC, Fs, Ft; \ mVUallocFMAC10a(Fd, ACC, Fs, Ft); \ @@ -216,7 +216,7 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX // FMAC11 - MSUB FMAC BC(xyzw) Opcode Storing Result to Fd #define mVU_FMAC11(operation) { \ microVU* mVU = mVUx; \ - if (recPass == 0) {} \ + if (!recPass) { mVUanalyzeFMAC3(_Fd_, _Fs_, _Ft_); } \ else { \ int Fd, ACC, Fs, Ft; \ mVUallocFMAC11a(Fd, ACC, Fs, Ft); \ @@ -235,7 +235,7 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX // FMAC12 - MADD FMAC Opcode Storing Result to Fd (I Reg) #define mVU_FMAC12(operation) { \ microVU* mVU = mVUx; \ - if (recPass == 0) {} \ + if (!recPass) { mVUanalyzeFMAC1(_Fd_, _Fs_, 0); } \ else { \ int Fd, ACC, Fs, Ft; \ mVUallocFMAC12a(Fd, ACC, Fs, Ft); \ @@ -254,7 +254,7 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX // FMAC13 - MSUB FMAC Opcode Storing Result to Fd (I Reg) #define mVU_FMAC13(operation) { \ microVU* mVU = mVUx; \ - if (recPass == 0) {} \ + if (!recPass) { mVUanalyzeFMAC1(_Fd_, _Fs_, 0); } \ else { \ int Fd, ACC, Fs, Ft; \ mVUallocFMAC13a(Fd, ACC, Fs, Ft); \ @@ -273,7 +273,7 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX // FMAC14 - MADDA/MSUBA FMAC Opcode #define mVU_FMAC14(operation) { \ microVU* mVU = mVUx; \ - if (recPass == 0) {} \ + if (!recPass) { mVUanalyzeFMAC1(0, _Fs_, _Ft_); } \ else { \ int ACCw, ACCr, Fs, Ft; \ mVUallocFMAC14a(ACCw, ACCr, Fs, Ft); \ @@ -292,7 +292,7 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX // FMAC15 - MADDA/MSUBA BC(xyzw) FMAC Opcode #define mVU_FMAC15(operation) { \ microVU* mVU = mVUx; \ - if (recPass == 0) {} \ + if (!recPass) { mVUanalyzeFMAC3(0, _Fs_, _Ft_); } \ else { \ int ACCw, ACCr, Fs, Ft; \ mVUallocFMAC15a(ACCw, ACCr, Fs, Ft); \ @@ -311,7 +311,7 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX // FMAC16 - MADDA/MSUBA FMAC Opcode (I Reg) #define mVU_FMAC16(operation) { \ microVU* mVU = mVUx; \ - if (recPass == 0) {} \ + if (!recPass) { mVUanalyzeFMAC1(0, _Fs_, 0); } \ else { \ int ACCw, ACCr, Fs, Ft; \ mVUallocFMAC16a(ACCw, ACCr, Fs, Ft); \ @@ -330,7 +330,7 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX // FMAC18 - OPMULA FMAC Opcode #define mVU_FMAC18(operation) { \ microVU* mVU = mVUx; \ - if (recPass == 0) {} \ + if (!recPass) { mVUanalyzeFMAC1(0, _Fs_, _Ft_); } \ else { \ int ACC, Fs, Ft; \ mVUallocFMAC18a(ACC, Fs, Ft); \ @@ -342,7 +342,7 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX // FMAC19 - OPMULA FMAC Opcode #define mVU_FMAC19(operation) { \ microVU* mVU = mVUx; \ - if (recPass == 0) {} \ + if (!recPass) { mVUanalyzeFMAC1(_Fd_, _Fs_, _Ft_); } \ else { \ int Fd, ACC, Fs, Ft; \ mVUallocFMAC19a(Fd, ACC, Fs, Ft); \ @@ -355,7 +355,7 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX // FMAC22 - Normal FMAC Opcodes (Q Reg) #define mVU_FMAC22(operation) { \ microVU* mVU = mVUx; \ - if (recPass == 0) {} \ + if (!recPass) { mVUanalyzeFMAC1(_Fd_, _Fs_, 0); } \ else { \ int Fd, Fs, Ft; \ mVUallocFMAC22a(Fd, Fs, Ft); \ @@ -368,7 +368,7 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX // FMAC23 - FMAC Opcodes Storing Result to ACC (Q Reg) #define mVU_FMAC23(operation) { \ microVU* mVU = mVUx; \ - if (recPass == 0) {} \ + if (!recPass) { mVUanalyzeFMAC1(0, _Fs_, 0); } \ else { \ int ACC, Fs, Ft; \ mVUallocFMAC23a(ACC, Fs, Ft); \ @@ -381,7 +381,7 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX // FMAC24 - MADD FMAC Opcode Storing Result to Fd (Q Reg) #define mVU_FMAC24(operation) { \ microVU* mVU = mVUx; \ - if (recPass == 0) {} \ + if (!recPass) { mVUanalyzeFMAC1(_Fd_, _Fs_, 0); } \ else { \ int Fd, ACC, Fs, Ft; \ mVUallocFMAC24a(Fd, ACC, Fs, Ft); \ @@ -400,7 +400,7 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX // FMAC25 - MSUB FMAC Opcode Storing Result to Fd (Q Reg) #define mVU_FMAC25(operation) { \ microVU* mVU = mVUx; \ - if (recPass == 0) {} \ + if (!recPass) { mVUanalyzeFMAC1(_Fd_, _Fs_, 0); } \ else { \ int Fd, ACC, Fs, Ft; \ mVUallocFMAC25a(Fd, ACC, Fs, Ft); \ @@ -419,7 +419,7 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX // FMAC26 - MADDA/MSUBA FMAC Opcode (Q Reg) #define mVU_FMAC26(operation) { \ microVU* mVU = mVUx; \ - if (recPass == 0) {} \ + if (!recPass) { mVUanalyzeFMAC1(0, _Fs_, 0); } \ else { \ int ACCw, ACCr, Fs, Ft; \ mVUallocFMAC26a(ACCw, ACCr, Fs, Ft); \ @@ -442,12 +442,12 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX microVUf(void) mVU_ABS() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) { mVUanalyzeFMAC2(_Fs_, _Ft_); } else { int Fs, Ft; mVUallocFMAC2a(Fs, Ft); SSE_ANDPS_M128_to_XMM(Fs, (uptr)mVU_absclip); - mVUallocFMAC1b(Ft); + mVUallocFMAC2b(Ft); } } microVUf(void) mVU_ADD() { mVU_FMAC1(ADD); } @@ -536,12 +536,12 @@ microVUf(void) mVU_OPMULA() { mVU_FMAC18(MUL); } microVUf(void) mVU_OPMSUB() { mVU_FMAC19(SUB); } microVUf(void) mVU_NOP() { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) {} else {} } microVUq(void) mVU_FTOIx(uptr addr) { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) { mVUanalyzeFMAC2(_Fs_, _Ft_); } else { int Fs, Ft; mVUallocFMAC2a(Fs, Ft); @@ -557,7 +557,7 @@ microVUq(void) mVU_FTOIx(uptr addr) { SSE_ANDPS_XMM_to_XMM(xmmT1, xmmFt); SSE2_PADDD_XMM_to_XMM(Fs, xmmT1); - mVUallocFMAC1b(Ft); + mVUallocFMAC2b(Ft); } } microVUf(void) mVU_FTOI0() { mVU_FTOIx(0); } @@ -566,21 +566,53 @@ microVUf(void) mVU_FTOI12() { mVU_FTOIx((uptr)mVU_FTOI_12); } microVUf(void) mVU_FTOI15() { mVU_FTOIx((uptr)mVU_FTOI_15); } microVUq(void) mVU_ITOFx(uptr addr) { microVU* mVU = mVUx; - if (recPass == 0) {} + if (!recPass) { mVUanalyzeFMAC2(_Fs_, _Ft_); } else { int Fs, Ft; mVUallocFMAC2a(Fs, Ft); SSE2_CVTDQ2PS_XMM_to_XMM(Ft, Fs); if (addr) { SSE_MULPS_M128_to_XMM(Ft, addr); } - //mVUclamp2(Ft, xmmT1, 15); // Clamp infinities (not sure if this is needed) + //mVUclamp2(Ft, xmmT1, 15); // Clamp (not sure if this is needed) - mVUallocFMAC1b(Ft); + mVUallocFMAC2b(Ft); } } microVUf(void) mVU_ITOF0() { mVU_ITOFx(0); } microVUf(void) mVU_ITOF4() { mVU_ITOFx((uptr)mVU_ITOF_4); } microVUf(void) mVU_ITOF12() { mVU_ITOFx((uptr)mVU_ITOF_12); } microVUf(void) mVU_ITOF15() { mVU_ITOFx((uptr)mVU_ITOF_15); } -microVUf(void) mVU_CLIP(){} +microVUf(void) mVU_CLIP() { + microVU* mVU = mVUx; + if (!recPass) { mVUanalyzeFMAC4(_Fs_, _Ft_); } + else { + int Fs, Ft; + mVUallocFMAC17a(Fs, Ft); + mVUallocCFLAGa(gprT1, fpcInstance); + SHL32ItoR(gprT1, 6); + + SSE_ANDPS_M128_to_XMM(Ft, (uptr)mVU_absclip); + SSE_MOVAPS_XMM_to_XMM(xmmT1, Ft); + SSE_ORPS_M128_to_XMM(xmmT1, (uptr)mVU_signbit); + + SSE_CMPNLEPS_XMM_to_XMM(xmmT1, Fs); //-w, -z, -y, -x + SSE_CMPLTPS_XMM_to_XMM(Ft, Fs); //+w, +z, +y, +x + + SSE_MOVAPS_XMM_to_XMM(Fs, Ft); //Fs = +w, +z, +y, +x + SSE_UNPCKLPS_XMM_to_XMM(Ft, xmmT1); //Ft = -y,+y,-x,+x + SSE_UNPCKHPS_XMM_to_XMM(Fs, xmmT1); //Fs = -w,+w,-z,+z + + SSE_MOVMSKPS_XMM_to_R32(gprT2, Fs); // -w,+w,-z,+z + AND32ItoR(gprT2, 0x3); + SHL32ItoR(gprT2, 4); + OR32RtoR (gprT1, gprT2); + + SSE_MOVMSKPS_XMM_to_R32(gprT2, Ft); // -y,+y,-x,+x + AND32ItoR(gprT2, 0xf); + OR32RtoR (gprT1, gprT2); + AND32ItoR(gprT1, 0xffffff); + + mVUallocCFLAGb(gprT1, fcInstance); + } +} #endif //PCSX2_MICROVU diff --git a/pcsx2/xmlpatchloader.cpp b/pcsx2/xmlpatchloader.cpp index 33e28f28b2..75df7b31f7 100644 --- a/pcsx2/xmlpatchloader.cpp +++ b/pcsx2/xmlpatchloader.cpp @@ -82,14 +82,18 @@ int LoadPatch( const string& crc) bool loadOkay = doc.LoadFile(); if ( !loadOkay ) { - //SysPrintf("XML Patch Loader: Could not load file '%s'. Error='%s'.\n", pfile, doc.ErrorDesc() ); + //Console::Error("XML Patch Loader: Could not load file '%s'. Error='%s'.", pfile, doc.ErrorDesc() ); return -1; - } else SysPrintf("XML Patch Loader: '%s' Found\n", pfile); - + } + else + { + Console::WriteLn("XML Patch Loader: '%s' Found", params pfile); + } + TiXmlNode *root = doc.FirstChild("GAME"); if(!root) { - SysPrintf("XML Patch Loader: Root node is not GAME, invalid patch file.\n"); + Console::Error("XML Patch Loader: Root node is not GAME, invalid patch file."); return -1; } @@ -97,7 +101,7 @@ int LoadPatch( const string& crc) const char *title=rootelement->Attribute("title"); if(title) - SysPrintf("XML Patch Loader: Game Title: %s\n",title); + Console::WriteLn("XML Patch Loader: Game Title: %s", params title); int result=LoadGroup(root,-1); if(result) { @@ -118,7 +122,7 @@ int LoadGroup(TiXmlNode *group,int gParent) const char *gtitle=groupelement->Attribute("title"); if(gtitle) - SysPrintf("XML Patch Loader: Group Title: %s\n",gtitle); + Console::WriteLn("XML Patch Loader: Group Title: %s", params gtitle); const char *enable=groupelement->Attribute("enabled"); bool gEnabled=true; @@ -126,7 +130,7 @@ int LoadGroup(TiXmlNode *group,int gParent) { if(strcmp(enable,"false")==0) { - SysPrintf("XML Patch Loader: Group is disabled.\n"); + Console::WriteLn("XML Patch Loader: Group is disabled."); gEnabled=false; } } @@ -137,7 +141,7 @@ int LoadGroup(TiXmlNode *group,int gParent) TiXmlElement *cmelement = comment->ToElement(); const char *comment = cmelement->GetText(); if(comment) - SysPrintf("XML Patch Loader: Group Comment:\n%s\n---\n",comment); + Console::WriteLn("XML Patch Loader: Group Comment:\n%s\n---", params comment); } string t; @@ -162,8 +166,11 @@ int LoadGroup(TiXmlNode *group,int gParent) { TiXmlElement *rm=zerogs->ToElement(); const char* pid = rm->FirstAttribute()->Value(); - if( pid != NULL ) sscanf(pid, "%x", &g_ZeroGSOptions); - else SysPrintf("zerogs attribute wrong"); + + if( pid != NULL ) + sscanf(pid, "%x", &g_ZeroGSOptions); + else + Console::WriteLn("zerogs attribute wrong"); } TiXmlNode *roundmode=group->FirstChild("ROUNDMODE"); @@ -211,7 +218,7 @@ int LoadGroup(TiXmlNode *group,int gParent) } } if(( eetype == 0xffff )||( vutype == 0xffff )) { - printf("XML Patch Loader: WARNING: Invalid value in ROUNDMODE.\n"); + Console::Notice("XML Patch Loader: WARNING: Invalid value in ROUNDMODE."); } else { SetRoundMode(eetype,vutype); @@ -224,7 +231,7 @@ int LoadGroup(TiXmlNode *group,int gParent) TiXmlElement *celement = cpatch->ToElement(); if(!celement) { - SysPrintf("XML Patch Loader: ERROR: Couldn't convert node to element.\n" ); + Console::Error("XML Patch Loader: ERROR: Couldn't convert node to element." ); return -1; } @@ -238,7 +245,7 @@ int LoadGroup(TiXmlNode *group,int gParent) const char *value=celement->Attribute("value"); if(ptitle) { - SysPrintf("XML Patch Loader: Patch title: %s\n", ptitle); + Console::WriteLn("XML Patch Loader: Patch title: %s", params ptitle); } bool penabled=gEnabled; @@ -246,7 +253,7 @@ int LoadGroup(TiXmlNode *group,int gParent) { if(strcmp(penable,"false")==0) { - SysPrintf("XML Patch Loader: Patch is disabled.\n"); + Console::Notice("XML Patch Loader: Patch is disabled."); penabled=false; } } @@ -254,15 +261,15 @@ int LoadGroup(TiXmlNode *group,int gParent) if(!applymode) applymode="frame"; if(!place) place="EE"; if(!address) { - SysPrintf("XML Patch Loader: ERROR: Patch doesn't contain an address.\n"); + Console::Error("XML Patch Loader: ERROR: Patch doesn't contain an address."); return -1; } if(!value) { - SysPrintf("XML Patch Loader: ERROR: Patch doesn't contain a value.\n"); + Console::Error("XML Patch Loader: ERROR: Patch doesn't contain a value."); return -1; } if(!size) { - SysPrintf("XML Patch Loader: WARNING: Patch doesn't contain the size. Trying to deduce from the value size.\n"); + Console::Notice("XML Patch Loader: WARNING: Patch doesn't contain the size. Trying to deduce from the value size."); switch(strlen(value)) { case 8: @@ -297,7 +304,7 @@ int LoadGroup(TiXmlNode *group,int gParent) patch[patchnumber].placetopatch=1; } else { - SysPrintf("XML Patch Loader: ERROR: Invalid applymode attribute.\n"); + Console::Error("XML Patch Loader: ERROR: Invalid applymode attribute.\n"); patchnumber=0; return -1; } @@ -311,7 +318,7 @@ int LoadGroup(TiXmlNode *group,int gParent) patch[patchnumber].cpu= CPU_IOP; } else { - SysPrintf("XML Patch Loader: ERROR: Invalid place attribute.\n"); + Console::Error("XML Patch Loader: ERROR: Invalid place attribute.\n"); patchnumber=0; return -1; } @@ -333,7 +340,7 @@ int LoadGroup(TiXmlNode *group,int gParent) patch[patchnumber].type = BYTE_T; } else { - SysPrintf("XML Patch Loader: ERROR: Invalid size attribute.\n"); + Console::Error("XML Patch Loader: ERROR: Invalid size attribute.\n"); patchnumber=0; return -1; } diff --git a/plugins/CDVDnull/Src/CDVDnull_vs2008.vcproj b/plugins/CDVDnull/Src/CDVDnull_vs2008.vcproj index 4cff1f46a5..3e7a210ec4 100644 --- a/plugins/CDVDnull/Src/CDVDnull_vs2008.vcproj +++ b/plugins/CDVDnull/Src/CDVDnull_vs2008.vcproj @@ -18,7 +18,7 @@ diff --git a/plugins/FWnull/Windows/FWnull_vc2008.vcproj b/plugins/FWnull/Windows/FWnull_vc2008.vcproj index 61289dd1d7..9f1d86a290 100644 --- a/plugins/FWnull/Windows/FWnull_vc2008.vcproj +++ b/plugins/FWnull/Windows/FWnull_vc2008.vcproj @@ -19,7 +19,7 @@ @@ -113,13 +106,10 @@ GetProfileInt(_T("Settings"), _T("vsync"), FALSE); rs.m_nativeres = !!AfxGetApp()->GetProfileInt(_T("Settings"), _T("nativeres"), FALSE); rs.m_aa1 = !!AfxGetApp()->GetProfileInt(_T("Settings"), _T("aa1"), FALSE); + rs.m_blur = !!AfxGetApp()->GetProfileInt(_T("Settings"), _T("blur"), FALSE); int threads = AfxGetApp()->GetProfileInt(_T("Settings"), _T("swthreads"), 1); diff --git a/plugins/GSdx/GS.h b/plugins/GSdx/GS.h index f7b1276795..388af54658 100644 --- a/plugins/GSdx/GS.h +++ b/plugins/GSdx/GS.h @@ -36,30 +36,6 @@ // sps2registers.h // -enum GS_REG -{ - GS_PMODE = 0x12000000, - GS_SMODE1 = 0x12000010, - GS_SMODE2 = 0x12000020, - GS_SRFSH = 0x12000030, - GS_SYNCH1 = 0x12000040, - GS_SYNCH2 = 0x12000050, - GS_SYNCV = 0x12000060, - GS_DISPFB1 = 0x12000070, - GS_DISPLAY1 = 0x12000080, - GS_DISPFB2 = 0x12000090, - GS_DISPLAY2 = 0x120000a0, - GS_EXTBUF = 0x120000b0, - GS_EXTDATA = 0x120000c0, - GS_EXTWRITE = 0x120000d0, - GS_BGCOLOR = 0x120000e0, - GS_UNKNOWN = 0x12000400, - GS_CSR = 0x12001000, - GS_IMR = 0x12001010, - GS_BUSDIR = 0x12001040, - GS_SIGLBLID = 0x12001080 -}; - enum GS_PRIM { GS_POINTLIST = 0, @@ -340,7 +316,7 @@ REG64_(GSReg, DISPFB) // (-1/2) UINT32 DBY:11; UINT32 _PAD2:10; REG_END2 - UINT32 Block() {return FBP<<5;} + UINT32 Block() const {return FBP << 5;} REG_END2 REG64_(GSReg, DISPLAY) // (-1/2) @@ -461,6 +437,22 @@ REG64_(GSReg, SMODE2) UINT32 _PAD3:32; REG_END +REG64_(GSReg, SRFSH) + // TODO +REG_END + +REG64_(GSReg, SYNCH1) + // TODO +REG_END + +REG64_(GSReg, SYNCH2) + // TODO +REG_END + +REG64_(GSReg, SYNCV) + // TODO +REG_END + REG64_SET(GSReg) GSRegBGCOLOR BGCOLOR; GSRegBUSDIR BUSDIR; @@ -1087,6 +1079,65 @@ __declspec(align(16)) struct GIFPath } }; +struct GSPrivRegSet +{ + union + { + struct + { + GSRegPMODE PMODE; + UINT64 _pad1; + GSRegSMODE1 SMODE1; + UINT64 _pad2; + GSRegSMODE2 SMODE2; + UINT64 _pad3; + GSRegSRFSH SRFSH; + UINT64 _pad4; + GSRegSYNCH1 SYNCH1; + UINT64 _pad5; + GSRegSYNCH2 SYNCH2; + UINT64 _pad6; + GSRegSYNCV SYNCV; + UINT64 _pad7; + struct { + GSRegDISPFB DISPFB; + UINT64 _pad1; + GSRegDISPLAY DISPLAY; + UINT64 _pad2; + } DISP[2]; + GSRegEXTBUF EXTBUF; + UINT64 _pad8; + GSRegEXTDATA EXTDATA; + UINT64 _pad9; + GSRegEXTWRITE EXTWRITE; + UINT64 _pad10; + GSRegBGCOLOR BGCOLOR; + UINT64 _pad11; + }; + + BYTE _pad12[0x1000]; + }; + + union + { + struct + { + GSRegCSR CSR; + UINT64 _pad13; + GSRegIMR IMR; + UINT64 _pad14; + UINT64 _unk1[4]; + GSRegBUSDIR BUSDIR; + UINT64 _pad15; + UINT64 _unk2[6]; + GSRegSIGLBLID SIGLBLID; + UINT64 _pad16; + }; + + BYTE _pad17[0x1000]; + }; +}; + #pragma pack(pop) enum {KEYPRESS=1, KEYRELEASE=2}; diff --git a/plugins/GSdx/GSDump.cpp b/plugins/GSdx/GSDump.cpp index 5d14920cdc..70421b35db 100644 --- a/plugins/GSdx/GSDump.cpp +++ b/plugins/GSdx/GSDump.cpp @@ -23,66 +23,140 @@ #include "GSDump.h" GSDump::GSDump() - : m_fp(NULL) + : m_gs(NULL) + , m_obj(NULL) + , m_frames(0) + , m_objects(0) + , m_vertices(0) { } GSDump::~GSDump() { - if(m_fp) + Close(); +} + +void GSDump::Open(const CString& fn, DWORD crc, const GSFreezeData& fd, const GSPrivRegSet* regs) +{ + m_gs = _tfopen(fn + _T(".gs"), _T("wb")); + m_obj = _tfopen(fn + _T(".obj"), _T("wt")); + + m_frames = 0; + m_objects = 0; + m_vertices = 0; + + if(m_gs) { - fclose(m_fp); + fwrite(&crc, 4, 1, m_gs); + fwrite(&fd.size, 4, 1, m_gs); + fwrite(fd.data, fd.size, 1, m_gs); + fwrite(regs, sizeof(*regs), 1, m_gs); } } -void GSDump::Open(LPCTSTR fn, DWORD crc, const GSFreezeData& fd, const void* regs) +void GSDump::Close() { - m_fp = _tfopen(fn, _T("wb")); - m_vsyncs = 0; - - if(m_fp) - { - fwrite(&crc, 4, 1, m_fp); - fwrite(&fd.size, 4, 1, m_fp); - fwrite(fd.data, fd.size, 1, m_fp); - fwrite(regs, 0x2000, 1, m_fp); - } + if(m_gs) {fclose(m_gs); m_gs = NULL;} + if(m_obj) {fclose(m_obj); m_obj = NULL;} } void GSDump::Transfer(int index, BYTE* mem, size_t size) { - if(m_fp && size > 0) + if(m_gs && size > 0) { - fputc(0, m_fp); - fputc(index, m_fp); - fwrite(&size, 4, 1, m_fp); - fwrite(mem, size, 1, m_fp); + fputc(0, m_gs); + fputc(index, m_gs); + fwrite(&size, 4, 1, m_gs); + fwrite(mem, size, 1, m_gs); } } void GSDump::ReadFIFO(UINT32 size) { - if(m_fp && size > 0) + if(m_gs && size > 0) { - fputc(2, m_fp); - fwrite(&size, 4, 1, m_fp); + fputc(2, m_gs); + fwrite(&size, 4, 1, m_gs); } } -void GSDump::VSync(int field, bool last, const void* regs) +void GSDump::VSync(int field, bool last, const GSPrivRegSet* regs) { - if(m_fp) + if(m_gs) { - fputc(3, m_fp); - fwrite(regs, 0x2000, 1, m_fp); + fputc(3, m_gs); + fwrite(regs, sizeof(*regs), 1, m_gs); - fputc(1, m_fp); - fputc(field, m_fp); + fputc(1, m_gs); + fputc(field, m_gs); - if((++m_vsyncs & 1) == 0 && last) + if((++m_frames & 1) == 0 && last) { - fclose(m_fp); - m_fp = NULL; + Close(); + } + } +} + +void GSDump::Object(GSVertexSW* vertices, int count, GS_PRIM_CLASS primclass) +{ + if(m_obj) + { + switch(primclass) + { + case GS_POINT_CLASS: + + // TODO + + break; + + case GS_LINE_CLASS: + + // TODO + + break; + + case GS_TRIANGLE_CLASS: + + for(int i = 0; i < count; i++) + { + float x = vertices[i].p.x; + float y = vertices[i].p.y; + float z = vertices[i].p.z; + + _ftprintf(m_obj, _T("v %f %f %f\n"), x, y, z); + } + + for(int i = 0; i < count; i++) + { + _ftprintf(m_obj, _T("vt %f %f %f\n"), vertices[i].t.x, vertices[i].t.y, vertices[i].t.z); + } + + for(int i = 0; i < count; i++) + { + _ftprintf(m_obj, _T("vn %f %f %f\n"), 0.0f, 0.0f, 0.0f); + } + + _ftprintf(m_obj, _T("g f%d_o%d_p%d_v%d\n"), m_frames, m_objects, primclass, count); + + for(int i = 0; i < count; i += 3) + { + int a = m_vertices + i + 1; + int b = m_vertices + i + 2; + int c = m_vertices + i + 3; + + _ftprintf(m_obj, _T("f %d/%d/%d %d/%d/%d %d/%d/%d \n"), a, a, a, b, b, b, c, c, c); + } + + m_vertices += count; + m_objects++; + + break; + + case GS_SPRITE_CLASS: + + // TODO + + break; } } } diff --git a/plugins/GSdx/GSDump.h b/plugins/GSdx/GSDump.h index fe96423ffe..bfa2d0682b 100644 --- a/plugins/GSdx/GSDump.h +++ b/plugins/GSdx/GSDump.h @@ -22,6 +22,7 @@ #pragma once #include "GS.h" +#include "GSVertexSW.h" /* @@ -44,16 +45,21 @@ Regs data (id == 3) class GSDump { - FILE* m_fp; - int m_vsyncs; + FILE* m_gs; + FILE* m_obj; + int m_frames; + int m_objects; + int m_vertices; public: GSDump(); virtual ~GSDump(); - void Open(LPCTSTR fn, DWORD crc, const GSFreezeData& fd, const void* regs); + void Open(const CString& fn, DWORD crc, const GSFreezeData& fd, const GSPrivRegSet* regs); + void Close(); void ReadFIFO(UINT32 size); void Transfer(int index, BYTE* mem, size_t size); - void VSync(int field, bool last, const void* regs); - operator bool() {return m_fp != NULL;} + void VSync(int field, bool last, const GSPrivRegSet* regs); + void Object(GSVertexSW* vertices, int count, GS_PRIM_CLASS primclass); + operator bool() {return m_gs != NULL;} }; diff --git a/plugins/GSdx/GSRasterizer.cpp b/plugins/GSdx/GSRasterizer.cpp index 6b0b0a61ee..053e789084 100644 --- a/plugins/GSdx/GSRasterizer.cpp +++ b/plugins/GSdx/GSRasterizer.cpp @@ -478,8 +478,6 @@ void GSRasterizer::DrawTriangleSection(int top, int bottom, GSVertexSW& l, const GSVertexSW scan = l + dscan * (lrmax - l.p).xxxx(); - ASSERT(m_dsf.ssl); - m_dsf.ssl(right, left, top, scan); } } @@ -521,8 +519,6 @@ void GSRasterizer::DrawTriangleSection(int top, int bottom, GSVertexSW& l, const GSVertexSW scan = l + dscan * (lrmax - l.p).xxxx(); - ASSERT(m_dsf.ssl); - m_dsf.ssl(right, left, top, scan); } } diff --git a/plugins/GSdx/GSRenderer.h b/plugins/GSdx/GSRenderer.h index aa53f39b1b..f7a5b05df0 100644 --- a/plugins/GSdx/GSRenderer.h +++ b/plugins/GSdx/GSRenderer.h @@ -35,13 +35,13 @@ struct GSRendererSettings bool m_vsync; bool m_nativeres; bool m_aa1; + bool m_blur; }; class GSRendererBase : public GSState, protected GSRendererSettings { protected: bool m_osd; - int m_field; void ProcessWindowMessages() { @@ -91,6 +91,12 @@ protected: m_aa1 = !m_aa1; return true; } + + if(msg.wParam == VK_END) + { + m_blur = !m_blur; + return true; + } } return false; @@ -103,7 +109,6 @@ public: GSRendererBase(BYTE* base, bool mt, void (*irq)(), int nloophack, const GSRendererSettings& rs) : GSState(base, mt, irq, nloophack) , m_osd(true) - , m_field(0) { m_interlace = rs.m_interlace; m_aspectratio = rs.m_aspectratio; @@ -111,6 +116,7 @@ public: m_vsync = rs.m_vsync; m_nativeres = rs.m_nativeres; m_aa1 = rs.m_aa1; + m_blur = rs.m_blur; }; virtual bool Create(LPCTSTR title) = 0; @@ -126,102 +132,197 @@ protected: virtual void ResetDevice() {} virtual bool GetOutput(int i, Texture& t) = 0; - bool Merge() + bool Merge(int field) { + bool en[2]; + + CRect fr[2]; + CRect dr[2]; + int baseline = INT_MAX; for(int i = 0; i < 2; i++) { - if(IsEnabled(i)) + en[i] = IsEnabled(i); + + if(en[i]) { - baseline = min(GetDisplayPos(i).y, baseline); + fr[i] = GetFrameRect(i); + dr[i] = GetDisplayRect(i); + + baseline = min(dr[i].top, baseline); + + // printf("[%d]: %d %d %d %d, %d %d %d %d\n", i, fr[i], dr[i]); + } + } + + if(!en[0] && !en[1]) + { + return false; + } + + // try to avoid fullscreen blur, could be nice on tv but on a monitor it's like double vision, hurts my eyes (persona 4, guitar hero) + // + // NOTE: probably the technique explained in graphtip.pdf (Antialiasing by Supersampling / 4. Reading Odd/Even Scan Lines Separately with the PCRTC then Blending) + + bool samesrc = + en[0] && en[1] && + m_regs->DISP[0].DISPFB.FBP == m_regs->DISP[1].DISPFB.FBP && + m_regs->DISP[0].DISPFB.FBW == m_regs->DISP[1].DISPFB.FBW && + m_regs->DISP[0].DISPFB.PSM == m_regs->DISP[1].DISPFB.PSM; + + bool blurdetected = false; + + if(samesrc && m_regs->PMODE.SLBG == 0 && m_regs->PMODE.MMOD == 1 && m_regs->PMODE.ALP == 0x80) + { + if(fr[0] == fr[1] + CRect(0, 1, 0, 0) && dr[0] == dr[1] + CRect(0, 0, 0, 1) + || fr[1] == fr[0] + CRect(0, 1, 0, 0) && dr[1] == dr[0] + CRect(0, 0, 0, 1)) + { + // persona 4: + // + // fr[0] = 0 0 640 448 + // fr[1] = 0 1 640 448 + // dr[0] = 159 50 779 498 + // dr[1] = 159 50 779 497 + // + // second image shifted up by 1 pixel and blended over itself + // + // god of war: + // + // fr[0] = 0 1 512 448 + // fr[1] = 0 0 512 448 + // dr[0] = 127 50 639 497 + // dr[1] = 127 50 639 498 + // + // same just the first image shifted + + int top = min(fr[0].top, fr[1].top); + int bottom = max(dr[0].bottom, dr[1].bottom); + + fr[0].top = top; + fr[1].top = top; + dr[0].bottom = bottom; + dr[1].bottom = bottom; + + blurdetected = true; + } + else if(dr[0] == dr[1] && (fr[0] == fr[1] + CPoint(0, 1) || fr[1] == fr[0] + CPoint(0, 1))) + { + // dq5: + // + // fr[0] = 0 1 512 445 + // fr[1] = 0 0 512 444 + // dr[0] = 127 50 639 494 + // dr[1] = 127 50 639 494 + + int top = min(fr[0].top, fr[1].top); + int bottom = min(fr[0].bottom, fr[1].bottom); + + fr[0].top = fr[1].top = top; + fr[0].bottom = fr[1].bottom = bottom; + + blurdetected = true; } } CSize fs(0, 0); CSize ds(0, 0); - Texture st[2]; - GSVector4 sr[2]; - GSVector4 dr[2]; + Texture tex[2]; + + if(samesrc && fr[0].bottom == fr[1].bottom) + { + GetOutput(0, tex[0]); + + tex[1] = tex[0]; // saves one texture fetch + } + else + { + if(en[0]) GetOutput(0, tex[0]); + if(en[1]) GetOutput(1, tex[1]); + } + + GSVector4 src[2]; + GSVector4 dst[2]; for(int i = 0; i < 2; i++) { - if(IsEnabled(i) && GetOutput(i, st[i])) + if(!en[i] || !tex[i]) continue; + + CRect r = fr[i]; + + // overscan hack + + if(dr[i].Height() > 512) // hmm { - CRect r = GetFrameRect(i); - - // overscan hack - - if(GetDisplaySize(i).cy > 512) // hmm - { - int y = GetDeviceSize(i).cy; - if(SMODE2->INT && SMODE2->FFMD) y /= 2; - r.bottom = r.top + y; - } - - // - - sr[i].x = st[i].m_scale.x * r.left / st[i].GetWidth(); - sr[i].y = st[i].m_scale.y * r.top / st[i].GetHeight(); - sr[i].z = st[i].m_scale.x * r.right / st[i].GetWidth(); - sr[i].w = st[i].m_scale.y * r.bottom / st[i].GetHeight(); - - GSVector2 o; - - o.x = 0; - o.y = 0; - - CPoint p = GetDisplayPos(i); - - if(p.y - baseline >= 4) // 2? - { - o.y = st[i].m_scale.y * (p.y - baseline); - } - - if(SMODE2->INT && SMODE2->FFMD) o.y /= 2; - - dr[i].x = o.x; - dr[i].y = o.y; - dr[i].z = o.x + st[i].m_scale.x * r.Width(); - dr[i].w = o.y + st[i].m_scale.y * r.Height(); - -#ifdef _M_AMD64 -// schrödinger's bug, fs will be trashed unless we access these values -CString str; -str.Format(_T("%d %f %f %f %f "), i, o.x, o.y, dr[i].z, dr[i].w); -//::MessageBox(NULL, str, _T(""), MB_OK); -#endif - fs.cx = max(fs.cx, (int)(dr[i].z + 0.5f)); - fs.cy = max(fs.cy, (int)(dr[i].w + 0.5f)); + int y = GetDeviceSize(i).cy; + if(m_regs->SMODE2.INT && m_regs->SMODE2.FFMD) y /= 2; + r.bottom = r.top + y; } + + // + + if(m_blur && blurdetected && i == 1) + { + src[i].x = tex[i].m_scale.x * r.left / tex[i].GetWidth(); + src[i].y = (tex[i].m_scale.y * r.top + 1) / tex[i].GetHeight(); + src[i].z = tex[i].m_scale.x * r.right / tex[i].GetWidth(); + src[i].w = (tex[i].m_scale.y * r.bottom + 1) / tex[i].GetHeight(); + } + else + { + src[i].x = tex[i].m_scale.x * r.left / tex[i].GetWidth(); + src[i].y = tex[i].m_scale.y * r.top / tex[i].GetHeight(); + src[i].z = tex[i].m_scale.x * r.right / tex[i].GetWidth(); + src[i].w = tex[i].m_scale.y * r.bottom / tex[i].GetHeight(); + } + + GSVector2 o; + + o.x = 0; + o.y = 0; + + if(dr[i].top - baseline >= 4) // 2? + { + o.y = tex[i].m_scale.y * (dr[i].top - baseline); + } + + if(m_regs->SMODE2.INT && m_regs->SMODE2.FFMD) o.y /= 2; + + dst[i].x = o.x; + dst[i].y = o.y; + dst[i].z = o.x + tex[i].m_scale.x * r.Width(); + dst[i].w = o.y + tex[i].m_scale.y * r.Height(); + + fs.cx = max(fs.cx, (int)(dst[i].z + 0.5f)); + fs.cy = max(fs.cy, (int)(dst[i].w + 0.5f)); } ds.cx = fs.cx; ds.cy = fs.cy; - if(SMODE2->INT && SMODE2->FFMD) ds.cy *= 2; + if(m_regs->SMODE2.INT && m_regs->SMODE2.FFMD) ds.cy *= 2; - bool slbg = PMODE->SLBG; - bool mmod = PMODE->MMOD; + bool slbg = m_regs->PMODE.SLBG; + bool mmod = m_regs->PMODE.MMOD; - if(st[0] || st[1]) + if(tex[0] || tex[1]) { GSVector4 c; - c.r = (float)BGCOLOR->R / 255; - c.g = (float)BGCOLOR->G / 255; - c.b = (float)BGCOLOR->B / 255; - c.a = (float)PMODE->ALP / 255; + c.r = (float)m_regs->BGCOLOR.R / 255; + c.g = (float)m_regs->BGCOLOR.G / 255; + c.b = (float)m_regs->BGCOLOR.B / 255; + c.a = (float)m_regs->PMODE.ALP / 255; - m_dev.Merge(st, sr, dr, fs, slbg, mmod, c); + m_dev.Merge(tex, src, dst, fs, slbg, mmod, c); - if(SMODE2->INT && m_interlace > 0) + if(m_regs->SMODE2.INT && m_interlace > 0) { - int field = 1 - ((m_interlace - 1) & 1); + int field2 = 1 - ((m_interlace - 1) & 1); int mode = (m_interlace - 1) >> 1; - if(!m_dev.Interlace(ds, m_field ^ field, mode, st[1].m_scale.y)) // st[1].m_scale.y + if(!m_dev.Interlace(ds, field ^ field2, mode, tex[1].m_scale.y)) { return false; } @@ -231,6 +332,37 @@ str.Format(_T("%d %f %f %f %f "), i, o.x, o.y, dr[i].z, dr[i].w); return true; } + void DoSnapshot(int field) + { + if(!m_snapshot.IsEmpty()) + { + if(!m_dump && (::GetAsyncKeyState(VK_SHIFT) & 0x8000)) + { + GSFreezeData fd; + fd.size = 0; + fd.data = NULL; + Freeze(&fd, true); + fd.data = new BYTE[fd.size]; + Freeze(&fd, false); + + m_dump.Open(m_snapshot, m_crc, fd, m_regs); + + delete [] fd.data; + } + + m_dev.SaveCurrent(m_snapshot + _T(".bmp")); + + m_snapshot.Empty(); + } + else + { + if(m_dump) + { + m_dump.VSync(field, !(::GetAsyncKeyState(VK_CONTROL) & 0x8000), m_regs); + } + } + } + void DoCapture() { if(!m_capture.IsCapturing()) @@ -293,6 +425,7 @@ public: bool s_save; bool s_savez; + CString m_snapshot; GSCapture m_capture; public: @@ -325,24 +458,17 @@ public: void VSync(int field) { - // printf("VSYNC\n"); - GSPerfMonAutoTimer pmat(m_perfmon); - m_field = !!field; - Flush(); m_perfmon.Put(GSPerfMon::Frame); ProcessWindowMessages(); - if(m_dump) - { - m_dump.VSync(m_field, !(::GetAsyncKeyState(VK_CONTROL) & 0x8000), PMODE); - } + field = field ? 1 : 0; - if(!Merge()) return; + if(!Merge(field)) return; // osd @@ -360,7 +486,7 @@ public: s_stats.Format( _T("%I64d | %d x %d | %.2f fps (%d%%) | %s - %s | %s | %d/%d/%d | %d%% CPU | %.2f | %.2f"), m_perfmon.GetFrame(), GetDisplaySize().cx, GetDisplaySize().cy, fps, (int)(100.0 * fps / GetFPS()), - SMODE2->INT ? (CString(_T("Interlaced ")) + (SMODE2->FFMD ? _T("(frame)") : _T("(field)"))) : _T("Progressive"), + m_regs->SMODE2.INT ? (CString(_T("Interlaced ")) + (m_regs->SMODE2.FFMD ? _T("(frame)") : _T("(field)"))) : _T("Progressive"), GSSettingsDlg::g_interlace[m_interlace].name, GSSettingsDlg::g_aspectratio[m_aspectratio].name, (int)m_perfmon.Get(GSPerfMon::Quad), @@ -419,30 +545,21 @@ public: m_dev.Present(r); + // + + DoSnapshot(field); + DoCapture(); } bool MakeSnapshot(LPCTSTR path) { - CString fn; - - fn.Format(_T("%s_%s"), path, CTime::GetCurrentTime().Format(_T("%Y%m%d%H%M%S"))); - - if((::GetAsyncKeyState(VK_SHIFT) & 0x8000) && !m_dump) + if(m_snapshot.IsEmpty()) { - GSFreezeData fd; - fd.size = 0; - fd.data = NULL; - Freeze(&fd, true); - fd.data = new BYTE[fd.size]; - Freeze(&fd, false); - - m_dump.Open(fn + _T(".gs"), m_crc, fd, PMODE); - - delete [] fd.data; + m_snapshot.Format(_T("%s_%s"), path, CTime::GetCurrentTime().Format(_T("%Y%m%d%H%M%S"))); } - return m_dev.SaveCurrent(fn + _T(".bmp")); + return true; } virtual void MinMaxUV(int w, int h, CRect& r) {r = CRect(0, 0, w, h);} diff --git a/plugins/GSdx/GSRendererHW.h b/plugins/GSdx/GSRendererHW.h index 3fc3f346e7..2ad320f9e8 100644 --- a/plugins/GSdx/GSRendererHW.h +++ b/plugins/GSdx/GSRendererHW.h @@ -245,11 +245,13 @@ protected: bool GetOutput(int i, Texture& t) { + const GSRegDISPFB& DISPFB = m_regs->DISP[i].DISPFB; + GIFRegTEX0 TEX0; - TEX0.TBP0 = DISPFB[i]->Block(); - TEX0.TBW = DISPFB[i]->FBW; - TEX0.PSM = DISPFB[i]->PSM; + TEX0.TBP0 = DISPFB.Block(); + TEX0.TBW = DISPFB.FBW; + TEX0.PSM = DISPFB.PSM; TRACE(_T("[%d] GetOutput %d %05x (%d)\n"), (int)m_perfmon.GetFrame(), i, (int)TEX0.TBP0, (int)TEX0.PSM); diff --git a/plugins/GSdx/GSRendererSW.h b/plugins/GSdx/GSRendererSW.h index 733b61cf86..0d47499b06 100644 --- a/plugins/GSdx/GSRendererSW.h +++ b/plugins/GSdx/GSRendererSW.h @@ -71,7 +71,15 @@ protected: bool GetOutput(int i, Texture& t) { - CRect r(0, 0, DISPFB[i]->FBW * 64, GetFrameRect(i).bottom); + const GSRegDISPFB& DISPFB = m_regs->DISP[i].DISPFB; + + GIFRegTEX0 TEX0; + + TEX0.TBP0 = DISPFB.Block(); + TEX0.TBW = DISPFB.FBW; + TEX0.PSM = DISPFB.PSM; + + CRect r(0, 0, TEX0.TBW * 64, GetFrameRect(i).bottom); // TODO: round up bottom @@ -85,12 +93,6 @@ protected: return false; } - GIFRegTEX0 TEX0; - - TEX0.TBP0 = DISPFB[i]->Block(); - TEX0.TBW = DISPFB[i]->FBW; - TEX0.PSM = DISPFB[i]->PSM; - GIFRegCLAMP CLAMP; CLAMP.WMS = CLAMP.WMT = 1; @@ -500,6 +502,11 @@ protected: m_vtrace.Update(m_vertices, m_count, primclass, PRIM->IIP, PRIM->TME, m_context->TEX0.TFX); + if(m_dump) + { + m_dump.Object(m_vertices, m_count, primclass); + } + GSScanlineParam p; GetScanlineParam(p, primclass); @@ -771,6 +778,8 @@ public: if(GSVertexSW* v = DrawingKick(skip, count)) { +if(!m_dump) +{ GSVector4 pmin, pmax; switch(prim) @@ -822,7 +831,7 @@ public: { return; } - +} switch(prim) { case GS_POINTLIST: diff --git a/plugins/GSdx/GSSettingsDlg.cpp b/plugins/GSdx/GSSettingsDlg.cpp index 4d06bde333..1e1ed74446 100644 --- a/plugins/GSdx/GSSettingsDlg.cpp +++ b/plugins/GSdx/GSSettingsDlg.cpp @@ -76,6 +76,7 @@ GSSettingsDlg::GSSettingsDlg(CWnd* pParent /*=NULL*/) , m_logz(FALSE) , m_fba(TRUE) , m_aa1(FALSE) + , m_blur(FALSE) { } @@ -117,6 +118,7 @@ void GSSettingsDlg::DoDataExchange(CDataExchange* pDX) DDX_Check(pDX, IDC_CHECK5, m_logz); DDX_Check(pDX, IDC_CHECK7, m_fba); DDX_Check(pDX, IDC_CHECK8, m_aa1); + DDX_Check(pDX, IDC_CHECK9, m_blur); } BEGIN_MESSAGE_MAP(GSSettingsDlg, CDialog) @@ -223,6 +225,7 @@ BOOL GSSettingsDlg::OnInitDialog() m_logz = !!pApp->GetProfileInt(_T("Settings"), _T("logz"), FALSE); m_fba = !!pApp->GetProfileInt(_T("Settings"), _T("fba"), TRUE); m_aa1 = !!pApp->GetProfileInt(_T("Settings"), _T("aa1"), FALSE); + m_blur = !!pApp->GetProfileInt(_T("Settings"), _T("blur"), FALSE); m_resx.SetRange(512, 4096); m_resy.SetRange(512, 4096); @@ -287,6 +290,7 @@ void GSSettingsDlg::OnOK() pApp->WriteProfileInt(_T("Settings"), _T("logz"), m_logz); pApp->WriteProfileInt(_T("Settings"), _T("fba"), m_fba); pApp->WriteProfileInt(_T("Settings"), _T("aa1"), m_aa1); + pApp->WriteProfileInt(_T("Settings"), _T("blur"), m_blur); pApp->WriteProfileInt(_T("Settings"), _T("resx"), m_resx.GetPos()); pApp->WriteProfileInt(_T("Settings"), _T("resy"), m_resy.GetPos()); diff --git a/plugins/GSdx/GSSettingsDlg.h b/plugins/GSdx/GSSettingsDlg.h index 845c53f898..b21137cd66 100644 --- a/plugins/GSdx/GSSettingsDlg.h +++ b/plugins/GSdx/GSSettingsDlg.h @@ -61,6 +61,7 @@ public: BOOL m_logz; BOOL m_fba; BOOL m_aa1; + BOOL m_blur; protected: virtual LRESULT DefWindowProc(UINT message, WPARAM wParam, LPARAM lParam); diff --git a/plugins/GSdx/GSState.cpp b/plugins/GSdx/GSState.cpp index e3f98cb122..6e546a9bcc 100644 --- a/plugins/GSdx/GSState.cpp +++ b/plugins/GSdx/GSState.cpp @@ -87,27 +87,9 @@ GSState::GSState(BYTE* base, bool mt, void (*irq)(), int nloophack) ASSERT(base); - PMODE = (GSRegPMODE*)(base + GS_PMODE); - SMODE1 = (GSRegSMODE1*)(base + GS_SMODE1); - SMODE2 = (GSRegSMODE2*)(base + GS_SMODE2); - // SRFSH = (GSRegPMODE*)(base + GS_SRFSH); - // SYNCH1 = (GSRegPMODE*)(base + GS_SYNCH1); - // SYNCH2 = (GSRegPMODE*)(base + GS_SYNCH2); - // SYNCV = (GSRegPMODE*)(base + GS_SYNCV); - DISPFB[0] = (GSRegDISPFB*)(base + GS_DISPFB1); - DISPFB[1] = (GSRegDISPFB*)(base + GS_DISPFB2); - DISPLAY[0] = (GSRegDISPLAY*)(base + GS_DISPLAY1); - DISPLAY[1] = (GSRegDISPLAY*)(base + GS_DISPLAY2); - EXTBUF = (GSRegEXTBUF*)(base + GS_EXTBUF); - EXTDATA = (GSRegEXTDATA*)(base + GS_EXTDATA); - EXTWRITE = (GSRegEXTWRITE*)(base + GS_EXTWRITE); - BGCOLOR = (GSRegBGCOLOR*)(base + GS_BGCOLOR); - CSR = (GSRegCSR*)(base + GS_CSR); - IMR = (GSRegIMR*)(base + GS_IMR); - BUSDIR = (GSRegBUSDIR*)(base + GS_BUSDIR); - SIGLBLID = (GSRegSIGLBLID*)(base + GS_SIGLBLID); + m_regs = (GSPrivRegSet*)(base + 0x12000000); - memset(PMODE, 0, 0x1100); + memset(m_regs, 0, sizeof(GSPrivRegSet)); PRIM = &m_env.PRIM; // CSR->rREV = 0x20; @@ -234,8 +216,8 @@ CPoint GSState::GetDisplayPos(int i) CPoint p; - p.x = DISPLAY[i]->DX / (DISPLAY[i]->MAGH + 1); - p.y = DISPLAY[i]->DY / (DISPLAY[i]->MAGV + 1); + p.x = m_regs->DISP[i].DISPLAY.DX / (m_regs->DISP[i].DISPLAY.MAGH + 1); + p.y = m_regs->DISP[i].DISPLAY.DY / (m_regs->DISP[i].DISPLAY.MAGV + 1); return p; } @@ -246,8 +228,8 @@ CSize GSState::GetDisplaySize(int i) CSize s; - s.cx = (DISPLAY[i]->DW + 1) / (DISPLAY[i]->MAGH + 1); - s.cy = (DISPLAY[i]->DH + 1) / (DISPLAY[i]->MAGV + 1); + s.cx = (m_regs->DISP[i].DISPLAY.DW + 1) / (m_regs->DISP[i].DISPLAY.MAGH + 1); + s.cy = (m_regs->DISP[i].DISPLAY.DH + 1) / (m_regs->DISP[i].DISPLAY.MAGV + 1); return s; } @@ -276,14 +258,14 @@ CPoint GSState::GetFramePos(int i) { ASSERT(i >= 0 && i < 2); - return CPoint(DISPFB[i]->DBX, DISPFB[i]->DBY); + return CPoint(m_regs->DISP[i].DISPFB.DBX, m_regs->DISP[i].DISPFB.DBY); } CSize GSState::GetFrameSize(int i) { CSize s = GetDisplaySize(i); - if(SMODE2->INT && SMODE2->FFMD && s.cy > 1) s.cy >>= 1; + if(m_regs->SMODE2.INT && m_regs->SMODE2.FFMD && s.cy > 1) s.cy >>= 1; return s; } @@ -316,13 +298,13 @@ CSize GSState::GetDeviceSize(int i) CSize s = GetDisplaySize(i); - if(s.cy == 2*416 || s.cy == 2*448 || s.cy == 2*512) + if(s.cy == 2 * 416 || s.cy == 2 * 448 || s.cy == 2 * 512) { s.cy /= 2; } else { - s.cy = (SMODE1->CMOD & 1) ? 512 : 448; + s.cy = (m_regs->SMODE1.CMOD & 1) ? 512 : 448; } return s; @@ -338,13 +320,13 @@ bool GSState::IsEnabled(int i) { ASSERT(i >= 0 && i < 2); - if(i == 0 && PMODE->EN1) + if(i == 0 && m_regs->PMODE.EN1) { - return DISPLAY[0]->DW || DISPLAY[0]->DH; + return m_regs->DISP[0].DISPLAY.DW || m_regs->DISP[0].DISPLAY.DH; } - else if(i == 1 && PMODE->EN2) + else if(i == 1 && m_regs->PMODE.EN2) { - return DISPLAY[1]->DW || DISPLAY[1]->DH; + return m_regs->DISP[1].DISPLAY.DW || m_regs->DISP[1].DISPLAY.DH; } return false; @@ -352,7 +334,7 @@ bool GSState::IsEnabled(int i) int GSState::GetFPS() { - return ((SMODE1->CMOD & 1) ? 50 : 60) / (SMODE2->INT ? 1 : 2); + return ((m_regs->SMODE1.CMOD & 1) ? 50 : 60) / (m_regs->SMODE2.INT ? 1 : 2); } // GIFPackedRegHandler* @@ -985,25 +967,25 @@ void GSState::GIFRegHandlerSIGNAL(GIFReg* r) { if(m_mt) return; - SIGLBLID->SIGID = (SIGLBLID->SIGID & ~r->SIGNAL.IDMSK) | (r->SIGNAL.ID & r->SIGNAL.IDMSK); + m_regs->SIGLBLID.SIGID = (m_regs->SIGLBLID.SIGID & ~r->SIGNAL.IDMSK) | (r->SIGNAL.ID & r->SIGNAL.IDMSK); - if(CSR->wSIGNAL) CSR->rSIGNAL = 1; - if(!IMR->SIGMSK && m_irq) m_irq(); + if(m_regs->CSR.wSIGNAL) m_regs->CSR.rSIGNAL = 1; + if(!m_regs->IMR.SIGMSK && m_irq) m_irq(); } void GSState::GIFRegHandlerFINISH(GIFReg* r) { if(m_mt) return; - if(CSR->wFINISH) CSR->rFINISH = 1; - if(!IMR->FINISHMSK && m_irq) m_irq(); + if(m_regs->CSR.wFINISH) m_regs->CSR.rFINISH = 1; + if(!m_regs->IMR.FINISHMSK && m_irq) m_irq(); } void GSState::GIFRegHandlerLABEL(GIFReg* r) { if(m_mt) return; - SIGLBLID->LBLID = (SIGLBLID->LBLID & ~r->LABEL.IDMSK) | (r->LABEL.ID & r->LABEL.IDMSK); + m_regs->SIGLBLID.LBLID = (m_regs->SIGLBLID.LBLID & ~r->LABEL.IDMSK) | (r->LABEL.ID & r->LABEL.IDMSK); } // @@ -1671,6 +1653,7 @@ struct GSFrameInfo { DWORD FBP; DWORD FPSM; + DWORD FBMSK; bool TME; DWORD TBP0; DWORD TPSM; @@ -2050,6 +2033,10 @@ bool GSC_GodOfWar(const GSFrameInfo& fi, int& skip) { skip = 30; } + else if(fi.TME && fi.FBP == 0x00000 && fi.FPSM == PSM_PSMCT32 && fi.TBP0 == 0x00000 && fi.TPSM == PSM_PSMCT32 && fi.FBMSK == 0xff000000) + { + skip = 1; // blur + } } else { @@ -2114,6 +2101,7 @@ bool GSState::IsBadFrame(int& skip) fi.FBP = m_context->FRAME.Block(); fi.FPSM = m_context->FRAME.PSM; + fi.FBMSK = m_context->FRAME.FBMSK; fi.TME = PRIM->TME; fi.TBP0 = m_context->TEX0.TBP0; fi.TPSM = m_context->TEX0.PSM; diff --git a/plugins/GSdx/GSState.h b/plugins/GSdx/GSState.h index b1d805cf28..1e1915c0cc 100644 --- a/plugins/GSdx/GSState.h +++ b/plugins/GSdx/GSState.h @@ -189,22 +189,9 @@ protected: } public: - GIFRegPRIM* PRIM; - GSRegPMODE* PMODE; - GSRegSMODE1* SMODE1; - GSRegSMODE2* SMODE2; - GSRegDISPFB* DISPFB[2]; - GSRegDISPLAY* DISPLAY[2]; - GSRegEXTBUF* EXTBUF; - GSRegEXTDATA* EXTDATA; - GSRegEXTWRITE* EXTWRITE; - GSRegBGCOLOR* BGCOLOR; - GSRegCSR* CSR; - GSRegIMR* IMR; - GSRegBUSDIR* BUSDIR; - GSRegSIGLBLID* SIGLBLID; - GIFPath m_path[3]; + GIFRegPRIM* PRIM; + GSPrivRegSet* m_regs; GSLocalMemory m_mem; GSDrawingEnvironment m_env; GSDrawingContext* m_context; @@ -256,7 +243,7 @@ public: void Read(BYTE* mem, int len); void SoftReset(BYTE mask); - void WriteCSR(UINT32 csr) {CSR->ai32[1] = csr;} + void WriteCSR(UINT32 csr) {m_regs->CSR.ai32[1] = csr;} void ReadFIFO(BYTE* mem, int size); template void Transfer(BYTE* mem, UINT32 size); int Freeze(GSFreezeData* fd, bool sizeonly); diff --git a/plugins/GSdx/GSTextureCache.h b/plugins/GSdx/GSTextureCache.h index 7bb853227d..bc84dad34c 100644 --- a/plugins/GSdx/GSTextureCache.h +++ b/plugins/GSdx/GSTextureCache.h @@ -676,7 +676,7 @@ public: { int y = m_renderer->m_mem.m_psm[BITBLTBUF.DPSM].pgs.cy * offset / rowsize; - if(r.bottom >= y) + if(r.bottom > y) { // TODO: do not add this rect above too rt->m_dirty.AddTail(GSDirtyRect(BITBLTBUF.DPSM, CRect(r.left, r.top - y, r.right, r.bottom - y))); @@ -721,7 +721,7 @@ public: { int y = m_renderer->m_mem.m_psm[BITBLTBUF.DPSM].pgs.cy * offset / rowsize; - if(r.bottom >= y) + if(r.bottom > y) { // TODO: do not add this rect above too ds->m_dirty.AddTail(GSDirtyRect(BITBLTBUF.DPSM, CRect(r.left, r.top - y, r.right, r.bottom - y))); diff --git a/plugins/GSdx/GSVertexSW.h b/plugins/GSdx/GSVertexSW.h index 5113aa0dd3..44e0d0ca25 100644 --- a/plugins/GSdx/GSVertexSW.h +++ b/plugins/GSdx/GSVertexSW.h @@ -101,17 +101,17 @@ __declspec(align(16)) union GSVertexSW if(v34.allfalse()) { - test = (v35 ^ v45) & (v35 ^ v45.zwxy()) & (vtl == v3 + (v4 - v5)) & (vbr == v5); + test = (v35 ^ v45) & (v35 ^ v45.zwxy()) & (vtl + v5 == v3 + v4) & (vbr == v5); i = 5; } else if(v35.allfalse()) { - test = (v34 ^ v45) & (v34 ^ v45.zwxy()) & (vtl == v3 + (v5 - v4)) & (vbr == v4); + test = (v34 ^ v45) & (v34 ^ v45.zwxy()) & (vtl + v4 == v3 + v5) & (vbr == v4); i = 4; } else if(v45.allfalse()) { - test = (v34 ^ v35) & (v34 ^ v35.zwxy()) & (vtl == v5 + (v4 - v3)) & (vbr == v3); + test = (v34 ^ v35) & (v34 ^ v35.zwxy()) & (vtl + v3 == v5 + v4) & (vbr == v3); i = 3; } else diff --git a/plugins/GSdx/GSdx.rc b/plugins/GSdx/GSdx.rc index 750014a605..ea714def56 100644 --- a/plugins/GSdx/GSdx.rc +++ b/plugins/GSdx/GSdx.rc @@ -82,13 +82,13 @@ IDB_LOGO10 BITMAP "res\\logo10.bmp" // Dialog // -IDD_CONFIG DIALOGEX 0, 0, 189, 245 +IDD_CONFIG DIALOGEX 0, 0, 189, 256 STYLE DS_SETFONT | DS_MODALFRAME | DS_FIXEDSYS | WS_POPUP | WS_CAPTION | WS_SYSMENU CAPTION "Settings..." FONT 8, "MS Shell Dlg", 400, 0, 0x1 BEGIN - CONTROL 2021,IDC_LOGO9,"Static",SS_BITMAP,7,7,175,44 CONTROL 2022,IDC_LOGO10,"Static",SS_BITMAP,7,7,175,44 + CONTROL 2021,IDC_LOGO9,"Static",SS_BITMAP,7,7,175,44 LTEXT "Resolution:",IDC_STATIC,7,59,37,8 COMBOBOX IDC_COMBO3,71,57,111,125,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP LTEXT "Renderer:",IDC_STATIC,7,74,34,8 @@ -116,8 +116,9 @@ BEGIN CONTROL "Alpha correction (FBA)",IDC_CHECK7,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,80,193,102,10 CONTROL "Edge anti-aliasing (AA1, sw-mode only)",IDC_CHECK8, "Button",BS_AUTOCHECKBOX | WS_TABSTOP,7,206,141,10 - DEFPUSHBUTTON "OK",IDOK,43,224,50,14 - PUSHBUTTON "Cancel",IDCANCEL,96,224,50,14 + CONTROL "Enable output merger blur effect",IDC_CHECK9,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,7,219,121,10 + DEFPUSHBUTTON "OK",IDOK,43,235,50,14 + PUSHBUTTON "Cancel",IDCANCEL,96,235,50,14 END IDD_CAPTURE DIALOGEX 0, 0, 279, 71 @@ -181,7 +182,7 @@ BEGIN VERTGUIDE, 80 VERTGUIDE, 182 TOPMARGIN, 7 - BOTTOMMARGIN, 238 + BOTTOMMARGIN, 249 END IDD_CAPTURE, DIALOG diff --git a/plugins/GSdx/resource.h b/plugins/GSdx/resource.h index 4817fc5032..48d4b60446 100644 --- a/plugins/GSdx/resource.h +++ b/plugins/GSdx/resource.h @@ -35,6 +35,7 @@ #define IDD_CAPTURE 2026 #define IDC_EDIT4 2027 #define IDD_GPUCONFIG 2027 +#define IDC_CHECK9 2028 #define IDR_CONVERT9_FX 10000 #define IDR_TFX9_FX 10001 #define IDR_MERGE9_FX 10002 @@ -50,7 +51,7 @@ #ifndef APSTUDIO_READONLY_SYMBOLS #define _APS_NEXT_RESOURCE_VALUE 10009 #define _APS_NEXT_COMMAND_VALUE 32771 -#define _APS_NEXT_CONTROL_VALUE 2028 +#define _APS_NEXT_CONTROL_VALUE 2029 #define _APS_NEXT_SYMED_VALUE 5000 #endif #endif diff --git a/plugins/GSdx/vsprops/common.vsprops b/plugins/GSdx/vsprops/common.vsprops index 3f15600998..002a838f84 100644 --- a/plugins/GSdx/vsprops/common.vsprops +++ b/plugins/GSdx/vsprops/common.vsprops @@ -19,7 +19,7 @@ Name="VCLinkerTool" AdditionalDependencies="JITProfiling.lib d3d10.lib d3dx10.lib d3d9.lib d3dx9.lib ddraw.lib dxguid.lib winmm.lib strmiids.lib xinput.lib" AdditionalLibraryDirectories="./vtune" - DelayLoadDLLs="d3d9.dll;d3dx9_40.dll;d3d10.dll;d3dx10_40.dll" + DelayLoadDLLs="d3d9.dll;d3dx9_41.dll;d3d10.dll;d3dx10_41.dll" GenerateDebugInformation="true" SubSystem="2" RandomizedBaseAddress="1" diff --git a/plugins/LilyPad/Config.cpp b/plugins/LilyPad/Config.cpp index 2b956fefd1..d5ff4edfbe 100644 --- a/plugins/LilyPad/Config.cpp +++ b/plugins/LilyPad/Config.cpp @@ -1444,7 +1444,7 @@ INT_PTR CALLBACK DialogProc(HWND hWnd, unsigned int msg, WPARAM wParam, LPARAM l } } } - else if ((cmd >= ID_GUITAR_HERO && cmd <= ID_ANALOG) || cmd == ID_IGNORE) {// || cmd == ID_FORCE_FEEDBACK) { + else if ((cmd >= ID_LOCK_BUTTONS && cmd <= ID_ANALOG) || cmd == ID_IGNORE) {// || cmd == ID_FORCE_FEEDBACK) { // Messes up things, unfortunately. // End binding on a bunch of notification messages, and // this will send a bunch. @@ -1474,10 +1474,6 @@ INT_PTR CALLBACK DialogProc(HWND hWnd, unsigned int msg, WPARAM wParam, LPARAM l Sleep(40); dm->Update(&info); dm->PostRead(); - int w2 = timeGetTime(); - if (dm->devices[0xe]->oldVirtualControlState[6] != 0x8000) { - dm->devices[0xe]->oldVirtualControlState[6]=dm->devices[0xe]->oldVirtualControlState[6]; - } SetTimer(hWnd, 1, 30, 0); } if (cmd == IDC_TURBO) { @@ -1506,6 +1502,18 @@ INT_PTR CALLBACK DialogProc(HWND hWnd, unsigned int msg, WPARAM wParam, LPARAM l return 0; } +// Returns 0 if pad doesn't exist due to mtap settings, as a convenience. +int GetPadString(wchar_t *string, unsigned int port, unsigned int slot) { + if (!slot) { + wsprintfW(string, L"Pad %i", port+1); + } + else { + wsprintfW(string, L"Pad %i-%i", port+1, slot+1); + if (!config.multitap[port]) return 0; + } + return 1; +} + void UpdatePadPages() { HPROPSHEETPAGE pages[10]; int count = 0; @@ -1515,20 +1523,14 @@ void UpdatePadPages() { for (int slot=0; slot<4; slot++) { if (config.padConfigs[port][slot].type == DisabledPad) continue; wchar_t title[20]; - if (!slot) { - wsprintfW(title, L"Pad %i", port+1); - } - else { - if (!config.multitap[port]) continue; - wsprintfW(title, L"Pad %i-%i", port+1, slot+1); - } + if (!GetPadString(title, port, slot)) continue; PROPSHEETPAGE psp; ZeroMemory(&psp, sizeof(psp)); psp.dwSize = sizeof(psp); psp.dwFlags = PSP_USETITLE | PSP_PREMATURE; psp.hInstance = hInst; - psp.pfnDlgProc = (DLGPROC) DialogProc; + psp.pfnDlgProc = DialogProc; psp.lParam = port | (slot<<1); psp.pszTitle = title; if (config.padConfigs[port][slot].type != GuitarPad) @@ -1547,20 +1549,6 @@ void UpdatePadPages() { } } -INT_PTR CALLBACK GeneralDialogProc(HWND hWnd, unsigned int msg, WPARAM wParam, LPARAM lParam); - -HPROPSHEETPAGE CreateGeneralPage() { - PROPSHEETPAGE psp; - ZeroMemory(&psp, sizeof(psp)); - psp.dwSize = sizeof(psp); - psp.dwFlags = PSP_USETITLE | PSP_PREMATURE; - psp.hInstance = hInst; - psp.pfnDlgProc = (DLGPROC) GeneralDialogProc; - psp.pszTitle = L"General"; - psp.pszTemplate = MAKEINTRESOURCE(IDD_GENERAL); - return CreatePropertySheetPage(&psp); -} - int ListIndexToPortAndSlot (int index, int *port, int *slot) { if (index < 0 || index >= 2 + 3*(config.multitap[0]+config.multitap[1])) { *port = 0; @@ -1579,22 +1567,20 @@ int ListIndexToPortAndSlot (int index, int *port, int *slot) { } void UpdatePadList(HWND hWnd) { + static u8 recurse = 0; + if (recurse) return; + recurse = 1; HWND hWndList = GetDlgItem(hWnd, IDC_PAD_LIST); HWND hWndCombo = GetDlgItem(hWnd, IDC_PAD_TYPE); HWND hWndAnalog = GetDlgItem(hWnd, IDC_ANALOG_START1); int slot; int port; int index = 0; - wchar_t *strings[] = {L"Disabled", L"Dualshock 2", L"Guitar"}; + wchar_t *padTypes[] = {L"Disabled", L"Dualshock 2", L"Guitar"}; for (port=0; port<2; port++) { for (slot = 0; slot<4; slot++) { - wchar_t text[100]; - if (!slot) - wsprintf(text, L"Pad %i", port+1); - else { - if (!config.multitap[port]) continue; - wsprintf(text, L"Pad %i-%i", port+1, slot+1); - } + wchar_t text[20]; + if (!GetPadString(text, port, slot)) continue; LVITEM item; item.iItem = index; item.iSubItem = 0; @@ -1609,7 +1595,7 @@ void UpdatePadList(HWND hWnd) { item.iSubItem = 1; if (2 < (unsigned int)config.padConfigs[port][slot].type) config.padConfigs[port][slot].type = Dualshock2Pad; - item.pszText = strings[config.padConfigs[port][slot].type]; + item.pszText = padTypes[config.padConfigs[port][slot].type]; ListView_SetItem(hWndList, &item); item.iSubItem = 2; @@ -1641,6 +1627,8 @@ void UpdatePadList(HWND hWnd) { } EnableWindow(hWndCombo, enable); EnableWindow(hWndAnalog, enable); + //ListView_SetExtendedListViewStyleEx(hWndList, LVS_EX_DOUBLEBUFFER|LVS_EX_ONECLICKACTIVATE, LVS_EX_DOUBLEBUFFER|LVS_EX_ONECLICKACTIVATE); + recurse = 0; } INT_PTR CALLBACK GeneralDialogProc(HWND hWnd, unsigned int msg, WPARAM wParam, LPARAM lParam) { @@ -1651,7 +1639,6 @@ INT_PTR CALLBACK GeneralDialogProc(HWND hWnd, unsigned int msg, WPARAM wParam, L { HWND hWndCombo = GetDlgItem(hWnd, IDC_PAD_TYPE); if (SendMessage(hWndCombo, CB_GETCOUNT, 0, 0) == 0) { - ListView_SetExtendedListViewStyleEx(hWndList, LVS_EX_DOUBLEBUFFER, LVS_EX_DOUBLEBUFFER); LVCOLUMN c; c.mask = LVCF_TEXT | LVCF_WIDTH; c.cx = 50; @@ -1664,6 +1651,7 @@ INT_PTR CALLBACK GeneralDialogProc(HWND hWnd, unsigned int msg, WPARAM wParam, L c.pszText = L"Bindings"; ListView_InsertColumn(hWndList, 2, &c); selected = 0; + ListView_SetExtendedListViewStyleEx(hWndList, LVS_EX_FULLROWSELECT|LVS_EX_DOUBLEBUFFER, LVS_EX_FULLROWSELECT|LVS_EX_DOUBLEBUFFER); SendMessage(hWndList, LVM_SETEXTENDEDLISTVIEWSTYLE, 0, LVS_EX_FULLROWSELECT); SendMessage(hWndCombo, CB_ADDSTRING, 0, (LPARAM) L"Disabled"); SendMessage(hWndCombo, CB_ADDSTRING, 0, (LPARAM) L"Dualshock 2"); @@ -1850,9 +1838,72 @@ INT_PTR CALLBACK GeneralDialogProc(HWND hWnd, unsigned int msg, WPARAM wParam, L Diagnostics(hWnd); } else if (n->hdr.idFrom == IDC_PAD_LIST) { - if (n->hdr.code == NM_CLICK) { + if (n->hdr.code == LVN_ITEMCHANGED) { UpdatePadList(hWnd); } + if (n->hdr.code == NM_RCLICK) { + UpdatePadList(hWnd); + int index = ListView_GetNextItem(hWndList, -1, LVNI_SELECTED); + int port1, slot1, port2, slot2; + if (!ListIndexToPortAndSlot(index, &port1, &slot1)) break; + HMENU hMenu = CreatePopupMenu(); + if (!hMenu) break; + MENUITEMINFOW info; + for (port2=1; port2>=0; port2--) { + for (slot2 = 3; slot2>=0; slot2--) { + wchar_t text[40]; + wchar_t pad[20]; + if (!GetPadString(pad, port2, slot2)) continue; + info.cbSize = sizeof(info); + info.fMask = MIIM_STRING | MIIM_ID; + info.dwTypeData = text; + if (port2 == port1 && slot2 == slot1) { + int index = GetMenuItemCount(hMenu); + wsprintfW(text, L"Clear %s Bindings", pad); + info.wID = -1; + InsertMenuItemW(hMenu, index, 1, &info); + info.fMask = MIIM_TYPE; + info.fType = MFT_SEPARATOR; + InsertMenuItemW(hMenu, index, 1, &info); + } + else { + info.wID = port2+2*slot2; + wsprintfW(text, L"Swap with %s", pad); + InsertMenuItemW(hMenu, 0, 1, &info); + } + } + } + POINT pos; + GetCursorPos(&pos); + short res = TrackPopupMenuEx(hMenu, TPM_NONOTIFY|TPM_RETURNCMD, pos.x, pos.y, hWndProp, 0); + DestroyMenu(hMenu); + if (!res) break; + if (res > 0) { + slot2 = res / 2; + port2 = res&1; + PadConfig padCfgTemp = config.padConfigs[port1][slot1]; + config.padConfigs[port1][slot1] = config.padConfigs[port2][slot2]; + config.padConfigs[port2][slot2] = padCfgTemp; + for (int i=0; inumDevices; i++) { + PadBindings bindings = dm->devices[i]->pads[port1][slot1]; + dm->devices[i]->pads[port1][slot1] = dm->devices[i]->pads[port2][slot2]; + dm->devices[i]->pads[port2][slot2] = bindings; + } + } + else { + for (int i=0; inumDevices; i++) { + free(dm->devices[i]->pads[port1][slot1].bindings); + for (int j=0; jdevices[i]->pads[port1][slot1].numFFBindings; j++) { + free(dm->devices[i]->pads[port1][slot1].ffBindings[j].axes); + } + free(dm->devices[i]->pads[port1][slot1].ffBindings); + memset(&dm->devices[i]->pads[port1][slot1], 0, sizeof(dm->devices[i]->pads[port1][slot1])); + } + } + UpdatePadPages(); + UpdatePadList(hWnd); + PropSheet_Changed(hWndProp, hWnd); + } } } break; @@ -1870,10 +1921,21 @@ int CALLBACK PropSheetProc(HWND hWnd, UINT msg, LPARAM lParam) { void CALLBACK PADconfigure() { // Can end up here without PadConfigure() being called first. LoadSettings(); + // Can also end up here after running emulator a bit, and possibly + // disabling some devices due to focus changes, or releasing mouse. + RefreshEnabledDevices(0); + memset(hWnds, 0, sizeof(hWnds)); - HPROPSHEETPAGE page; - page = CreateGeneralPage(); + PROPSHEETPAGE psp; + ZeroMemory(&psp, sizeof(psp)); + psp.dwSize = sizeof(psp); + psp.dwFlags = PSP_USETITLE | PSP_PREMATURE; + psp.hInstance = hInst; + psp.pfnDlgProc = GeneralDialogProc; + psp.pszTitle = L"General"; + psp.pszTemplate = MAKEINTRESOURCE(IDD_GENERAL); + HPROPSHEETPAGE page = CreatePropertySheetPage(&psp); if (!page) return; PROPSHEETHEADER psh; diff --git a/plugins/LilyPad/DirectInput.cpp b/plugins/LilyPad/DirectInput.cpp index 5f0f388154..4c7951a1f3 100644 --- a/plugins/LilyPad/DirectInput.cpp +++ b/plugins/LilyPad/DirectInput.cpp @@ -50,9 +50,6 @@ void ReleaseDirectInput() { di8d.lpDI8 = 0; } } - else { - di8d.refCount=di8d.refCount; - } } static int StringToGUID(GUID *pg, wchar_t *dataw) { diff --git a/plugins/LilyPad/Global.h b/plugins/LilyPad/Global.h index 17e41b7013..92543f5aae 100644 --- a/plugins/LilyPad/Global.h +++ b/plugins/LilyPad/Global.h @@ -63,6 +63,8 @@ EXPORT_C_(u32) PSEgetLibType(); EXPORT_C_(u32) PSEgetLibVersion(); EXPORT_C_(void) PADconfigure(); EXPORT_C_(s32) PADfreeze(int mode, freezeData *data); +EXPORT_C_(s32) PADsetSlot(u8 port, u8 slot); +EXPORT_C_(s32) PADqueryMtap(u8 port); #ifdef NO_CRT inline void * malloc(size_t size) { diff --git a/plugins/LilyPad/InputManager.h b/plugins/LilyPad/InputManager.h index a5f0587e11..ac9bf8dc67 100644 --- a/plugins/LilyPad/InputManager.h +++ b/plugins/LilyPad/InputManager.h @@ -109,7 +109,7 @@ enum DeviceType { NO_DEVICE = 0, KEYBOARD = 1, MOUSE = 2, - OTHER = 3 + OTHER = 3 }; enum EffectType { diff --git a/plugins/LilyPad/KeyboardHook.cpp b/plugins/LilyPad/KeyboardHook.cpp index 0c7a146b98..0ac88f0814 100644 --- a/plugins/LilyPad/KeyboardHook.cpp +++ b/plugins/LilyPad/KeyboardHook.cpp @@ -71,11 +71,19 @@ void EnumHookDevices() { // Makes sure hooks are started in correct thread. ExtraWndProcResult StartHooksWndProc(HWND hWnd, UINT uMsg, WPARAM wParam, LPARAM lParam, LRESULT *output) { + // Don't remove too quickly - could be other things happening in other threads. + // Attempted fix for keyboard input occasionally not working. + static int counter = 0; if (ikhd && !ikhd->hHook && ikhd->active) { + counter = 0; ikhd->hHook = SetWindowsHookEx(WH_KEYBOARD_LL, IgnoreKeyboardHook, hInst, 0); if (ikhd->hHook == 0) ikhd->Deactivate(); } - return CONTINUE_BLISSFULLY_AND_RELEASE_PROC; + counter ++; + if (counter % 1000 == 0) + return CONTINUE_BLISSFULLY_AND_RELEASE_PROC; + else + return CONTINUE_BLISSFULLY; } LRESULT CALLBACK IgnoreKeyboardHook(int code, WPARAM wParam, LPARAM lParam) { diff --git a/plugins/LilyPad/LilyPad.cpp b/plugins/LilyPad/LilyPad.cpp index 913621c59f..f4b3801f0b 100644 --- a/plugins/LilyPad/LilyPad.cpp +++ b/plugins/LilyPad/LilyPad.cpp @@ -22,6 +22,9 @@ #include "crtdbg.h" #endif +// LilyPad version. +#define VERSION ((0<<8) | 9 | (11<<24)) + // Used to prevent reading input and cleaning up input devices at the same time. // Only an issue when not reading input in GS thread and disabling devices due to // lost focus. @@ -66,22 +69,26 @@ int IsWindowMaximized (HWND hWnd) { } void DEBUG_NEW_SET() { - if (config.debug) { - HANDLE hFile = CreateFileA("logs\\padLog.txt", GENERIC_WRITE, FILE_SHARE_READ, 0, OPEN_ALWAYS, 0, 0); + if (config.debug && bufSize>1) { + HANDLE hFile = CreateFileA("logs\\padLog.txt", FILE_APPEND_DATA, FILE_SHARE_READ, 0, OPEN_ALWAYS, 0, 0); if (hFile != INVALID_HANDLE_VALUE) { int i; char temp[1500]; char *end = temp; - for (i=0; i 0). + u8 enabled; } pads[2][4]; // Active slots for each port. @@ -167,10 +181,14 @@ void UpdateEnabledDevices(int updateList = 0) { // Enable all devices I might want. Can ignore the rest. RefreshEnabledDevices(updateList); // Figure out which pads I'm getting input for. - int padsEnabled[2][4]; for (int port = 0; port<2; port++) { for (int slot = 0; slot<4; slot++) { - padsEnabled[port][slot] = pads[port][slot].initialized && config.padConfigs[port][slot].type != DisabledPad; + if (slot && !config.multitap[port]) { + pads[port][slot].enabled = 0; + } + else { + pads[port][slot].enabled = pads[port][slot].initialized && config.padConfigs[port][slot].type != DisabledPad; + } } } for (int i=0; inumDevices; i++) { @@ -203,7 +221,7 @@ void UpdateEnabledDevices(int updateList = 0) { int numActiveBindings = 0; for (int port=0; port<2; port++) { for (int slot=0; slot<4; slot++) { - if (padsEnabled[port][slot]) { + if (pads[port][slot].enabled) { numActiveBindings += dev->pads[port][slot].numBindings + dev->pads[port][slot].numFFBindings; } } @@ -291,6 +309,13 @@ void ProcessButtonBinding(Binding *b, ButtonSum *sum, int value) { value = (1<<16)-value; } if (value > 0) { + /* Note: Value ranges of FULLY_DOWN, and sensitivity of + * BASE_SENSITIVITY corresponds to an axis/button being exactly fully down. + * Math in next line takes care of those two conditions, rounding as necessary. + * Done using __int64s because overflows will occur when + * sensitivity > BASE_SENSITIVITY and/or value > FULLY_DOWN. Latter only happens + * for relative axis. + */ AddForce(sum, b->command, (int)((((sensitivity*(255*(__int64)value)) + BASE_SENSITIVITY/2)/BASE_SENSITIVITY + FULLY_DOWN/2)/FULLY_DOWN)); } } @@ -312,24 +337,34 @@ void CapSum(ButtonSum *sum) { } } -// Counters for when to next update pad state. -// Read all devices at once, so don't need to read them again -// for pad 2 immediately after pad 1. 3rd counter is for -// when neither pad is being read, so still respond to -// key press info requests. -int summed[3] = {0, 0, 0}; +// Counter similar to stateUpdated for each pad, except used for PADkeyEvent instead. +// Only matters when GS thread updates is disabled (Just like summed pad values +// for pads beyond the first slot). Also, it's set to 4 and decremented by 1 on each read, +// so it's less likely I'll control state on a PADkeyEvent call. +u8 padReadKeyUpdated = 0; #define LOCK_DIRECTION 2 #define LOCK_BUTTONS 4 #define LOCK_BOTH 1 -void Update(int pad) { - if ((unsigned int)pad > 2) return; - if (summed[pad] > 0) { - summed[pad]--; +void Update(unsigned int port, unsigned int slot) { + if (port > 2) return; + u8 *stateUpdated; + if (port < 2) + stateUpdated = &pads[port][slot].stateUpdated; + else + stateUpdated = &padReadKeyUpdated; + if (*stateUpdated) { + stateUpdated[0] --; return; } + + static unsigned int LastCheck = 0; + unsigned int t = timeGetTime(); + if (t - LastCheck < 15) return; + LastCheck = t; + int i; ButtonSum s[2][4]; u8 lockStateChanged[2][4]; @@ -352,7 +387,7 @@ void Update(int pad) { Device *dev = dm->devices[i]; // Skip both disabled devices and inactive enabled devices. // Shouldn't be any of the latter, in general, but just in case... - if (!dev->virtualControlState) continue; + if (!dev->active) continue; for (int port=0; port<2; port++) { for (int slot=0; slot<4; slot++) { if (config.padConfigs[port][slot].type == DisabledPad || !pads[port][slot].initialized) continue; @@ -398,92 +433,95 @@ void Update(int pad) { LeaveCriticalSection(&readInputCriticalSection); } - for (int port=0; port<2; port++) { - for (int slot=0; slot<4; slot++) { - if (config.padConfigs[port][slot].type == DisabledPad || !pads[port][slot].initialized) continue; - if (config.padConfigs[port][slot].type == GuitarPad) { - if (!config.GH2) { - s[port][slot].sticks[1].vert = -s[port][slot].sticks[1].vert; - } - // GH2 hack. - else if (config.GH2) { - const unsigned int oldIdList[5] = {ID_R2, ID_CIRCLE, ID_TRIANGLE, ID_CROSS, ID_SQUARE}; - const unsigned int idList[5] = {ID_L2, ID_L1, ID_R1, ID_R2, ID_CROSS}; - int values[5]; - int i; - for (i=0; i<5; i++) { - int id = oldIdList[i] - 0x1104; - values[i] = s[port][slot].buttons[id]; - s[port][slot].buttons[id] = 0; + { + for (int port=0; port<2; port++) { + for (int slot=0; slot<4; slot++) { + pads[port][slot].stateUpdated = 1; + if (config.padConfigs[port][slot].type == DisabledPad || !pads[port][slot].initialized) continue; + if (config.padConfigs[port][slot].type == GuitarPad) { + if (!config.GH2) { + s[port][slot].sticks[1].vert = -s[port][slot].sticks[1].vert; } - s[port][slot].buttons[ID_TRIANGLE-0x1104] = values[1]; - for (i=0; i<5; i++) { - int id = idList[i] - 0x1104; - s[port][slot].buttons[id] = values[i]; - } - if (abs(s[port][slot].sticks[0].vert) <= 48) { - for (int i=0; i<5; i++) { - unsigned int id = idList[i] - 0x1104; - if (pads[port][slot].sum.buttons[id] < s[port][slot].buttons[id]) { - s[port][slot].buttons[id] = pads[port][slot].sum.buttons[id]; + // GH2 hack. + else if (config.GH2) { + const unsigned int oldIdList[5] = {ID_R2, ID_CIRCLE, ID_TRIANGLE, ID_CROSS, ID_SQUARE}; + const unsigned int idList[5] = {ID_L2, ID_L1, ID_R1, ID_R2, ID_CROSS}; + int values[5]; + int i; + for (i=0; i<5; i++) { + int id = oldIdList[i] - 0x1104; + values[i] = s[port][slot].buttons[id]; + s[port][slot].buttons[id] = 0; + } + s[port][slot].buttons[ID_TRIANGLE-0x1104] = values[1]; + for (i=0; i<5; i++) { + int id = idList[i] - 0x1104; + s[port][slot].buttons[id] = values[i]; + } + if (abs(s[port][slot].sticks[0].vert) <= 48) { + for (int i=0; i<5; i++) { + unsigned int id = idList[i] - 0x1104; + if (pads[port][slot].sum.buttons[id] < s[port][slot].buttons[id]) { + s[port][slot].buttons[id] = pads[port][slot].sum.buttons[id]; + } } } - } - else if (abs(pads[port][slot].sum.sticks[0].vert) <= 48) { - for (int i=0; i<5; i++) { - unsigned int id = idList[i] - 0x1104; - if (pads[port][slot].sum.buttons[id]) { - s[port][slot].buttons[id] = 0; + else if (abs(pads[port][slot].sum.sticks[0].vert) <= 48) { + for (int i=0; i<5; i++) { + unsigned int id = idList[i] - 0x1104; + if (pads[port][slot].sum.buttons[id]) { + s[port][slot].buttons[id] = 0; + } } } } } - } - if (pads[port][slot].mode == 0x41) { - s[port][slot].sticks[0].horiz += - s[port][slot].sticks[1].horiz + - s[port][slot].sticks[2].horiz; - s[port][slot].sticks[0].vert += - s[port][slot].sticks[1].vert + - s[port][slot].sticks[2].vert; - } + if (pads[port][slot].mode == 0x41) { + s[port][slot].sticks[0].horiz += + s[port][slot].sticks[1].horiz + + s[port][slot].sticks[2].horiz; + s[port][slot].sticks[0].vert += + s[port][slot].sticks[1].vert + + s[port][slot].sticks[2].vert; + } - CapSum(&s[port][slot]); - if (lockStateChanged[port][slot]) { - if (lockStateChanged[port][slot] & LOCK_BOTH) { - if (pads[port][slot].lockedState != (LOCK_DIRECTION | LOCK_BUTTONS)) { - // Enable the one that's not enabled. - lockStateChanged[port][slot] ^= pads[port][slot].lockedState^(LOCK_DIRECTION | LOCK_BUTTONS); + CapSum(&s[port][slot]); + if (lockStateChanged[port][slot]) { + if (lockStateChanged[port][slot] & LOCK_BOTH) { + if (pads[port][slot].lockedState != (LOCK_DIRECTION | LOCK_BUTTONS)) { + // Enable the one that's not enabled. + lockStateChanged[port][slot] ^= pads[port][slot].lockedState^(LOCK_DIRECTION | LOCK_BUTTONS); + } + else { + // Disable both + lockStateChanged[port][slot] ^= LOCK_DIRECTION | LOCK_BUTTONS; + } } - else { - // Disable both - lockStateChanged[port][slot] ^= LOCK_DIRECTION | LOCK_BUTTONS; + if (lockStateChanged[port][slot] & LOCK_DIRECTION) { + if (pads[port][slot].lockedState & LOCK_DIRECTION) { + memset(pads[port][slot].lockedSum.sticks, 0, sizeof(pads[port][slot].lockedSum.sticks)); + } + else { + memcpy(pads[port][slot].lockedSum.sticks, s[port][slot].sticks, sizeof(pads[port][slot].lockedSum.sticks)); + } + pads[port][slot].lockedState ^= LOCK_DIRECTION; } - } - if (lockStateChanged[port][slot] & LOCK_DIRECTION) { - if (pads[port][slot].lockedState & LOCK_DIRECTION) { - memset(pads[port][slot].lockedSum.sticks, 0, sizeof(pads[port][slot].lockedSum.sticks)); + if (lockStateChanged[port][slot] & LOCK_BUTTONS) { + if (pads[port][slot].lockedState & LOCK_BUTTONS) { + memset(pads[port][slot].lockedSum.buttons, 0, sizeof(pads[port][slot].lockedSum.buttons)); + } + else { + memcpy(pads[port][slot].lockedSum.buttons, s[port][slot].buttons, sizeof(pads[port][slot].lockedSum.buttons)); + } + pads[port][slot].lockedState ^= LOCK_BUTTONS; } - else { - memcpy(pads[port][slot].lockedSum.sticks, s[port][slot].sticks, sizeof(pads[port][slot].lockedSum.sticks)); + for (i=0; i>1].sum = s[i&1][i>>1]; } - summed[0] = 1; - summed[1] = 1; - summed[2] = 2; - summed[pad]--; + pads[port][slot].stateUpdated--; + padReadKeyUpdated = 4; } -void CALLBACK PADupdate(int pad) { - if (config.GSThreadUpdates) Update(pad); +void CALLBACK PADupdate(int port) { + if (config.GSThreadUpdates) Update(port, 0); } inline void SetVibrate(int port, int slot, int motor, u8 val) { @@ -513,8 +549,6 @@ u32 CALLBACK PS2EgetLibType(void) { return PS2E_LT_PAD; } -#define VERSION ((0<<8) | 9 | (11<<24)) - u32 CALLBACK PS2EgetLibVersion2(u32 type) { ps2e = 1; if (type == PS2E_LT_PAD) @@ -560,6 +594,7 @@ char* CALLBACK PS2EgetLibName(void) { void CALLBACK PADshutdown() { for (int i=0; i<8; i++) pads[i&1][i>>1].initialized = 0; + portInitialized[0] = portInitialized[1] = 0; UnloadConfigs(); } @@ -578,13 +613,27 @@ inline void ResetVibrate(int port, int slot) { } void ResetPad(int port, int slot) { + // Lines before memset currently don't do anything useful, + // but allow this function to be called at any time. + + // Need to backup, so can be called at any point. + u8 enabled = pads[port][slot].enabled; + + // Currently should never do anything. + SetVibrate(port, slot, 0, 0); + SetVibrate(port, slot, 1, 0); + memset(&pads[port][slot], 0, sizeof(pads[0][0])); pads[port][slot].mode = MODE_DIGITAL; pads[port][slot].umask[0] = pads[port][slot].umask[1] = 0xFF; + // Sets up vibrate variable. ResetVibrate(port, slot); if (config.padConfigs[port][slot].autoAnalog) { pads[port][slot].mode = MODE_ANALOG; } + pads[port][slot].initialized = 1; + + pads[port][slot].enabled = enabled; } @@ -605,8 +654,8 @@ s32 CALLBACK PADinit(u32 flags) { if (LoadSettings() < 0) { return -1; } - int pad = (flags & 3); - if (pad == 3) { + int port = (flags & 3); + if (port == 3) { if (PADinit(1)) return -1; return PADinit(2); } @@ -615,12 +664,14 @@ s32 CALLBACK PADinit(u32 flags) { tmpFlag |= _CRTDBG_LEAK_CHECK_DF; _CrtSetDbgFlag( tmpFlag ); #endif - pad --; - ResetPad(pad, 0); + port --; - pads[pad][0].initialized = 1; - memset(slots, 0, sizeof(slots)); + for (int i=0; i<4; i++) { + ResetPad(port, i); + } + slots[port] = 0; + portInitialized[port] = 1; query.lastByte = 1; query.numBytes = 0; @@ -816,7 +867,8 @@ s32 CALLBACK PADopen(void *pDsp) { // to be what it actually does. // activeWindow = GetActiveWindow() == hWnd; - activeWindow = (GetAncestor(hWnd, GA_ROOT) == GetAncestor(GetForegroundWindow(), GA_ROOT)); + // activeWindow = (GetAncestor(hWnd, GA_ROOT) == GetAncestor(GetForegroundWindow(), GA_ROOT)); + activeWindow = 1; UpdateEnabledDevices(); return 0; } @@ -830,29 +882,38 @@ void CALLBACK PADclose() { } } -u8 CALLBACK PADstartPoll(int pad) { +u8 CALLBACK PADstartPoll(int port) { DEBUG_NEW_SET(); - pad--; - if ((unsigned int)pad <= 1) { + port--; + if ((unsigned int)port <= 1) { query.queryDone = 0; - query.port = pad; - query.slot = slots[query.port]; + query.port = port; + query.slot = slots[port]; query.numBytes = 2; query.lastByte = 0; - DEBUG_IN(pad); + DEBUG_IN(port); DEBUG_OUT(0xFF); + DEBUG_IN(slots[port]); + DEBUG_OUT(pads[port][slots[port]].enabled); return 0xFF; } else { query.queryDone = 1; query.numBytes = 0; query.lastByte = 1; - DEBUG_IN(pad); + DEBUG_IN(0); + DEBUG_OUT(0); + DEBUG_IN(port); DEBUG_OUT(0); return 0; } } +inline int IsDualshock2(u8 port, u8 slot) { + return config.padConfigs[query.port][query.slot].type == Dualshock2Pad || + (config.padConfigs[query.port][query.slot].type == GuitarPad && config.GH2); +} + u8 CALLBACK PADpoll(u8 value) { DEBUG_IN(value); if (query.lastByte+1 >= query.numBytes) { @@ -895,7 +956,7 @@ u8 CALLBACK PADpoll(u8 value) { query.response[2] = 0x5A; { if (!config.GSThreadUpdates) { - Update(query.port); + Update(query.port, query.slot); } ButtonSum *sum = &pad->sum; @@ -982,9 +1043,14 @@ u8 CALLBACK PADpoll(u8 value) { break; // QUERY_MODEL_AND_MODE case 0x45: - if (config.padConfigs[query.port][query.slot].type != GuitarPad || config.GH2) SET_FINAL_RESULT(queryModelDS2) - else SET_FINAL_RESULT(queryModelDS1); - query.response[5] = pad->mode != MODE_DIGITAL; + if (IsDualshock2(query.port, query.slot)) { + SET_FINAL_RESULT(queryModelDS2) + } + else { + SET_FINAL_RESULT(queryModelDS1); + } + // Not digital mode. + query.response[5] = (pad->mode & 0xF) != 1; break; // QUERY_ACT case 0x46: @@ -1006,7 +1072,12 @@ u8 CALLBACK PADpoll(u8 value) { break; // SET_DS2_NATIVE_MODE case 0x4F: - SET_RESULT(setNativeMode); + if (IsDualshock2(query.port, query.slot)) { + SET_RESULT(setNativeMode); + } + else { + SET_FINAL_RESULT(setNativeMode); + } break; default: query.numBytes = 0; @@ -1084,6 +1155,7 @@ u8 CALLBACK PADpoll(u8 value) { pad->vibrate[query.lastByte-2] = value; } break; + // SET_DS2_NATIVE_MODE case 0x4F: if (query.lastByte == 3 || query.lastByte == 4) { pad->umask[query.lastByte-3] = value; @@ -1155,8 +1227,14 @@ DWORD WINAPI RenameWindowThreadProc(void *lpParameter) { } keyEvent* CALLBACK PADkeyEvent() { + static char eventCount = 0; + eventCount++; + if (eventCount < openCount) { + return 0; + } + eventCount = 0; if (!config.GSThreadUpdates) { - Update(2); + Update(2, 0); } static char shiftDown = 0; static char altDown = 0; @@ -1211,7 +1289,7 @@ keyEvent* CALLBACK PADkeyEvent() { return &ev; } -#define PAD_SAVE_STATE_VERSION 0 +#define PAD_SAVE_STATE_VERSION 1 struct PadPluginFreezeData { char format[8]; @@ -1225,6 +1303,7 @@ struct PadPluginFreezeData { u8 slot; // Currently only use padData[0]. Save room for all 4 slots for simplicity. PadFreezeData padData[4]; + QueryInfo query; }; s32 CALLBACK PADfreeze(int mode, freezeData *data) { @@ -1232,32 +1311,24 @@ s32 CALLBACK PADfreeze(int mode, freezeData *data) { data->size = sizeof(PadPluginFreezeData); } else if (mode == FREEZE_LOAD) { - if (data->size < sizeof(PadPluginFreezeData)) return 0; PadPluginFreezeData &pdata = *(PadPluginFreezeData*)(data->data); - if (pdata.version != PAD_SAVE_STATE_VERSION || strcmp(pdata.format, "PadMode")) { - return 0; - } StopVibrate(); - int port = pdata.port; + if (data->size != sizeof(PadPluginFreezeData) || + pdata.version != PAD_SAVE_STATE_VERSION || + strcmp(pdata.format, "PadMode")) return 0; + unsigned int port = pdata.port; + if (port >= 2) return 0; + if (pdata.query.port == port) { + query = pdata.query; + } for (int slot=0; slot<4; slot++) { - u8 mode = pads[port][slot].mode = pdata.padData[slot].mode; + u8 mode = pdata.padData[slot].mode; if (mode != MODE_DIGITAL && mode != MODE_ANALOG && mode != MODE_DS2_NATIVE) { - ResetPad(port, slot); - continue; + break; } - pads[port][slot].config = pdata.padData[slot].config; - pads[port][slot].modeLock = pdata.padData[slot].modeLock; - memcpy(pads[port][slot].umask, pdata.padData[slot].umask, sizeof(pads[port][slot].umask)); - slots[port] = slot; - // Means I only have to have one chunk of code to parse vibrate info. - // Other plugins don't store it exactly, but think it's technically correct - // to do so, though I could be wrong. - PADstartPoll(port+1); - PADpoll(0x4D); - for (int j=0; j<7; j++) { - PADpoll(pdata.padData[slot].vibrate[j]); - } + // Note sure if the cast is strictly necessary, but feel safest with it there... + *(PadFreezeData*)&pads[port][slot] = pdata.padData[slot]; } slots[port] = pdata.slot; } @@ -1276,6 +1347,7 @@ s32 CALLBACK PADfreeze(int mode, freezeData *data) { pdata.version = PAD_SAVE_STATE_VERSION; pdata.port = port; pdata.slot = slots[port]; + pdata.query = query; for (int slot=0; slot<4; slot++) { pdata.padData[slot] = pads[port][slot]; } @@ -1321,3 +1393,18 @@ extern "C" long _cdecl _ftol2() { return _ftol(); } #endif + +s32 CALLBACK PADqueryMtap(u8 port) { + port--; + if (port > 1) return 0; + return config.multitap[port]; +} + +s32 CALLBACK PADsetSlot(u8 port, u8 slot) { + port--; + slot--; + if (port > 1 || slot > 3) return 0; + // Even if no pad there, record the slot, as it is the active slot regardless. + slots[port] = slot; + return pads[port][slot].enabled; +} diff --git a/plugins/LilyPad/LilyPad.def b/plugins/LilyPad/LilyPad.def index 9754805d5a..43ea74abed 100644 --- a/plugins/LilyPad/LilyPad.def +++ b/plugins/LilyPad/LilyPad.def @@ -20,3 +20,5 @@ EXPORTS PADabout PADupdate PADfreeze + PADsetSlot + PADqueryMtap diff --git a/plugins/LilyPad/LilyPad.rc b/plugins/LilyPad/LilyPad.rc index 9fd6224740..8c3b7ada71 100644 --- a/plugins/LilyPad/LilyPad.rc +++ b/plugins/LilyPad/LilyPad.rc @@ -226,15 +226,15 @@ BEGIN GROUPBOX "Pads",IDC_STATIC,7,140,410,67 CONTROL "Port 1 Multitap",IDC_MULTITAP1,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,14,152,63,10 CONTROL "Port 2 Multitap",IDC_MULTITAP2,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,14,164,63,10 - CONTROL "",IDC_PAD_LIST,"SysListView32",LVS_REPORT | LVS_SINGLESEL | LVS_SHOWSELALWAYS | LVS_ALIGNLEFT | WS_TABSTOP,81,152,183,48,WS_EX_CLIENTEDGE - COMBOBOX IDC_PAD_TYPE,270,153,140,41,CBS_DROPDOWNLIST | CBS_SORT | WS_VSCROLL | WS_TABSTOP + CONTROL "",IDC_PAD_LIST,"SysListView32",LVS_REPORT | LVS_SINGLESEL | LVS_SHOWSELALWAYS | LVS_ALIGNLEFT | WS_TABSTOP,81,151,183,50,WS_EX_CLIENTEDGE + COMBOBOX IDC_PAD_TYPE,270,152,140,41,CBS_DROPDOWNLIST | CBS_SORT | WS_VSCROLL | WS_TABSTOP CONTROL "Use analog mode whenever possible",IDC_ANALOG_START1, - "Button",BS_AUTOCHECKBOX | WS_TABSTOP,270,170,132,10 + "Button",BS_AUTOCHECKBOX | WS_TABSTOP,270,169,132,10 GROUPBOX "Device Diagnostics",IDC_STATIC,7,211,201,99 CONTROL "",IDC_LIST,"SysListView32",LVS_LIST | LVS_SINGLESEL | LVS_SHOWSELALWAYS | LVS_NOSORTHEADER | WS_BORDER | WS_VSCROLL | WS_TABSTOP,15,224,185,61,WS_EX_CLIENTEDGE PUSHBUTTON "Test Device",ID_TEST,86,289,57,15 PUSHBUTTON "Refresh",ID_REFRESH,152,289,48,15 - GROUPBOX "Miscellaneous",IDC_STATIC,216,211,201,35 + GROUPBOX "Miscellaneous",IDC_STATIC,216,211,201,34 CONTROL "Use GS thread (Recommended)",IDC_GS_THREAD_INPUT,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,221,221,116,10 CONTROL "Disable screensaver",IDC_DISABLE_SCREENSAVER,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,221,232,80,10 CONTROL "Local volume control",IDC_VISTA_VOLUME,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,336,221,77,10 diff --git a/plugins/LilyPad/LilyPad_VC2005.vcproj b/plugins/LilyPad/LilyPad_VC2005.vcproj index c7ac387621..9bdaa75218 100644 --- a/plugins/LilyPad/LilyPad_VC2005.vcproj +++ b/plugins/LilyPad/LilyPad_VC2005.vcproj @@ -80,13 +80,12 @@ diff --git a/plugins/LilyPad/RawInput.cpp b/plugins/LilyPad/RawInput.cpp index 32d299a09d..0fbde4513f 100644 --- a/plugins/LilyPad/RawInput.cpp +++ b/plugins/LilyPad/RawInput.cpp @@ -111,8 +111,6 @@ public: } }; -static POINT rawOrigCursorPos; - class RawInputMouse : public WindowsMouse { public: HANDLE hDevice; @@ -135,8 +133,7 @@ public: // EatWndProc fail. In all other cases, no unmatched initialization/cleanup // lines. if (!rawMouseActivatedCount++) { - GetCursorPos(&rawOrigCursorPos); - ShowCursor(0); + GetMouseCapture(hWnd); if (!rawKeyboardActivatedCount && !EatWndProc(hWnd, RawInputWndProc)) { Deactivate(); return 0; @@ -157,9 +154,8 @@ public: active = 0; rawMouseActivatedCount --; if (!rawMouseActivatedCount) { - ShowCursor(1); ReleaseRawMice(); - SetCursorPos(rawOrigCursorPos.x, rawOrigCursorPos.y); + ReleaseMouseCapture(); if (!rawKeyboardActivatedCount) { ReleaseExtraProc(RawInputWndProc); } @@ -225,6 +221,11 @@ ExtraWndProcResult RawInputWndProc(HWND hWnd, UINT uMsg, WPARAM wParam, LPARAM l memset(dev->physicalControlState, 0, sizeof(int) * dev->numPhysicalControls); } } + else if (uMsg == WM_SIZE && rawMouseActivatedCount) { + // Doesn't really matter for raw mice, as I disable legacy stuff, but shouldn't hurt. + WindowsMouse::WindowResized(hWnd); + } + return CONTINUE_BLISSFULLY; } diff --git a/plugins/LilyPad/WindowsMessaging.cpp b/plugins/LilyPad/WindowsMessaging.cpp index dd36b70eb3..c85783e430 100644 --- a/plugins/LilyPad/WindowsMessaging.cpp +++ b/plugins/LilyPad/WindowsMessaging.cpp @@ -79,20 +79,10 @@ public: Deactivate(); return 0; } + GetMouseCapture(hWnd); - SetCapture(hWnd); - ShowCursor(0); - - GetCursorPos(&origCursorPos); active = 1; - RECT r; - GetWindowRect(hWnd, &r); - ClipCursor(&r); - center.x = (r.left + r.right)/2; - center.y = (r.top + r.bottom)/2; - SetCursorPos(center.x, center.y); - wmm = this; AllocState(); @@ -102,10 +92,7 @@ public: void Deactivate() { FreeState(); if (active) { - ClipCursor(0); - ReleaseCapture(); - ShowCursor(1); - SetCursorPos(origCursorPos.x, origCursorPos.y); + ReleaseMouseCapture(); if (!wmk) ReleaseExtraProc(WindowsMessagingWndProc); active = 0; @@ -179,6 +166,9 @@ ExtraWndProcResult WindowsMessagingWndProc(HWND hWnd, UINT uMsg, WPARAM wParam, wmm->UpdateAxis(3, ((int)wParam>>16)/WHEEL_DELTA); return NO_WND_PROC; } + else if (uMsg == WM_SIZE && wmm->active) { + WindowsMouse::WindowResized(hWnd); + } // Taken care of elsewhere. When binding, killing focus means stop reading input. // When running PCSX2, I release all mouse and keyboard input elsewhere. /*else if (uMsg == WM_KILLFOCUS) { diff --git a/plugins/LilyPad/WindowsMouse.cpp b/plugins/LilyPad/WindowsMouse.cpp index 72a951f925..6d2e4db653 100644 --- a/plugins/LilyPad/WindowsMouse.cpp +++ b/plugins/LilyPad/WindowsMouse.cpp @@ -2,6 +2,9 @@ #include "VKey.h" #include "WindowsMouse.h" +POINT WindowsMouse::origCursorPos; +POINT WindowsMouse::center; + WindowsMouse::WindowsMouse(DeviceAPI api, int hWheel, wchar_t *displayName, wchar_t *instanceID, wchar_t *deviceID) : Device(api, MOUSE, displayName, instanceID, deviceID) { int i; @@ -41,4 +44,32 @@ void WindowsMouse::UpdateAxis(unsigned int axis, int delta) { physicalControlState[5+axis] += (delta<<(16 - 3*(axis < 2))); } +void WindowsMouse::WindowResized(HWND hWnd) { + RECT r; + GetWindowRect(hWnd, &r); + ClipCursor(&r); + center.x = (r.left + r.right)/2; + center.y = (r.top + r.bottom)/2; + SetCursorPos(center.x, center.y); +} +void WindowsMouse::GetMouseCapture(HWND hWnd) { + SetCapture(hWnd); + ShowCursor(0); + + GetCursorPos(&origCursorPos); + + RECT r; + GetWindowRect(hWnd, &r); + ClipCursor(&r); + center.x = (r.left + r.right)/2; + center.y = (r.top + r.bottom)/2; + SetCursorPos(center.x, center.y); +} + +void WindowsMouse::ReleaseMouseCapture() { + ClipCursor(0); + ReleaseCapture(); + ShowCursor(1); + SetCursorPos(origCursorPos.x, origCursorPos.y); +} diff --git a/plugins/LilyPad/WindowsMouse.h b/plugins/LilyPad/WindowsMouse.h index b3085c5bb9..5fa5772c4a 100644 --- a/plugins/LilyPad/WindowsMouse.h +++ b/plugins/LilyPad/WindowsMouse.h @@ -3,8 +3,16 @@ // Shared functionality for WM and RAW keyboards. class WindowsMouse : public Device { public: - POINT origCursorPos; - POINT center; + // Used by GetMouseCapture()/ReleaseMouseCapture() + // Static because can have multiple raw mice active at once, + // and only get/release capture once. + static POINT origCursorPos; + static POINT center; + + static void GetMouseCapture(HWND hWnd); + static void WindowResized(HWND hWnd); + static void ReleaseMouseCapture(); + // hWheel variable lets me display no horizontal wheel for raw input, just to make it clear // that it's not supported. WindowsMouse(DeviceAPI api, int hWheel, wchar_t *displayName, wchar_t *instanceID=0, wchar_t *deviceID=0); diff --git a/plugins/LilyPad/WndProcEater.cpp b/plugins/LilyPad/WndProcEater.cpp index adb5a40d88..7d4627ba03 100644 --- a/plugins/LilyPad/WndProcEater.cpp +++ b/plugins/LilyPad/WndProcEater.cpp @@ -6,6 +6,12 @@ static ExtraWndProc* extraProcs = 0; static int numExtraProcs = 0; void ReleaseExtraProc(ExtraWndProc proc) { + // Probably isn't needed, but just in case... + // Creating and destroying the mutex adds some inefficiency, + // but this function is only called on emulation start and on focus/unfocus. + HANDLE hMutex = CreateMutexA(0, 0, "LilyPad"); + if (hMutex) WaitForSingleObject(hMutex, 100); + for (int i=0; i>15)&1)) & ((v>>14)&1); // Just double. - return v << 1; + return v * 2; } class XInputDevice : public Device { diff --git a/plugins/LilyPad/resource.h b/plugins/LilyPad/resource.h index de3c4b4913..0fba1fbb30 100644 --- a/plugins/LilyPad/resource.h +++ b/plugins/LilyPad/resource.h @@ -55,7 +55,6 @@ #define IDC_DPAD 0x1008 #define IDC_LSTICK 0x1009 #define IDC_RSTICK 0x100A -#define ID_GUITAR_HERO 0x10FB #define ID_LOCK_BUTTONS 0x10FC #define ID_LOCK 0x10FD #define ID_LOCK_DIRECTION 0x10FE diff --git a/plugins/USBnull/Windows/USBnull_vc2008.vcproj b/plugins/USBnull/Windows/USBnull_vc2008.vcproj index 9bc02c5ad4..87cafd596e 100644 --- a/plugins/USBnull/Windows/USBnull_vc2008.vcproj +++ b/plugins/USBnull/Windows/USBnull_vc2008.vcproj @@ -19,7 +19,7 @@ @@ -113,13 +106,10 @@ @@ -115,11 +110,8 @@ Optimization="2" InlineFunctionExpansion="1" OmitFramePointers="true" - StringPooling="true" RuntimeLibrary="0" UsePrecompiledHeader="0" - WarningLevel="3" - DebugInformationFormat="3" /> handle == snd_async_handler_get_pcm(pcm_callback) ); @@ -85,6 +87,10 @@ public: int pchannels = 2; snd_pcm_format_t format = SND_PCM_FORMAT_S16_LE; + handle = NULL; + pcm_callback = NULL; + pspeed = SAMPLE_RATE; + // buffer time and period time are in microseconds... // (don't simplify the equation below -- it'll just cause integer rounding errors. period_time = (SndOutPacketSize*1000) / (SampleRate / 1000); @@ -191,13 +197,11 @@ public: handle = NULL; } - virtual void Configure(HWND parent) + virtual void Configure(uptr parent) { } - virtual bool Is51Out() const { return false; } - { - } + virtual bool Is51Out() const { return false; } s32 Test() const { diff --git a/plugins/spu2-x/src/Linux/Config.h b/plugins/spu2-x/src/Linux/Config.h index e49aa81205..ae3a159d8e 100644 --- a/plugins/spu2-x/src/Linux/Config.h +++ b/plugins/spu2-x/src/Linux/Config.h @@ -103,11 +103,11 @@ public: static void ReadSettings(); static void WriteSettings(); - //static void OpenDialog( HWND hWnd ); + static void OpenDialog( uptr hWnd ); protected: static void ClampValues(); - //static BOOL CALLBACK DialogProc(HWND hWnd,UINT uMsg,WPARAM wParam,LPARAM lParam); + //static bool CALLBACK DialogProc(uptr hWnd,u32 uMsg,WPARAM wParam,LPARAM lParam); }; diff --git a/plugins/spu2-x/src/Linux/ConfigSoundTouch.cpp b/plugins/spu2-x/src/Linux/ConfigSoundTouch.cpp new file mode 100644 index 0000000000..be18a39d28 --- /dev/null +++ b/plugins/spu2-x/src/Linux/ConfigSoundTouch.cpp @@ -0,0 +1,57 @@ +/* SPU2-X, A plugin for Emulating the Sound Processing Unit of the Playstation 2 + * Developed and maintained by the Pcsx2 Development Team. + * + * Original portions from SPU2ghz are (c) 2008 by David Quintana [gigaherz] + * + * This library is free software; you can redistribute it and/or modify it under + * the terms of the GNU Lesser General Public License as published by the Free + * Software Foundation; either version 2.1 of the the License, or (at your + * option) any later version. + * + * This library is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License + * for more details. + * + * You should have received a copy of the GNU Lesser General Public License along + * with this library; if not, write to the Free Software Foundation, Inc., 59 + * Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#include "Dialogs.h" + +int SoundtouchCfg::SequenceLenMS = 63; +int SoundtouchCfg::SeekWindowMS = 16; +int SoundtouchCfg::OverlapMS = 7; + +void SoundtouchCfg::ClampValues() +{ + Clampify( SequenceLenMS, SequenceLen_Min, SequenceLen_Max ); + Clampify( SeekWindowMS, SeekWindow_Min, SeekWindow_Max ); + Clampify( OverlapMS, Overlap_Min, Overlap_Max ); +} + +void SoundtouchCfg::ReadSettings() +{ + //SequenceLenMS = CfgReadInt( L"SOUNDTOUCH", L"SequenceLengthMS", 63 ); + //SeekWindowMS = CfgReadInt( L"SOUNDTOUCH", L"SeekWindowMS", 16 ); + //OverlapMS = CfgReadInt( L"SOUNDTOUCH", L"OverlapMS", 7 ); + + ClampValues(); +} + +void SoundtouchCfg::WriteSettings() +{ + //CfgWriteInt( L"SOUNDTOUCH", L"SequenceLengthMS", SequenceLenMS ); + //CfgWriteInt( L"SOUNDTOUCH", L"SeekWindowMS", SeekWindowMS ); + //CfgWriteInt( L"SOUNDTOUCH", L"OverlapMS", OverlapMS ); +} + +/*bool CALLBACK SoundtouchCfg::DialogProc(uptr hWnd,u32 uMsg,uptr wParam,uptr lParam) +{ +}*/ + +void SoundtouchCfg::OpenDialog( uptr hWnd ) +{ +} diff --git a/plugins/spu2-x/src/Makefile.am b/plugins/spu2-x/src/Makefile.am index 56eaabf0a5..41449973a1 100644 --- a/plugins/spu2-x/src/Makefile.am +++ b/plugins/spu2-x/src/Makefile.am @@ -3,8 +3,8 @@ AUTOMAKE_OPTIONS = foreign noinst_LIBRARIES = libSPU2X.a INCLUDES = -I@srcdir@/../../../common/include -I@srcdir@/3rdparty -I@srcdir@/../../../3rdparty -I@srcdir@/Linux -libSPU2X_a_CXXFLAGS = $(shell pkg-config --cflags gtk+-2.0) -libSPU2X_a_CFLAGS = $(shell pkg-config --cflags gtk+-2.0) +libSPU2X_a_CXXFLAGS = $(shell pkg-config --cflags gtk+-2.0) -liconv +libSPU2X_a_CFLAGS = $(shell pkg-config --cflags gtk+-2.0) -liconv if X86_64 libSPU2X_a_CXXFLAGS += -fPIC @@ -33,6 +33,14 @@ Dma.cpp Lowpass.cpp RegLog.cpp Reverb.cpp SndOut.cpp Spu2replay.cpp Wavedump_w libSPU2X_a_SOURCES += BaseTypes.h Debug.h Dma.h Lowpass.h RegTable.h SndOut.h ConvertUTF.h \ Spu2.h Spu2replay.h defs.h regs.h spdif.h utf8.h -libSPU2X_a_SOURCES += Linux/Config.h Linux/Config.cpp Linux/ConfigSoundTouch.cpp Linux/Linux.h Linux/Alsa.cpp Linux/Alsa.h Linux/Dialogs.cpp Linux/Dialogs.h + +libSPU2X_a_SOURCES += Linux/Config.h Linux/Config.cpp Linux/Linux.h Linux/Alsa.cpp Linux/Alsa.h \ +Linux/Dialogs.cpp Linux/Dialogs.h Linux/ConfigSoundTouch.cpp + +libSPU2X_a_SOURCES += 3rdparty/liba52/bitstream.c 3rdparty/liba52/downmix.c 3rdparty/liba52/parse.c \ +3rdparty/liba52/bit_allocate.c 3rdparty/liba52/imdct.c \ +3rdparty/liba52/a52.h 3rdparty/liba52/attributes.h 3rdparty/liba52/config.h 3rdparty/liba52/inttypes.h \ +3rdparty/liba52/tendra.h 3rdparty/liba52/a52_internal.h 3rdparty/liba52/bitstream.h \ +3rdparty/liba52/mm_accel.h 3rdparty/liba52/tables.h #SUBDIRS = 3rdparty/SoundTouch diff --git a/plugins/spu2-x/src/Windows/Spu2-X_vs2008.vcproj b/plugins/spu2-x/src/Windows/Spu2-X_vs2008.vcproj index 59cf6634dc..7555d04ad8 100644 --- a/plugins/spu2-x/src/Windows/Spu2-X_vs2008.vcproj +++ b/plugins/spu2-x/src/Windows/Spu2-X_vs2008.vcproj @@ -18,11 +18,11 @@ @@ -208,7 +193,7 @@ @@ -370,9 +346,7 @@ OutputFile="$(OutDir)\$(ProjectName)-dbg.dll" LinkIncremental="2" ModuleDefinitionFile=".\Spu2-X.def" - GenerateDebugInformation="true" RandomizedBaseAddress="1" - DataExecutionPrevention="0" SupportUnloadOfDelayLoadedDLL="false" ImportLibrary=".\Debug/spu2-x.lib" TargetMachine="1" diff --git a/plugins/spu2-x/src/configure.ac b/plugins/spu2-x/src/configure.ac index 25e31aff9a..eb2596fcef 100644 --- a/plugins/spu2-x/src/configure.ac +++ b/plugins/spu2-x/src/configure.ac @@ -98,6 +98,7 @@ AC_SUBST(SHARED_LDFLAGS) AC_CHECK_LIB(stdc++,main,[LIBS="$LIBS -lstdc++"]) AC_CHECK_LIB(dl,main,[LIBS="$LIBS -ldl"]) AC_CHECK_LIB(asound,main,[LIBS="$LIBS -lasound"]) +AC_CHECK_LIB(iconv,main,[LIBS="$LIBS -liconv"]) AC_CHECK_FUNCS(iconv, [ have_iconv="1" ], [ have_iconv="0" ]) AC_OUTPUT([ diff --git a/plugins/xpad/xpad.cpp b/plugins/xpad/xpad.cpp index 1551c3dd0f..94aea468cd 100644 --- a/plugins/xpad/xpad.cpp +++ b/plugins/xpad/xpad.cpp @@ -139,10 +139,63 @@ struct XPadButton }; }; +class XInput +{ + int m_pad; + bool m_connected; + XINPUT_STATE m_state; + XINPUT_VIBRATION m_vibration; + clock_t m_lastpoll; + +public: + XInput(int pad) + : m_pad(pad) + , m_connected(false) + , m_lastpoll(0) + { + memset(&m_vibration, 0, sizeof(m_vibration)); + } + + bool GetState(XINPUT_STATE& state) + { + clock_t now = clock(); + clock_t delay = m_connected ? 16 : 1000; // poll once per frame (16 ms is about 60 fps) + + if(now > m_lastpoll + delay) + { + memset(&m_state, 0, sizeof(m_state)); + + m_connected = XInputGetState(m_pad, &m_state) == S_OK; // ERROR_DEVICE_NOT_CONNECTED is not an error, SUCCEEDED(...) won't work here + + m_lastpoll = now; + } + + memcpy(&state, &m_state, sizeof(state)); + + return m_connected; + } + + void SetState(XINPUT_VIBRATION& vibration) + { + if(m_vibration.wLeftMotorSpeed != vibration.wLeftMotorSpeed || m_vibration.wRightMotorSpeed != vibration.wRightMotorSpeed) + { + XInputSetState(m_pad, &vibration); + + m_vibration = vibration; + } + } + + bool IsConnected() + { + return m_connected; + } +}; + class XPad { public: int m_pad; + XInput m_xinput; bool m_connected; bool m_ds2native; bool m_analog; @@ -175,8 +228,7 @@ public: public: XPad(int pad) - : m_pad(pad) - , m_connected(false) + : m_xinput(pad) , m_ds2native(false) , m_analog(!s_ps2) // defaults to analog off for ps2 , m_locked(false) @@ -202,11 +254,7 @@ public: { XINPUT_STATE state; - memset(&state, 0, sizeof(state)); - - m_connected = SUCCEEDED(XInputGetState(m_pad, &state)); - - if(m_connected) + if(m_xinput.GetState(state)) { SetButton(state.Gamepad.wButtons, XINPUT_GAMEPAD_BACK, XPadButton::Select); SetButton(state.Gamepad.wButtons, XINPUT_GAMEPAD_LEFT_THUMB, XPadButton::L3); @@ -242,7 +290,7 @@ public: if(index == 1) { - if(m_connected) + if(m_xinput.IsConnected()) { XINPUT_VIBRATION vibraton; @@ -254,7 +302,7 @@ public: vibraton.wRightMotorSpeed = m_small << 8; } - XInputSetState(m_pad, &vibraton); + m_xinput.SetState(vibraton); } } diff --git a/plugins/zerogs/dx/Windows/zerogs_2008.vcproj b/plugins/zerogs/dx/Windows/zerogs_2008.vcproj index 586f9aa94e..06357c714d 100644 --- a/plugins/zerogs/dx/Windows/zerogs_2008.vcproj +++ b/plugins/zerogs/dx/Windows/zerogs_2008.vcproj @@ -18,11 +18,11 @@ tag.eop ) return; continue; - } + /*}*/ return; } diff --git a/plugins/zerogs/opengl/Linux/Linux.cpp b/plugins/zerogs/opengl/Linux/Linux.cpp index 4013222bf5..0beba41c15 100644 --- a/plugins/zerogs/opengl/Linux/Linux.cpp +++ b/plugins/zerogs/opengl/Linux/Linux.cpp @@ -31,6 +31,7 @@ extern "C" { } #include "Linux.h" +#include "zerogs.h" #include @@ -272,9 +273,9 @@ void CALLBACK GSconfigure() confOpts.value = 0x00000040; confOpts.desc = "No color clamping - 00000040\nSpeeds up games, but might be too bright or too dim."; mapConfOpts["00000040"] = confOpts; - confOpts.value = 0x00000080; - confOpts.desc = "FFX hack - 00000080\nShows missing geometry."; - mapConfOpts["00000080"] = confOpts; +// confOpts.value = 0x00000080; +// confOpts.desc = "FFX hack - 00000080\nShows missing geometry."; +// mapConfOpts["00000080"] = confOpts; confOpts.value = 0x00000200; confOpts.desc = "Disable depth updates - 00000200"; mapConfOpts["00000200"] = confOpts; @@ -290,9 +291,9 @@ void CALLBACK GSconfigure() confOpts.value = 0x00002000; confOpts.desc = "Disable stencil buffer - 00002000\nUsually safe to do for simple scenes."; mapConfOpts["00002000"] = confOpts; - confOpts.value = 0x00004000; - confOpts.desc = "No vertical stripes - 00004000\nTry when there's a lot of garbage on screen."; - mapConfOpts["00004000"] = confOpts; +// confOpts.value = 0x00004000; +// confOpts.desc = "No vertical stripes - 00004000\nTry when there's a lot of garbage on screen."; +// mapConfOpts["00004000"] = confOpts; confOpts.value = 0x00008000; confOpts.desc = "No depth resolve - 00008000\nMight give z buffer artifacts."; mapConfOpts["00008000"] = confOpts; @@ -314,6 +315,16 @@ void CALLBACK GSconfigure() confOpts.value = 0x00200000; confOpts.desc = "32 bit render targets - 00200000"; mapConfOpts["00200000"] = confOpts; + + confOpts.value = 0x00400000; + confOpts.desc = "Path 3 Hack - 00400000"; + mapConfOpts["00400000"] = confOpts; + confOpts.value = 0x00800000; + confOpts.desc = "Parallelize Contexts - 00800000 (Might speed things up, xenosaga is faster)"; + mapConfOpts["00800000"] = confOpts; + confOpts.value = 0x01000000; + confOpts.desc = "Specular Highlights - 01000000\nMakes xenosaga graphics faster by removing highlights"; + mapConfOpts["01000000"] = confOpts; for(map::iterator it = mapConfOpts.begin(); it != mapConfOpts.end(); ++it) { diff --git a/plugins/zerogs/opengl/zerogs.h b/plugins/zerogs/opengl/zerogs.h index c8fbf3fc7b..c7f369a2bc 100644 --- a/plugins/zerogs/opengl/zerogs.h +++ b/plugins/zerogs/opengl/zerogs.h @@ -54,7 +54,6 @@ inline void* wglGetProcAddress(const char* x) { #include #include #include -#include using namespace std; #ifndef SAFE_DELETE @@ -111,6 +110,16 @@ static __forceinline const char *error_name(int err) } } +#define GL_ERROR_LOG() \ +{ \ + GLenum myGLerror = glGetError(); \ + \ + if( myGLerror != GL_NO_ERROR ) \ + { \ + ERROR_LOG("%s:%d: gl error %s\n", __FILE__, (int)__LINE__, error_name(myGLerror)); \ + } \ +}\ + #define GL_REPORT_ERROR() \ { \ err = glGetError(); \ @@ -200,13 +209,13 @@ struct VERTEXSHADER #define GAME_NOTARGETRESOLVE 0x10 #define GAME_EXACTCOLOR 0x20 #define GAME_NOCOLORCLAMP 0x40 -#define GAME_FFXHACK 0x80 +//#define GAME_FFXHACK 0x80 #define GAME_NODEPTHUPDATE 0x0200 #define GAME_QUICKRESOLVE1 0x0400 #define GAME_NOQUICKRESOLVE 0x0800 #define GAME_NOTARGETCLUT 0x1000 // full 16 bit resolution #define GAME_NOSTENCIL 0x2000 -#define GAME_VSSHACKOFF 0x4000 // vertical stripe syndrome +//#define GAME_VSSHACKOFF 0x4000 // vertical stripe syndrome #define GAME_NODEPTHRESOLVE 0x8000 #define GAME_FULL16BITRES 0x00010000 #define GAME_RESOLVEPROMOTED 0x00020000 @@ -218,8 +227,8 @@ struct VERTEXSHADER #define GAME_DOPARALLELCTX 0x00800000 // tries to parallelize both contexts so that render calls are reduced (xenosaga) // makes the game faster, but can be buggy #define GAME_XENOSPECHACK 0x01000000 // xenosaga specularity hack (ignore any zmask=1 draws) -#define GAME_PARTIALPOINTERS 0x02000000 // whenver the texture or render target are small, tries to look for bigger ones to read from -#define GAME_PARTIALDEPTH 0x04000000 // tries to save depth targets as much as possible across height changes +//#define GAME_PARTIALPOINTERS 0x02000000 // whenver the texture or render target are small, tries to look for bigger ones to read from +//#define GAME_PARTIALDEPTH 0x04000000 // tries to save depth targets as much as possible across height changes #define USEALPHATESTING (!(g_GameSettings&GAME_NOALPHATEST)) diff --git a/plugins/zeropad/Windows/ZeroPAD_2008.vcproj b/plugins/zeropad/Windows/ZeroPAD_2008.vcproj index f74b0dd16b..f1e2d0552f 100644 --- a/plugins/zeropad/Windows/ZeroPAD_2008.vcproj +++ b/plugins/zeropad/Windows/ZeroPAD_2008.vcproj @@ -19,7 +19,7 @@ @@ -122,8 +120,6 @@ PreprocessorDefinitions="NDEBUG;_USRDLL;ZEROPAD_EXPORTS" RuntimeLibrary="0" UsePrecompiledHeader="0" - WarningLevel="3" - DebugInformationFormat="3" /> @@ -170,9 +163,9 @@ diff --git a/plugins/zerospu2/Windows/ZeroSPU2_2008.vcproj b/plugins/zerospu2/Windows/ZeroSPU2_2008.vcproj index 65fff9e082..4d9c45b67b 100644 --- a/plugins/zerospu2/Windows/ZeroSPU2_2008.vcproj +++ b/plugins/zerospu2/Windows/ZeroSPU2_2008.vcproj @@ -19,7 +19,7 @@ @@ -128,8 +124,6 @@ RuntimeLibrary="0" BufferSecurityCheck="false" UsePrecompiledHeader="0" - WarningLevel="3" - DebugInformationFormat="3" />