diff --git a/pcsx2/Interpreter.cpp b/pcsx2/Interpreter.cpp
index 4dfc56b4ce..8a5bb75279 100644
--- a/pcsx2/Interpreter.cpp
+++ b/pcsx2/Interpreter.cpp
@@ -460,9 +460,10 @@ void BGEZALL()   // Branch if Rs >= 0 and link
 *********************************************************/
 void JR()
 {
-	// 0x33ad48 is the return address of the function that populate the TLB cache
+	// 0x33ad48 and 0x35060c are the return address of the function (0x356250) that populate the TLB cache
 	if (EmuConfig.Gamefixes.GoemonTlbHack) {
-		if (cpuRegs.GPR.r[_Rs_].UL[0] == 0x33ad48)
+		u32 add = cpuRegs.GPR.r[_Rs_].UL[0];
+		if (add == 0x33ad48 || add == 0x35060c)
 			GoemonPreloadTlb();
 	}
 	doBranch(cpuRegs.GPR.r[_Rs_].UL[0]);
diff --git a/pcsx2/x86/ix86-32/iR5900-32.cpp b/pcsx2/x86/ix86-32/iR5900-32.cpp
index edc3fc7ef6..82578aa8f3 100644
--- a/pcsx2/x86/ix86-32/iR5900-32.cpp
+++ b/pcsx2/x86/ix86-32/iR5900-32.cpp
@@ -1740,8 +1740,8 @@ static void __fastcall recRecompile( const u32 startpc )
 	}
 
 	if (EmuConfig.Gamefixes.GoemonTlbHack) {
-		if (pc == 0x33ad48) {
-			// 0x33ad48 is the return address of the function that populate the TLB cache
+		if (pc == 0x33ad48 || pc == 0x35060c) {
+			// 0x33ad48 and 0x35060c are the return address of the function (0x356250) that populate the TLB cache
 			xCALL(GoemonPreloadTlb);
 		} else if (pc == 0x3563b8) {
 			// 0x3563b8 is the start address of the function that invalidate entry in TLB cache