From c9d64d63e948c93c3b64af6a1edb8edd9138cbbd Mon Sep 17 00:00:00 2001
From: ramapcsx2 <ramapcsx2@a6443dda-0b58-4228-96e9-037be469359c>
Date: Thu, 25 Sep 2008 19:33:33 +0000
Subject: [PATCH] SSE opcodes now all inlined. Changed all new inlining hints
 to _inline.

git-svn-id: http://pcsx2-playground.googlecode.com/svn/trunk@147 a6443dda-0b58-4228-96e9-037be469359c
---
 pcsx2/x86/ix86/ix86.c     | 656 ++++++++++++++++++------------------
 pcsx2/x86/ix86/ix86_sse.c | 678 +++++++++++++++++++-------------------
 2 files changed, 667 insertions(+), 667 deletions(-)

diff --git a/pcsx2/x86/ix86/ix86.c b/pcsx2/x86/ix86/ix86.c
index cf4a99ecd4..20569b9386 100644
--- a/pcsx2/x86/ix86/ix86.c
+++ b/pcsx2/x86/ix86/ix86.c
@@ -67,7 +67,7 @@ u32 *j32Ptr[32];
 
 extern void SysPrintf(char *fmt, ...);
 
-__forceinline void WriteRmOffset(x86IntRegType to, int offset)
+_inline void WriteRmOffset(x86IntRegType to, int offset)
 {
 	if( (to&7) == ESP ) {
 		if( offset == 0 ) {
@@ -100,7 +100,7 @@ __forceinline void WriteRmOffset(x86IntRegType to, int offset)
 	}
 }
 
-__forceinline void WriteRmOffsetFrom(x86IntRegType to, x86IntRegType from, int offset)
+_inline void WriteRmOffsetFrom(x86IntRegType to, x86IntRegType from, int offset)
 {
     if ((from&7) == ESP) {
 		if( offset == 0 ) {
@@ -134,11 +134,11 @@ __forceinline void WriteRmOffsetFrom(x86IntRegType to, x86IntRegType from, int o
 }
 
 // This function is just for rec debugging purposes
-__forceinline void CheckX86Ptr( void )
+_inline void CheckX86Ptr( void )
 {
 }
 
-__forceinline void write64( u64 val )
+_inline void write64( u64 val )
 { 
 #ifdef _DEBUG
    CheckX86Ptr( );
@@ -148,17 +148,17 @@ __forceinline void write64( u64 val )
    x86Ptr += 8; 
 }
 
-__forceinline void ModRM( int mod, int reg, int rm )
+_inline void ModRM( int mod, int reg, int rm )
 {
 	write8( ( mod << 6 ) | ( (reg & 7) << 3 ) | ( rm & 7 ) );
 }
 
-__forceinline void SibSB( int ss, int index, int base )
+_inline void SibSB( int ss, int index, int base )
 {
 	write8( ( ss << 6 ) | ( (index & 7) << 3 ) | ( base & 7 ) );
 }
 
-__forceinline void SET8R( int cc, int to )
+_inline void SET8R( int cc, int to )
 {
     RexB(0, to);
 	write8( 0x0F );
@@ -189,7 +189,7 @@ __forceinline u32* J32Rel( int cc, u32 to )
    return (u32*)( x86Ptr - 4 );
 }
 
-__forceinline void CMOV32RtoR( int cc, int to, int from )
+_inline void CMOV32RtoR( int cc, int to, int from )
 {
     RexRB(0,to, from);
 	write8( 0x0F );
@@ -197,7 +197,7 @@ __forceinline void CMOV32RtoR( int cc, int to, int from )
 	ModRM( 3, to, from );
 }
 
-__forceinline void CMOV32MtoR( int cc, int to, uptr from )
+_inline void CMOV32MtoR( int cc, int to, uptr from )
 {
     RexR(0, to);
 	write8( 0x0F );
@@ -207,18 +207,18 @@ __forceinline void CMOV32MtoR( int cc, int to, uptr from )
 }
 
 ////////////////////////////////////////////////////
-__forceinline void x86SetPtr( char* ptr ) 
+_inline void x86SetPtr( char* ptr ) 
 {
 	x86Ptr = ptr;
 }
 
 ////////////////////////////////////////////////////
-__forceinline void x86Shutdown( void )
+_inline void x86Shutdown( void )
 {
 }
 
 ////////////////////////////////////////////////////
-__forceinline void x86SetJ8( u8* j8 )
+_inline void x86SetJ8( u8* j8 )
 {
 	u32 jump = ( x86Ptr - (s8*)j8 ) - 1;
 
@@ -229,7 +229,7 @@ __forceinline void x86SetJ8( u8* j8 )
 	*j8 = (u8)jump;
 }
 
-__forceinline void x86SetJ8A( u8* j8 )
+_inline void x86SetJ8A( u8* j8 )
 {
 	u32 jump = ( x86Ptr - (s8*)j8 ) - 1;
 
@@ -250,7 +250,7 @@ __forceinline void x86SetJ8A( u8* j8 )
 	*j8 = (u8)jump;
 }
 
-__forceinline void x86SetJ16( u16 *j16 )
+_inline void x86SetJ16( u16 *j16 )
 {
 	// doesn't work
 	u32 jump = ( x86Ptr - (s8*)j16 ) - 2;
@@ -262,7 +262,7 @@ __forceinline void x86SetJ16( u16 *j16 )
 	*j16 = (u16)jump;
 }
 
-__forceinline void x86SetJ16A( u16 *j16 )
+_inline void x86SetJ16A( u16 *j16 )
 {
 	if( ((uptr)x86Ptr&0xf) > 4 ) {
 		while((uptr)x86Ptr&0xf) *x86Ptr++ = 0x90;
@@ -271,19 +271,19 @@ __forceinline void x86SetJ16A( u16 *j16 )
 }
 
 ////////////////////////////////////////////////////
-__forceinline void x86SetJ32( u32* j32 ) 
+_inline void x86SetJ32( u32* j32 ) 
 {
 	*j32 = ( x86Ptr - (s8*)j32 ) - 4;
 }
 
-__forceinline void x86SetJ32A( u32* j32 )
+_inline void x86SetJ32A( u32* j32 )
 {
 	while((uptr)x86Ptr&0xf) *x86Ptr++ = 0x90;
 	x86SetJ32(j32);
 }
 
 ////////////////////////////////////////////////////
-__forceinline void x86Align( int bytes ) 
+_inline void x86Align( int bytes ) 
 {
 	// fordward align
 	x86Ptr = (s8*)( ( (uptr)x86Ptr + bytes - 1) & ~( bytes - 1 ) );
@@ -293,12 +293,12 @@ __forceinline void x86Align( int bytes )
 /* IX86 intructions */
 /********************/
 
-__forceinline void STC( void )
+_inline void STC( void )
 {
    write8( 0xF9 );
 }
 
-__forceinline void CLC( void )
+_inline void CLC( void )
 {
    write8( 0xF8 );
 }
@@ -308,7 +308,7 @@ __forceinline void CLC( void )
 ////////////////////////////////////
 
 /* mov r64 to r64 */
-__forceinline void MOV64RtoR( x86IntRegType to, x86IntRegType from ) 
+_inline void MOV64RtoR( x86IntRegType to, x86IntRegType from ) 
 {
 	RexRB(1, from, to);
 	write8( 0x89 );
@@ -316,7 +316,7 @@ __forceinline void MOV64RtoR( x86IntRegType to, x86IntRegType from )
 }
 
 /* mov r64 to m64 */
-__forceinline void MOV64RtoM( uptr to, x86IntRegType from ) 
+_inline void MOV64RtoM( uptr to, x86IntRegType from ) 
 {
 	RexR(1, from);
 	write8( 0x89 );
@@ -325,7 +325,7 @@ __forceinline void MOV64RtoM( uptr to, x86IntRegType from )
 }
 
 /* mov m64 to r64 */
-__forceinline void MOV64MtoR( x86IntRegType to, uptr from ) 
+_inline void MOV64MtoR( x86IntRegType to, uptr from ) 
 {
 	RexR(1, to);
 	write8( 0x8B );
@@ -334,7 +334,7 @@ __forceinline void MOV64MtoR( x86IntRegType to, uptr from )
 }
 
 /* mov imm32 to m64 */
-__forceinline void MOV64I32toM(uptr to, u32 from ) 
+_inline void MOV64I32toM(uptr to, u32 from ) 
 {
 	Rex(1, 0, 0, 0);
 	write8( 0xC7 );
@@ -344,7 +344,7 @@ __forceinline void MOV64I32toM(uptr to, u32 from )
 }
 
 // mov imm64 to r64
-__forceinline void MOV64ItoR( x86IntRegType to, u64 from)
+_inline void MOV64ItoR( x86IntRegType to, u64 from)
 {
     RexB(1, to);
 	write8( 0xB8 | (to & 0x7) ); 
@@ -352,7 +352,7 @@ __forceinline void MOV64ItoR( x86IntRegType to, u64 from)
 }
 
 /* mov imm32 to r64 */
-__forceinline void MOV64I32toR( x86IntRegType to, s32 from ) 
+_inline void MOV64I32toR( x86IntRegType to, s32 from ) 
 {
 	RexB(1, to);
 	write8( 0xC7 ); 
@@ -361,7 +361,7 @@ __forceinline void MOV64I32toR( x86IntRegType to, s32 from )
 }
 
 // mov imm64 to [r64+off]
-__forceinline void MOV64ItoRmOffset( x86IntRegType to, u32 from, int offset)
+_inline void MOV64ItoRmOffset( x86IntRegType to, u32 from, int offset)
 {
     RexB(1,to);
 	write8( 0xC7 );
@@ -370,7 +370,7 @@ __forceinline void MOV64ItoRmOffset( x86IntRegType to, u32 from, int offset)
 }
 
 // mov [r64+offset] to r64
-__forceinline void MOV64RmOffsettoR( x86IntRegType to, x86IntRegType from, int offset )
+_inline void MOV64RmOffsettoR( x86IntRegType to, x86IntRegType from, int offset )
 {
     RexRB(1, to, from);
 	write8( 0x8B );
@@ -378,7 +378,7 @@ __forceinline void MOV64RmOffsettoR( x86IntRegType to, x86IntRegType from, int o
 }
 
 /* mov [r64][r64*scale] to r64 */
-__forceinline void MOV64RmStoR( x86IntRegType to, x86IntRegType from, x86IntRegType from2, int scale) {
+_inline void MOV64RmStoR( x86IntRegType to, x86IntRegType from, x86IntRegType from2, int scale) {
 	RexRXB(1, to, from2, from);
 	write8( 0x8B );
 	ModRM( 0, to, 0x4 );
@@ -386,7 +386,7 @@ __forceinline void MOV64RmStoR( x86IntRegType to, x86IntRegType from, x86IntRegT
 }
 
 /* mov r64 to [r64+offset] */
-__forceinline void MOV64RtoRmOffset( x86IntRegType to, x86IntRegType from, int offset )
+_inline void MOV64RtoRmOffset( x86IntRegType to, x86IntRegType from, int offset )
 {
     RexRB(1,from,to);
 	write8( 0x89 );
@@ -394,7 +394,7 @@ __forceinline void MOV64RtoRmOffset( x86IntRegType to, x86IntRegType from, int o
 }
 
 /* mov r64 to [r64][r64*scale] */
-__forceinline void MOV64RtoRmS( x86IntRegType to, x86IntRegType from, x86IntRegType from2, int scale) {
+_inline void MOV64RtoRmS( x86IntRegType to, x86IntRegType from, x86IntRegType from2, int scale) {
 	RexRXB(1, to, from2, from);
 	write8( 0x89 );
 	ModRM( 0, to, 0x4 );
@@ -403,7 +403,7 @@ __forceinline void MOV64RtoRmS( x86IntRegType to, x86IntRegType from, x86IntRegT
 
 
 /* mov r32 to r32 */
-__forceinline void MOV32RtoR( x86IntRegType to, x86IntRegType from ) 
+_inline void MOV32RtoR( x86IntRegType to, x86IntRegType from ) 
 {
     RexRB(0, from, to);
 	write8( 0x89 );
@@ -420,7 +420,7 @@ void MOV32RtoM( uptr to, x86IntRegType from )
 }
 
 /* mov m32 to r32 */
-__forceinline void MOV32MtoR( x86IntRegType to, uptr from ) 
+_inline void MOV32MtoR( x86IntRegType to, uptr from ) 
 {
 	RexR(0, to);
 	write8( 0x8B );
@@ -429,20 +429,20 @@ __forceinline void MOV32MtoR( x86IntRegType to, uptr from )
 }
 
 /* mov [r32] to r32 */
-__forceinline void MOV32RmtoR( x86IntRegType to, x86IntRegType from ) {
+_inline void MOV32RmtoR( x86IntRegType to, x86IntRegType from ) {
     RexRB(0, to, from);
     write8(0x8B);
     WriteRmOffsetFrom(to, from, 0);
 }
 
-__forceinline void MOV32RmtoROffset( x86IntRegType to, x86IntRegType from, int offset ) {
+_inline void MOV32RmtoROffset( x86IntRegType to, x86IntRegType from, int offset ) {
 	RexRB(0, to, from);
 	write8( 0x8B );
     WriteRmOffsetFrom(to, from, offset);
 }
 
 /* mov [r32+r32*scale] to r32 */
-__forceinline void MOV32RmStoR( x86IntRegType to, x86IntRegType from, x86IntRegType from2, int scale) {
+_inline void MOV32RmStoR( x86IntRegType to, x86IntRegType from, x86IntRegType from2, int scale) {
     RexRXB(0,to,from2,from);
 	write8( 0x8B );
 	ModRM( 0, to, 0x4 );
@@ -450,7 +450,7 @@ __forceinline void MOV32RmStoR( x86IntRegType to, x86IntRegType from, x86IntRegT
 }
 
 // mov r32 to [r32<<scale+from2]
-__forceinline void MOV32RmSOffsettoR( x86IntRegType to, x86IntRegType from1, int from2, int scale )
+_inline void MOV32RmSOffsettoR( x86IntRegType to, x86IntRegType from1, int from2, int scale )
 {
     RexRXB(0,to,from1,0);
 	write8( 0x8B );
@@ -460,7 +460,7 @@ __forceinline void MOV32RmSOffsettoR( x86IntRegType to, x86IntRegType from1, int
 }
 
 /* mov r32 to [r32] */
-__forceinline void MOV32RtoRm( x86IntRegType to, x86IntRegType from ) {
+_inline void MOV32RtoRm( x86IntRegType to, x86IntRegType from ) {
     RexRB(0, from, to);
 	if ((to&7) == ESP) {
 		write8( 0x89 );
@@ -473,7 +473,7 @@ __forceinline void MOV32RtoRm( x86IntRegType to, x86IntRegType from ) {
 }
 
 /* mov r32 to [r32][r32*scale] */
-__forceinline void MOV32RtoRmS( x86IntRegType to, x86IntRegType from, x86IntRegType from2, int scale) {
+_inline void MOV32RtoRmS( x86IntRegType to, x86IntRegType from, x86IntRegType from2, int scale) {
     RexRXB(0, to, from2, from);
 	write8( 0x89 );
 	ModRM( 0, to, 0x4 );
@@ -481,7 +481,7 @@ __forceinline void MOV32RtoRmS( x86IntRegType to, x86IntRegType from, x86IntRegT
 }
 
 /* mov imm32 to r32 */
-__forceinline void MOV32ItoR( x86IntRegType to, u32 from ) 
+_inline void MOV32ItoR( x86IntRegType to, u32 from ) 
 {
     RexB(0, to);
 	write8( 0xB8 | (to & 0x7) ); 
@@ -489,7 +489,7 @@ __forceinline void MOV32ItoR( x86IntRegType to, u32 from )
 }
 
 /* mov imm32 to m32 */
-__forceinline void MOV32ItoM(uptr to, u32 from ) 
+_inline void MOV32ItoM(uptr to, u32 from ) 
 {
 	write8( 0xC7 );
 	ModRM( 0, 0, DISP32 );
@@ -498,7 +498,7 @@ __forceinline void MOV32ItoM(uptr to, u32 from )
 }
 
 // mov imm32 to [r32+off]
-__forceinline void MOV32ItoRmOffset( x86IntRegType to, u32 from, int offset)
+_inline void MOV32ItoRmOffset( x86IntRegType to, u32 from, int offset)
 {
     RexB(0,to);
 	write8( 0xC7 );
@@ -507,7 +507,7 @@ __forceinline void MOV32ItoRmOffset( x86IntRegType to, u32 from, int offset)
 }
 
 // mov r32 to [r32+off]
-__forceinline void MOV32RtoRmOffset( x86IntRegType to, x86IntRegType from, int offset)
+_inline void MOV32RtoRmOffset( x86IntRegType to, x86IntRegType from, int offset)
 {
     RexRB(0,from,to);
 	write8( 0x89 );
@@ -515,7 +515,7 @@ __forceinline void MOV32RtoRmOffset( x86IntRegType to, x86IntRegType from, int o
 }
 
 /* mov r16 to m16 */
-__forceinline void MOV16RtoM(uptr to, x86IntRegType from ) 
+_inline void MOV16RtoM(uptr to, x86IntRegType from ) 
 {
 	write8( 0x66 );
     RexR(0,from);
@@ -525,7 +525,7 @@ __forceinline void MOV16RtoM(uptr to, x86IntRegType from )
 }
 
 /* mov m16 to r16 */
-__forceinline void MOV16MtoR( x86IntRegType to, uptr from ) 
+_inline void MOV16MtoR( x86IntRegType to, uptr from ) 
 {
 	write8( 0x66 );
     RexR(0,to);
@@ -534,7 +534,7 @@ __forceinline void MOV16MtoR( x86IntRegType to, uptr from )
 	write32( MEMADDR(from, 4) ); 
 }
 
-__forceinline void MOV16RmtoR( x86IntRegType to, x86IntRegType from) 
+_inline void MOV16RmtoR( x86IntRegType to, x86IntRegType from) 
 {
 	write8( 0x66 );
     RexRB(0,to,from);
@@ -542,7 +542,7 @@ __forceinline void MOV16RmtoR( x86IntRegType to, x86IntRegType from)
     WriteRmOffsetFrom(to, from, 0);
 }
 
-__forceinline void MOV16RmtoROffset( x86IntRegType to, x86IntRegType from, int offset )
+_inline void MOV16RmtoROffset( x86IntRegType to, x86IntRegType from, int offset )
 {
 	write8( 0x66 );
     RexRB(0,to,from);
@@ -550,7 +550,7 @@ __forceinline void MOV16RmtoROffset( x86IntRegType to, x86IntRegType from, int o
     WriteRmOffsetFrom(to, from, offset);
 }
 
-__forceinline void MOV16RmSOffsettoR( x86IntRegType to, x86IntRegType from1, u32 from2, int scale )
+_inline void MOV16RmSOffsettoR( x86IntRegType to, x86IntRegType from1, u32 from2, int scale )
 {
     write8(0x66);
     RexRXB(0,to,from1,0);
@@ -560,7 +560,7 @@ __forceinline void MOV16RmSOffsettoR( x86IntRegType to, x86IntRegType from1, u32
 	write32(from2);
 }
 
-__forceinline void MOV16RtoRm(x86IntRegType to, x86IntRegType from)
+_inline void MOV16RtoRm(x86IntRegType to, x86IntRegType from)
 {
 	write8( 0x66 );
     RexRB(0,from,to);
@@ -569,7 +569,7 @@ __forceinline void MOV16RtoRm(x86IntRegType to, x86IntRegType from)
 }
 
 /* mov imm16 to m16 */
-__forceinline void MOV16ItoM( uptr to, u16 from ) 
+_inline void MOV16ItoM( uptr to, u16 from ) 
 {
 	write8( 0x66 );
 	write8( 0xC7 );
@@ -579,7 +579,7 @@ __forceinline void MOV16ItoM( uptr to, u16 from )
 }
 
 /* mov r16 to [r32][r32*scale] */
-__forceinline void MOV16RtoRmS( x86IntRegType to, x86IntRegType from, x86IntRegType from2, int scale) {
+_inline void MOV16RtoRmS( x86IntRegType to, x86IntRegType from, x86IntRegType from2, int scale) {
 	write8( 0x66 );
     RexRXB(0,to,from2,from);
 	write8( 0x89 );
@@ -587,7 +587,7 @@ __forceinline void MOV16RtoRmS( x86IntRegType to, x86IntRegType from, x86IntRegT
 	SibSB(scale, from2, from );
 }
 
-__forceinline void MOV16ItoR( x86IntRegType to, u16 from )
+_inline void MOV16ItoR( x86IntRegType to, u16 from )
 {
     RexB(0, to);
 	write16( 0xB866 | ((to & 0x7)<<8) ); 
@@ -595,7 +595,7 @@ __forceinline void MOV16ItoR( x86IntRegType to, u16 from )
 }
 
 // mov imm16 to [r16+off]
-__forceinline void MOV16ItoRmOffset( x86IntRegType to, u16 from, u32 offset)
+_inline void MOV16ItoRmOffset( x86IntRegType to, u16 from, u32 offset)
 {
 	write8(0x66);
     RexB(0,to);
@@ -605,7 +605,7 @@ __forceinline void MOV16ItoRmOffset( x86IntRegType to, u16 from, u32 offset)
 }
 
 // mov r16 to [r16+off]
-__forceinline void MOV16RtoRmOffset( x86IntRegType to, x86IntRegType from, int offset)
+_inline void MOV16RtoRmOffset( x86IntRegType to, x86IntRegType from, int offset)
 {
 	write8(0x66);
     RexRB(0,from,to);
@@ -614,7 +614,7 @@ __forceinline void MOV16RtoRmOffset( x86IntRegType to, x86IntRegType from, int o
 }
 
 /* mov r8 to m8 */
-__forceinline void MOV8RtoM( uptr to, x86IntRegType from ) 
+_inline void MOV8RtoM( uptr to, x86IntRegType from ) 
 {
     RexR(0,from);
 	write8( 0x88 );
@@ -623,7 +623,7 @@ __forceinline void MOV8RtoM( uptr to, x86IntRegType from )
 }
 
 /* mov m8 to r8 */
-__forceinline void MOV8MtoR( x86IntRegType to, uptr from ) 
+_inline void MOV8MtoR( x86IntRegType to, uptr from ) 
 {
     RexR(0,to);
 	write8( 0x8A );
@@ -632,21 +632,21 @@ __forceinline void MOV8MtoR( x86IntRegType to, uptr from )
 }
 
 /* mov [r32] to r8 */
-__forceinline void MOV8RmtoR(x86IntRegType to, x86IntRegType from)
+_inline void MOV8RmtoR(x86IntRegType to, x86IntRegType from)
 {
     RexRB(0,to,from);
 	write8( 0x8A );
     WriteRmOffsetFrom(to, from, 0);
 }
 
-__forceinline void MOV8RmtoROffset(x86IntRegType to, x86IntRegType from, int offset)
+_inline void MOV8RmtoROffset(x86IntRegType to, x86IntRegType from, int offset)
 {
     RexRB(0,to,from);
 	write8( 0x8A );
     WriteRmOffsetFrom(to, from, offset);
 }
 
-__forceinline void MOV8RmSOffsettoR( x86IntRegType to, x86IntRegType from1, u32 from2, int scale )
+_inline void MOV8RmSOffsettoR( x86IntRegType to, x86IntRegType from1, u32 from2, int scale )
 {
     RexRXB(0,to,from1,0);
 	write8( 0x8A );
@@ -655,7 +655,7 @@ __forceinline void MOV8RmSOffsettoR( x86IntRegType to, x86IntRegType from1, u32
 	write32(from2);
 }
 
-__forceinline void MOV8RtoRm(x86IntRegType to, x86IntRegType from)
+_inline void MOV8RtoRm(x86IntRegType to, x86IntRegType from)
 {
     RexRB(0,from,to);
 	write8( 0x88 );
@@ -663,7 +663,7 @@ __forceinline void MOV8RtoRm(x86IntRegType to, x86IntRegType from)
 }
 
 /* mov imm8 to m8 */
-__forceinline void MOV8ItoM( uptr to, u8 from ) 
+_inline void MOV8ItoM( uptr to, u8 from ) 
 {
 	write8( 0xC6 );
 	ModRM( 0, 0, DISP32 );
@@ -672,7 +672,7 @@ __forceinline void MOV8ItoM( uptr to, u8 from )
 }
 
 // mov imm8 to r8
-__forceinline void MOV8ItoR( x86IntRegType to, u8 from )
+_inline void MOV8ItoR( x86IntRegType to, u8 from )
 {
     RexB(0, to);
 	write8( 0xB0 | (to & 0x7) ); 
@@ -680,7 +680,7 @@ __forceinline void MOV8ItoR( x86IntRegType to, u8 from )
 }
 
 // mov imm8 to [r8+off]
-__forceinline void MOV8ItoRmOffset( x86IntRegType to, u8 from, int offset)
+_inline void MOV8ItoRmOffset( x86IntRegType to, u8 from, int offset)
 {
 	assert( to != ESP );
     RexB(0,to);
@@ -690,7 +690,7 @@ __forceinline void MOV8ItoRmOffset( x86IntRegType to, u8 from, int offset)
 }
 
 // mov r8 to [r8+off]
-__forceinline void MOV8RtoRmOffset( x86IntRegType to, x86IntRegType from, int offset)
+_inline void MOV8RtoRmOffset( x86IntRegType to, x86IntRegType from, int offset)
 {
 	assert( to != ESP );
     RexRB(0,from,to);
@@ -699,21 +699,21 @@ __forceinline void MOV8RtoRmOffset( x86IntRegType to, x86IntRegType from, int of
 }
 
 /* movsx r8 to r32 */
-__forceinline void MOVSX32R8toR( x86IntRegType to, x86IntRegType from ) 
+_inline void MOVSX32R8toR( x86IntRegType to, x86IntRegType from ) 
 {
     RexRB(0,to,from);
 	write16( 0xBE0F ); 
 	ModRM( 3, to, from ); 
 }
 
-__forceinline void MOVSX32Rm8toR( x86IntRegType to, x86IntRegType from )
+_inline void MOVSX32Rm8toR( x86IntRegType to, x86IntRegType from )
 {
     RexRB(0,to,from);
 	write16( 0xBE0F ); 
 	ModRM( 0, to, from ); 
 }
 
-__forceinline void MOVSX32Rm8toROffset( x86IntRegType to, x86IntRegType from, int offset )
+_inline void MOVSX32Rm8toROffset( x86IntRegType to, x86IntRegType from, int offset )
 {
     RexRB(0,to,from);
 	write16( 0xBE0F ); 
@@ -721,7 +721,7 @@ __forceinline void MOVSX32Rm8toROffset( x86IntRegType to, x86IntRegType from, in
 }
 
 /* movsx m8 to r32 */
-__forceinline void MOVSX32M8toR( x86IntRegType to, u32 from ) 
+_inline void MOVSX32M8toR( x86IntRegType to, u32 from ) 
 {
     RexR(0,to);
 	write16( 0xBE0F ); 
@@ -730,21 +730,21 @@ __forceinline void MOVSX32M8toR( x86IntRegType to, u32 from )
 }
 
 /* movsx r16 to r32 */
-__forceinline void MOVSX32R16toR( x86IntRegType to, x86IntRegType from ) 
+_inline void MOVSX32R16toR( x86IntRegType to, x86IntRegType from ) 
 {
     RexRB(0,to,from);
 	write16( 0xBF0F ); 
 	ModRM( 3, to, from ); 
 }
 
-__forceinline void MOVSX32Rm16toR( x86IntRegType to, x86IntRegType from )
+_inline void MOVSX32Rm16toR( x86IntRegType to, x86IntRegType from )
 {
     RexRB(0,to,from);
 	write16( 0xBF0F ); 
 	ModRM( 0, to, from ); 
 }
 
-__forceinline void MOVSX32Rm16toROffset( x86IntRegType to, x86IntRegType from, int offset )
+_inline void MOVSX32Rm16toROffset( x86IntRegType to, x86IntRegType from, int offset )
 {
     RexRB(0,to,from);
 	write16( 0xBF0F );
@@ -752,7 +752,7 @@ __forceinline void MOVSX32Rm16toROffset( x86IntRegType to, x86IntRegType from, i
 }
 
 /* movsx m16 to r32 */
-__forceinline void MOVSX32M16toR( x86IntRegType to, u32 from ) 
+_inline void MOVSX32M16toR( x86IntRegType to, u32 from ) 
 {
     RexR(0,to);
 	write16( 0xBF0F ); 
@@ -761,21 +761,21 @@ __forceinline void MOVSX32M16toR( x86IntRegType to, u32 from )
 }
 
 /* movzx r8 to r32 */
-__forceinline void MOVZX32R8toR( x86IntRegType to, x86IntRegType from ) 
+_inline void MOVZX32R8toR( x86IntRegType to, x86IntRegType from ) 
 {
     RexRB(0,to,from);
 	write16( 0xB60F ); 
 	ModRM( 3, to, from ); 
 }
 
-__forceinline void MOVZX32Rm8toR( x86IntRegType to, x86IntRegType from )
+_inline void MOVZX32Rm8toR( x86IntRegType to, x86IntRegType from )
 {
     RexRB(0,to,from);
 	write16( 0xB60F ); 
 	ModRM( 0, to, from );
 }
 
-__forceinline void MOVZX32Rm8toROffset( x86IntRegType to, x86IntRegType from, int offset )
+_inline void MOVZX32Rm8toROffset( x86IntRegType to, x86IntRegType from, int offset )
 {
     RexRB(0,to,from);
 	write16( 0xB60F );
@@ -783,7 +783,7 @@ __forceinline void MOVZX32Rm8toROffset( x86IntRegType to, x86IntRegType from, in
 }
 
 /* movzx m8 to r32 */
-__forceinline void MOVZX32M8toR( x86IntRegType to, u32 from ) 
+_inline void MOVZX32M8toR( x86IntRegType to, u32 from ) 
 {
     RexR(0,to);
 	write16( 0xB60F ); 
@@ -792,21 +792,21 @@ __forceinline void MOVZX32M8toR( x86IntRegType to, u32 from )
 }
 
 /* movzx r16 to r32 */
-__forceinline void MOVZX32R16toR( x86IntRegType to, x86IntRegType from ) 
+_inline void MOVZX32R16toR( x86IntRegType to, x86IntRegType from ) 
 {
     RexRB(0,to,from);
 	write16( 0xB70F ); 
 	ModRM( 3, to, from ); 
 }
 
-__forceinline void MOVZX32Rm16toR( x86IntRegType to, x86IntRegType from )
+_inline void MOVZX32Rm16toR( x86IntRegType to, x86IntRegType from )
 {
     RexRB(0,to,from);
 	write16( 0xB70F ); 
 	ModRM( 0, to, from ); 
 }
 
-__forceinline void MOVZX32Rm16toROffset( x86IntRegType to, x86IntRegType from, int offset )
+_inline void MOVZX32Rm16toROffset( x86IntRegType to, x86IntRegType from, int offset )
 {
     RexRB(0,to,from);
 	write16( 0xB70F );
@@ -814,7 +814,7 @@ __forceinline void MOVZX32Rm16toROffset( x86IntRegType to, x86IntRegType from, i
 }
 
 /* movzx m16 to r32 */
-__forceinline void MOVZX32M16toR( x86IntRegType to, u32 from ) 
+_inline void MOVZX32M16toR( x86IntRegType to, u32 from ) 
 {
     RexR(0,to);
 	write16( 0xB70F ); 
@@ -825,21 +825,21 @@ __forceinline void MOVZX32M16toR( x86IntRegType to, u32 from )
 #ifdef __x86_64__
 
 /* movzx r8 to r64 */
-__forceinline void MOVZX64R8toR( x86IntRegType to, x86IntRegType from ) 
+_inline void MOVZX64R8toR( x86IntRegType to, x86IntRegType from ) 
 {
     RexRB(1,to,from);
 	write16( 0xB60F ); 
 	ModRM( 3, to, from ); 
 }
 
-__forceinline void MOVZX64Rm8toR( x86IntRegType to, x86IntRegType from )
+_inline void MOVZX64Rm8toR( x86IntRegType to, x86IntRegType from )
 {
     RexRB(1,to,from);
 	write16( 0xB60F ); 
 	ModRM( 0, to, from );
 }
 
-__forceinline void MOVZX64Rm8toROffset( x86IntRegType to, x86IntRegType from, int offset )
+_inline void MOVZX64Rm8toROffset( x86IntRegType to, x86IntRegType from, int offset )
 {
     RexRB(1,to,from);
 	write16( 0xB60F );
@@ -847,7 +847,7 @@ __forceinline void MOVZX64Rm8toROffset( x86IntRegType to, x86IntRegType from, in
 }
 
 /* movzx m8 to r64 */
-__forceinline void MOVZX64M8toR( x86IntRegType to, u32 from ) 
+_inline void MOVZX64M8toR( x86IntRegType to, u32 from ) 
 {
     RexR(1,to);
 	write16( 0xB60F ); 
@@ -856,21 +856,21 @@ __forceinline void MOVZX64M8toR( x86IntRegType to, u32 from )
 }
 
 /* movzx r16 to r64 */
-__forceinline void MOVZX64R16toR( x86IntRegType to, x86IntRegType from ) 
+_inline void MOVZX64R16toR( x86IntRegType to, x86IntRegType from ) 
 {
     RexRB(1,to,from);
 	write16( 0xB70F ); 
 	ModRM( 3, to, from ); 
 }
 
-__forceinline void MOVZX64Rm16toR( x86IntRegType to, x86IntRegType from )
+_inline void MOVZX64Rm16toR( x86IntRegType to, x86IntRegType from )
 {
     RexRB(1,to,from);
 	write16( 0xB70F ); 
 	ModRM( 0, to, from ); 
 }
 
-__forceinline void MOVZX64Rm16toROffset( x86IntRegType to, x86IntRegType from, int offset )
+_inline void MOVZX64Rm16toROffset( x86IntRegType to, x86IntRegType from, int offset )
 {
     RexRB(1,to,from);
 	write16( 0xB70F );
@@ -878,7 +878,7 @@ __forceinline void MOVZX64Rm16toROffset( x86IntRegType to, x86IntRegType from, i
 }
 
 /* movzx m16 to r64 */
-__forceinline void MOVZX64M16toR( x86IntRegType to, u32 from ) 
+_inline void MOVZX64M16toR( x86IntRegType to, u32 from ) 
 {
     RexR(1,to);
 	write16( 0xB70F ); 
@@ -888,193 +888,193 @@ __forceinline void MOVZX64M16toR( x86IntRegType to, u32 from )
 #endif
 
 /* cmovbe r32 to r32 */
-__forceinline void CMOVBE32RtoR( x86IntRegType to, x86IntRegType from )
+_inline void CMOVBE32RtoR( x86IntRegType to, x86IntRegType from )
 {
 	CMOV32RtoR( 0x46, to, from );
 }
 
 /* cmovbe m32 to r32*/
-__forceinline void CMOVBE32MtoR( x86IntRegType to, uptr from )
+_inline void CMOVBE32MtoR( x86IntRegType to, uptr from )
 {
 	CMOV32MtoR( 0x46, to, from );
 }
 
 /* cmovb r32 to r32 */
-__forceinline void CMOVB32RtoR( x86IntRegType to, x86IntRegType from )
+_inline void CMOVB32RtoR( x86IntRegType to, x86IntRegType from )
 {
 	CMOV32RtoR( 0x42, to, from );
 }
 
 /* cmovb m32 to r32*/
-__forceinline void CMOVB32MtoR( x86IntRegType to, uptr from )
+_inline void CMOVB32MtoR( x86IntRegType to, uptr from )
 {
 	CMOV32MtoR( 0x42, to, from );
 }
 
 /* cmovae r32 to r32 */
-__forceinline void CMOVAE32RtoR( x86IntRegType to, x86IntRegType from )
+_inline void CMOVAE32RtoR( x86IntRegType to, x86IntRegType from )
 {
 	CMOV32RtoR( 0x43, to, from );
 }
 
 /* cmovae m32 to r32*/
-__forceinline void CMOVAE32MtoR( x86IntRegType to, uptr from )
+_inline void CMOVAE32MtoR( x86IntRegType to, uptr from )
 {
 	CMOV32MtoR( 0x43, to, from );
 }
 
 /* cmova r32 to r32 */
-__forceinline void CMOVA32RtoR( x86IntRegType to, x86IntRegType from )
+_inline void CMOVA32RtoR( x86IntRegType to, x86IntRegType from )
 {
 	CMOV32RtoR( 0x47, to, from );
 }
 
 /* cmova m32 to r32*/
-__forceinline void CMOVA32MtoR( x86IntRegType to, uptr from )
+_inline void CMOVA32MtoR( x86IntRegType to, uptr from )
 {
 	CMOV32MtoR( 0x47, to, from );
 }
 
 /* cmovo r32 to r32 */
-__forceinline void CMOVO32RtoR( x86IntRegType to, x86IntRegType from )
+_inline void CMOVO32RtoR( x86IntRegType to, x86IntRegType from )
 {
 	CMOV32RtoR( 0x40, to, from );
 }
 
 /* cmovo m32 to r32 */
-__forceinline void CMOVO32MtoR( x86IntRegType to, uptr from )
+_inline void CMOVO32MtoR( x86IntRegType to, uptr from )
 {
 	CMOV32MtoR( 0x40, to, from );
 }
 
 /* cmovp r32 to r32 */
-__forceinline void CMOVP32RtoR( x86IntRegType to, x86IntRegType from )
+_inline void CMOVP32RtoR( x86IntRegType to, x86IntRegType from )
 {
 	CMOV32RtoR( 0x4A, to, from );
 }
 
 /* cmovp m32 to r32 */
-__forceinline void CMOVP32MtoR( x86IntRegType to, uptr from )
+_inline void CMOVP32MtoR( x86IntRegType to, uptr from )
 {
 	CMOV32MtoR( 0x4A, to, from );
 }
 
 /* cmovs r32 to r32 */
-__forceinline void CMOVS32RtoR( x86IntRegType to, x86IntRegType from )
+_inline void CMOVS32RtoR( x86IntRegType to, x86IntRegType from )
 {
 	CMOV32RtoR( 0x48, to, from );
 }
 
 /* cmovs m32 to r32 */
-__forceinline void CMOVS32MtoR( x86IntRegType to, uptr from )
+_inline void CMOVS32MtoR( x86IntRegType to, uptr from )
 {
 	CMOV32MtoR( 0x48, to, from );
 }
 
 /* cmovno r32 to r32 */
-__forceinline void CMOVNO32RtoR( x86IntRegType to, x86IntRegType from )
+_inline void CMOVNO32RtoR( x86IntRegType to, x86IntRegType from )
 {
 	CMOV32RtoR( 0x41, to, from );
 }
 
 /* cmovno m32 to r32 */
-__forceinline void CMOVNO32MtoR( x86IntRegType to, uptr from )
+_inline void CMOVNO32MtoR( x86IntRegType to, uptr from )
 {
 	CMOV32MtoR( 0x41, to, from );
 }
 
 /* cmovnp r32 to r32 */
-__forceinline void CMOVNP32RtoR( x86IntRegType to, x86IntRegType from )
+_inline void CMOVNP32RtoR( x86IntRegType to, x86IntRegType from )
 {
 	CMOV32RtoR( 0x4B, to, from );
 }
 
 /* cmovnp m32 to r32 */
-__forceinline void CMOVNP32MtoR( x86IntRegType to, uptr from )
+_inline void CMOVNP32MtoR( x86IntRegType to, uptr from )
 {
 	CMOV32MtoR( 0x4B, to, from );
 }
 
 /* cmovns r32 to r32 */
-__forceinline void CMOVNS32RtoR( x86IntRegType to, x86IntRegType from )
+_inline void CMOVNS32RtoR( x86IntRegType to, x86IntRegType from )
 {
 	CMOV32RtoR( 0x49, to, from );
 }
 
 /* cmovns m32 to r32 */
-__forceinline void CMOVNS32MtoR( x86IntRegType to, uptr from )
+_inline void CMOVNS32MtoR( x86IntRegType to, uptr from )
 {
 	CMOV32MtoR( 0x49, to, from );
 }
 
 /* cmovne r32 to r32 */
-__forceinline void CMOVNE32RtoR( x86IntRegType to, x86IntRegType from )
+_inline void CMOVNE32RtoR( x86IntRegType to, x86IntRegType from )
 {
 	CMOV32RtoR( 0x45, to, from );
 }
 
 /* cmovne m32 to r32*/
-__forceinline void CMOVNE32MtoR( x86IntRegType to, uptr from ) 
+_inline void CMOVNE32MtoR( x86IntRegType to, uptr from ) 
 {
 	CMOV32MtoR( 0x45, to, from );
 }
 
 /* cmove r32 to r32*/
-__forceinline void CMOVE32RtoR( x86IntRegType to, x86IntRegType from ) 
+_inline void CMOVE32RtoR( x86IntRegType to, x86IntRegType from ) 
 {
 	CMOV32RtoR( 0x44, to, from );
 }
 
 /* cmove m32 to r32*/
-__forceinline void CMOVE32MtoR( x86IntRegType to, uptr from ) 
+_inline void CMOVE32MtoR( x86IntRegType to, uptr from ) 
 {
 	CMOV32MtoR( 0x44, to, from );
 }
 
 /* cmovg r32 to r32*/
-__forceinline void CMOVG32RtoR( x86IntRegType to, x86IntRegType from ) 
+_inline void CMOVG32RtoR( x86IntRegType to, x86IntRegType from ) 
 {
 	CMOV32RtoR( 0x4F, to, from );
 }
 
 /* cmovg m32 to r32*/
-__forceinline void CMOVG32MtoR( x86IntRegType to, uptr from ) 
+_inline void CMOVG32MtoR( x86IntRegType to, uptr from ) 
 {
 	CMOV32MtoR( 0x4F, to, from );
 }
 
 /* cmovge r32 to r32*/
-__forceinline void CMOVGE32RtoR( x86IntRegType to, x86IntRegType from ) 
+_inline void CMOVGE32RtoR( x86IntRegType to, x86IntRegType from ) 
 {
 	CMOV32RtoR( 0x4D, to, from );
 }
 
 /* cmovge m32 to r32*/
-__forceinline void CMOVGE32MtoR( x86IntRegType to, uptr from ) 
+_inline void CMOVGE32MtoR( x86IntRegType to, uptr from ) 
 {
 	CMOV32MtoR( 0x4D, to, from );
 }
 
 /* cmovl r32 to r32*/
-__forceinline void CMOVL32RtoR( x86IntRegType to, x86IntRegType from ) 
+_inline void CMOVL32RtoR( x86IntRegType to, x86IntRegType from ) 
 {
 	CMOV32RtoR( 0x4C, to, from );
 }
 
 /* cmovl m32 to r32*/
-__forceinline void CMOVL32MtoR( x86IntRegType to, uptr from ) 
+_inline void CMOVL32MtoR( x86IntRegType to, uptr from ) 
 {
 	CMOV32MtoR( 0x4C, to, from );
 }
 
 /* cmovle r32 to r32*/
-__forceinline void CMOVLE32RtoR( x86IntRegType to, x86IntRegType from ) 
+_inline void CMOVLE32RtoR( x86IntRegType to, x86IntRegType from ) 
 {
 	CMOV32RtoR( 0x4E, to, from );
 }
 
 /* cmovle m32 to r32*/
-__forceinline void CMOVLE32MtoR( x86IntRegType to, uptr from ) 
+_inline void CMOVLE32MtoR( x86IntRegType to, uptr from ) 
 {
 	CMOV32MtoR( 0x4E, to, from );
 }
@@ -1097,7 +1097,7 @@ void ADD64ItoR( x86IntRegType to, u32 from )
 }
 
 /* add m64 to r64 */
-__forceinline void ADD64MtoR( x86IntRegType to, uptr from ) 
+_inline void ADD64MtoR( x86IntRegType to, uptr from ) 
 {
 	Rex(1, to >> 3, 0, 0);
 	write8( 0x03 ); 
@@ -1106,7 +1106,7 @@ __forceinline void ADD64MtoR( x86IntRegType to, uptr from )
 }
 
 /* add r64 to r64 */
-__forceinline void ADD64RtoR( x86IntRegType to, x86IntRegType from ) 
+_inline void ADD64RtoR( x86IntRegType to, x86IntRegType from ) 
 {
 	RexRB(1, from, to);
 	write8( 0x01 ); 
@@ -1114,7 +1114,7 @@ __forceinline void ADD64RtoR( x86IntRegType to, x86IntRegType from )
 }
 
 /* add imm32 to r32 */
-__forceinline void ADD32ItoR( x86IntRegType to, u32 from ) 
+_inline void ADD32ItoR( x86IntRegType to, u32 from ) 
 {
     RexB(0, to);
 	if(from < 0x80)
@@ -1137,7 +1137,7 @@ __forceinline void ADD32ItoR( x86IntRegType to, u32 from )
 }
 
 /* add imm32 to m32 */
-__forceinline void ADD32ItoM( uptr to, u32 from ) 
+_inline void ADD32ItoM( uptr to, u32 from ) 
 {
 	if(from < 0x80)
 	{
@@ -1154,7 +1154,7 @@ __forceinline void ADD32ItoM( uptr to, u32 from )
 }
 
 // add imm32 to [r32+off]
-__forceinline void ADD32ItoRmOffset( x86IntRegType to, u32 from, int offset)
+_inline void ADD32ItoRmOffset( x86IntRegType to, u32 from, int offset)
 {
 	RexB(0,to);
 	if(from < 0x80)
@@ -1170,7 +1170,7 @@ __forceinline void ADD32ItoRmOffset( x86IntRegType to, u32 from, int offset)
 }
 
 /* add r32 to r32 */
-__forceinline void ADD32RtoR( x86IntRegType to, x86IntRegType from ) 
+_inline void ADD32RtoR( x86IntRegType to, x86IntRegType from ) 
 {
     RexRB(0, from, to);
 	write8( 0x01 ); 
@@ -1178,7 +1178,7 @@ __forceinline void ADD32RtoR( x86IntRegType to, x86IntRegType from )
 }
 
 /* add r32 to m32 */
-__forceinline void ADD32RtoM(uptr to, x86IntRegType from ) 
+_inline void ADD32RtoM(uptr to, x86IntRegType from ) 
 {
     RexR(0,from);
 	write8( 0x01 ); 
@@ -1187,7 +1187,7 @@ __forceinline void ADD32RtoM(uptr to, x86IntRegType from )
 }
 
 /* add m32 to r32 */
-__forceinline void ADD32MtoR( x86IntRegType to, uptr from ) 
+_inline void ADD32MtoR( x86IntRegType to, uptr from ) 
 {
     RexR(0,to);
 	write8( 0x03 ); 
@@ -1196,7 +1196,7 @@ __forceinline void ADD32MtoR( x86IntRegType to, uptr from )
 }
 
 // add r16 to r16 
-__forceinline void ADD16RtoR( x86IntRegType to , x86IntRegType from )
+_inline void ADD16RtoR( x86IntRegType to , x86IntRegType from )
 {
     write8(0x66);
     RexRB(0,to,from);
@@ -1205,7 +1205,7 @@ __forceinline void ADD16RtoR( x86IntRegType to , x86IntRegType from )
 }
 
 /* add imm16 to r16 */
-__forceinline void ADD16ItoR( x86IntRegType to, u16 from ) 
+_inline void ADD16ItoR( x86IntRegType to, u16 from ) 
 {
     RexB(0,to);
 
@@ -1230,7 +1230,7 @@ __forceinline void ADD16ItoR( x86IntRegType to, u16 from )
 }
 
 /* add imm16 to m16 */
-__forceinline void ADD16ItoM( uptr to, u16 from ) 
+_inline void ADD16ItoM( uptr to, u16 from ) 
 {
 	write8( 0x66 );
 	if(from < 0x80)
@@ -1250,7 +1250,7 @@ __forceinline void ADD16ItoM( uptr to, u16 from )
 }
 
 /* add r16 to m16 */
-__forceinline void ADD16RtoM(uptr to, x86IntRegType from ) 
+_inline void ADD16RtoM(uptr to, x86IntRegType from ) 
 {
 	write8( 0x66 );
     RexR(0,from);
@@ -1260,7 +1260,7 @@ __forceinline void ADD16RtoM(uptr to, x86IntRegType from )
 }
 
 /* add m16 to r16 */
-__forceinline void ADD16MtoR( x86IntRegType to, uptr from ) 
+_inline void ADD16MtoR( x86IntRegType to, uptr from ) 
 {
 	write8( 0x66 );
     RexR(0,to);
@@ -1270,7 +1270,7 @@ __forceinline void ADD16MtoR( x86IntRegType to, uptr from )
 }
 
 // add m8 to r8
-__forceinline void ADD8MtoR( x86IntRegType to, uptr from )
+_inline void ADD8MtoR( x86IntRegType to, uptr from )
 {
     RexR(0,to);
 	write8( 0x02 ); 
@@ -1279,7 +1279,7 @@ __forceinline void ADD8MtoR( x86IntRegType to, uptr from )
 }
 
 /* adc imm32 to r32 */
-__forceinline void ADC32ItoR( x86IntRegType to, u32 from ) 
+_inline void ADC32ItoR( x86IntRegType to, u32 from ) 
 {
     RexB(0,to);
 	if ( to == EAX ) {
@@ -1293,7 +1293,7 @@ __forceinline void ADC32ItoR( x86IntRegType to, u32 from )
 }
 
 /* adc imm32 to m32 */
-__forceinline void ADC32ItoM( uptr to, u32 from ) 
+_inline void ADC32ItoM( uptr to, u32 from ) 
 {
 	write8( 0x81 ); 
 	ModRM( 0, 2, DISP32 );
@@ -1302,7 +1302,7 @@ __forceinline void ADC32ItoM( uptr to, u32 from )
 }
 
 /* adc r32 to r32 */
-__forceinline void ADC32RtoR( x86IntRegType to, x86IntRegType from ) 
+_inline void ADC32RtoR( x86IntRegType to, x86IntRegType from ) 
 {
     RexRB(0,from,to);
 	write8( 0x11 ); 
@@ -1310,7 +1310,7 @@ __forceinline void ADC32RtoR( x86IntRegType to, x86IntRegType from )
 }
 
 /* adc m32 to r32 */
-__forceinline void ADC32MtoR( x86IntRegType to, uptr from ) 
+_inline void ADC32MtoR( x86IntRegType to, uptr from ) 
 {
     RexR(0,to);
 	write8( 0x13 ); 
@@ -1319,7 +1319,7 @@ __forceinline void ADC32MtoR( x86IntRegType to, uptr from )
 }
 
 // adc r32 to m32 
-__forceinline void ADC32RtoM( uptr to, x86IntRegType from )
+_inline void ADC32RtoM( uptr to, x86IntRegType from )
 {
     RexR(0,from);
 	write8( 0x11 ); 
@@ -1328,14 +1328,14 @@ __forceinline void ADC32RtoM( uptr to, x86IntRegType from )
 }
 
 /* inc r32 */
-__forceinline void INC32R( x86IntRegType to ) 
+_inline void INC32R( x86IntRegType to ) 
 {
     X86_64ASSERT();
 	write8( 0x40 + to );
 }
 
 /* inc m32 */
-__forceinline void INC32M( u32 to ) 
+_inline void INC32M( u32 to ) 
 {
 	write8( 0xFF );
 	ModRM( 0, 0, DISP32 );
@@ -1343,7 +1343,7 @@ __forceinline void INC32M( u32 to )
 }
 
 /* inc r16 */
-__forceinline void INC16R( x86IntRegType to ) 
+_inline void INC16R( x86IntRegType to ) 
 {
     X86_64ASSERT();
 	write8( 0x66 );
@@ -1351,7 +1351,7 @@ __forceinline void INC16R( x86IntRegType to )
 }
 
 /* inc m16 */
-__forceinline void INC16M( u32 to ) 
+_inline void INC16M( u32 to ) 
 {
 	write8( 0x66 );
 	write8( 0xFF );
@@ -1361,7 +1361,7 @@ __forceinline void INC16M( u32 to )
 
 
 /* sub imm32 to r64 */
-__forceinline void SUB64ItoR( x86IntRegType to, u32 from ) 
+_inline void SUB64ItoR( x86IntRegType to, u32 from ) 
 {
 	RexB(1, to);
 	if ( to == EAX ) {
@@ -1375,7 +1375,7 @@ __forceinline void SUB64ItoR( x86IntRegType to, u32 from )
 }
 
 /* sub r64 to r64 */
-__forceinline void SUB64RtoR( x86IntRegType to, x86IntRegType from ) 
+_inline void SUB64RtoR( x86IntRegType to, x86IntRegType from ) 
 {
 	RexRB(1, from, to);
 	write8( 0x29 ); 
@@ -1383,7 +1383,7 @@ __forceinline void SUB64RtoR( x86IntRegType to, x86IntRegType from )
 }
 
 /* sub m64 to r64 */
-__forceinline void SUB64MtoR( x86IntRegType to, uptr from ) 
+_inline void SUB64MtoR( x86IntRegType to, uptr from ) 
 {
 	RexR(1, to);
 	write8( 0x2B ); 
@@ -1392,7 +1392,7 @@ __forceinline void SUB64MtoR( x86IntRegType to, uptr from )
 }
 
 /* sub imm32 to r32 */
-__forceinline void SUB32ItoR( x86IntRegType to, u32 from ) 
+_inline void SUB32ItoR( x86IntRegType to, u32 from ) 
 {
     RexB(0,to);
 	if ( to == EAX ) {
@@ -1406,7 +1406,7 @@ __forceinline void SUB32ItoR( x86IntRegType to, u32 from )
 }
 
 /* sub imm32 to m32 */
-__forceinline void SUB32ItoM( uptr to, u32 from ) 
+_inline void SUB32ItoM( uptr to, u32 from ) 
 {
 	write8( 0x81 ); 
 	ModRM( 0, 5, DISP32 );
@@ -1415,7 +1415,7 @@ __forceinline void SUB32ItoM( uptr to, u32 from )
 }
 
 /* sub r32 to r32 */
-__forceinline void SUB32RtoR( x86IntRegType to, x86IntRegType from ) 
+_inline void SUB32RtoR( x86IntRegType to, x86IntRegType from ) 
 {
     RexRB(0, from, to);
 	write8( 0x29 ); 
@@ -1423,7 +1423,7 @@ __forceinline void SUB32RtoR( x86IntRegType to, x86IntRegType from )
 }
 
 /* sub m32 to r32 */
-__forceinline void SUB32MtoR( x86IntRegType to, uptr from ) 
+_inline void SUB32MtoR( x86IntRegType to, uptr from ) 
 {
     RexR(0,to);
 	write8( 0x2B ); 
@@ -1432,7 +1432,7 @@ __forceinline void SUB32MtoR( x86IntRegType to, uptr from )
 }
 
 // sub r32 to m32 
-__forceinline void SUB32RtoM( uptr to, x86IntRegType from )
+_inline void SUB32RtoM( uptr to, x86IntRegType from )
 {
     RexR(0,from);
 	write8( 0x29 ); 
@@ -1441,7 +1441,7 @@ __forceinline void SUB32RtoM( uptr to, x86IntRegType from )
 }
 
 // sub r16 to r16 
-__forceinline void SUB16RtoR( x86IntRegType to, u16 from )
+_inline void SUB16RtoR( x86IntRegType to, u16 from )
 {
     write8(0x66);
     RexRB(0,to,from);
@@ -1450,7 +1450,7 @@ __forceinline void SUB16RtoR( x86IntRegType to, u16 from )
 }
 
 /* sub imm16 to r16 */
-__forceinline void SUB16ItoR( x86IntRegType to, u16 from ) {
+_inline void SUB16ItoR( x86IntRegType to, u16 from ) {
 	write8( 0x66 );
     RexB(0,to);
 	if ( to == EAX ) {
@@ -1463,7 +1463,7 @@ __forceinline void SUB16ItoR( x86IntRegType to, u16 from ) {
 }
 
 /* sub imm16 to m16 */
-__forceinline void SUB16ItoM( uptr to, u16 from ) {
+_inline void SUB16ItoM( uptr to, u16 from ) {
 	write8( 0x66 ); 
 	write8( 0x81 ); 
 	ModRM( 0, 5, DISP32 );
@@ -1472,7 +1472,7 @@ __forceinline void SUB16ItoM( uptr to, u16 from ) {
 }
 
 /* sub m16 to r16 */
-__forceinline void SUB16MtoR( x86IntRegType to, uptr from ) {
+_inline void SUB16MtoR( x86IntRegType to, uptr from ) {
 	write8( 0x66 ); 
     RexR(0,to);
 	write8( 0x2B ); 
@@ -1481,14 +1481,14 @@ __forceinline void SUB16MtoR( x86IntRegType to, uptr from ) {
 }
 
 /* sbb r64 to r64 */
-__forceinline void SBB64RtoR( x86IntRegType to, x86IntRegType from ) {
+_inline void SBB64RtoR( x86IntRegType to, x86IntRegType from ) {
 	RexRB(1, from,to);
 	write8( 0x19 ); 
 	ModRM( 3, from, to );
 }
 
 /* sbb imm32 to r32 */
-__forceinline void SBB32ItoR( x86IntRegType to, u32 from ) {
+_inline void SBB32ItoR( x86IntRegType to, u32 from ) {
     RexB(0,to);
 	if ( to == EAX ) {
 		write8( 0x1D );
@@ -1500,7 +1500,7 @@ __forceinline void SBB32ItoR( x86IntRegType to, u32 from ) {
 }
 
 /* sbb imm32 to m32 */
-__forceinline void SBB32ItoM( uptr to, u32 from ) {
+_inline void SBB32ItoM( uptr to, u32 from ) {
 	write8( 0x81 );
 	ModRM( 0, 3, DISP32 );
 	write32( MEMADDR(to, 8) );
@@ -1508,7 +1508,7 @@ __forceinline void SBB32ItoM( uptr to, u32 from ) {
 }
 
 /* sbb r32 to r32 */
-__forceinline void SBB32RtoR( x86IntRegType to, x86IntRegType from ) 
+_inline void SBB32RtoR( x86IntRegType to, x86IntRegType from ) 
 {
     RexRB(0,from,to);
 	write8( 0x19 ); 
@@ -1516,7 +1516,7 @@ __forceinline void SBB32RtoR( x86IntRegType to, x86IntRegType from )
 }
 
 /* sbb m32 to r32 */
-__forceinline void SBB32MtoR( x86IntRegType to, uptr from ) 
+_inline void SBB32MtoR( x86IntRegType to, uptr from ) 
 {
     RexR(0,to);
 	write8( 0x1B ); 
@@ -1525,7 +1525,7 @@ __forceinline void SBB32MtoR( x86IntRegType to, uptr from )
 }
 
 /* sbb r32 to m32 */
-__forceinline void SBB32RtoM( uptr to, x86IntRegType from ) 
+_inline void SBB32RtoM( uptr to, x86IntRegType from ) 
 {
     RexR(0,from);
 	write8( 0x19 ); 
@@ -1534,14 +1534,14 @@ __forceinline void SBB32RtoM( uptr to, x86IntRegType from )
 }
 
 /* dec r32 */
-__forceinline void DEC32R( x86IntRegType to ) 
+_inline void DEC32R( x86IntRegType to ) 
 {
     X86_64ASSERT();
 	write8( 0x48 + to );
 }
 
 /* dec m32 */
-__forceinline void DEC32M( u32 to ) 
+_inline void DEC32M( u32 to ) 
 {
 	write8( 0xFF );
 	ModRM( 0, 1, DISP32 );
@@ -1549,7 +1549,7 @@ __forceinline void DEC32M( u32 to )
 }
 
 /* dec r16 */
-__forceinline void DEC16R( x86IntRegType to ) 
+_inline void DEC16R( x86IntRegType to ) 
 {
     X86_64ASSERT();
 	write8( 0x66 );
@@ -1557,7 +1557,7 @@ __forceinline void DEC16R( x86IntRegType to )
 }
 
 /* dec m16 */
-__forceinline void DEC16M( u32 to ) 
+_inline void DEC16M( u32 to ) 
 {
 	write8( 0x66 );
 	write8( 0xFF );
@@ -1566,7 +1566,7 @@ __forceinline void DEC16M( u32 to )
 }
 
 /* mul eax by r32 to edx:eax */
-__forceinline void MUL32R( x86IntRegType from ) 
+_inline void MUL32R( x86IntRegType from ) 
 {
     RexB(0,from);
 	write8( 0xF7 ); 
@@ -1574,7 +1574,7 @@ __forceinline void MUL32R( x86IntRegType from )
 }
 
 /* imul eax by r32 to edx:eax */
-__forceinline void IMUL32R( x86IntRegType from ) 
+_inline void IMUL32R( x86IntRegType from ) 
 {
     RexB(0,from);
 	write8( 0xF7 ); 
@@ -1582,7 +1582,7 @@ __forceinline void IMUL32R( x86IntRegType from )
 }
 
 /* mul eax by m32 to edx:eax */
-__forceinline void MUL32M( u32 from ) 
+_inline void MUL32M( u32 from ) 
 {
 	write8( 0xF7 ); 
 	ModRM( 0, 4, DISP32 );
@@ -1590,7 +1590,7 @@ __forceinline void MUL32M( u32 from )
 }
 
 /* imul eax by m32 to edx:eax */
-__forceinline void IMUL32M( u32 from ) 
+_inline void IMUL32M( u32 from ) 
 {
 	write8( 0xF7 ); 
 	ModRM( 0, 5, DISP32 );
@@ -1598,7 +1598,7 @@ __forceinline void IMUL32M( u32 from )
 }
 
 /* imul r32 by r32 to r32 */
-__forceinline void IMUL32RtoR( x86IntRegType to, x86IntRegType from ) 
+_inline void IMUL32RtoR( x86IntRegType to, x86IntRegType from ) 
 {
     RexRB(0,to,from);
 	write16( 0xAF0F ); 
@@ -1606,7 +1606,7 @@ __forceinline void IMUL32RtoR( x86IntRegType to, x86IntRegType from )
 }
 
 /* div eax by r32 to edx:eax */
-__forceinline void DIV32R( x86IntRegType from ) 
+_inline void DIV32R( x86IntRegType from ) 
 {
     RexB(0,from);
 	write8( 0xF7 ); 
@@ -1614,7 +1614,7 @@ __forceinline void DIV32R( x86IntRegType from )
 }
 
 /* idiv eax by r32 to edx:eax */
-__forceinline void IDIV32R( x86IntRegType from ) 
+_inline void IDIV32R( x86IntRegType from ) 
 {
     RexB(0,from);
 	write8( 0xF7 ); 
@@ -1622,7 +1622,7 @@ __forceinline void IDIV32R( x86IntRegType from )
 }
 
 /* div eax by m32 to edx:eax */
-__forceinline void DIV32M( u32 from ) 
+_inline void DIV32M( u32 from ) 
 {
 	write8( 0xF7 ); 
 	ModRM( 0, 6, DISP32 );
@@ -1630,7 +1630,7 @@ __forceinline void DIV32M( u32 from )
 }
 
 /* idiv eax by m32 to edx:eax */
-__forceinline void IDIV32M( u32 from ) 
+_inline void IDIV32M( u32 from ) 
 {
 	write8( 0xF7 ); 
 	ModRM( 0, 7, DISP32 );
@@ -1642,7 +1642,7 @@ __forceinline void IDIV32M( u32 from )
 ////////////////////////////////////
 
 /* shl imm8 to r64 */
-__forceinline void SHL64ItoR( x86IntRegType to, u8 from ) 
+_inline void SHL64ItoR( x86IntRegType to, u8 from ) 
 {
     RexB(1, to);
 	if ( from == 1 )
@@ -1657,7 +1657,7 @@ __forceinline void SHL64ItoR( x86IntRegType to, u8 from )
 }
 
 /* shl cl to r64 */
-__forceinline void SHL64CLtoR( x86IntRegType to ) 
+_inline void SHL64CLtoR( x86IntRegType to ) 
 {
 	RexB(1, to);
 	write8( 0xD3 ); 
@@ -1665,7 +1665,7 @@ __forceinline void SHL64CLtoR( x86IntRegType to )
 }
 
 /* shr imm8 to r64 */
-__forceinline void SHR64ItoR( x86IntRegType to, u8 from ) 
+_inline void SHR64ItoR( x86IntRegType to, u8 from ) 
 {
     RexB(1,to);
 	if ( from == 1 ) {
@@ -1679,7 +1679,7 @@ __forceinline void SHR64ItoR( x86IntRegType to, u8 from )
 }
 
 /* shr cl to r64 */
-__forceinline void SHR64CLtoR( x86IntRegType to ) 
+_inline void SHR64CLtoR( x86IntRegType to ) 
 {
 	RexB(1, to);
 	write8( 0xD3 ); 
@@ -1687,7 +1687,7 @@ __forceinline void SHR64CLtoR( x86IntRegType to )
 }
 
 /* shl imm8 to r32 */
-__forceinline void SHL32ItoR( x86IntRegType to, u8 from ) 
+_inline void SHL32ItoR( x86IntRegType to, u8 from ) 
 {
     RexB(0, to);
 	if ( from == 1 )
@@ -1702,7 +1702,7 @@ __forceinline void SHL32ItoR( x86IntRegType to, u8 from )
 }
 
 /* shl imm8 to m32 */
-__forceinline void SHL32ItoM( uptr to, u8 from ) 
+_inline void SHL32ItoM( uptr to, u8 from ) 
 {
    if ( from == 1 )
    {
@@ -1720,7 +1720,7 @@ __forceinline void SHL32ItoM( uptr to, u8 from )
 }
 
 /* shl cl to r32 */
-__forceinline void SHL32CLtoR( x86IntRegType to ) 
+_inline void SHL32CLtoR( x86IntRegType to ) 
 {
     RexB(0,to);
 	write8( 0xD3 ); 
@@ -1728,7 +1728,7 @@ __forceinline void SHL32CLtoR( x86IntRegType to )
 }
 
 // shl imm8 to r16
-__forceinline void SHL16ItoR( x86IntRegType to, u8 from )
+_inline void SHL16ItoR( x86IntRegType to, u8 from )
 {
     write8(0x66);
     RexB(0,to);
@@ -1744,7 +1744,7 @@ __forceinline void SHL16ItoR( x86IntRegType to, u8 from )
 }
 
 // shl imm8 to r8
-__forceinline void SHL8ItoR( x86IntRegType to, u8 from )
+_inline void SHL8ItoR( x86IntRegType to, u8 from )
 {
     RexB(0,to);
 	if ( from == 1 )
@@ -1759,7 +1759,7 @@ __forceinline void SHL8ItoR( x86IntRegType to, u8 from )
 }
 
 /* shr imm8 to r32 */
-__forceinline void SHR32ItoR( x86IntRegType to, u8 from ) {
+_inline void SHR32ItoR( x86IntRegType to, u8 from ) {
     RexB(0,to);
 	if ( from == 1 )
 	{
@@ -1775,7 +1775,7 @@ __forceinline void SHR32ItoR( x86IntRegType to, u8 from ) {
 }
 
 /* shr imm8 to m32 */
-__forceinline void SHR32ItoM( uptr to, u8 from ) 
+_inline void SHR32ItoM( uptr to, u8 from ) 
 {
    if ( from == 1 )
    {
@@ -1793,7 +1793,7 @@ __forceinline void SHR32ItoM( uptr to, u8 from )
 }
 
 /* shr cl to r32 */
-__forceinline void SHR32CLtoR( x86IntRegType to ) 
+_inline void SHR32CLtoR( x86IntRegType to ) 
 {
     RexB(0,to);
 	write8( 0xD3 ); 
@@ -1801,7 +1801,7 @@ __forceinline void SHR32CLtoR( x86IntRegType to )
 }
 
 // shr imm8 to r16
-__forceinline void SHR16ItoR( x86IntRegType to, u8 from )
+_inline void SHR16ItoR( x86IntRegType to, u8 from )
 {
     RexB(0,to);
 	if ( from == 1 )
@@ -1818,7 +1818,7 @@ __forceinline void SHR16ItoR( x86IntRegType to, u8 from )
 }
 
 // shr imm8 to r8
-__forceinline void SHR8ItoR( x86IntRegType to, u8 from )
+_inline void SHR8ItoR( x86IntRegType to, u8 from )
 {
     RexB(0,to);
 	if ( from == 1 )
@@ -1835,7 +1835,7 @@ __forceinline void SHR8ItoR( x86IntRegType to, u8 from )
 }
 
 /* sar imm8 to r64 */
-__forceinline void SAR64ItoR( x86IntRegType to, u8 from ) 
+_inline void SAR64ItoR( x86IntRegType to, u8 from ) 
 {
     RexB(1,to);
 	if ( from == 1 )
@@ -1850,7 +1850,7 @@ __forceinline void SAR64ItoR( x86IntRegType to, u8 from )
 }
 
 /* sar cl to r64 */
-__forceinline void SAR64CLtoR( x86IntRegType to ) 
+_inline void SAR64CLtoR( x86IntRegType to ) 
 {
 	RexB(1, to);
 	write8( 0xD3 ); 
@@ -1858,7 +1858,7 @@ __forceinline void SAR64CLtoR( x86IntRegType to )
 }
 
 /* sar imm8 to r32 */
-__forceinline void SAR32ItoR( x86IntRegType to, u8 from ) 
+_inline void SAR32ItoR( x86IntRegType to, u8 from ) 
 {
     RexB(0,to);
 	if ( from == 1 )
@@ -1873,7 +1873,7 @@ __forceinline void SAR32ItoR( x86IntRegType to, u8 from )
 }
 
 /* sar imm8 to m32 */
-__forceinline void SAR32ItoM( uptr to, u8 from )
+_inline void SAR32ItoM( uptr to, u8 from )
 {
 	write8( 0xC1 ); 
 	ModRM( 0, 7, DISP32 );
@@ -1882,7 +1882,7 @@ __forceinline void SAR32ItoM( uptr to, u8 from )
 }
 
 /* sar cl to r32 */
-__forceinline void SAR32CLtoR( x86IntRegType to ) 
+_inline void SAR32CLtoR( x86IntRegType to ) 
 {
     RexB(0,to);
 	write8( 0xD3 ); 
@@ -1890,7 +1890,7 @@ __forceinline void SAR32CLtoR( x86IntRegType to )
 }
 
 // sar imm8 to r16
-__forceinline void SAR16ItoR( x86IntRegType to, u8 from )
+_inline void SAR16ItoR( x86IntRegType to, u8 from )
 {
 	write8(0x66);
     RexB(0,to);
@@ -1905,7 +1905,7 @@ __forceinline void SAR16ItoR( x86IntRegType to, u8 from )
 	write8( from ); 
 }
 
-__forceinline void ROR32ItoR( x86IntRegType to,u8 from )
+_inline void ROR32ItoR( x86IntRegType to,u8 from )
 {
     RexB(0,to);
 	if ( from == 1 ) {
@@ -1920,7 +1920,7 @@ __forceinline void ROR32ItoR( x86IntRegType to,u8 from )
 	}
 }
 
-__forceinline void RCR32ItoR( x86IntRegType to, u8 from ) 
+_inline void RCR32ItoR( x86IntRegType to, u8 from ) 
 {
     RexB(0,to);
 	if ( from == 1 ) {
@@ -1935,7 +1935,7 @@ __forceinline void RCR32ItoR( x86IntRegType to, u8 from )
 	}
 }
 
-__forceinline void RCR32ItoM( uptr to, u8 from ) 
+_inline void RCR32ItoM( uptr to, u8 from ) 
 {
     RexB(0,to);
 	if ( from == 1 ) {
@@ -1953,7 +1953,7 @@ __forceinline void RCR32ItoM( uptr to, u8 from )
 }
 
 // shld imm8 to r32
-__forceinline void SHLD32ItoR( x86IntRegType to, x86IntRegType from, u8 shift )
+_inline void SHLD32ItoR( x86IntRegType to, x86IntRegType from, u8 shift )
 {
     RexRB(0,from,to);
 	write8( 0x0F );
@@ -1963,7 +1963,7 @@ __forceinline void SHLD32ItoR( x86IntRegType to, x86IntRegType from, u8 shift )
 }
 
 // shrd imm8 to r32
-__forceinline void SHRD32ItoR( x86IntRegType to, x86IntRegType from, u8 shift )
+_inline void SHRD32ItoR( x86IntRegType to, x86IntRegType from, u8 shift )
 {
     RexRB(0,from,to);
 	write8( 0x0F );
@@ -1977,7 +1977,7 @@ __forceinline void SHRD32ItoR( x86IntRegType to, x86IntRegType from, u8 shift )
 ////////////////////////////////////
 
 /* or imm32 to r32 */
-__forceinline void OR64ItoR( x86IntRegType to, u32 from ) 
+_inline void OR64ItoR( x86IntRegType to, u32 from ) 
 {
 	RexB(1, to);
 	if ( to == EAX ) {
@@ -1990,7 +1990,7 @@ __forceinline void OR64ItoR( x86IntRegType to, u32 from )
 }
 
 /* or m64 to r64 */
-__forceinline void OR64MtoR( x86IntRegType to, uptr from ) 
+_inline void OR64MtoR( x86IntRegType to, uptr from ) 
 {
 	RexR(1, to);
 	write8( 0x0B ); 
@@ -1999,7 +1999,7 @@ __forceinline void OR64MtoR( x86IntRegType to, uptr from )
 }
 
 /* or r64 to r64 */
-__forceinline void OR64RtoR( x86IntRegType to, x86IntRegType from ) 
+_inline void OR64RtoR( x86IntRegType to, x86IntRegType from ) 
 {
 	RexRB(1, from, to);
 	write8( 0x09 ); 
@@ -2007,7 +2007,7 @@ __forceinline void OR64RtoR( x86IntRegType to, x86IntRegType from )
 }
 
 // or r32 to m64
-__forceinline void OR64RtoM(uptr to, x86IntRegType from ) 
+_inline void OR64RtoM(uptr to, x86IntRegType from ) 
 {
     RexR(1,from);
 	write8( 0x09 ); 
@@ -2016,7 +2016,7 @@ __forceinline void OR64RtoM(uptr to, x86IntRegType from )
 }
 
 /* or imm32 to r32 */
-__forceinline void OR32ItoR( x86IntRegType to, u32 from ) 
+_inline void OR32ItoR( x86IntRegType to, u32 from ) 
 {
     RexB(0,to);
 	if ( to == EAX ) {
@@ -2030,7 +2030,7 @@ __forceinline void OR32ItoR( x86IntRegType to, u32 from )
 }
 
 /* or imm32 to m32 */
-__forceinline void OR32ItoM(uptr to, u32 from ) 
+_inline void OR32ItoM(uptr to, u32 from ) 
 {
 	write8( 0x81 ); 
 	ModRM( 0, 1, DISP32 );
@@ -2039,7 +2039,7 @@ __forceinline void OR32ItoM(uptr to, u32 from )
 }
 
 /* or r32 to r32 */
-__forceinline void OR32RtoR( x86IntRegType to, x86IntRegType from ) 
+_inline void OR32RtoR( x86IntRegType to, x86IntRegType from ) 
 {
     RexRB(0,from,to);
 	write8( 0x09 ); 
@@ -2047,7 +2047,7 @@ __forceinline void OR32RtoR( x86IntRegType to, x86IntRegType from )
 }
 
 /* or r32 to m32 */
-__forceinline void OR32RtoM(uptr to, x86IntRegType from ) 
+_inline void OR32RtoM(uptr to, x86IntRegType from ) 
 {
     RexR(0,from);
 	write8( 0x09 ); 
@@ -2056,7 +2056,7 @@ __forceinline void OR32RtoM(uptr to, x86IntRegType from )
 }
 
 /* or m32 to r32 */
-__forceinline void OR32MtoR( x86IntRegType to, uptr from ) 
+_inline void OR32MtoR( x86IntRegType to, uptr from ) 
 {
     RexR(0,to);
 	write8( 0x0B ); 
@@ -2065,7 +2065,7 @@ __forceinline void OR32MtoR( x86IntRegType to, uptr from )
 }
 
 // or r16 to r16
-__forceinline void OR16RtoR( x86IntRegType to, x86IntRegType from )
+_inline void OR16RtoR( x86IntRegType to, x86IntRegType from )
 {
     write8(0x66);
     RexRB(0,from,to);
@@ -2074,7 +2074,7 @@ __forceinline void OR16RtoR( x86IntRegType to, x86IntRegType from )
 }
 
 // or imm16 to r16
-__forceinline void OR16ItoR( x86IntRegType to, u16 from )
+_inline void OR16ItoR( x86IntRegType to, u16 from )
 {
     write8(0x66);
     RexB(0,to);
@@ -2089,7 +2089,7 @@ __forceinline void OR16ItoR( x86IntRegType to, u16 from )
 }
 
 // or imm16 to m316
-__forceinline void OR16ItoM( uptr to, u16 from )
+_inline void OR16ItoM( uptr to, u16 from )
 {
     write8(0x66);
 	write8( 0x81 ); 
@@ -2099,7 +2099,7 @@ __forceinline void OR16ItoM( uptr to, u16 from )
 }
 
 /* or m16 to r16 */
-__forceinline void OR16MtoR( x86IntRegType to, uptr from ) 
+_inline void OR16MtoR( x86IntRegType to, uptr from ) 
 {
     write8(0x66);
     RexR(0,to);
@@ -2109,7 +2109,7 @@ __forceinline void OR16MtoR( x86IntRegType to, uptr from )
 }
 
 // or r16 to m16 
-__forceinline void OR16RtoM( uptr to, x86IntRegType from )
+_inline void OR16RtoM( uptr to, x86IntRegType from )
 {
     write8(0x66);
     RexR(0,from);
@@ -2119,7 +2119,7 @@ __forceinline void OR16RtoM( uptr to, x86IntRegType from )
 }
 
 // or r8 to r8
-__forceinline void OR8RtoR( x86IntRegType to, x86IntRegType from )
+_inline void OR8RtoR( x86IntRegType to, x86IntRegType from )
 {
     RexRB(0,from,to);
 	write8( 0x08 ); 
@@ -2127,7 +2127,7 @@ __forceinline void OR8RtoR( x86IntRegType to, x86IntRegType from )
 }
 
 // or r8 to m8
-__forceinline void OR8RtoM( uptr to, x86IntRegType from )
+_inline void OR8RtoM( uptr to, x86IntRegType from )
 {
     RexR(0,from);
 	write8( 0x08 ); 
@@ -2136,7 +2136,7 @@ __forceinline void OR8RtoM( uptr to, x86IntRegType from )
 }
 
 // or imm8 to m8
-__forceinline void OR8ItoM( uptr to, u8 from )
+_inline void OR8ItoM( uptr to, u8 from )
 {
 	write8( 0x80 ); 
 	ModRM( 0, 1, DISP32 );
@@ -2145,7 +2145,7 @@ __forceinline void OR8ItoM( uptr to, u8 from )
 }
 
 // or m8 to r8
-__forceinline void OR8MtoR( x86IntRegType to, uptr from )
+_inline void OR8MtoR( x86IntRegType to, uptr from )
 {
     RexR(0,to);
 	write8( 0x0A ); 
@@ -2154,7 +2154,7 @@ __forceinline void OR8MtoR( x86IntRegType to, uptr from )
 }
 
 /* xor imm32 to r64 */
-__forceinline void XOR64ItoR( x86IntRegType to, u32 from ) 
+_inline void XOR64ItoR( x86IntRegType to, u32 from ) 
 {
     RexB(1,to);
 	if ( to == EAX ) {
@@ -2167,7 +2167,7 @@ __forceinline void XOR64ItoR( x86IntRegType to, u32 from )
 }
 
 /* xor r64 to r64 */
-__forceinline void XOR64RtoR( x86IntRegType to, x86IntRegType from ) 
+_inline void XOR64RtoR( x86IntRegType to, x86IntRegType from ) 
 {
 	RexRB(1, from, to);
 	write8( 0x31 ); 
@@ -2175,7 +2175,7 @@ __forceinline void XOR64RtoR( x86IntRegType to, x86IntRegType from )
 }
 
 /* xor m64 to r64 */
-__forceinline void XOR64MtoR( x86IntRegType to, uptr from ) 
+_inline void XOR64MtoR( x86IntRegType to, uptr from ) 
 {
 	RexR(1, to);
 	write8( 0x33 ); 
@@ -2184,7 +2184,7 @@ __forceinline void XOR64MtoR( x86IntRegType to, uptr from )
 }
 
 /* xor r64 to m64 */
-__forceinline void XOR64RtoM( uptr to, x86IntRegType from ) 
+_inline void XOR64RtoM( uptr to, x86IntRegType from ) 
 {
     RexR(1,from);
 	write8( 0x31 ); 
@@ -2193,7 +2193,7 @@ __forceinline void XOR64RtoM( uptr to, x86IntRegType from )
 }
 
 /* xor imm32 to r32 */
-__forceinline void XOR32ItoR( x86IntRegType to, u32 from ) 
+_inline void XOR32ItoR( x86IntRegType to, u32 from ) 
 {
     RexB(0,to);
 	if ( to == EAX ) {
@@ -2207,7 +2207,7 @@ __forceinline void XOR32ItoR( x86IntRegType to, u32 from )
 }
 
 /* xor imm32 to m32 */
-__forceinline void XOR32ItoM( uptr to, u32 from ) 
+_inline void XOR32ItoM( uptr to, u32 from ) 
 {
 	write8( 0x81 ); 
 	ModRM( 0, 6, DISP32 );
@@ -2216,7 +2216,7 @@ __forceinline void XOR32ItoM( uptr to, u32 from )
 }
 
 /* xor r32 to r32 */
-__forceinline void XOR32RtoR( x86IntRegType to, x86IntRegType from ) 
+_inline void XOR32RtoR( x86IntRegType to, x86IntRegType from ) 
 {
     RexRB(0,from,to);
 	write8( 0x31 ); 
@@ -2224,7 +2224,7 @@ __forceinline void XOR32RtoR( x86IntRegType to, x86IntRegType from )
 }
 
 /* xor r16 to r16 */
-__forceinline void XOR16RtoR( x86IntRegType to, x86IntRegType from ) 
+_inline void XOR16RtoR( x86IntRegType to, x86IntRegType from ) 
 {
 	write8( 0x66 );
     RexRB(0,from,to);
@@ -2233,7 +2233,7 @@ __forceinline void XOR16RtoR( x86IntRegType to, x86IntRegType from )
 }
 
 /* xor r32 to m32 */
-__forceinline void XOR32RtoM( uptr to, x86IntRegType from ) 
+_inline void XOR32RtoM( uptr to, x86IntRegType from ) 
 {
     RexR(0,from);
 	write8( 0x31 ); 
@@ -2242,7 +2242,7 @@ __forceinline void XOR32RtoM( uptr to, x86IntRegType from )
 }
 
 /* xor m32 to r32 */
-__forceinline void XOR32MtoR( x86IntRegType to, uptr from ) 
+_inline void XOR32MtoR( x86IntRegType to, uptr from ) 
 {
     RexR(0,to);
 	write8( 0x33 ); 
@@ -2251,7 +2251,7 @@ __forceinline void XOR32MtoR( x86IntRegType to, uptr from )
 }
 
 // xor imm16 to r16
-__forceinline void XOR16ItoR( x86IntRegType to, u16 from )
+_inline void XOR16ItoR( x86IntRegType to, u16 from )
 {
     write8(0x66);
     RexB(0,to);
@@ -2266,7 +2266,7 @@ __forceinline void XOR16ItoR( x86IntRegType to, u16 from )
 }
 
 // xor r16 to m16
-__forceinline void XOR16RtoM( uptr to, x86IntRegType from )
+_inline void XOR16RtoM( uptr to, x86IntRegType from )
 {
     write8(0x66);
     RexR(0,from);
@@ -2276,7 +2276,7 @@ __forceinline void XOR16RtoM( uptr to, x86IntRegType from )
 }
 
 /* and imm32 to r64 */
-__forceinline void AND64I32toR( x86IntRegType to, u32 from ) 
+_inline void AND64I32toR( x86IntRegType to, u32 from ) 
 {
 	RexB(1, to);
 	if ( to == EAX ) {
@@ -2289,7 +2289,7 @@ __forceinline void AND64I32toR( x86IntRegType to, u32 from )
 }
 
 /* and m64 to r64 */
-__forceinline void AND64MtoR( x86IntRegType to, uptr from ) 
+_inline void AND64MtoR( x86IntRegType to, uptr from ) 
 {
 	RexR(1, to);
 	write8( 0x23 ); 
@@ -2298,7 +2298,7 @@ __forceinline void AND64MtoR( x86IntRegType to, uptr from )
 }
 
 /* and r64 to m64 */
-__forceinline void AND64RtoM( uptr to, x86IntRegType from ) 
+_inline void AND64RtoM( uptr to, x86IntRegType from ) 
 {
 	RexR(1, from);
 	write8( 0x21 ); 
@@ -2307,7 +2307,7 @@ __forceinline void AND64RtoM( uptr to, x86IntRegType from )
 }
 
 /* and r64 to r64 */
-__forceinline void AND64RtoR( x86IntRegType to, x86IntRegType from ) 
+_inline void AND64RtoR( x86IntRegType to, x86IntRegType from ) 
 {
 	RexRB(1, from, to);
 	write8( 0x21 ); 
@@ -2315,7 +2315,7 @@ __forceinline void AND64RtoR( x86IntRegType to, x86IntRegType from )
 }
 
 /* and imm32 to m64 */
-__forceinline void AND64I32toM( uptr to, u32 from ) 
+_inline void AND64I32toM( uptr to, u32 from ) 
 {
     Rex(1,0,0,0);
 	write8( 0x81 ); 
@@ -2325,7 +2325,7 @@ __forceinline void AND64I32toM( uptr to, u32 from )
 }
 
 /* and imm32 to r32 */
-__forceinline void AND32ItoR( x86IntRegType to, u32 from ) 
+_inline void AND32ItoR( x86IntRegType to, u32 from ) 
 {
     RexB(0,to);
 	if(from < 0x80)
@@ -2345,7 +2345,7 @@ __forceinline void AND32ItoR( x86IntRegType to, u32 from )
 }
 
 /* and sign ext imm8 to r32 */
-__forceinline void AND32I8toR( x86IntRegType to, u8 from ) 
+_inline void AND32I8toR( x86IntRegType to, u8 from ) 
 {
 	RexB(0,to);
 	write8( 0x83 ); 
@@ -2354,7 +2354,7 @@ __forceinline void AND32I8toR( x86IntRegType to, u8 from )
 }
 
 /* and imm32 to m32 */
-__forceinline void AND32ItoM( uptr to, u32 from ) 
+_inline void AND32ItoM( uptr to, u32 from ) 
 {
 	if(from < 0x80)
 	{
@@ -2370,7 +2370,7 @@ __forceinline void AND32ItoM( uptr to, u32 from )
 }
 
 /* and sign ext imm8 to m32 */
-__forceinline void AND32I8toM( uptr to, u8 from ) 
+_inline void AND32I8toM( uptr to, u8 from ) 
 {
 	write8( 0x83 ); 
 	ModRM( 0, 0x4, DISP32 );
@@ -2379,7 +2379,7 @@ __forceinline void AND32I8toM( uptr to, u8 from )
 }
 
 /* and r32 to r32 */
-__forceinline void AND32RtoR( x86IntRegType to, x86IntRegType from ) 
+_inline void AND32RtoR( x86IntRegType to, x86IntRegType from ) 
 {
     RexRB(0,from,to);
 	write8( 0x21 ); 
@@ -2387,7 +2387,7 @@ __forceinline void AND32RtoR( x86IntRegType to, x86IntRegType from )
 }
 
 /* and r32 to m32 */
-__forceinline void AND32RtoM( uptr to, x86IntRegType from ) 
+_inline void AND32RtoM( uptr to, x86IntRegType from ) 
 {
     RexR(0,from);
 	write8( 0x21 ); 
@@ -2396,7 +2396,7 @@ __forceinline void AND32RtoM( uptr to, x86IntRegType from )
 }
 
 /* and m32 to r32 */
-__forceinline void AND32MtoR( x86IntRegType to, uptr from ) 
+_inline void AND32MtoR( x86IntRegType to, uptr from ) 
 {
     RexR(0,to);
 	write8( 0x23 ); 
@@ -2405,7 +2405,7 @@ __forceinline void AND32MtoR( x86IntRegType to, uptr from )
 }
 
 // and r16 to r16
-__forceinline void AND16RtoR( x86IntRegType to, x86IntRegType from )
+_inline void AND16RtoR( x86IntRegType to, x86IntRegType from )
 {
     write8(0x66);
     RexRB(0,to,from);
@@ -2414,7 +2414,7 @@ __forceinline void AND16RtoR( x86IntRegType to, x86IntRegType from )
 }
 
 /* and imm16 to r16 */
-__forceinline void AND16ItoR( x86IntRegType to, u16 from ) 
+_inline void AND16ItoR( x86IntRegType to, u16 from ) 
 {
     RexB(0,to);
 
@@ -2434,7 +2434,7 @@ __forceinline void AND16ItoR( x86IntRegType to, u16 from )
 }
 
 /* and imm16 to m16 */
-__forceinline void AND16ItoM( uptr to, u16 from ) 
+_inline void AND16ItoM( uptr to, u16 from ) 
 {
     write8(0x66);
 	if ( from < 0x80 ) {
@@ -2451,7 +2451,7 @@ __forceinline void AND16ItoM( uptr to, u16 from )
 }
 
 /* and r16 to m16 */
-__forceinline void AND16RtoM( uptr to, x86IntRegType from ) 
+_inline void AND16RtoM( uptr to, x86IntRegType from ) 
 {
 	write8( 0x66 );
     RexR(0,from);
@@ -2461,7 +2461,7 @@ __forceinline void AND16RtoM( uptr to, x86IntRegType from )
 }
 
 /* and m16 to r16 */
-__forceinline void AND16MtoR( x86IntRegType to, uptr from ) 
+_inline void AND16MtoR( x86IntRegType to, uptr from ) 
 {
 	write8( 0x66 );
     RexR(0,to);
@@ -2471,7 +2471,7 @@ __forceinline void AND16MtoR( x86IntRegType to, uptr from )
 }
 
 /* and imm8 to r8 */
-__forceinline void AND8ItoR( x86IntRegType to, u8 from ) 
+_inline void AND8ItoR( x86IntRegType to, u8 from ) 
 {
 	RexB(0,to);
 	if ( to == EAX ) {
@@ -2484,7 +2484,7 @@ __forceinline void AND8ItoR( x86IntRegType to, u8 from )
 }
 
 /* and imm8 to m8 */
-__forceinline void AND8ItoM( uptr to, u8 from ) 
+_inline void AND8ItoM( uptr to, u8 from ) 
 {
 	write8( 0x80 ); 
 	ModRM( 0, 0x4, DISP32 );
@@ -2493,7 +2493,7 @@ __forceinline void AND8ItoM( uptr to, u8 from )
 }
 
 // and r8 to r8
-__forceinline void AND8RtoR( x86IntRegType to, x86IntRegType from )
+_inline void AND8RtoR( x86IntRegType to, x86IntRegType from )
 {
     RexRB(0,to,from);
 	write8( 0x22 ); 
@@ -2501,7 +2501,7 @@ __forceinline void AND8RtoR( x86IntRegType to, x86IntRegType from )
 }
 
 /* and r8 to m8 */
-__forceinline void AND8RtoM( uptr to, x86IntRegType from ) 
+_inline void AND8RtoM( uptr to, x86IntRegType from ) 
 {
     RexR(0,from);
 	write8( 0x20 ); 
@@ -2510,7 +2510,7 @@ __forceinline void AND8RtoM( uptr to, x86IntRegType from )
 }
 
 /* and m8 to r8 */
-__forceinline void AND8MtoR( x86IntRegType to, uptr from ) 
+_inline void AND8MtoR( x86IntRegType to, uptr from ) 
 {
     RexR(0,to);
 	write8( 0x22 ); 
@@ -2519,7 +2519,7 @@ __forceinline void AND8MtoR( x86IntRegType to, uptr from )
 }
 
 /* not r64 */
-__forceinline void NOT64R( x86IntRegType from ) 
+_inline void NOT64R( x86IntRegType from ) 
 {
 	RexB(1, from);
 	write8( 0xF7 ); 
@@ -2527,7 +2527,7 @@ __forceinline void NOT64R( x86IntRegType from )
 }
 
 /* not r32 */
-__forceinline void NOT32R( x86IntRegType from ) 
+_inline void NOT32R( x86IntRegType from ) 
 {
     RexB(0,from);
 	write8( 0xF7 ); 
@@ -2535,7 +2535,7 @@ __forceinline void NOT32R( x86IntRegType from )
 }
 
 // not m32 
-__forceinline void NOT32M( u32 from )
+_inline void NOT32M( u32 from )
 {
 	write8( 0xF7 ); 
 	ModRM( 0, 2, DISP32 );
@@ -2543,7 +2543,7 @@ __forceinline void NOT32M( u32 from )
 }
 
 /* neg r64 */
-__forceinline void NEG64R( x86IntRegType from ) 
+_inline void NEG64R( x86IntRegType from ) 
 {
 	RexB(1, from);
 	write8( 0xF7 ); 
@@ -2551,14 +2551,14 @@ __forceinline void NEG64R( x86IntRegType from )
 }
 
 /* neg r32 */
-__forceinline void NEG32R( x86IntRegType from ) 
+_inline void NEG32R( x86IntRegType from ) 
 {
     RexB(0,from);
 	write8( 0xF7 ); 
 	ModRM( 3, 3, from );
 }
 
-__forceinline void NEG32M( u32 from )
+_inline void NEG32M( u32 from )
 {
 	write8( 0xF7 ); 
 	ModRM( 0, 3, DISP32 );
@@ -2566,7 +2566,7 @@ __forceinline void NEG32M( u32 from )
 }
 
 /* neg r16 */
-__forceinline void NEG16R( x86IntRegType from ) 
+_inline void NEG16R( x86IntRegType from ) 
 {
 	write8( 0x66 ); 
     RexB(0,from);
@@ -2607,7 +2607,7 @@ __forceinline u32* JMP32( uptr to )
 }
 
 /* jmp r32/r64 */
-__forceinline void JMPR( x86IntRegType to ) 
+_inline void JMPR( x86IntRegType to ) 
 {
     RexB(0, to);
 	write8( 0xFF ); 
@@ -2615,7 +2615,7 @@ __forceinline void JMPR( x86IntRegType to )
 }
 
 // jmp m32 
-__forceinline void JMP32M( uptr to )
+_inline void JMP32M( uptr to )
 {
 	write8( 0xFF ); 
 	ModRM( 0, 4, DISP32 );
@@ -2860,7 +2860,7 @@ __forceinline u32*  JS32( u32 to )
 
 
 /* call func */
-__forceinline void CALLFunc( uptr func ) 
+_inline void CALLFunc( uptr func ) 
 {
     func -= ( (uptr)x86Ptr + 5 );
     assert( (sptr)func <= 0x7fffffff && (sptr)func >= -0x7fffffff );
@@ -2868,21 +2868,21 @@ __forceinline void CALLFunc( uptr func )
 }
 
 /* call rel32 */
-__forceinline void CALL32( u32 to )
+_inline void CALL32( u32 to )
 {
 	write8( 0xE8 ); 
 	write32( to ); 
 }
 
 /* call r32 */
-__forceinline void CALL32R( x86IntRegType to ) 
+_inline void CALL32R( x86IntRegType to ) 
 {
 	write8( 0xFF );
 	ModRM( 3, 2, to );
 }
 
 /* call r64 */
-__forceinline void CALL64R( x86IntRegType to ) 
+_inline void CALL64R( x86IntRegType to ) 
 {
 	RexB(0, to);
 	write8( 0xFF );
@@ -2890,7 +2890,7 @@ __forceinline void CALL64R( x86IntRegType to )
 }
 
 /* call m32 */
-__forceinline void CALL32M( u32 to ) 
+_inline void CALL32M( u32 to ) 
 {
 	write8( 0xFF );
 	ModRM( 0, 2, DISP32 );
@@ -2902,7 +2902,7 @@ __forceinline void CALL32M( u32 to )
 ////////////////////////////////////
 
 /* cmp imm32 to r64 */
-__forceinline void CMP64I32toR( x86IntRegType to, u32 from ) 
+_inline void CMP64I32toR( x86IntRegType to, u32 from ) 
 {
 	RexB(1, to);
 	if ( to == EAX ) {
@@ -2916,7 +2916,7 @@ __forceinline void CMP64I32toR( x86IntRegType to, u32 from )
 }
 
 /* cmp m64 to r64 */
-__forceinline void CMP64MtoR( x86IntRegType to, uptr from ) 
+_inline void CMP64MtoR( x86IntRegType to, uptr from ) 
 {
 	RexR(1, to);
 	write8( 0x3B );
@@ -2925,7 +2925,7 @@ __forceinline void CMP64MtoR( x86IntRegType to, uptr from )
 }
 
 // cmp r64 to r64 
-__forceinline void CMP64RtoR( x86IntRegType to, x86IntRegType from )
+_inline void CMP64RtoR( x86IntRegType to, x86IntRegType from )
 {
     RexRB(1,from,to);
 	write8( 0x39 );
@@ -2933,7 +2933,7 @@ __forceinline void CMP64RtoR( x86IntRegType to, x86IntRegType from )
 }
 
 /* cmp imm32 to r32 */
-__forceinline void CMP32ItoR( x86IntRegType to, u32 from ) 
+_inline void CMP32ItoR( x86IntRegType to, u32 from ) 
 {
     RexB(0,to);
 	if ( to == EAX ) {
@@ -2947,7 +2947,7 @@ __forceinline void CMP32ItoR( x86IntRegType to, u32 from )
 }
 
 /* cmp imm32 to m32 */
-__forceinline void CMP32ItoM( uptr to, u32 from ) 
+_inline void CMP32ItoM( uptr to, u32 from ) 
 {
 	write8( 0x81 ); 
 	ModRM( 0, 7, DISP32 );
@@ -2956,7 +2956,7 @@ __forceinline void CMP32ItoM( uptr to, u32 from )
 }
 
 /* cmp r32 to r32 */
-__forceinline void CMP32RtoR( x86IntRegType to, x86IntRegType from ) 
+_inline void CMP32RtoR( x86IntRegType to, x86IntRegType from ) 
 {
     RexRB(0,from,to);
 	write8( 0x39 );
@@ -2964,7 +2964,7 @@ __forceinline void CMP32RtoR( x86IntRegType to, x86IntRegType from )
 }
 
 /* cmp m32 to r32 */
-__forceinline void CMP32MtoR( x86IntRegType to, uptr from ) 
+_inline void CMP32MtoR( x86IntRegType to, uptr from ) 
 {
     RexR(0,to);
 	write8( 0x3B );
@@ -2973,7 +2973,7 @@ __forceinline void CMP32MtoR( x86IntRegType to, uptr from )
 }
 
 // cmp imm8 to [r32]
-__forceinline void CMP32I8toRm( x86IntRegType to, u8 from)
+_inline void CMP32I8toRm( x86IntRegType to, u8 from)
 {
     RexB(0,to);
 	write8( 0x83 );
@@ -2982,7 +2982,7 @@ __forceinline void CMP32I8toRm( x86IntRegType to, u8 from)
 }
 
 // cmp imm32 to [r32+off]
-__forceinline void CMP32I8toRmOffset8( x86IntRegType to, u8 from, u8 off)
+_inline void CMP32I8toRmOffset8( x86IntRegType to, u8 from, u8 off)
 {
     RexB(0,to);
 	write8( 0x83 );
@@ -2992,7 +2992,7 @@ __forceinline void CMP32I8toRmOffset8( x86IntRegType to, u8 from, u8 off)
 }
 
 // cmp imm8 to [r32]
-__forceinline void CMP32I8toM( uptr to, u8 from)
+_inline void CMP32I8toM( uptr to, u8 from)
 {
 	write8( 0x83 );
 	ModRM( 0, 7, DISP32 );
@@ -3001,7 +3001,7 @@ __forceinline void CMP32I8toM( uptr to, u8 from)
 }
 
 /* cmp imm16 to r16 */
-__forceinline void CMP16ItoR( x86IntRegType to, u16 from ) 
+_inline void CMP16ItoR( x86IntRegType to, u16 from ) 
 {
 	write8( 0x66 ); 
     RexB(0,to);
@@ -3018,7 +3018,7 @@ __forceinline void CMP16ItoR( x86IntRegType to, u16 from )
 }
 
 /* cmp imm16 to m16 */
-__forceinline void CMP16ItoM( uptr to, u16 from ) 
+_inline void CMP16ItoM( uptr to, u16 from ) 
 {
 	write8( 0x66 ); 
 	write8( 0x81 ); 
@@ -3028,7 +3028,7 @@ __forceinline void CMP16ItoM( uptr to, u16 from )
 }
 
 /* cmp r16 to r16 */
-__forceinline void CMP16RtoR( x86IntRegType to, x86IntRegType from ) 
+_inline void CMP16RtoR( x86IntRegType to, x86IntRegType from ) 
 {
 	write8( 0x66 ); 
     RexRB(0,from,to);
@@ -3037,7 +3037,7 @@ __forceinline void CMP16RtoR( x86IntRegType to, x86IntRegType from )
 }
 
 /* cmp m16 to r16 */
-__forceinline void CMP16MtoR( x86IntRegType to, uptr from ) 
+_inline void CMP16MtoR( x86IntRegType to, uptr from ) 
 {
 	write8( 0x66 ); 
     RexR(0,to);
@@ -3047,7 +3047,7 @@ __forceinline void CMP16MtoR( x86IntRegType to, uptr from )
 }
 
 // cmp imm8 to r8
-__forceinline void CMP8ItoR( x86IntRegType to, u8 from )
+_inline void CMP8ItoR( x86IntRegType to, u8 from )
 {
     RexB(0,to);
 	if ( to == EAX )
@@ -3063,7 +3063,7 @@ __forceinline void CMP8ItoR( x86IntRegType to, u8 from )
 }
 
 // cmp m8 to r8
-__forceinline void CMP8MtoR( x86IntRegType to, uptr from )
+_inline void CMP8MtoR( x86IntRegType to, uptr from )
 {
     RexR(0,to);
 	write8( 0x3A );
@@ -3072,7 +3072,7 @@ __forceinline void CMP8MtoR( x86IntRegType to, uptr from )
 }
 
 /* test imm32 to r32 */
-__forceinline void TEST32ItoR( x86IntRegType to, u32 from ) 
+_inline void TEST32ItoR( x86IntRegType to, u32 from ) 
 {
     RexB(0,to);
 	if ( to == EAX )
@@ -3087,7 +3087,7 @@ __forceinline void TEST32ItoR( x86IntRegType to, u32 from )
 	write32( from ); 
 }
 
-__forceinline void TEST32ItoM( uptr to, u32 from )
+_inline void TEST32ItoM( uptr to, u32 from )
 {
 	write8( 0xF7 );
 	ModRM( 0, 0, DISP32 );
@@ -3096,7 +3096,7 @@ __forceinline void TEST32ItoM( uptr to, u32 from )
 }
 
 /* test r32 to r32 */
-__forceinline void TEST32RtoR( x86IntRegType to, x86IntRegType from ) 
+_inline void TEST32RtoR( x86IntRegType to, x86IntRegType from ) 
 {
     RexRB(0,from,to);
 	write8( 0x85 );
@@ -3104,7 +3104,7 @@ __forceinline void TEST32RtoR( x86IntRegType to, x86IntRegType from )
 }
 
 // test imm32 to [r32]
-__forceinline void TEST32ItoRm( x86IntRegType to, u32 from )
+_inline void TEST32ItoRm( x86IntRegType to, u32 from )
 {
     RexB(0,to);
 	write8( 0xF7 );
@@ -3113,7 +3113,7 @@ __forceinline void TEST32ItoRm( x86IntRegType to, u32 from )
 }
 
 // test imm16 to r16
-__forceinline void TEST16ItoR( x86IntRegType to, u16 from )
+_inline void TEST16ItoR( x86IntRegType to, u16 from )
 {
     write8(0x66);
     RexB(0,to);
@@ -3130,7 +3130,7 @@ __forceinline void TEST16ItoR( x86IntRegType to, u16 from )
 }
 
 // test r16 to r16
-__forceinline void TEST16RtoR( x86IntRegType to, x86IntRegType from )
+_inline void TEST16RtoR( x86IntRegType to, x86IntRegType from )
 {
     write8(0x66);
     RexRB(0,from,to);
@@ -3139,7 +3139,7 @@ __forceinline void TEST16RtoR( x86IntRegType to, x86IntRegType from )
 }
 
 // test r8 to r8
-__forceinline void TEST8RtoR( x86IntRegType to, x86IntRegType from )
+_inline void TEST8RtoR( x86IntRegType to, x86IntRegType from )
 {
     RexRB(0, from, to);
 	write8( 0x84 );
@@ -3148,7 +3148,7 @@ __forceinline void TEST8RtoR( x86IntRegType to, x86IntRegType from )
 
 
 // test imm8 to r8
-__forceinline void TEST8ItoR( x86IntRegType to, u8 from )
+_inline void TEST8ItoR( x86IntRegType to, u8 from )
 {
     RexB(0,to);
 	if ( to == EAX )
@@ -3164,7 +3164,7 @@ __forceinline void TEST8ItoR( x86IntRegType to, u8 from )
 }
 
 // test imm8 to r8
-__forceinline void TEST8ItoM( uptr to, u8 from )
+_inline void TEST8ItoM( uptr to, u8 from )
 {
 	write8( 0xF6 );
 	ModRM( 0, 0, DISP32 );
@@ -3173,36 +3173,36 @@ __forceinline void TEST8ItoM( uptr to, u8 from )
 }
 
 /* sets r8 */
-__forceinline void SETS8R( x86IntRegType to ) 
+_inline void SETS8R( x86IntRegType to ) 
 { 
    SET8R( 0x98, to ); 
 }
 
 /* setl r8 */
-__forceinline void SETL8R( x86IntRegType to ) 
+_inline void SETL8R( x86IntRegType to ) 
 { 
 	SET8R( 0x9C, to ); 
 }
 
 // setge r8 
-__forceinline void SETGE8R( x86IntRegType to ) { SET8R(0x9d, to); }
+_inline void SETGE8R( x86IntRegType to ) { SET8R(0x9d, to); }
 // setg r8 
-__forceinline void SETG8R( x86IntRegType to ) { SET8R(0x9f, to); }
+_inline void SETG8R( x86IntRegType to ) { SET8R(0x9f, to); }
 // seta r8 
-__forceinline void SETA8R( x86IntRegType to ) { SET8R(0x97, to); }
+_inline void SETA8R( x86IntRegType to ) { SET8R(0x97, to); }
 // setae r8 
-__forceinline void SETAE8R( x86IntRegType to ) { SET8R(0x99, to); }
+_inline void SETAE8R( x86IntRegType to ) { SET8R(0x99, to); }
 /* setb r8 */
-__forceinline void SETB8R( x86IntRegType to ) { SET8R( 0x92, to ); }
+_inline void SETB8R( x86IntRegType to ) { SET8R( 0x92, to ); }
 /* setb r8 */
-__forceinline void SETNZ8R( x86IntRegType to )  { SET8R( 0x95, to ); }
+_inline void SETNZ8R( x86IntRegType to )  { SET8R( 0x95, to ); }
 // setz r8 
-__forceinline void SETZ8R( x86IntRegType to ) { SET8R(0x94, to); }
+_inline void SETZ8R( x86IntRegType to ) { SET8R(0x94, to); }
 // sete r8 
-__forceinline void SETE8R( x86IntRegType to ) { SET8R(0x94, to); }
+_inline void SETE8R( x86IntRegType to ) { SET8R(0x94, to); }
 
 /* push imm32 */
-__forceinline void PUSH32I( u32 from ) 
+_inline void PUSH32I( u32 from ) 
 {
     X86_64ASSERT();
 	write8( 0x68 ); 
@@ -3238,10 +3238,10 @@ void POPR(x86IntRegType from) { POP64R(from); }
 #else
 
 /* push r32 */
-__forceinline void PUSH32R( x86IntRegType from )  { write8( 0x50 | from ); }
+_inline void PUSH32R( x86IntRegType from )  { write8( 0x50 | from ); }
 
 /* push m32 */
-__forceinline void PUSH32M( u32 from ) 
+_inline void PUSH32M( u32 from ) 
 {
     write8( 0xFF );
 	ModRM( 0, 6, DISP32 );
@@ -3249,74 +3249,74 @@ __forceinline void PUSH32M( u32 from )
 }
 
 /* pop r32 */
-__forceinline void POP32R( x86IntRegType from ) { write8( 0x58 | from ); }
+_inline void POP32R( x86IntRegType from ) { write8( 0x58 | from ); }
 
 /* pushad */
-__forceinline void PUSHA32( void ) { write8( 0x60 ); }
+_inline void PUSHA32( void ) { write8( 0x60 ); }
 
 /* popad */
-__forceinline void POPA32( void ) { write8( 0x61 ); }
+_inline void POPA32( void ) { write8( 0x61 ); }
 
-__forceinline void PUSHR(x86IntRegType from) { PUSH32R(from); }
-__forceinline void POPR(x86IntRegType from) { POP32R(from); }
+_inline void PUSHR(x86IntRegType from) { PUSH32R(from); }
+_inline void POPR(x86IntRegType from) { POP32R(from); }
 
 #endif
 
 
 /* pushfd */
-__forceinline void PUSHFD( void ) { write8( 0x9C ); }
+_inline void PUSHFD( void ) { write8( 0x9C ); }
 /* popfd */
-__forceinline void POPFD( void ) { write8( 0x9D ); }
+_inline void POPFD( void ) { write8( 0x9D ); }
 
-__forceinline void RET( void ) { write8( 0xC3 ); }
-__forceinline void RET2( void ) { write16( 0xc3f3 ); }
+_inline void RET( void ) { write8( 0xC3 ); }
+_inline void RET2( void ) { write16( 0xc3f3 ); }
 
-__forceinline void CBW( void ) { write16( 0x9866 );  }
-__forceinline void CWD( void )  { write8( 0x98 ); }
-__forceinline void CDQ( void ) { write8( 0x99 ); }
-__forceinline void CWDE() { write8(0x98); }
+_inline void CBW( void ) { write16( 0x9866 );  }
+_inline void CWD( void )  { write8( 0x98 ); }
+_inline void CDQ( void ) { write8( 0x99 ); }
+_inline void CWDE() { write8(0x98); }
 
 #ifdef __x86_64__
 void CDQE( void ) { RexR(1,0); write8( 0x98 ); }
 #endif
 
-__forceinline void LAHF() { write8(0x9f); }
-__forceinline void SAHF() { write8(0x9e); }
+_inline void LAHF() { write8(0x9f); }
+_inline void SAHF() { write8(0x9e); }
 
-__forceinline void BT32ItoR( x86IntRegType to, u8 from ) 
+_inline void BT32ItoR( x86IntRegType to, u8 from ) 
 {
 	write16( 0xBA0F );
 	ModRM(3, 4, to);
 	write8( from );
 }
 
-__forceinline void BTR32ItoR( x86IntRegType to, u8 from ) 
+_inline void BTR32ItoR( x86IntRegType to, u8 from ) 
 {
 	write16( 0xBA0F );
 	ModRM(3, 6, to);
 	write8( from );
 }
 
-__forceinline void BSRRtoR(x86IntRegType to, x86IntRegType from)
+_inline void BSRRtoR(x86IntRegType to, x86IntRegType from)
 {
 	write16( 0xBD0F );
 	ModRM( 3, from, to );
 }
 
-__forceinline void BSWAP32R( x86IntRegType to ) 
+_inline void BSWAP32R( x86IntRegType to ) 
 {
 	write8( 0x0F );
 	write8( 0xC8 + to );
 }
 
 // to = from + offset
-__forceinline void LEA16RtoR(x86IntRegType to, x86IntRegType from, u16 offset)
+_inline void LEA16RtoR(x86IntRegType to, x86IntRegType from, u16 offset)
 {
 	write8(0x66);
 	LEA32RtoR(to, from, offset);
 }
 
-__forceinline void LEA32RtoR(x86IntRegType to, x86IntRegType from, u32 offset)
+_inline void LEA32RtoR(x86IntRegType to, x86IntRegType from, u32 offset)
 {
     RexRB(0,to,from);
 	write8(0x8d);
@@ -3353,13 +3353,13 @@ __forceinline void LEA32RtoR(x86IntRegType to, x86IntRegType from, u32 offset)
 }
 
 // to = from0 + from1
-__forceinline void LEA16RRtoR(x86IntRegType to, x86IntRegType from0, x86IntRegType from1)
+_inline void LEA16RRtoR(x86IntRegType to, x86IntRegType from0, x86IntRegType from1)
 {
 	write8(0x66);
 	LEA32RRtoR(to, from0, from1);
 }
 
-__forceinline void LEA32RRtoR(x86IntRegType to, x86IntRegType from0, x86IntRegType from1)
+_inline void LEA32RRtoR(x86IntRegType to, x86IntRegType from0, x86IntRegType from1)
 { 
     RexRXB(0, to, from0, from1);
 	write8(0x8d);
@@ -3376,13 +3376,13 @@ __forceinline void LEA32RRtoR(x86IntRegType to, x86IntRegType from0, x86IntRegTy
 }
 
 // to = from << scale (max is 3)
-__forceinline void LEA16RStoR(x86IntRegType to, x86IntRegType from, u32 scale)
+_inline void LEA16RStoR(x86IntRegType to, x86IntRegType from, u32 scale)
 {
 	write8(0x66);
 	LEA32RStoR(to, from, scale);
 }
 
-__forceinline void LEA32RStoR(x86IntRegType to, x86IntRegType from, u32 scale)
+_inline void LEA32RStoR(x86IntRegType to, x86IntRegType from, u32 scale)
 {
 	if( to == from ) {
 		SHL32ItoR(to, scale);
diff --git a/pcsx2/x86/ix86/ix86_sse.c b/pcsx2/x86/ix86/ix86_sse.c
index 9331b335ab..c0c280a2e0 100644
--- a/pcsx2/x86/ix86/ix86_sse.c
+++ b/pcsx2/x86/ix86/ix86_sse.c
@@ -123,7 +123,7 @@ void WriteRmOffset(x86IntRegType to, int offset);
 void WriteRmOffsetFrom(x86IntRegType to, x86IntRegType from, int offset);
 
 /* movups [r32][r32*scale] to xmm1 */
-void SSE_MOVUPSRmStoR( x86SSERegType to, x86IntRegType from, x86IntRegType from2, int scale )
+_inline void SSE_MOVUPSRmStoR( x86SSERegType to, x86IntRegType from, x86IntRegType from2, int scale )
 {
 	assert( cpucaps.hasStreamingSIMDExtensions );
     RexRXB(0, to, from2, from);
@@ -133,7 +133,7 @@ void SSE_MOVUPSRmStoR( x86SSERegType to, x86IntRegType from, x86IntRegType from2
 }
 
 /* movups xmm1 to [r32][r32*scale] */
-void SSE_MOVUPSRtoRmS( x86SSERegType to, x86IntRegType from, x86IntRegType from2, int scale )
+_inline void SSE_MOVUPSRtoRmS( x86SSERegType to, x86IntRegType from, x86IntRegType from2, int scale )
 {
 	assert( cpucaps.hasStreamingSIMDExtensions );
     RexRXB(1, to, from2, from);
@@ -143,7 +143,7 @@ void SSE_MOVUPSRtoRmS( x86SSERegType to, x86IntRegType from, x86IntRegType from2
 }
 
 /* movups [r32] to r32 */
-void SSE_MOVUPSRmtoR( x86IntRegType to, x86IntRegType from ) 
+_inline void SSE_MOVUPSRmtoR( x86IntRegType to, x86IntRegType from ) 
 {
 	assert( cpucaps.hasStreamingSIMDExtensions );
 	RexRB(0, to, from);
@@ -152,7 +152,7 @@ void SSE_MOVUPSRmtoR( x86IntRegType to, x86IntRegType from )
 }
 
 /* movups r32 to [r32] */
-void SSE_MOVUPSRtoRm( x86IntRegType to, x86IntRegType from ) 
+_inline void SSE_MOVUPSRtoRm( x86IntRegType to, x86IntRegType from ) 
 {
 	assert( cpucaps.hasStreamingSIMDExtensions );
     RexRB(0, from, to);
@@ -161,7 +161,7 @@ void SSE_MOVUPSRtoRm( x86IntRegType to, x86IntRegType from )
 }
 
 /* movlps [r32] to r32 */
-void SSE_MOVLPSRmtoR( x86SSERegType to, x86IntRegType from ) 
+_inline void SSE_MOVLPSRmtoR( x86SSERegType to, x86IntRegType from ) 
 {
 	assert( cpucaps.hasStreamingSIMDExtensions );
 	RexRB(1, to, from);
@@ -169,7 +169,7 @@ void SSE_MOVLPSRmtoR( x86SSERegType to, x86IntRegType from )
 	ModRM( 0, to, from );
 }
 
-void SSE_MOVLPSRmtoROffset( x86SSERegType to, x86IntRegType from, int offset )
+_inline void SSE_MOVLPSRmtoROffset( x86SSERegType to, x86IntRegType from, int offset )
 {
 	assert( cpucaps.hasStreamingSIMDExtensions );
     RexRB(0, to, from);
@@ -178,7 +178,7 @@ void SSE_MOVLPSRmtoROffset( x86SSERegType to, x86IntRegType from, int offset )
 }
 
 /* movaps r32 to [r32] */
-void SSE_MOVLPSRtoRm( x86IntRegType to, x86IntRegType from ) 
+_inline void SSE_MOVLPSRtoRm( x86IntRegType to, x86IntRegType from ) 
 {
 	assert( cpucaps.hasStreamingSIMDExtensions );
     RexRB(0, from, to);
@@ -186,7 +186,7 @@ void SSE_MOVLPSRtoRm( x86IntRegType to, x86IntRegType from )
 	ModRM( 0, from, to );
 }
 
-void SSE_MOVLPSRtoRmOffset( x86SSERegType to, x86IntRegType from, int offset )
+_inline void SSE_MOVLPSRtoRmOffset( x86SSERegType to, x86IntRegType from, int offset )
 {
 	assert( cpucaps.hasStreamingSIMDExtensions );
     RexRB(0, from, to);
@@ -195,7 +195,7 @@ void SSE_MOVLPSRtoRmOffset( x86SSERegType to, x86IntRegType from, int offset )
 }
 
 /* movaps [r32][r32*scale] to xmm1 */
-void SSE_MOVAPSRmStoR( x86SSERegType to, x86IntRegType from, x86IntRegType from2, int scale )
+_inline void SSE_MOVAPSRmStoR( x86SSERegType to, x86IntRegType from, x86IntRegType from2, int scale )
 {
 	assert( cpucaps.hasStreamingSIMDExtensions && from != EBP );
     RexRXB(0, to, from2, from);
@@ -205,7 +205,7 @@ void SSE_MOVAPSRmStoR( x86SSERegType to, x86IntRegType from, x86IntRegType from2
 }
 
 /* movaps xmm1 to [r32][r32*scale] */
-void SSE_MOVAPSRtoRmS( x86SSERegType to, x86IntRegType from, x86IntRegType from2, int scale )
+_inline void SSE_MOVAPSRtoRmS( x86SSERegType to, x86IntRegType from, x86IntRegType from2, int scale )
 {
 	assert( cpucaps.hasStreamingSIMDExtensions && from != EBP );
     RexRXB(0, to, from2, from);
@@ -215,7 +215,7 @@ void SSE_MOVAPSRtoRmS( x86SSERegType to, x86IntRegType from, x86IntRegType from2
 }
 
 // movaps [r32+offset] to r32
-void SSE_MOVAPSRmtoROffset( x86SSERegType to, x86IntRegType from, int offset )
+_inline void SSE_MOVAPSRmtoROffset( x86SSERegType to, x86IntRegType from, int offset )
 {
 	assert( cpucaps.hasStreamingSIMDExtensions );
 	RexRB(0, to, from);
@@ -224,7 +224,7 @@ void SSE_MOVAPSRmtoROffset( x86SSERegType to, x86IntRegType from, int offset )
 }
 
 // movaps r32 to [r32+offset]
-void SSE_MOVAPSRtoRmOffset( x86IntRegType to, x86SSERegType from, int offset ) 
+_inline void SSE_MOVAPSRtoRmOffset( x86IntRegType to, x86SSERegType from, int offset ) 
 {
 	assert( cpucaps.hasStreamingSIMDExtensions );
 	RexRB(0, from, to);
@@ -233,7 +233,7 @@ void SSE_MOVAPSRtoRmOffset( x86IntRegType to, x86SSERegType from, int offset )
 }
 
 // movdqa [r32+offset] to r32
-void SSE2_MOVDQARmtoROffset( x86SSERegType to, x86IntRegType from, int offset )
+_inline void SSE2_MOVDQARmtoROffset( x86SSERegType to, x86IntRegType from, int offset )
 {
 	assert( cpucaps.hasStreamingSIMDExtensions );
 	write8(0x66);
@@ -243,7 +243,7 @@ void SSE2_MOVDQARmtoROffset( x86SSERegType to, x86IntRegType from, int offset )
 }
 
 // movdqa r32 to [r32+offset]
-void SSE2_MOVDQARtoRmOffset( x86IntRegType to, x86SSERegType from, int offset ) 
+_inline void SSE2_MOVDQARtoRmOffset( x86IntRegType to, x86SSERegType from, int offset ) 
 {
 	assert( cpucaps.hasStreamingSIMDExtensions );
 	write8(0x66);
@@ -253,7 +253,7 @@ void SSE2_MOVDQARtoRmOffset( x86IntRegType to, x86SSERegType from, int offset )
 }
 
 // movups [r32+offset] to r32
-void SSE_MOVUPSRmtoROffset( x86SSERegType to, x86IntRegType from, int offset )
+_inline void SSE_MOVUPSRmtoROffset( x86SSERegType to, x86IntRegType from, int offset )
 {
 	RexRB(0, to, from);
 	write16( 0x100f );
@@ -261,7 +261,7 @@ void SSE_MOVUPSRmtoROffset( x86SSERegType to, x86IntRegType from, int offset )
 }
 
 // movups r32 to [r32+offset]
-void SSE_MOVUPSRtoRmOffset( x86SSERegType to, x86IntRegType from, int offset )
+_inline void SSE_MOVUPSRtoRmOffset( x86SSERegType to, x86IntRegType from, int offset )
 {
 	assert( cpucaps.hasStreamingSIMDExtensions );
     RexRB(0, from, to);
@@ -272,14 +272,14 @@ void SSE_MOVUPSRtoRmOffset( x86SSERegType to, x86IntRegType from, int offset )
 //**********************************************************************************/
 //MOVAPS: Move aligned Packed Single Precision FP values                           *
 //**********************************************************************************
-void SSE_MOVAPS_M128_to_XMM( x86SSERegType to, uptr from )          { SSEMtoR( 0x280f, 0 ); }
-void SSE_MOVAPS_XMM_to_M128( uptr to, x86SSERegType from )          { SSERtoM( 0x290f, 0 ); }
-void SSE_MOVAPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )     { SSERtoR( 0x280f ); }
+_inline void SSE_MOVAPS_M128_to_XMM( x86SSERegType to, uptr from )          { SSEMtoR( 0x280f, 0 ); }
+_inline void SSE_MOVAPS_XMM_to_M128( uptr to, x86SSERegType from )          { SSERtoM( 0x290f, 0 ); }
+_inline void SSE_MOVAPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )     { SSERtoR( 0x280f ); }
 
-void SSE_MOVUPS_M128_to_XMM( x86SSERegType to, uptr from )          { SSEMtoR( 0x100f, 0 ); }
-void SSE_MOVUPS_XMM_to_M128( uptr to, x86SSERegType from )          { SSERtoM( 0x110f, 0 ); }
+_inline void SSE_MOVUPS_M128_to_XMM( x86SSERegType to, uptr from )          { SSEMtoR( 0x100f, 0 ); }
+_inline void SSE_MOVUPS_XMM_to_M128( uptr to, x86SSERegType from )          { SSERtoM( 0x110f, 0 ); }
 
-void SSE2_MOVSD_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
+_inline void SSE2_MOVSD_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
 {
 	if( !cpucaps.hasStreamingSIMD2Extensions ) SSE2EMU_MOVSD_XMM_to_XMM(to, from);
 	else {
@@ -288,7 +288,7 @@ void SSE2_MOVSD_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
 	}
 }
 
-void SSE2_MOVQ_M64_to_XMM( x86SSERegType to, uptr from )
+_inline void SSE2_MOVQ_M64_to_XMM( x86SSERegType to, uptr from )
 {
 	if( !cpucaps.hasStreamingSIMD2Extensions ) SSE2EMU_MOVQ_M64_to_XMM(to, from);
 	else {
@@ -296,7 +296,7 @@ void SSE2_MOVQ_M64_to_XMM( x86SSERegType to, uptr from )
 	}
 }
 
-void SSE2_MOVQ_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
+_inline void SSE2_MOVQ_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
 {
 	if( !cpucaps.hasStreamingSIMD2Extensions ) SSE2EMU_MOVQ_XMM_to_XMM(to, from);
 	else {
@@ -304,7 +304,7 @@ void SSE2_MOVQ_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
 	}
 }
 
-void SSE2_MOVQ_XMM_to_M64( u32 to, x86SSERegType from )
+_inline void SSE2_MOVQ_XMM_to_M64( u32 to, x86SSERegType from )
 {
 	if( !cpucaps.hasStreamingSIMD2Extensions ) SSE_MOVLPS_XMM_to_M64(to, from);
 	else {
@@ -313,7 +313,7 @@ void SSE2_MOVQ_XMM_to_M64( u32 to, x86SSERegType from )
 }
 
 #ifndef __x86_64__
-void SSE2_MOVDQ2Q_XMM_to_MM( x86MMXRegType to, x86SSERegType from)
+_inline void SSE2_MOVDQ2Q_XMM_to_MM( x86MMXRegType to, x86SSERegType from)
 {
 	if( !cpucaps.hasStreamingSIMD2Extensions ) SSE2EMU_MOVDQ2Q_XMM_to_MM(to, from);
 	else {
@@ -321,7 +321,7 @@ void SSE2_MOVDQ2Q_XMM_to_MM( x86MMXRegType to, x86SSERegType from)
 		SSERtoR( 0xd60f);
 	}
 }
-void SSE2_MOVQ2DQ_MM_to_XMM( x86SSERegType to, x86MMXRegType from)
+_inline void SSE2_MOVQ2DQ_MM_to_XMM( x86SSERegType to, x86MMXRegType from)
 {
 	if( !cpucaps.hasStreamingSIMD2Extensions ) SSE2EMU_MOVQ2DQ_MM_to_XMM(to, from);
 	else {
@@ -334,9 +334,9 @@ void SSE2_MOVQ2DQ_MM_to_XMM( x86SSERegType to, x86MMXRegType from)
 //**********************************************************************************/
 //MOVSS: Move Scalar Single-Precision FP  value                                    *
 //**********************************************************************************
-void SSE_MOVSS_M32_to_XMM( x86SSERegType to, uptr from )           { SSE_SS_MtoR( 0x100f, 0 ); }
-void SSE_MOVSS_XMM_to_M32( u32 to, x86SSERegType from )           { SSE_SS_RtoM( 0x110f, 0 ); }
-void SSE_MOVSS_XMM_to_Rm( x86IntRegType to, x86SSERegType from )
+_inline void SSE_MOVSS_M32_to_XMM( x86SSERegType to, uptr from )           { SSE_SS_MtoR( 0x100f, 0 ); }
+_inline void SSE_MOVSS_XMM_to_M32( u32 to, x86SSERegType from )           { SSE_SS_RtoM( 0x110f, 0 ); }
+_inline void SSE_MOVSS_XMM_to_Rm( x86IntRegType to, x86SSERegType from )
 {
 	write8(0xf3);
     RexRB(0, from, to);
@@ -344,9 +344,9 @@ void SSE_MOVSS_XMM_to_Rm( x86IntRegType to, x86SSERegType from )
 	ModRM(0, from, to);
 }
 
-void SSE_MOVSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )      { SSE_SS_RtoR( 0x100f ); }
+_inline void SSE_MOVSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )      { SSE_SS_RtoR( 0x100f ); }
 
-void SSE_MOVSS_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset )
+_inline void SSE_MOVSS_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset )
 {
 	write8(0xf3);
     RexRB(0, to, from);
@@ -354,7 +354,7 @@ void SSE_MOVSS_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset
     WriteRmOffsetFrom(to, from, offset);
 }
 
-void SSE_MOVSS_XMM_to_RmOffset( x86IntRegType to, x86SSERegType from, int offset )
+_inline void SSE_MOVSS_XMM_to_RmOffset( x86IntRegType to, x86SSERegType from, int offset )
 {
 	write8(0xf3);
     RexRB(0, from, to);
@@ -362,14 +362,14 @@ void SSE_MOVSS_XMM_to_RmOffset( x86IntRegType to, x86SSERegType from, int offset
     WriteRmOffsetFrom(from, to, offset);
 }
 
-void SSE_MASKMOVDQU_XMM_to_XMM( x86SSERegType to, x86SSERegType from )      { SSERtoR66( 0xf70f ); }
+_inline void SSE_MASKMOVDQU_XMM_to_XMM( x86SSERegType to, x86SSERegType from )      { SSERtoR66( 0xf70f ); }
 //**********************************************************************************/
 //MOVLPS: Move low Packed Single-Precision FP                                     *
 //**********************************************************************************
-void SSE_MOVLPS_M64_to_XMM( x86SSERegType to, uptr from )          { SSEMtoR( 0x120f, 0 ); }
-void SSE_MOVLPS_XMM_to_M64( u32 to, x86SSERegType from )          { SSERtoM( 0x130f, 0 ); }
+_inline void SSE_MOVLPS_M64_to_XMM( x86SSERegType to, uptr from )          { SSEMtoR( 0x120f, 0 ); }
+_inline void SSE_MOVLPS_XMM_to_M64( u32 to, x86SSERegType from )          { SSERtoM( 0x130f, 0 ); }
 
-void SSE_MOVLPS_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset )
+_inline void SSE_MOVLPS_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset )
 {
 	assert( cpucaps.hasStreamingSIMDExtensions );
     RexRB(0, to, from);
@@ -377,7 +377,7 @@ void SSE_MOVLPS_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offse
     WriteRmOffsetFrom(to, from, offset);
 }
 
-void SSE_MOVLPS_XMM_to_RmOffset( x86IntRegType to, x86SSERegType from, int offset )
+_inline void SSE_MOVLPS_XMM_to_RmOffset( x86IntRegType to, x86SSERegType from, int offset )
 {
     RexRB(0, from, to);
 	write16(0x130f);
@@ -388,10 +388,10 @@ void SSE_MOVLPS_XMM_to_RmOffset( x86IntRegType to, x86SSERegType from, int offse
 //**********************************************************************************/
 //MOVHPS: Move High Packed Single-Precision FP                                     *
 //**********************************************************************************
-void SSE_MOVHPS_M64_to_XMM( x86SSERegType to, uptr from )          { SSEMtoR( 0x160f, 0 ); }
-void SSE_MOVHPS_XMM_to_M64( u32 to, x86SSERegType from )          { SSERtoM( 0x170f, 0 ); }
+_inline void SSE_MOVHPS_M64_to_XMM( x86SSERegType to, uptr from )          { SSEMtoR( 0x160f, 0 ); }
+_inline void SSE_MOVHPS_XMM_to_M64( u32 to, x86SSERegType from )          { SSERtoM( 0x170f, 0 ); }
 
-void SSE_MOVHPS_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset )
+_inline void SSE_MOVHPS_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset )
 {
 	assert( cpucaps.hasStreamingSIMDExtensions );
     RexRB(0, to, from);
@@ -399,7 +399,7 @@ void SSE_MOVHPS_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offse
     WriteRmOffsetFrom(to, from, offset);
 }
 
-void SSE_MOVHPS_XMM_to_RmOffset( x86IntRegType to, x86SSERegType from, int offset )
+_inline void SSE_MOVHPS_XMM_to_RmOffset( x86IntRegType to, x86SSERegType from, int offset )
 {
 	assert( cpucaps.hasStreamingSIMDExtensions );
     RexRB(0, from, to);
@@ -411,94 +411,94 @@ void SSE_MOVHPS_XMM_to_RmOffset( x86IntRegType to, x86SSERegType from, int offse
 //**********************************************************************************/
 //MOVLHPS: Moved packed Single-Precision FP low to high                            *
 //**********************************************************************************
-void SSE_MOVLHPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { SSERtoR( 0x160f ); }
+_inline void SSE_MOVLHPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { SSERtoR( 0x160f ); }
 
 //////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //MOVHLPS: Moved packed Single-Precision FP High to Low                            *
 //**********************************************************************************
-void SSE_MOVHLPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { SSERtoR( 0x120f ); }
+_inline void SSE_MOVHLPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { SSERtoR( 0x120f ); }
 
 ///////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //ANDPS: Logical Bit-wise  AND for Single FP                                        *
 //**********************************************************************************
-void SSE_ANDPS_M128_to_XMM( x86SSERegType to, uptr from )           { SSEMtoR( 0x540f, 0 ); }
-void SSE_ANDPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR( 0x540f ); }
+_inline void SSE_ANDPS_M128_to_XMM( x86SSERegType to, uptr from )           { SSEMtoR( 0x540f, 0 ); }
+_inline void SSE_ANDPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR( 0x540f ); }
 
 ///////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //ANDNPS : Logical Bit-wise  AND NOT of Single-precision FP values                 *
 //**********************************************************************************
-void SSE_ANDNPS_M128_to_XMM( x86SSERegType to, uptr from )          { SSEMtoR( 0x550f, 0 ); }
-void SSE_ANDNPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR( 0x550f ); }
+_inline void SSE_ANDNPS_M128_to_XMM( x86SSERegType to, uptr from )          { SSEMtoR( 0x550f, 0 ); }
+_inline void SSE_ANDNPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR( 0x550f ); }
 
 /////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //RCPPS : Packed Single-Precision FP Reciprocal                                     *
 //**********************************************************************************
-void SSE_RCPPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR( 0x530f ); }
-void SSE_RCPPS_M128_to_XMM( x86SSERegType to, uptr from )           { SSEMtoR( 0x530f, 0 ); }
+_inline void SSE_RCPPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR( 0x530f ); }
+_inline void SSE_RCPPS_M128_to_XMM( x86SSERegType to, uptr from )           { SSEMtoR( 0x530f, 0 ); }
 
-void SSE_RCPSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSE_SS_RtoR(0x530f); }
-void SSE_RCPSS_M32_to_XMM( x86SSERegType to, uptr from ) { SSE_SS_MtoR(0x530f, 0); }
+_inline void SSE_RCPSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSE_SS_RtoR(0x530f); }
+_inline void SSE_RCPSS_M32_to_XMM( x86SSERegType to, uptr from ) { SSE_SS_MtoR(0x530f, 0); }
 
 //////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //ORPS : Bit-wise Logical OR of Single-Precision FP Data                            *
 //**********************************************************************************
-void SSE_ORPS_M128_to_XMM( x86SSERegType to, uptr from )            { SSEMtoR( 0x560f, 0 ); }
-void SSE_ORPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )  { SSERtoR( 0x560f ); }
+_inline void SSE_ORPS_M128_to_XMM( x86SSERegType to, uptr from )            { SSEMtoR( 0x560f, 0 ); }
+_inline void SSE_ORPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )  { SSERtoR( 0x560f ); }
 
 /////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //XORPS : Bitwise Logical XOR of Single-Precision FP Values                        *
 //**********************************************************************************
 
-void SSE_XORPS_M128_to_XMM( x86SSERegType to, uptr from )           { SSEMtoR( 0x570f, 0 ); }
-void SSE_XORPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR( 0x570f ); }
+_inline void SSE_XORPS_M128_to_XMM( x86SSERegType to, uptr from )           { SSEMtoR( 0x570f, 0 ); }
+_inline void SSE_XORPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR( 0x570f ); }
 
 ///////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //ADDPS : ADD Packed Single-Precision FP Values                                    *
 //**********************************************************************************
-void SSE_ADDPS_M128_to_XMM( x86SSERegType to, uptr from )           { SSEMtoR( 0x580f, 0 ); }
-void SSE_ADDPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR( 0x580f ); }
+_inline void SSE_ADDPS_M128_to_XMM( x86SSERegType to, uptr from )           { SSEMtoR( 0x580f, 0 ); }
+_inline void SSE_ADDPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR( 0x580f ); }
 
 ////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //ADDSS : ADD Scalar Single-Precision FP Values                                    *
 //**********************************************************************************
-void SSE_ADDSS_M32_to_XMM( x86SSERegType to, uptr from )           { SSE_SS_MtoR( 0x580f, 0 ); }
-void SSE_ADDSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSE_SS_RtoR( 0x580f ); }
+_inline void SSE_ADDSS_M32_to_XMM( x86SSERegType to, uptr from )           { SSE_SS_MtoR( 0x580f, 0 ); }
+_inline void SSE_ADDSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSE_SS_RtoR( 0x580f ); }
 
 /////////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //SUBPS: Packed Single-Precision FP Subtract                                       *
 //**********************************************************************************
-void SSE_SUBPS_M128_to_XMM( x86SSERegType to, uptr from )           { SSEMtoR( 0x5c0f, 0 ); }
-void SSE_SUBPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR( 0x5c0f ); }
+_inline void SSE_SUBPS_M128_to_XMM( x86SSERegType to, uptr from )           { SSEMtoR( 0x5c0f, 0 ); }
+_inline void SSE_SUBPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR( 0x5c0f ); }
 
 ///////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //SUBSS : Scalar  Single-Precision FP Subtract                                       *
 //**********************************************************************************
-void SSE_SUBSS_M32_to_XMM( x86SSERegType to, uptr from )           { SSE_SS_MtoR( 0x5c0f, 0 ); }
-void SSE_SUBSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSE_SS_RtoR( 0x5c0f ); }
+_inline void SSE_SUBSS_M32_to_XMM( x86SSERegType to, uptr from )           { SSE_SS_MtoR( 0x5c0f, 0 ); }
+_inline void SSE_SUBSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSE_SS_RtoR( 0x5c0f ); }
 
 /////////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //MULPS : Packed Single-Precision FP Multiply                                      *
 //**********************************************************************************
-void SSE_MULPS_M128_to_XMM( x86SSERegType to, uptr from )           { SSEMtoR( 0x590f, 0 ); }
-void SSE_MULPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR( 0x590f ); }
+_inline void SSE_MULPS_M128_to_XMM( x86SSERegType to, uptr from )           { SSEMtoR( 0x590f, 0 ); }
+_inline void SSE_MULPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR( 0x590f ); }
 
 ////////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //MULSS : Scalar  Single-Precision FP Multiply                                       *
 //**********************************************************************************
-void SSE_MULSS_M32_to_XMM( x86SSERegType to, uptr from )           { SSE_SS_MtoR( 0x590f, 0 ); }
-void SSE_MULSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSE_SS_RtoR( 0x590f ); }
+_inline void SSE_MULSS_M32_to_XMM( x86SSERegType to, uptr from )           { SSE_SS_MtoR( 0x590f, 0 ); }
+_inline void SSE_MULSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSE_SS_RtoR( 0x590f ); }
 
 ////////////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
@@ -507,22 +507,22 @@ void SSE_MULSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSE_SS_RtoR(
 //missing  SSE_CMPPS_I8_to_XMM
 //         SSE_CMPPS_M32_to_XMM
 //	       SSE_CMPPS_XMM_to_XMM
-void SSE_CMPEQPS_M128_to_XMM( x86SSERegType to, uptr from )         { CMPPSMtoR( 0 ); }
-void SSE_CMPEQPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { CMPPSRtoR( 0 ); }
-void SSE_CMPLTPS_M128_to_XMM( x86SSERegType to, uptr from )         { CMPPSMtoR( 1 ); }
-void SSE_CMPLTPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { CMPPSRtoR( 1 ); }
-void SSE_CMPLEPS_M128_to_XMM( x86SSERegType to, uptr from )         { CMPPSMtoR( 2 ); }
-void SSE_CMPLEPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { CMPPSRtoR( 2 ); }
-void SSE_CMPUNORDPS_M128_to_XMM( x86SSERegType to, uptr from )      { CMPPSMtoR( 3 ); }
-void SSE_CMPUNORDPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { CMPPSRtoR( 3 ); }
-void SSE_CMPNEPS_M128_to_XMM( x86SSERegType to, uptr from )         { CMPPSMtoR( 4 ); }
-void SSE_CMPNEPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { CMPPSRtoR( 4 ); }
-void SSE_CMPNLTPS_M128_to_XMM( x86SSERegType to, uptr from )        { CMPPSMtoR( 5 ); }
-void SSE_CMPNLTPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )   { CMPPSRtoR( 5 ); }
-void SSE_CMPNLEPS_M128_to_XMM( x86SSERegType to, uptr from )        { CMPPSMtoR( 6 ); }
-void SSE_CMPNLEPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )   { CMPPSRtoR( 6 ); }
-void SSE_CMPORDPS_M128_to_XMM( x86SSERegType to, uptr from )        { CMPPSMtoR( 7 ); }
-void SSE_CMPORDPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )   { CMPPSRtoR( 7 ); }
+_inline void SSE_CMPEQPS_M128_to_XMM( x86SSERegType to, uptr from )         { CMPPSMtoR( 0 ); }
+_inline void SSE_CMPEQPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { CMPPSRtoR( 0 ); }
+_inline void SSE_CMPLTPS_M128_to_XMM( x86SSERegType to, uptr from )         { CMPPSMtoR( 1 ); }
+_inline void SSE_CMPLTPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { CMPPSRtoR( 1 ); }
+_inline void SSE_CMPLEPS_M128_to_XMM( x86SSERegType to, uptr from )         { CMPPSMtoR( 2 ); }
+_inline void SSE_CMPLEPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { CMPPSRtoR( 2 ); }
+_inline void SSE_CMPUNORDPS_M128_to_XMM( x86SSERegType to, uptr from )      { CMPPSMtoR( 3 ); }
+_inline void SSE_CMPUNORDPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { CMPPSRtoR( 3 ); }
+_inline void SSE_CMPNEPS_M128_to_XMM( x86SSERegType to, uptr from )         { CMPPSMtoR( 4 ); }
+_inline void SSE_CMPNEPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { CMPPSRtoR( 4 ); }
+_inline void SSE_CMPNLTPS_M128_to_XMM( x86SSERegType to, uptr from )        { CMPPSMtoR( 5 ); }
+_inline void SSE_CMPNLTPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )   { CMPPSRtoR( 5 ); }
+_inline void SSE_CMPNLEPS_M128_to_XMM( x86SSERegType to, uptr from )        { CMPPSMtoR( 6 ); }
+_inline void SSE_CMPNLEPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )   { CMPPSRtoR( 6 ); }
+_inline void SSE_CMPORDPS_M128_to_XMM( x86SSERegType to, uptr from )        { CMPPSMtoR( 7 ); }
+_inline void SSE_CMPORDPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )   { CMPPSRtoR( 7 ); }
 
 ///////////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
@@ -531,24 +531,24 @@ void SSE_CMPORDPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )   { CMPPSRt
 //missing  SSE_CMPSS_I8_to_XMM
 //         SSE_CMPSS_M32_to_XMM
 //	       SSE_CMPSS_XMM_to_XMM
-void SSE_CMPEQSS_M32_to_XMM( x86SSERegType to, uptr from )         { CMPSSMtoR( 0 ); }
-void SSE_CMPEQSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { CMPSSRtoR( 0 ); }
-void SSE_CMPLTSS_M32_to_XMM( x86SSERegType to, uptr from )         { CMPSSMtoR( 1 ); }
-void SSE_CMPLTSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { CMPSSRtoR( 1 ); }
-void SSE_CMPLESS_M32_to_XMM( x86SSERegType to, uptr from )         { CMPSSMtoR( 2 ); }
-void SSE_CMPLESS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { CMPSSRtoR( 2 ); }
-void SSE_CMPUNORDSS_M32_to_XMM( x86SSERegType to, uptr from )      { CMPSSMtoR( 3 ); }
-void SSE_CMPUNORDSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { CMPSSRtoR( 3 ); }
-void SSE_CMPNESS_M32_to_XMM( x86SSERegType to, uptr from )         { CMPSSMtoR( 4 ); }
-void SSE_CMPNESS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { CMPSSRtoR( 4 ); }
-void SSE_CMPNLTSS_M32_to_XMM( x86SSERegType to, uptr from )        { CMPSSMtoR( 5 ); }
-void SSE_CMPNLTSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )   { CMPSSRtoR( 5 ); }
-void SSE_CMPNLESS_M32_to_XMM( x86SSERegType to, uptr from )        { CMPSSMtoR( 6 ); }
-void SSE_CMPNLESS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )   { CMPSSRtoR( 6 ); }
-void SSE_CMPORDSS_M32_to_XMM( x86SSERegType to, uptr from )        { CMPSSMtoR( 7 ); }
-void SSE_CMPORDSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )   { CMPSSRtoR( 7 ); }
+_inline void SSE_CMPEQSS_M32_to_XMM( x86SSERegType to, uptr from )         { CMPSSMtoR( 0 ); }
+_inline void SSE_CMPEQSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { CMPSSRtoR( 0 ); }
+_inline void SSE_CMPLTSS_M32_to_XMM( x86SSERegType to, uptr from )         { CMPSSMtoR( 1 ); }
+_inline void SSE_CMPLTSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { CMPSSRtoR( 1 ); }
+_inline void SSE_CMPLESS_M32_to_XMM( x86SSERegType to, uptr from )         { CMPSSMtoR( 2 ); }
+_inline void SSE_CMPLESS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { CMPSSRtoR( 2 ); }
+_inline void SSE_CMPUNORDSS_M32_to_XMM( x86SSERegType to, uptr from )      { CMPSSMtoR( 3 ); }
+_inline void SSE_CMPUNORDSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { CMPSSRtoR( 3 ); }
+_inline void SSE_CMPNESS_M32_to_XMM( x86SSERegType to, uptr from )         { CMPSSMtoR( 4 ); }
+_inline void SSE_CMPNESS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )    { CMPSSRtoR( 4 ); }
+_inline void SSE_CMPNLTSS_M32_to_XMM( x86SSERegType to, uptr from )        { CMPSSMtoR( 5 ); }
+_inline void SSE_CMPNLTSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )   { CMPSSRtoR( 5 ); }
+_inline void SSE_CMPNLESS_M32_to_XMM( x86SSERegType to, uptr from )        { CMPSSMtoR( 6 ); }
+_inline void SSE_CMPNLESS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )   { CMPSSRtoR( 6 ); }
+_inline void SSE_CMPORDSS_M32_to_XMM( x86SSERegType to, uptr from )        { CMPSSMtoR( 7 ); }
+_inline void SSE_CMPORDSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )   { CMPSSRtoR( 7 ); }
 
-void SSE_UCOMISS_M32_to_XMM( x86SSERegType to, uptr from )
+_inline void SSE_UCOMISS_M32_to_XMM( x86SSERegType to, uptr from )
 {
     RexR(0, to);
 	write16( 0x2e0f );
@@ -556,7 +556,7 @@ void SSE_UCOMISS_M32_to_XMM( x86SSERegType to, uptr from )
 	write32( MEMADDR(from, 4) );
 }
 
-void SSE_UCOMISS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
+_inline void SSE_UCOMISS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
 {
     RexRB(0, to, from);
 	write16( 0x2e0f );
@@ -567,62 +567,62 @@ void SSE_UCOMISS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
 //**********************************************************************************/
 //RSQRTPS : Packed Single-Precision FP Square Root Reciprocal                      *
 //**********************************************************************************
-void SSE_RSQRTPS_M128_to_XMM( x86SSERegType to, uptr from )          { SSEMtoR( 0x520f, 0 ); }
-void SSE_RSQRTPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR( 0x520f ); }
+_inline void SSE_RSQRTPS_M128_to_XMM( x86SSERegType to, uptr from )          { SSEMtoR( 0x520f, 0 ); }
+_inline void SSE_RSQRTPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR( 0x520f ); }
 
 /////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //RSQRTSS : Scalar Single-Precision FP Square Root Reciprocal                      *
 //**********************************************************************************
-void SSE_RSQRTSS_M32_to_XMM( x86SSERegType to, uptr from )          { SSE_SS_MtoR( 0x520f, 0 ); }
-void SSE_RSQRTSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSE_SS_RtoR( 0x520f ); }
+_inline void SSE_RSQRTSS_M32_to_XMM( x86SSERegType to, uptr from )          { SSE_SS_MtoR( 0x520f, 0 ); }
+_inline void SSE_RSQRTSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSE_SS_RtoR( 0x520f ); }
 
 ////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //SQRTPS : Packed Single-Precision FP Square Root                                  *
 //**********************************************************************************
-void SSE_SQRTPS_M128_to_XMM( x86SSERegType to, uptr from )          { SSEMtoR( 0x510f, 0 ); }
-void SSE_SQRTPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR( 0x510f ); }
+_inline void SSE_SQRTPS_M128_to_XMM( x86SSERegType to, uptr from )          { SSEMtoR( 0x510f, 0 ); }
+_inline void SSE_SQRTPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR( 0x510f ); }
 
 //////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //SQRTSS : Scalar Single-Precision FP Square Root                                  *
 //**********************************************************************************
-void SSE_SQRTSS_M32_to_XMM( x86SSERegType to, uptr from )          { SSE_SS_MtoR( 0x510f, 0 ); }
-void SSE_SQRTSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSE_SS_RtoR( 0x510f ); }
+_inline void SSE_SQRTSS_M32_to_XMM( x86SSERegType to, uptr from )          { SSE_SS_MtoR( 0x510f, 0 ); }
+_inline void SSE_SQRTSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSE_SS_RtoR( 0x510f ); }
 
 ////////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //MAXPS: Return Packed Single-Precision FP Maximum                                 *
 //**********************************************************************************
-void SSE_MAXPS_M128_to_XMM( x86SSERegType to, uptr from )           { SSEMtoR( 0x5f0f, 0 ); }
-void SSE_MAXPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR( 0x5f0f ); }
+_inline void SSE_MAXPS_M128_to_XMM( x86SSERegType to, uptr from )           { SSEMtoR( 0x5f0f, 0 ); }
+_inline void SSE_MAXPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR( 0x5f0f ); }
 
 /////////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //MAXSS: Return Scalar Single-Precision FP Maximum                                 *
 //**********************************************************************************
-void SSE_MAXSS_M32_to_XMM( x86SSERegType to, uptr from )           { SSE_SS_MtoR( 0x5f0f, 0 ); }
-void SSE_MAXSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSE_SS_RtoR( 0x5f0f ); }
+_inline void SSE_MAXSS_M32_to_XMM( x86SSERegType to, uptr from )           { SSE_SS_MtoR( 0x5f0f, 0 ); }
+_inline void SSE_MAXSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSE_SS_RtoR( 0x5f0f ); }
 
 #ifndef __x86_64__
 /////////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //CVTPI2PS: Packed Signed INT32 to Packed Single  FP Conversion                    *
 //**********************************************************************************
-void SSE_CVTPI2PS_M64_to_XMM( x86SSERegType to, uptr from )        { SSEMtoR( 0x2a0f, 0 ); }
-void SSE_CVTPI2PS_MM_to_XMM( x86SSERegType to, x86MMXRegType from )   { SSERtoR( 0x2a0f ); }
+_inline void SSE_CVTPI2PS_M64_to_XMM( x86SSERegType to, uptr from )        { SSEMtoR( 0x2a0f, 0 ); }
+_inline void SSE_CVTPI2PS_MM_to_XMM( x86SSERegType to, x86MMXRegType from )   { SSERtoR( 0x2a0f ); }
 
 ///////////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //CVTPS2PI: Packed Single FP to Packed Signed INT32 Conversion                      *
 //**********************************************************************************
-void SSE_CVTPS2PI_M64_to_MM( x86MMXRegType to, uptr from )        { SSEMtoR( 0x2d0f, 0 ); }
-void SSE_CVTPS2PI_XMM_to_MM( x86MMXRegType to, x86SSERegType from )   { SSERtoR( 0x2d0f ); }
+_inline void SSE_CVTPS2PI_M64_to_MM( x86MMXRegType to, uptr from )        { SSEMtoR( 0x2d0f, 0 ); }
+_inline void SSE_CVTPS2PI_XMM_to_MM( x86MMXRegType to, x86SSERegType from )   { SSERtoR( 0x2d0f ); }
 #endif
 
-void SSE_CVTTSS2SI_M32_to_R32(x86IntRegType to, uptr from) { write8(0xf3); SSEMtoR(0x2c0f, 0); }
-void SSE_CVTTSS2SI_XMM_to_R32(x86IntRegType to, x86SSERegType from)
+_inline void SSE_CVTTSS2SI_M32_to_R32(x86IntRegType to, uptr from) { write8(0xf3); SSEMtoR(0x2c0f, 0); }
+_inline void SSE_CVTTSS2SI_XMM_to_R32(x86IntRegType to, x86SSERegType from)
 {
 	write8(0xf3);
     RexRB(0, to, from);
@@ -630,8 +630,8 @@ void SSE_CVTTSS2SI_XMM_to_R32(x86IntRegType to, x86SSERegType from)
 	ModRM(3, to, from);
 }
 
-void SSE_CVTSI2SS_M32_to_XMM(x86SSERegType to, uptr from) { write8(0xf3); SSEMtoR(0x2a0f, 0); }
-void SSE_CVTSI2SS_R_to_XMM(x86SSERegType to, x86IntRegType from)
+_inline void SSE_CVTSI2SS_M32_to_XMM(x86SSERegType to, uptr from) { write8(0xf3); SSEMtoR(0x2a0f, 0); }
+_inline void SSE_CVTSI2SS_R_to_XMM(x86SSERegType to, x86IntRegType from)
 {
 	write8(0xf3);
     RexRB(0, to, from);
@@ -643,29 +643,29 @@ void SSE_CVTSI2SS_R_to_XMM(x86SSERegType to, x86IntRegType from)
 //**********************************************************************************/
 //CVTDQ2PS: Packed Signed INT32  to Packed Single Precision FP  Conversion         *
 //**********************************************************************************
-void SSE2_CVTDQ2PS_M128_to_XMM( x86SSERegType to, uptr from )        { SSEMtoR( 0x5b0f, 0 ); }
-void SSE2_CVTDQ2PS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )   { SSERtoR( 0x5b0f ); }
+_inline void SSE2_CVTDQ2PS_M128_to_XMM( x86SSERegType to, uptr from )        { SSEMtoR( 0x5b0f, 0 ); }
+_inline void SSE2_CVTDQ2PS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )   { SSERtoR( 0x5b0f ); }
 
 //**********************************************************************************/
 //CVTPS2DQ: Packed Single Precision FP to Packed Signed INT32 Conversion           *
 //**********************************************************************************
-void SSE2_CVTPS2DQ_M128_to_XMM( x86SSERegType to, uptr from )        { SSEMtoR66( 0x5b0f ); }
-void SSE2_CVTPS2DQ_XMM_to_XMM( x86SSERegType to, x86SSERegType from )   { SSERtoR66( 0x5b0f ); }
+_inline void SSE2_CVTPS2DQ_M128_to_XMM( x86SSERegType to, uptr from )        { SSEMtoR66( 0x5b0f ); }
+_inline void SSE2_CVTPS2DQ_XMM_to_XMM( x86SSERegType to, x86SSERegType from )   { SSERtoR66( 0x5b0f ); }
 
-void SSE2_CVTTPS2DQ_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { write8(0xf3); SSERtoR(0x5b0f); }
+_inline void SSE2_CVTTPS2DQ_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { write8(0xf3); SSERtoR(0x5b0f); }
 /////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //MINPS: Return Packed Single-Precision FP Minimum                                 *
 //**********************************************************************************
-void SSE_MINPS_M128_to_XMM( x86SSERegType to, uptr from )           { SSEMtoR( 0x5d0f, 0 ); }
-void SSE_MINPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR( 0x5d0f ); }
+_inline void SSE_MINPS_M128_to_XMM( x86SSERegType to, uptr from )           { SSEMtoR( 0x5d0f, 0 ); }
+_inline void SSE_MINPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR( 0x5d0f ); }
 
 //////////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //MINSS: Return Scalar Single-Precision FP Minimum                                 *
 //**********************************************************************************
-void SSE_MINSS_M32_to_XMM( x86SSERegType to, uptr from )           { SSE_SS_MtoR( 0x5d0f, 0 ); }
-void SSE_MINSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSE_SS_RtoR( 0x5d0f ); }
+_inline void SSE_MINSS_M32_to_XMM( x86SSERegType to, uptr from )           { SSE_SS_MtoR( 0x5d0f, 0 ); }
+_inline void SSE_MINSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSE_SS_RtoR( 0x5d0f ); }
 
 #ifndef __x86_64__
 ///////////////////////////////////////////////////////////////////////////////////////////
@@ -676,7 +676,7 @@ void SSE_MINSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSE_SS_RtoR(
  //     SSE_PMAXSW_M64_to_MM
 //		SSE2_PMAXSW_M128_to_XMM
 //		SSE2_PMAXSW_XMM_to_XMM
-void SSE_PMAXSW_MM_to_MM( x86MMXRegType to, x86MMXRegType from ){ SSERtoR( 0xEE0F ); }
+_inline void SSE_PMAXSW_MM_to_MM( x86MMXRegType to, x86MMXRegType from ){ SSERtoR( 0xEE0F ); }
 
 ///////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
@@ -686,17 +686,17 @@ void SSE_PMAXSW_MM_to_MM( x86MMXRegType to, x86MMXRegType from ){ SSERtoR( 0xEE0
  //     SSE_PMINSW_M64_to_MM
 //		SSE2_PMINSW_M128_to_XMM
 //		SSE2_PMINSW_XMM_to_XMM
-void SSE_PMINSW_MM_to_MM( x86MMXRegType to, x86MMXRegType from ){ SSERtoR( 0xEA0F ); }
+_inline void SSE_PMINSW_MM_to_MM( x86MMXRegType to, x86MMXRegType from ){ SSERtoR( 0xEA0F ); }
 #endif
 
 //////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //SHUFPS: Shuffle Packed Single-Precision FP Values                                *
 //**********************************************************************************
-void SSE_SHUFPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from, u8 imm8 )	{ SSERtoR( 0xC60F ); write8( imm8 ); }
-void SSE_SHUFPS_M128_to_XMM( x86SSERegType to, uptr from, u8 imm8 )		{ SSEMtoR( 0xC60F, 1 ); write8( imm8 ); }
+_inline void SSE_SHUFPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from, u8 imm8 )	{ SSERtoR( 0xC60F ); write8( imm8 ); }
+_inline void SSE_SHUFPS_M128_to_XMM( x86SSERegType to, uptr from, u8 imm8 )		{ SSEMtoR( 0xC60F, 1 ); write8( imm8 ); }
 
-void SSE_SHUFPS_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset, u8 imm8 )
+_inline void SSE_SHUFPS_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset, u8 imm8 )
 {
     RexRB(0, to, from);
 	write16(0xc60f);
@@ -708,7 +708,7 @@ void SSE_SHUFPS_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offse
 //**********************************************************************************/
 //PSHUFD: Shuffle Packed DoubleWords                                               *
 //**********************************************************************************
-void SSE2_PSHUFD_XMM_to_XMM( x86SSERegType to, x86SSERegType from, u8 imm8 )
+_inline void SSE2_PSHUFD_XMM_to_XMM( x86SSERegType to, x86SSERegType from, u8 imm8 )
 {
 	if( !cpucaps.hasStreamingSIMD2Extensions ) {
 		SSE2EMU_PSHUFD_XMM_to_XMM(to, from, imm8);
@@ -718,46 +718,46 @@ void SSE2_PSHUFD_XMM_to_XMM( x86SSERegType to, x86SSERegType from, u8 imm8 )
 		write8( imm8 );
 	}
 }
-void SSE2_PSHUFD_M128_to_XMM( x86SSERegType to, uptr from, u8 imm8 )	{ SSEMtoR66( 0x700F ); write8( imm8 ); }
+_inline void SSE2_PSHUFD_M128_to_XMM( x86SSERegType to, uptr from, u8 imm8 )	{ SSEMtoR66( 0x700F ); write8( imm8 ); }
 
-void SSE2_PSHUFLW_XMM_to_XMM( x86SSERegType to, x86SSERegType from, u8 imm8 ) { write8(0xF2); SSERtoR(0x700F); write8(imm8); }
-void SSE2_PSHUFLW_M128_to_XMM( x86SSERegType to, uptr from, u8 imm8 ) { write8(0xF2); SSEMtoR(0x700F, 1); write8(imm8); }
-void SSE2_PSHUFHW_XMM_to_XMM( x86SSERegType to, x86SSERegType from, u8 imm8 ) { write8(0xF3); SSERtoR(0x700F); write8(imm8); }
-void SSE2_PSHUFHW_M128_to_XMM( x86SSERegType to, uptr from, u8 imm8 ) { write8(0xF3); SSEMtoR(0x700F, 1); write8(imm8); }
+_inline void SSE2_PSHUFLW_XMM_to_XMM( x86SSERegType to, x86SSERegType from, u8 imm8 ) { write8(0xF2); SSERtoR(0x700F); write8(imm8); }
+_inline void SSE2_PSHUFLW_M128_to_XMM( x86SSERegType to, uptr from, u8 imm8 ) { write8(0xF2); SSEMtoR(0x700F, 1); write8(imm8); }
+_inline void SSE2_PSHUFHW_XMM_to_XMM( x86SSERegType to, x86SSERegType from, u8 imm8 ) { write8(0xF3); SSERtoR(0x700F); write8(imm8); }
+_inline void SSE2_PSHUFHW_M128_to_XMM( x86SSERegType to, uptr from, u8 imm8 ) { write8(0xF3); SSEMtoR(0x700F, 1); write8(imm8); }
 
 ///////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //UNPCKLPS: Unpack and Interleave low Packed Single-Precision FP Data              *
 //**********************************************************************************
-void SSE_UNPCKLPS_M128_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR(0x140f, 0); }
-void SSE_UNPCKLPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )	{ SSERtoR( 0x140F ); }
+_inline void SSE_UNPCKLPS_M128_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR(0x140f, 0); }
+_inline void SSE_UNPCKLPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )	{ SSERtoR( 0x140F ); }
 
 ////////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //UNPCKHPS: Unpack and Interleave High Packed Single-Precision FP Data              *
 //**********************************************************************************
-void SSE_UNPCKHPS_M128_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR(0x150f, 0); }
-void SSE_UNPCKHPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )	{ SSERtoR( 0x150F ); }
+_inline void SSE_UNPCKHPS_M128_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR(0x150f, 0); }
+_inline void SSE_UNPCKHPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )	{ SSERtoR( 0x150F ); }
 
 ////////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //DIVPS : Packed Single-Precision FP Divide                                       *
 //**********************************************************************************
-void SSE_DIVPS_M128_to_XMM( x86SSERegType to, uptr from )           { SSEMtoR( 0x5e0F, 0 ); }
-void SSE_DIVPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR( 0x5e0F ); }
+_inline void SSE_DIVPS_M128_to_XMM( x86SSERegType to, uptr from )           { SSEMtoR( 0x5e0F, 0 ); }
+_inline void SSE_DIVPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR( 0x5e0F ); }
 
 //////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //DIVSS : Scalar  Single-Precision FP Divide                                       *
 //**********************************************************************************
-void SSE_DIVSS_M32_to_XMM( x86SSERegType to, uptr from )           { SSE_SS_MtoR( 0x5e0F, 0 ); }
-void SSE_DIVSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSE_SS_RtoR( 0x5e0F ); }
+_inline void SSE_DIVSS_M32_to_XMM( x86SSERegType to, uptr from )           { SSE_SS_MtoR( 0x5e0F, 0 ); }
+_inline void SSE_DIVSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSE_SS_RtoR( 0x5e0F ); }
 
 /////////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //STMXCSR : Store Streaming SIMD Extension Control/Status                         *
 //**********************************************************************************
-void SSE_STMXCSR( uptr from ) {
+_inline void SSE_STMXCSR( uptr from ) {
 	write16( 0xAE0F );
 	ModRM( 0, 0x3, DISP32 );
 	write32( MEMADDR(from, 4) );
@@ -767,7 +767,7 @@ void SSE_STMXCSR( uptr from ) {
 //**********************************************************************************/
 //LDMXCSR : Load Streaming SIMD Extension Control/Status                         *
 //**********************************************************************************
-void SSE_LDMXCSR( uptr from ) {
+_inline void SSE_LDMXCSR( uptr from ) {
 	write16( 0xAE0F );
 	ModRM( 0, 0x2, DISP32 );
 	write32( MEMADDR(from, 4) );
@@ -777,31 +777,31 @@ void SSE_LDMXCSR( uptr from ) {
 //**********************************************************************************/
 //PADDB,PADDW,PADDD : Add Packed Integers                                          *
 //**********************************************************************************
-void SSE2_PADDB_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xFC0F ); }
-void SSE2_PADDB_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0xFC0F ); }
-void SSE2_PADDW_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xFD0F ); }
-void SSE2_PADDW_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0xFD0F ); }
-void SSE2_PADDD_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xFE0F ); }
-void SSE2_PADDD_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0xFE0F ); }
+_inline void SSE2_PADDB_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xFC0F ); }
+_inline void SSE2_PADDB_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0xFC0F ); }
+_inline void SSE2_PADDW_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xFD0F ); }
+_inline void SSE2_PADDW_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0xFD0F ); }
+_inline void SSE2_PADDD_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xFE0F ); }
+_inline void SSE2_PADDD_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0xFE0F ); }
 
-void SSE2_PADDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from ) { SSERtoR66( 0xD40F ); }
-void SSE2_PADDQ_M128_to_XMM(x86SSERegType to, uptr from ) { SSEMtoR66( 0xD40F ); }
+_inline void SSE2_PADDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from ) { SSERtoR66( 0xD40F ); }
+_inline void SSE2_PADDQ_M128_to_XMM(x86SSERegType to, uptr from ) { SSEMtoR66( 0xD40F ); }
 
 ///////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //PCMPxx: Compare Packed Integers                                                  *
 //**********************************************************************************
-void SSE2_PCMPGTB_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0x640F ); }
-void SSE2_PCMPGTB_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0x640F ); }
-void SSE2_PCMPGTW_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0x650F ); }
-void SSE2_PCMPGTW_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0x650F ); }
-void SSE2_PCMPGTD_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0x660F ); }
-void SSE2_PCMPGTD_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0x660F ); }
-void SSE2_PCMPEQB_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0x740F ); }
-void SSE2_PCMPEQB_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0x740F ); }
-void SSE2_PCMPEQW_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0x750F ); }
-void SSE2_PCMPEQW_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0x750F ); }
-void SSE2_PCMPEQD_XMM_to_XMM(x86SSERegType to, x86SSERegType from )
+_inline void SSE2_PCMPGTB_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0x640F ); }
+_inline void SSE2_PCMPGTB_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0x640F ); }
+_inline void SSE2_PCMPGTW_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0x650F ); }
+_inline void SSE2_PCMPGTW_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0x650F ); }
+_inline void SSE2_PCMPGTD_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0x660F ); }
+_inline void SSE2_PCMPGTD_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0x660F ); }
+_inline void SSE2_PCMPEQB_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0x740F ); }
+_inline void SSE2_PCMPEQB_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0x740F ); }
+_inline void SSE2_PCMPEQW_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0x750F ); }
+_inline void SSE2_PCMPEQW_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0x750F ); }
+_inline void SSE2_PCMPEQD_XMM_to_XMM(x86SSERegType to, x86SSERegType from )
 {
 	if( !cpucaps.hasStreamingSIMD2Extensions ) {
 		SSE_CMPEQPS_XMM_to_XMM(to, from);
@@ -811,7 +811,7 @@ void SSE2_PCMPEQD_XMM_to_XMM(x86SSERegType to, x86SSERegType from )
 	}
 }
 
-void SSE2_PCMPEQD_M128_to_XMM(x86SSERegType to, uptr from )
+_inline void SSE2_PCMPEQD_M128_to_XMM(x86SSERegType to, uptr from )
 {
 	if( !cpucaps.hasStreamingSIMD2Extensions ) {
 		SSE_CMPEQPS_M128_to_XMM(to, from);
@@ -825,28 +825,28 @@ void SSE2_PCMPEQD_M128_to_XMM(x86SSERegType to, uptr from )
 //**********************************************************************************/
 //PEXTRW,PINSRW: Packed Extract/Insert Word                                        *
 //**********************************************************************************
-void SSE_PEXTRW_XMM_to_R32(x86IntRegType to, x86SSERegType from, u8 imm8 ){ SSERtoR66(0xC50F); write8( imm8 ); }
-void SSE_PINSRW_R32_to_XMM(x86SSERegType to, x86IntRegType from, u8 imm8 ){ SSERtoR66(0xC40F); write8( imm8 ); }
+_inline void SSE_PEXTRW_XMM_to_R32(x86IntRegType to, x86SSERegType from, u8 imm8 ){ SSERtoR66(0xC50F); write8( imm8 ); }
+_inline void SSE_PINSRW_R32_to_XMM(x86SSERegType to, x86IntRegType from, u8 imm8 ){ SSERtoR66(0xC40F); write8( imm8 ); }
 
 ////////////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //PSUBx: Subtract Packed Integers                                                  *
 //**********************************************************************************
-void SSE2_PSUBB_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xF80F ); }
-void SSE2_PSUBB_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0xF80F ); }
-void SSE2_PSUBW_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xF90F ); }
-void SSE2_PSUBW_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0xF90F ); }
-void SSE2_PSUBD_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xFA0F ); }
-void SSE2_PSUBD_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0xFA0F ); }
-void SSE2_PSUBQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xFB0F ); }
-void SSE2_PSUBQ_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0xFB0F ); }
+_inline void SSE2_PSUBB_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xF80F ); }
+_inline void SSE2_PSUBB_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0xF80F ); }
+_inline void SSE2_PSUBW_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xF90F ); }
+_inline void SSE2_PSUBW_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0xF90F ); }
+_inline void SSE2_PSUBD_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xFA0F ); }
+_inline void SSE2_PSUBD_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0xFA0F ); }
+_inline void SSE2_PSUBQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xFB0F ); }
+_inline void SSE2_PSUBQ_M128_to_XMM(x86SSERegType to, uptr from ){ SSEMtoR66( 0xFB0F ); }
 
 ///////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //MOVD: Move Dword(32bit) to /from XMM reg                                         *
 //**********************************************************************************
-void SSE2_MOVD_M32_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR66(0x6E0F); }
-void SSE2_MOVD_R_to_XMM( x86SSERegType to, x86IntRegType from )
+_inline void SSE2_MOVD_M32_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR66(0x6E0F); }
+_inline void SSE2_MOVD_R_to_XMM( x86SSERegType to, x86IntRegType from )
 {
 	if( !cpucaps.hasStreamingSIMD2Extensions ) {
 		SSE2EMU_MOVD_R_to_XMM(to, from);
@@ -856,7 +856,7 @@ void SSE2_MOVD_R_to_XMM( x86SSERegType to, x86IntRegType from )
 	}
 }
 
-void SSE2_MOVD_Rm_to_XMM( x86SSERegType to, x86IntRegType from )
+_inline void SSE2_MOVD_Rm_to_XMM( x86SSERegType to, x86IntRegType from )
 {
 	write8(0x66);
 	RexRB(0, to, from);
@@ -864,7 +864,7 @@ void SSE2_MOVD_Rm_to_XMM( x86SSERegType to, x86IntRegType from )
 	ModRM( 0, to, from);
 }
 
-void SSE2_MOVD_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset )
+_inline void SSE2_MOVD_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset )
 {
 	write8(0x66);
     RexRB(0, to, from);
@@ -872,8 +872,8 @@ void SSE2_MOVD_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset
     WriteRmOffsetFrom(to, from, offset);
 }
 
-void SSE2_MOVD_XMM_to_M32( u32 to, x86SSERegType from ) { SSERtoM66(0x7E0F); }
-void SSE2_MOVD_XMM_to_R( x86IntRegType to, x86SSERegType from ) {
+_inline void SSE2_MOVD_XMM_to_M32( u32 to, x86SSERegType from ) { SSERtoM66(0x7E0F); }
+_inline void SSE2_MOVD_XMM_to_R( x86IntRegType to, x86SSERegType from ) {
 	if( !cpucaps.hasStreamingSIMD2Extensions ) {
 		SSE2EMU_MOVD_XMM_to_R(to, from);
 	}
@@ -882,7 +882,7 @@ void SSE2_MOVD_XMM_to_R( x86IntRegType to, x86SSERegType from ) {
 	}
 }
 
-void SSE2_MOVD_XMM_to_Rm( x86IntRegType to, x86SSERegType from )
+_inline void SSE2_MOVD_XMM_to_Rm( x86IntRegType to, x86SSERegType from )
 {
 	write8(0x66);
     RexRB(0, from, to);
@@ -890,7 +890,7 @@ void SSE2_MOVD_XMM_to_Rm( x86IntRegType to, x86SSERegType from )
 	ModRM( 0, from, to );
 }
 
-void SSE2_MOVD_XMM_to_RmOffset( x86IntRegType to, x86SSERegType from, int offset )
+_inline void SSE2_MOVD_XMM_to_RmOffset( x86IntRegType to, x86SSERegType from, int offset )
 {
 	if( !cpucaps.hasStreamingSIMD2Extensions ) {
 		SSE2EMU_MOVD_XMM_to_RmOffset(to, from, offset);
@@ -904,7 +904,7 @@ void SSE2_MOVD_XMM_to_RmOffset( x86IntRegType to, x86SSERegType from, int offset
 }
 
 #ifdef __x86_64__
-void SSE2_MOVQ_XMM_to_R( x86IntRegType to, x86SSERegType from )
+_inline void SSE2_MOVQ_XMM_to_R( x86IntRegType to, x86SSERegType from )
 {
     assert( from < XMMREGS);
     write8( 0x66 );
@@ -913,7 +913,7 @@ void SSE2_MOVQ_XMM_to_R( x86IntRegType to, x86SSERegType from )
 	ModRM( 3, from, to );
 }
 
-void SSE2_MOVQ_R_to_XMM( x86SSERegType to, x86IntRegType from )
+_inline void SSE2_MOVQ_R_to_XMM( x86SSERegType to, x86IntRegType from )
 {
     assert( to < XMMREGS);
     write8(0x66);
@@ -928,38 +928,38 @@ void SSE2_MOVQ_R_to_XMM( x86SSERegType to, x86IntRegType from )
 //**********************************************************************************/
 //POR : SSE Bitwise OR                                                             *
 //**********************************************************************************
-void SSE2_POR_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR66( 0xEB0F ); }
-void SSE2_POR_M128_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR66( 0xEB0F ); }
+_inline void SSE2_POR_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR66( 0xEB0F ); }
+_inline void SSE2_POR_M128_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR66( 0xEB0F ); }
 
 // logical and to &= from
-void SSE2_PAND_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR66( 0xDB0F ); }
-void SSE2_PAND_M128_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR66( 0xDB0F ); }
+_inline void SSE2_PAND_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR66( 0xDB0F ); }
+_inline void SSE2_PAND_M128_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR66( 0xDB0F ); }
 
 // to = (~to) & from
-void SSE2_PANDN_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR66( 0xDF0F ); }
-void SSE2_PANDN_M128_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR66( 0xDF0F ); }
+_inline void SSE2_PANDN_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR66( 0xDF0F ); }
+_inline void SSE2_PANDN_M128_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR66( 0xDF0F ); }
 
 /////////////////////////////////////////////////////////////////////////////////////
 //**********************************************************************************/
 //PXOR : SSE Bitwise XOR                                                             *
 //**********************************************************************************
-void SSE2_PXOR_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xEF0F ); }
-void SSE2_PXOR_M128_to_XMM( x86SSERegType to, uptr from ){ SSEMtoR66( 0xEF0F ) }; 
+_inline void SSE2_PXOR_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xEF0F ); }
+_inline void SSE2_PXOR_M128_to_XMM( x86SSERegType to, uptr from ){ SSEMtoR66( 0xEF0F ) }; 
 ///////////////////////////////////////////////////////////////////////////////////////
 
-void SSE2_MOVDQA_M128_to_XMM(x86SSERegType to, uptr from) {SSEMtoR66(0x6F0F); }
-void SSE2_MOVDQA_XMM_to_M128( uptr to, x86SSERegType from ){SSERtoM66(0x7F0F);} 
-void SSE2_MOVDQA_XMM_to_XMM( x86SSERegType to, x86SSERegType from) { SSERtoR66(0x6F0F); }
+_inline void SSE2_MOVDQA_M128_to_XMM(x86SSERegType to, uptr from) {SSEMtoR66(0x6F0F); }
+_inline void SSE2_MOVDQA_XMM_to_M128( uptr to, x86SSERegType from ){SSERtoM66(0x7F0F);} 
+_inline void SSE2_MOVDQA_XMM_to_XMM( x86SSERegType to, x86SSERegType from) { SSERtoR66(0x6F0F); }
 
-void SSE2_MOVDQU_M128_to_XMM(x86SSERegType to, uptr from) { write8(0xF3); SSEMtoR(0x6F0F, 0); }
-void SSE2_MOVDQU_XMM_to_M128( uptr to, x86SSERegType from) { write8(0xF3); SSERtoM(0x7F0F, 0); }
-void SSE2_MOVDQU_XMM_to_XMM( x86SSERegType to, x86SSERegType from) { write8(0xF3); SSERtoR(0x6F0F); }
+_inline void SSE2_MOVDQU_M128_to_XMM(x86SSERegType to, uptr from) { write8(0xF3); SSEMtoR(0x6F0F, 0); }
+_inline void SSE2_MOVDQU_XMM_to_M128( uptr to, x86SSERegType from) { write8(0xF3); SSERtoM(0x7F0F, 0); }
+_inline void SSE2_MOVDQU_XMM_to_XMM( x86SSERegType to, x86SSERegType from) { write8(0xF3); SSERtoR(0x6F0F); }
 
 // shift right logical
 
-void SSE2_PSRLW_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66(0xD10F); }
-void SSE2_PSRLW_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66(0xD10F); }
-void SSE2_PSRLW_I8_to_XMM(x86SSERegType to, u8 imm8)
+_inline void SSE2_PSRLW_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66(0xD10F); }
+_inline void SSE2_PSRLW_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66(0xD10F); }
+_inline void SSE2_PSRLW_I8_to_XMM(x86SSERegType to, u8 imm8)
 {
 	write8( 0x66 );
     RexB(0, to);
@@ -968,9 +968,9 @@ void SSE2_PSRLW_I8_to_XMM(x86SSERegType to, u8 imm8)
 	write8( imm8 );
 }
 
-void SSE2_PSRLD_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66(0xD20F); }
-void SSE2_PSRLD_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66(0xD20F); }
-void SSE2_PSRLD_I8_to_XMM(x86SSERegType to, u8 imm8)
+_inline void SSE2_PSRLD_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66(0xD20F); }
+_inline void SSE2_PSRLD_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66(0xD20F); }
+_inline void SSE2_PSRLD_I8_to_XMM(x86SSERegType to, u8 imm8)
 {
 	write8( 0x66 );
     RexB(0, to);
@@ -979,9 +979,9 @@ void SSE2_PSRLD_I8_to_XMM(x86SSERegType to, u8 imm8)
 	write8( imm8 );
 }
 
-void SSE2_PSRLQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66(0xD30F); }
-void SSE2_PSRLQ_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66(0xD30F); }
-void SSE2_PSRLQ_I8_to_XMM(x86SSERegType to, u8 imm8)
+_inline void SSE2_PSRLQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66(0xD30F); }
+_inline void SSE2_PSRLQ_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66(0xD30F); }
+_inline void SSE2_PSRLQ_I8_to_XMM(x86SSERegType to, u8 imm8)
 {
 	write8( 0x66 );
     RexB(0, to);
@@ -990,7 +990,7 @@ void SSE2_PSRLQ_I8_to_XMM(x86SSERegType to, u8 imm8)
 	write8( imm8 );
 }
 
-void SSE2_PSRLDQ_I8_to_XMM(x86SSERegType to, u8 imm8)
+_inline void SSE2_PSRLDQ_I8_to_XMM(x86SSERegType to, u8 imm8)
 {
 	write8( 0x66 );
     RexB(0, to);
@@ -1001,9 +1001,9 @@ void SSE2_PSRLDQ_I8_to_XMM(x86SSERegType to, u8 imm8)
 
 // shift right arithmetic
 
-void SSE2_PSRAW_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66(0xE10F); }
-void SSE2_PSRAW_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66(0xE10F); }
-void SSE2_PSRAW_I8_to_XMM(x86SSERegType to, u8 imm8)
+_inline void SSE2_PSRAW_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66(0xE10F); }
+_inline void SSE2_PSRAW_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66(0xE10F); }
+_inline void SSE2_PSRAW_I8_to_XMM(x86SSERegType to, u8 imm8)
 {
 	write8( 0x66 );
     RexB(0, to);
@@ -1012,9 +1012,9 @@ void SSE2_PSRAW_I8_to_XMM(x86SSERegType to, u8 imm8)
 	write8( imm8 );
 }
 
-void SSE2_PSRAD_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66(0xE20F); }
-void SSE2_PSRAD_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66(0xE20F); }
-void SSE2_PSRAD_I8_to_XMM(x86SSERegType to, u8 imm8)
+_inline void SSE2_PSRAD_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66(0xE20F); }
+_inline void SSE2_PSRAD_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66(0xE20F); }
+_inline void SSE2_PSRAD_I8_to_XMM(x86SSERegType to, u8 imm8)
 {
 	write8( 0x66 );
     RexB(0, to);
@@ -1025,9 +1025,9 @@ void SSE2_PSRAD_I8_to_XMM(x86SSERegType to, u8 imm8)
 
 // shift left logical
 
-void SSE2_PSLLW_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66(0xF10F); }
-void SSE2_PSLLW_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66(0xF10F); }
-void SSE2_PSLLW_I8_to_XMM(x86SSERegType to, u8 imm8)
+_inline void SSE2_PSLLW_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66(0xF10F); }
+_inline void SSE2_PSLLW_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66(0xF10F); }
+_inline void SSE2_PSLLW_I8_to_XMM(x86SSERegType to, u8 imm8)
 {
 	write8( 0x66 );
     RexB(0, to);
@@ -1036,9 +1036,9 @@ void SSE2_PSLLW_I8_to_XMM(x86SSERegType to, u8 imm8)
 	write8( imm8 );
 }
 
-void SSE2_PSLLD_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66(0xF20F); }
-void SSE2_PSLLD_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66(0xF20F); }
-void SSE2_PSLLD_I8_to_XMM(x86SSERegType to, u8 imm8)
+_inline void SSE2_PSLLD_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66(0xF20F); }
+_inline void SSE2_PSLLD_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66(0xF20F); }
+_inline void SSE2_PSLLD_I8_to_XMM(x86SSERegType to, u8 imm8)
 {
 	write8( 0x66 );
     RexB(0, to);
@@ -1047,9 +1047,9 @@ void SSE2_PSLLD_I8_to_XMM(x86SSERegType to, u8 imm8)
 	write8( imm8 );
 }
 
-void SSE2_PSLLQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66(0xF30F); }
-void SSE2_PSLLQ_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66(0xF30F); }
-void SSE2_PSLLQ_I8_to_XMM(x86SSERegType to, u8 imm8)
+_inline void SSE2_PSLLQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66(0xF30F); }
+_inline void SSE2_PSLLQ_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66(0xF30F); }
+_inline void SSE2_PSLLQ_I8_to_XMM(x86SSERegType to, u8 imm8)
 {
 	write8( 0x66 );
     RexB(0, to);
@@ -1058,7 +1058,7 @@ void SSE2_PSLLQ_I8_to_XMM(x86SSERegType to, u8 imm8)
 	write8( imm8 );
 }
 
-void SSE2_PSLLDQ_I8_to_XMM(x86SSERegType to, u8 imm8)
+_inline void SSE2_PSLLDQ_I8_to_XMM(x86SSERegType to, u8 imm8)
 {
 	write8( 0x66 );
     RexB(0, to);
@@ -1068,108 +1068,108 @@ void SSE2_PSLLDQ_I8_to_XMM(x86SSERegType to, u8 imm8)
 }
 
 
-void SSE2_PMAXSW_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xEE0F ); }
-void SSE2_PMAXSW_M128_to_XMM( x86SSERegType to, uptr from ){ SSEMtoR66( 0xEE0F ); }
+_inline void SSE2_PMAXSW_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xEE0F ); }
+_inline void SSE2_PMAXSW_M128_to_XMM( x86SSERegType to, uptr from ){ SSEMtoR66( 0xEE0F ); }
 
-void SSE2_PMAXUB_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xDE0F ); }
-void SSE2_PMAXUB_M128_to_XMM( x86SSERegType to, uptr from ){ SSEMtoR66( 0xDE0F ); }
+_inline void SSE2_PMAXUB_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xDE0F ); }
+_inline void SSE2_PMAXUB_M128_to_XMM( x86SSERegType to, uptr from ){ SSEMtoR66( 0xDE0F ); }
 
-void SSE2_PMINSW_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xEA0F ); }
-void SSE2_PMINSW_M128_to_XMM( x86SSERegType to, uptr from ){ SSEMtoR66( 0xEA0F ); }
+_inline void SSE2_PMINSW_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xEA0F ); }
+_inline void SSE2_PMINSW_M128_to_XMM( x86SSERegType to, uptr from ){ SSEMtoR66( 0xEA0F ); }
 
-void SSE2_PMINUB_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xDA0F ); }
-void SSE2_PMINUB_M128_to_XMM( x86SSERegType to, uptr from ){ SSEMtoR66( 0xDA0F ); }
+_inline void SSE2_PMINUB_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xDA0F ); }
+_inline void SSE2_PMINUB_M128_to_XMM( x86SSERegType to, uptr from ){ SSEMtoR66( 0xDA0F ); }
 
 //
 
-void SSE2_PADDSB_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xEC0F ); }
-void SSE2_PADDSB_M128_to_XMM( x86SSERegType to, uptr from ){ SSEMtoR66( 0xEC0F ); }
+_inline void SSE2_PADDSB_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xEC0F ); }
+_inline void SSE2_PADDSB_M128_to_XMM( x86SSERegType to, uptr from ){ SSEMtoR66( 0xEC0F ); }
 
-void SSE2_PADDSW_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xED0F ); }
-void SSE2_PADDSW_M128_to_XMM( x86SSERegType to, uptr from ){ SSEMtoR66( 0xED0F ); }
+_inline void SSE2_PADDSW_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xED0F ); }
+_inline void SSE2_PADDSW_M128_to_XMM( x86SSERegType to, uptr from ){ SSEMtoR66( 0xED0F ); }
 
-void SSE2_PSUBSB_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xE80F ); }
-void SSE2_PSUBSB_M128_to_XMM( x86SSERegType to, uptr from ){ SSEMtoR66( 0xE80F ); }
+_inline void SSE2_PSUBSB_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xE80F ); }
+_inline void SSE2_PSUBSB_M128_to_XMM( x86SSERegType to, uptr from ){ SSEMtoR66( 0xE80F ); }
 
-void SSE2_PSUBSW_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xE90F ); }
-void SSE2_PSUBSW_M128_to_XMM( x86SSERegType to, uptr from ){ SSEMtoR66( 0xE90F ); }
+_inline void SSE2_PSUBSW_XMM_to_XMM( x86SSERegType to, x86SSERegType from ){ SSERtoR66( 0xE90F ); }
+_inline void SSE2_PSUBSW_M128_to_XMM( x86SSERegType to, uptr from ){ SSEMtoR66( 0xE90F ); }
 
-void SSE2_PSUBUSB_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR66( 0xD80F ); }
-void SSE2_PSUBUSB_M128_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR66( 0xD80F ); }
-void SSE2_PSUBUSW_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR66( 0xD90F ); }
-void SSE2_PSUBUSW_M128_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR66( 0xD90F ); }
+_inline void SSE2_PSUBUSB_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR66( 0xD80F ); }
+_inline void SSE2_PSUBUSB_M128_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR66( 0xD80F ); }
+_inline void SSE2_PSUBUSW_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR66( 0xD90F ); }
+_inline void SSE2_PSUBUSW_M128_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR66( 0xD90F ); }
 
-void SSE2_PADDUSB_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR66( 0xDC0F ); }
-void SSE2_PADDUSB_M128_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR66( 0xDC0F ); }
-void SSE2_PADDUSW_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR66( 0xDD0F ); }
-void SSE2_PADDUSW_M128_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR66( 0xDD0F ); }
+_inline void SSE2_PADDUSB_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR66( 0xDC0F ); }
+_inline void SSE2_PADDUSB_M128_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR66( 0xDC0F ); }
+_inline void SSE2_PADDUSW_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSERtoR66( 0xDD0F ); }
+_inline void SSE2_PADDUSW_M128_to_XMM( x86SSERegType to, uptr from ) { SSEMtoR66( 0xDD0F ); }
 
 //**********************************************************************************/
 //PACKSSWB,PACKSSDW: Pack Saturate Signed Word
 //**********************************************************************************
-void SSE2_PACKSSWB_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x630F ); }
-void SSE2_PACKSSWB_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x630F ); }
-void SSE2_PACKSSDW_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x6B0F ); }
-void SSE2_PACKSSDW_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x6B0F ); }
+_inline void SSE2_PACKSSWB_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x630F ); }
+_inline void SSE2_PACKSSWB_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x630F ); }
+_inline void SSE2_PACKSSDW_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x6B0F ); }
+_inline void SSE2_PACKSSDW_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x6B0F ); }
 
-void SSE2_PACKUSWB_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x670F ); }
-void SSE2_PACKUSWB_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x670F ); }
+_inline void SSE2_PACKUSWB_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x670F ); }
+_inline void SSE2_PACKUSWB_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x670F ); }
 
 //**********************************************************************************/
 //PUNPCKHWD: Unpack 16bit high
 //**********************************************************************************
-void SSE2_PUNPCKLBW_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x600F ); }
-void SSE2_PUNPCKLBW_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x600F ); }
+_inline void SSE2_PUNPCKLBW_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x600F ); }
+_inline void SSE2_PUNPCKLBW_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x600F ); }
 
-void SSE2_PUNPCKHBW_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x680F ); }
-void SSE2_PUNPCKHBW_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x680F ); }
+_inline void SSE2_PUNPCKHBW_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x680F ); }
+_inline void SSE2_PUNPCKHBW_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x680F ); }
 
-void SSE2_PUNPCKLWD_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x610F ); }
-void SSE2_PUNPCKLWD_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x610F ); }
-void SSE2_PUNPCKHWD_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x690F ); }
-void SSE2_PUNPCKHWD_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x690F ); }
+_inline void SSE2_PUNPCKLWD_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x610F ); }
+_inline void SSE2_PUNPCKLWD_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x610F ); }
+_inline void SSE2_PUNPCKHWD_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x690F ); }
+_inline void SSE2_PUNPCKHWD_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x690F ); }
 
-void SSE2_PUNPCKLDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x620F ); }
-void SSE2_PUNPCKLDQ_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x620F ); }
-void SSE2_PUNPCKHDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x6A0F ); }
-void SSE2_PUNPCKHDQ_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x6A0F ); }
+_inline void SSE2_PUNPCKLDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x620F ); }
+_inline void SSE2_PUNPCKLDQ_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x620F ); }
+_inline void SSE2_PUNPCKHDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x6A0F ); }
+_inline void SSE2_PUNPCKHDQ_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x6A0F ); }
 
-void SSE2_PUNPCKLQDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x6C0F ); }
-void SSE2_PUNPCKLQDQ_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x6C0F ); }
+_inline void SSE2_PUNPCKLQDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x6C0F ); }
+_inline void SSE2_PUNPCKLQDQ_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x6C0F ); }
 
-void SSE2_PUNPCKHQDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x6D0F ); }
-void SSE2_PUNPCKHQDQ_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x6D0F ); }
+_inline void SSE2_PUNPCKHQDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0x6D0F ); }
+_inline void SSE2_PUNPCKHQDQ_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0x6D0F ); }
 
-void SSE2_PMULLW_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0xD50F ); }
-void SSE2_PMULLW_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0xD50F ); }
-void SSE2_PMULHW_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0xE50F ); }
-void SSE2_PMULHW_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0xE50F ); }
+_inline void SSE2_PMULLW_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0xD50F ); }
+_inline void SSE2_PMULLW_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0xD50F ); }
+_inline void SSE2_PMULHW_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0xE50F ); }
+_inline void SSE2_PMULHW_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0xE50F ); }
 
-void SSE2_PMULUDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0xF40F ); }
-void SSE2_PMULUDQ_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0xF40F ); }
+_inline void SSE2_PMULUDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { SSERtoR66( 0xF40F ); }
+_inline void SSE2_PMULUDQ_M128_to_XMM(x86SSERegType to, uptr from) { SSEMtoR66( 0xF40F ); }
 
-void SSE2_PMOVMSKB_XMM_to_R32(x86IntRegType to, x86SSERegType from) { SSERtoR66(0xD70F); }
+_inline void SSE2_PMOVMSKB_XMM_to_R32(x86IntRegType to, x86SSERegType from) { SSERtoR66(0xD70F); }
 
-void SSE_MOVMSKPS_XMM_to_R32(x86IntRegType to, x86SSERegType from) { SSERtoR(0x500F); }
-void SSE2_MOVMSKPD_XMM_to_R32(x86IntRegType to, x86SSERegType from) { SSERtoR66(0x500F); }
+_inline void SSE_MOVMSKPS_XMM_to_R32(x86IntRegType to, x86SSERegType from) { SSERtoR(0x500F); }
+_inline void SSE2_MOVMSKPD_XMM_to_R32(x86IntRegType to, x86SSERegType from) { SSERtoR66(0x500F); }
 
-void SSE3_HADDPS_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { write8(0xf2); SSERtoR( 0x7c0f ); }
-void SSE3_HADDPS_M128_to_XMM(x86SSERegType to, uptr from){ write8(0xf2); SSEMtoR( 0x7c0f, 0 ); }
+_inline void SSE3_HADDPS_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { write8(0xf2); SSERtoR( 0x7c0f ); }
+_inline void SSE3_HADDPS_M128_to_XMM(x86SSERegType to, uptr from){ write8(0xf2); SSEMtoR( 0x7c0f, 0 ); }
 
-void SSE3_MOVSLDUP_XMM_to_XMM(x86SSERegType to, x86SSERegType from) {
+_inline void SSE3_MOVSLDUP_XMM_to_XMM(x86SSERegType to, x86SSERegType from) {
 	write8(0xf3);
     RexRB(0, to, from);
 	write16( 0x120f);
 	ModRM( 3, to, from );
 }
 
-void SSE3_MOVSLDUP_M128_to_XMM(x86SSERegType to, uptr from) { write8(0xf3); SSEMtoR(0x120f, 0); }
-void SSE3_MOVSHDUP_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { write8(0xf3); SSERtoR(0x160f); }
-void SSE3_MOVSHDUP_M128_to_XMM(x86SSERegType to, uptr from) { write8(0xf3); SSEMtoR(0x160f, 0); }
+_inline void SSE3_MOVSLDUP_M128_to_XMM(x86SSERegType to, uptr from) { write8(0xf3); SSEMtoR(0x120f, 0); }
+_inline void SSE3_MOVSHDUP_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { write8(0xf3); SSERtoR(0x160f); }
+_inline void SSE3_MOVSHDUP_M128_to_XMM(x86SSERegType to, uptr from) { write8(0xf3); SSEMtoR(0x160f, 0); }
 
 // SSE4.1
 
-void SSE4_DPPS_XMM_to_XMM(x86SSERegType to, x86SSERegType from, u8 imm8) 
+_inline void SSE4_DPPS_XMM_to_XMM(x86SSERegType to, x86SSERegType from, u8 imm8) 
 {
 	write8(0x66);
 	write24(0x403A0F);
@@ -1177,7 +1177,7 @@ void SSE4_DPPS_XMM_to_XMM(x86SSERegType to, x86SSERegType from, u8 imm8)
 	write8(imm8);
 }
 
-void SSE4_DPPS_M128_to_XMM(x86SSERegType to, uptr from, u8 imm8)
+_inline void SSE4_DPPS_M128_to_XMM(x86SSERegType to, uptr from, u8 imm8)
 {
 	const int overb = 0; // TODO: x64?
 
@@ -1188,7 +1188,7 @@ void SSE4_DPPS_M128_to_XMM(x86SSERegType to, uptr from, u8 imm8)
 	write8(imm8);
 }
 
-void SSE4_INSERTPS_XMM_to_XMM(x86SSERegType to, x86SSERegType from, u8 imm8)
+_inline void SSE4_INSERTPS_XMM_to_XMM(x86SSERegType to, x86SSERegType from, u8 imm8)
 {
 	write8(0x66);
     RexRB(0, to, from);
@@ -1197,7 +1197,7 @@ void SSE4_INSERTPS_XMM_to_XMM(x86SSERegType to, x86SSERegType from, u8 imm8)
 	write8(imm8);
 }
 
-void SSE4_EXTRACTPS_XMM_to_R32(x86IntRegType to, x86SSERegType from, u8 imm8)
+_inline void SSE4_EXTRACTPS_XMM_to_R32(x86IntRegType to, x86SSERegType from, u8 imm8)
 {
 	write8(0x66);
     RexRB(0, to, from);
@@ -1206,7 +1206,7 @@ void SSE4_EXTRACTPS_XMM_to_R32(x86IntRegType to, x86SSERegType from, u8 imm8)
 	write8(imm8);
 }
 
-void SSE4_BLENDPS_XMM_to_XMM(x86IntRegType to, x86SSERegType from, u8 imm8)
+_inline void SSE4_BLENDPS_XMM_to_XMM(x86IntRegType to, x86SSERegType from, u8 imm8)
 {
 	write8(0x66);
     RexRB(0, to, from);
@@ -1215,7 +1215,7 @@ void SSE4_BLENDPS_XMM_to_XMM(x86IntRegType to, x86SSERegType from, u8 imm8)
 	write8(imm8);
 }
 
-void SSE4_BLENDVPS_XMM_to_XMM(x86SSERegType to, x86SSERegType from)
+_inline void SSE4_BLENDVPS_XMM_to_XMM(x86SSERegType to, x86SSERegType from)
 {
 	write8(0x66);
     RexRB(0, to, from);
@@ -1223,7 +1223,7 @@ void SSE4_BLENDVPS_XMM_to_XMM(x86SSERegType to, x86SSERegType from)
 	ModRM(3, to, from);
 }
 
-void SSE4_BLENDVPS_M128_to_XMM(x86SSERegType to, uptr from)
+_inline void SSE4_BLENDVPS_M128_to_XMM(x86SSERegType to, uptr from)
 {
 	const int overb = 0; // TODO: x64?
 
@@ -1235,157 +1235,157 @@ void SSE4_BLENDVPS_M128_to_XMM(x86SSERegType to, uptr from)
 }
 
 // SSE-X
-void SSEX_MOVDQA_M128_to_XMM( x86SSERegType to, uptr from )
+_inline void SSEX_MOVDQA_M128_to_XMM( x86SSERegType to, uptr from )
 {
 	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[to] == XMMT_INT ) SSE2_MOVDQA_M128_to_XMM(to, from);
 	else SSE_MOVAPS_M128_to_XMM(to, from);
 }
 
-void SSEX_MOVDQA_XMM_to_M128( uptr to, x86SSERegType from )
+_inline void SSEX_MOVDQA_XMM_to_M128( uptr to, x86SSERegType from )
 {
 	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) SSE2_MOVDQA_XMM_to_M128(to, from);
 	else SSE_MOVAPS_XMM_to_M128(to, from);
 }
 
-void SSEX_MOVDQA_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
+_inline void SSEX_MOVDQA_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
 {
 	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) SSE2_MOVDQA_XMM_to_XMM(to, from);
 	else SSE_MOVAPS_XMM_to_XMM(to, from);
 }
 
-void SSEX_MOVDQARmtoROffset( x86SSERegType to, x86IntRegType from, int offset )
+_inline void SSEX_MOVDQARmtoROffset( x86SSERegType to, x86IntRegType from, int offset )
 {
 	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[to] == XMMT_INT ) SSE2_MOVDQARmtoROffset(to, from, offset);
 	else SSE_MOVAPSRmtoROffset(to, from, offset);
 }
 
-void SSEX_MOVDQARtoRmOffset( x86IntRegType to, x86SSERegType from, int offset )
+_inline void SSEX_MOVDQARtoRmOffset( x86IntRegType to, x86SSERegType from, int offset )
 {
 	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) SSE2_MOVDQARtoRmOffset(to, from, offset);
 	else SSE_MOVAPSRtoRmOffset(to, from, offset);
 }
 
-void SSEX_MOVDQU_M128_to_XMM( x86SSERegType to, uptr from )
+_inline void SSEX_MOVDQU_M128_to_XMM( x86SSERegType to, uptr from )
 {
 	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[to] == XMMT_INT ) SSE2_MOVDQU_M128_to_XMM(to, from);
 	else SSE_MOVAPS_M128_to_XMM(to, from);
 }
 
-void SSEX_MOVDQU_XMM_to_M128( uptr to, x86SSERegType from )
+_inline void SSEX_MOVDQU_XMM_to_M128( uptr to, x86SSERegType from )
 {
 	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) SSE2_MOVDQU_XMM_to_M128(to, from);
 	else SSE_MOVAPS_XMM_to_M128(to, from);
 }
 
-void SSEX_MOVDQU_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
+_inline void SSEX_MOVDQU_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
 {
 	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) SSE2_MOVDQU_XMM_to_XMM(to, from);
 	else SSE_MOVAPS_XMM_to_XMM(to, from);
 }
 
-void SSEX_MOVD_M32_to_XMM( x86SSERegType to, uptr from )
+_inline void SSEX_MOVD_M32_to_XMM( x86SSERegType to, uptr from )
 {
 	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[to] == XMMT_INT ) SSE2_MOVD_M32_to_XMM(to, from);
 	else SSE_MOVSS_M32_to_XMM(to, from);
 }
 
-void SSEX_MOVD_XMM_to_M32( u32 to, x86SSERegType from )
+_inline void SSEX_MOVD_XMM_to_M32( u32 to, x86SSERegType from )
 {
 	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) SSE2_MOVD_XMM_to_M32(to, from);
 	else SSE_MOVSS_XMM_to_M32(to, from);
 }
 
-void SSEX_MOVD_XMM_to_Rm( x86IntRegType to, x86SSERegType from )
+_inline void SSEX_MOVD_XMM_to_Rm( x86IntRegType to, x86SSERegType from )
 {
 	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) SSE2_MOVD_XMM_to_Rm(to, from);
 	else SSE_MOVSS_XMM_to_Rm(to, from);
 }
 
-void SSEX_MOVD_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset )
+_inline void SSEX_MOVD_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset )
 {
 	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[to] == XMMT_INT ) SSE2_MOVD_RmOffset_to_XMM(to, from, offset);
 	else SSE_MOVSS_RmOffset_to_XMM(to, from, offset);
 }
 
-void SSEX_MOVD_XMM_to_RmOffset( x86IntRegType to, x86SSERegType from, int offset )
+_inline void SSEX_MOVD_XMM_to_RmOffset( x86IntRegType to, x86SSERegType from, int offset )
 {
 	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) SSE2_MOVD_XMM_to_RmOffset(to, from, offset);
 	else SSE_MOVSS_XMM_to_RmOffset(to, from, offset);
 }
 
-void SSEX_POR_M128_to_XMM( x86SSERegType to, uptr from )
+_inline void SSEX_POR_M128_to_XMM( x86SSERegType to, uptr from )
 {
 	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[to] == XMMT_INT ) SSE2_POR_M128_to_XMM(to, from);
 	else SSE_ORPS_M128_to_XMM(to, from);
 }
 
-void SSEX_POR_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
+_inline void SSEX_POR_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
 {
 	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) SSE2_POR_XMM_to_XMM(to, from);
 	else SSE_ORPS_XMM_to_XMM(to, from);
 }
 
-void SSEX_PXOR_M128_to_XMM( x86SSERegType to, uptr from )
+_inline void SSEX_PXOR_M128_to_XMM( x86SSERegType to, uptr from )
 {
 	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[to] == XMMT_INT ) SSE2_PXOR_M128_to_XMM(to, from);
 	else SSE_XORPS_M128_to_XMM(to, from);
 }
 
-void SSEX_PXOR_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
+_inline void SSEX_PXOR_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
 {
 	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) SSE2_PXOR_XMM_to_XMM(to, from);
 	else SSE_XORPS_XMM_to_XMM(to, from);
 }
 
-void SSEX_PAND_M128_to_XMM( x86SSERegType to, uptr from )
+_inline void SSEX_PAND_M128_to_XMM( x86SSERegType to, uptr from )
 {
 	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[to] == XMMT_INT ) SSE2_PAND_M128_to_XMM(to, from);
 	else SSE_ANDPS_M128_to_XMM(to, from);
 }
 
-void SSEX_PAND_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
+_inline void SSEX_PAND_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
 {
 	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) SSE2_PAND_XMM_to_XMM(to, from);
 	else SSE_ANDPS_XMM_to_XMM(to, from);
 }
 
-void SSEX_PANDN_M128_to_XMM( x86SSERegType to, uptr from )
+_inline void SSEX_PANDN_M128_to_XMM( x86SSERegType to, uptr from )
 {
 	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[to] == XMMT_INT ) SSE2_PANDN_M128_to_XMM(to, from);
 	else SSE_ANDNPS_M128_to_XMM(to, from);
 }
 
-void SSEX_PANDN_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
+_inline void SSEX_PANDN_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
 {
 	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) SSE2_PANDN_XMM_to_XMM(to, from);
 	else SSE_ANDNPS_XMM_to_XMM(to, from);
 }
 
-void SSEX_PUNPCKLDQ_M128_to_XMM(x86SSERegType to, uptr from)
+_inline void SSEX_PUNPCKLDQ_M128_to_XMM(x86SSERegType to, uptr from)
 {
 	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[to] == XMMT_INT ) SSE2_PUNPCKLDQ_M128_to_XMM(to, from);
 	else SSE_UNPCKLPS_M128_to_XMM(to, from);
 }
 
-void SSEX_PUNPCKLDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from)
+_inline void SSEX_PUNPCKLDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from)
 {
 	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) SSE2_PUNPCKLDQ_XMM_to_XMM(to, from);
 	else SSE_UNPCKLPS_XMM_to_XMM(to, from);
 }
 
-void SSEX_PUNPCKHDQ_M128_to_XMM(x86SSERegType to, uptr from)
+_inline void SSEX_PUNPCKHDQ_M128_to_XMM(x86SSERegType to, uptr from)
 {
 	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[to] == XMMT_INT ) SSE2_PUNPCKHDQ_M128_to_XMM(to, from);
 	else SSE_UNPCKHPS_M128_to_XMM(to, from);
 }
 
-void SSEX_PUNPCKHDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from)
+_inline void SSEX_PUNPCKHDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from)
 {
 	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) SSE2_PUNPCKHDQ_XMM_to_XMM(to, from);
 	else SSE_UNPCKHPS_XMM_to_XMM(to, from);
 }
 
-void SSEX_MOVHLPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
+_inline void SSEX_MOVHLPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
 {
 	if( cpucaps.hasStreamingSIMD2Extensions && g_xmmtypes[from] == XMMT_INT ) {
 		SSE2_PUNPCKHQDQ_XMM_to_XMM(to, from);
@@ -1397,25 +1397,25 @@ void SSEX_MOVHLPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from )
 }
 
 // SSE2 emulation
-void SSE2EMU_MOVSD_XMM_to_XMM( x86SSERegType to, x86SSERegType from)
+_inline void SSE2EMU_MOVSD_XMM_to_XMM( x86SSERegType to, x86SSERegType from)
 {
 	SSE_SHUFPS_XMM_to_XMM(to, from, 0x4e);
 	SSE_SHUFPS_XMM_to_XMM(to, to, 0x4e);
 }
 
-void SSE2EMU_MOVQ_M64_to_XMM( x86SSERegType to, uptr from)
+_inline void SSE2EMU_MOVQ_M64_to_XMM( x86SSERegType to, uptr from)
 {
 	SSE_XORPS_XMM_to_XMM(to, to);
 	SSE_MOVLPS_M64_to_XMM(to, from);
 }
 
-void SSE2EMU_MOVQ_XMM_to_XMM( x86SSERegType to, x86SSERegType from)
+_inline void SSE2EMU_MOVQ_XMM_to_XMM( x86SSERegType to, x86SSERegType from)
 {
 	SSE_XORPS_XMM_to_XMM(to, to);
 	SSE2EMU_MOVSD_XMM_to_XMM(to, from);
 }
 
-void SSE2EMU_MOVD_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset )
+_inline void SSE2EMU_MOVD_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset )
 {
 	MOV32RmtoROffset(EAX, from, offset);
 	MOV32ItoM((u32)p+4, 0);
@@ -1425,7 +1425,7 @@ void SSE2EMU_MOVD_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int off
 	SSE_MOVAPS_M128_to_XMM(to, (u32)p);
 }
 
-void SSE2EMU_MOVD_XMM_to_RmOffset(x86IntRegType to, x86SSERegType from, int offset )
+_inline void SSE2EMU_MOVD_XMM_to_RmOffset(x86IntRegType to, x86SSERegType from, int offset )
 {
 	SSE_MOVSS_XMM_to_M32((u32)p, from);
 	MOV32MtoR(EAX, (u32)p);
@@ -1435,14 +1435,14 @@ void SSE2EMU_MOVD_XMM_to_RmOffset(x86IntRegType to, x86SSERegType from, int offs
 #ifndef __x86_64__
 extern void SetMMXstate();
 
-void SSE2EMU_MOVDQ2Q_XMM_to_MM( x86MMXRegType to, x86SSERegType from)
+_inline void SSE2EMU_MOVDQ2Q_XMM_to_MM( x86MMXRegType to, x86SSERegType from)
 {
 	SSE_MOVLPS_XMM_to_M64((u32)p, from);
 	MOVQMtoR(to, (u32)p);
 	SetMMXstate();
 }
 
-void SSE2EMU_MOVQ2DQ_MM_to_XMM( x86SSERegType to, x86MMXRegType from)
+_inline void SSE2EMU_MOVQ2DQ_MM_to_XMM( x86SSERegType to, x86MMXRegType from)
 {
 	MOVQRtoM((u32)p, from);
 	SSE_MOVLPS_M64_to_XMM(to, (u32)p);
@@ -1453,7 +1453,7 @@ void SSE2EMU_MOVQ2DQ_MM_to_XMM( x86SSERegType to, x86MMXRegType from)
 /****************************************************************************/
 /*  SSE2 Emulated functions for SSE CPU's by kekko							*/
 /****************************************************************************/
-void SSE2EMU_PSHUFD_XMM_to_XMM( x86SSERegType to, x86SSERegType from, u8 imm8 ) {
+_inline void SSE2EMU_PSHUFD_XMM_to_XMM( x86SSERegType to, x86SSERegType from, u8 imm8 ) {
 	MOV32ItoR(EAX, (u32)&p);
 	MOV32ItoR(EBX, (u32)&p2);
 	SSE_MOVUPSRtoRm(EAX, from);
@@ -1497,7 +1497,7 @@ void SSE2EMU_PSHUFD_XMM_to_XMM( x86SSERegType to, x86SSERegType from, u8 imm8 )
 	SSE_MOVUPSRmtoR(to, EBX);
 }
 
-void SSE2EMU_MOVD_XMM_to_R( x86IntRegType to, x86SSERegType from ) {
+_inline void SSE2EMU_MOVD_XMM_to_R( x86IntRegType to, x86SSERegType from ) {
 	MOV32ItoR(to, (u32)&p);
 	SSE_MOVUPSRtoRm(to, from);
 	MOV32RmtoR(to, to);
@@ -1508,7 +1508,7 @@ extern void SetFPUstate();
 extern void _freeMMXreg(int mmxreg);
 #endif
 
-void SSE2EMU_CVTPS2DQ_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) {
+_inline void SSE2EMU_CVTPS2DQ_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) {
 #ifndef __x86_64__
     SetFPUstate();
 	_freeMMXreg(7);
@@ -1527,7 +1527,7 @@ void SSE2EMU_CVTPS2DQ_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) {
 	SSE_MOVAPS_M128_to_XMM(to, (u32)p2);
 }
 
-void SSE2EMU_CVTDQ2PS_M128_to_XMM( x86SSERegType to, uptr from ) {
+_inline void SSE2EMU_CVTDQ2PS_M128_to_XMM( x86SSERegType to, uptr from ) {
 #ifndef __x86_64__
     SetFPUstate();
 	_freeMMXreg(7);
@@ -1544,14 +1544,14 @@ void SSE2EMU_CVTDQ2PS_M128_to_XMM( x86SSERegType to, uptr from ) {
 	SSE_MOVAPS_M128_to_XMM(to, (u32)f);
 }
 
-void SSE2EMU_MOVD_XMM_to_M32( u32 to, x86SSERegType from ) {
+_inline void SSE2EMU_MOVD_XMM_to_M32( u32 to, x86SSERegType from ) {
 	MOV32ItoR(EAX, (u32)&p);
 	SSE_MOVUPSRtoRm(EAX, from);
 	MOV32RmtoR(EAX, EAX);
 	MOV32RtoM(to, EAX);
 }
 
-void SSE2EMU_MOVD_R_to_XMM( x86SSERegType to, x86IntRegType from ) {
+_inline void SSE2EMU_MOVD_R_to_XMM( x86SSERegType to, x86IntRegType from ) {
 	MOV32ItoM((u32)p+4, 0);
 	MOV32ItoM((u32)p+8, 0);
 	MOV32RtoM((u32)p, from);