mirror of https://github.com/PCSX2/pcsx2.git
Assorted header cleanup.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1921 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
parent
c252b0f4df
commit
c97498d1f6
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@ -15,13 +15,12 @@
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#include "PrecompiledHeader.h"
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#include "Common.h"
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#include "Hw.h"
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#include "GS.h"
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#include "GS.h"
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#include "Vif.h"
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#include "VifDma.h"
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#include "IPU/IPU.h"
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//////////////////////////////////////////////////////////////////////////
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/////////////////////////// Quick & dirty FIFO :D ////////////////////////
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@ -39,13 +38,6 @@
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// 0x6000 - 0x7000 : GS (all registers map to 0x6000)
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// 0x7000 - 0x8000 : IPU (registers map to 0x7000 and 0x7010, respectively)
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extern int FIFOto_write(u32* pMem, int size);
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extern void FIFOfrom_readsingle(void *value);
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extern int g_nIPU0Data;
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extern u8* g_pIPU0Pointer;
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extern int FOreadpos;
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//////////////////////////////////////////////////////////////////////////
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// ReadFIFO Pages
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@ -19,10 +19,10 @@
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#include "VU.h"
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#include "GS.h"
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#include "Gif.h"
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#include "VifDma.h"
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#include "iR5900.h"
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#include "Counters.h"
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#include "VifDma.h"
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#include "Tags.h"
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using std::min;
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62
pcsx2/Gif.h
62
pcsx2/Gif.h
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@ -16,7 +16,8 @@
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#ifndef __GIF_H__
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#define __GIF_H__
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#define gifsplit 0x10000
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const int gifsplit = 0x10000;
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enum gifstate_t
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{
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GIF_STATE_READY = 0,
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@ -25,15 +26,38 @@ enum gifstate_t
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GIF_STATE_EMPTY = 0x10
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};
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enum Path3Modes //0 = Image Mode (DirectHL), 1 = transferring, 2 = Stopped at End of Packet
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{
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IMAGE_MODE = 0,
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TRANSFER_MODE = 1,
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STOPPED_MODE = 2
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};
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extern void gsInterrupt();
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int _GIFchain();
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void GIFdma();
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void dmaGIF();
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void mfifoGIFtransfer(int qwc);
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void gifMFIFOInterrupt();
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//GIF_STAT
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enum gif_stat_flags
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{
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GIF_STAT_M3R = (1), // GIF_MODE Mask
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GIF_STAT_M3P = (1<<1), // VIF PATH3 Mask
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GIF_STAT_IMT = (1<<2), // Intermittent Transfer Mode
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GIF_STAT_PSE = (1<<3), // Temporary Transfer Stop
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GIF_STAT_IP3 = (1<<5), // Interrupted PATH3
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GIF_STAT_P3Q = (1<<6), // PATH3 request Queued
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GIF_STAT_P2Q = (1<<7), // PATH2 request Queued
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GIF_STAT_P1Q = (1<<8), // PATH1 request Queued
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GIF_STAT_OPH = (1<<9), // Output Path (Outputting Data)
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GIF_STAT_APATH1 = (1<<10), // Data Transfer Path 1 (In progress)
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GIF_STAT_APATH2 = (2<<10), // Data Transfer Path 2 (In progress)
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GIF_STAT_APATH3 = (3<<10), // Data Transfer Path 3 (In progress) (Mask too)
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GIF_STAT_DIR = (1<<12), // Transfer Direction
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GIF_STAT_FQC = (31<<24) // QWC in GIF-FIFO
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};
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enum gif_mode_flags
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{
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GIF_MODE_M3R = (1),
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GIF_MODE_IMT = (1<<2)
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};
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// Under construction; use with caution.
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union tGIF_CTRL
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{
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struct
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struct GIFregisters
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{
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// To do: Pad to the correct positions and hook up.
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tGIF_CTRL ctrl;
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u32 padding[3];
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tGIF_MODE mode;
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#define gifRegs ((GIFregisters*)(PS2MEM_HW+0x3000))
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// Quick function to see if everythings in the write position.
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/*static void checkGifRegs()
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{
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Console::WriteLn("psHu32(GIF_CTRL) == 0x%x; gifRegs->ctrl == 0x%x", params &psHu32(GIF_CTRL),&gifRegs->ctrl);
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Console::WriteLn("psHu32(GIF_MODE) == 0x%x; gifRegs->mode == 0x%x", params &psHu32(GIF_MODE),&gifRegs->mode);
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Console::WriteLn("psHu32(GIF_STAT) == 0x%x; gifRegs->stat == 0x%x", params &psHu32(GIF_STAT),&gifRegs->stat);
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Console::WriteLn("psHu32(GIF_TAG0) == 0x%x; gifRegs->tag0 == 0x%x", params &psHu32(GIF_TAG0),&gifRegs->tag0);
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Console::WriteLn("psHu32(GIF_TAG1) == 0x%x; gifRegs->tag1 == 0x%x", params &psHu32(GIF_TAG1),&gifRegs->tag1);
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Console::WriteLn("psHu32(GIF_TAG2) == 0x%x; gifRegs->tag2 == 0x%x", params &psHu32(GIF_TAG2),&gifRegs->tag2);
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Console::WriteLn("psHu32(GIF_TAG3) == 0x%x; gifRegs->tag3 == 0x%x", params &psHu32(GIF_TAG3),&gifRegs->tag3);
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Console::WriteLn("psHu32(GIF_CNT) == 0x%x; gifRegs->cnt == 0x%x", params &psHu32(GIF_CNT),&gifRegs->cnt);
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Console::WriteLn("psHu32(GIF_P3CNT) == 0x%x; gifRegs->p3cnt == 0x%x", params &psHu32(GIF_P3CNT),&gifRegs->p3cnt);
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Console::WriteLn("psHu32(GIF_P3TAG) == 0x%x; gifRegs->p3tag == 0x%x", params &psHu32(GIF_P3TAG),&gifRegs->p3tag);
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extern Path3Modes Path3progress;
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}*/
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extern void gsInterrupt();
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int _GIFchain();
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void GIFdma();
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void dmaGIF();
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void mfifoGIFtransfer(int qwc);
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void gifMFIFOInterrupt();
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#endif
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82
pcsx2/Hw.h
82
pcsx2/Hw.h
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DMAC_BUS_ERROR = 15
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};
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enum vif0_stat_flags
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{
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VIF0_STAT_VPS_W = (1),
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VIF0_STAT_VPS_D = (2),
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VIF0_STAT_VPS_T = (3),
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VIF0_STAT_VPS = (3),
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VIF0_STAT_VEW = (1<<2),
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VIF0_STAT_MRK = (1<<6),
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VIF0_STAT_DBF = (1<<7),
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VIF0_STAT_VSS = (1<<8),
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VIF0_STAT_VFS = (1<<9),
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VIF0_STAT_VIS = (1<<10),
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VIF0_STAT_INT = (1<<11),
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VIF0_STAT_ER0 = (1<<12),
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VIF0_STAT_ER1 = (1<<13),
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VIF0_STAT_FQC = (15<<24)
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};
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enum vif1_stat_flags
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{
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VIF1_STAT_VPS_W = (1),
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VIF1_STAT_VPS_D = (2),
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VIF1_STAT_VPS_T = (3),
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VIF1_STAT_VPS = (3),
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VIF1_STAT_VEW = (1<<2),
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VIF1_STAT_VGW = (1<<3),
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VIF1_STAT_MRK = (1<<6),
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VIF1_STAT_DBF = (1<<7),
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VIF1_STAT_VSS = (1<<8),
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VIF1_STAT_VFS = (1<<9),
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VIF1_STAT_VIS = (1<<10),
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VIF1_STAT_INT = (1<<11),
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VIF1_STAT_ER0 = (1<<12),
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VIF1_STAT_ER1 = (1<<13),
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VIF1_STAT_FDR = (1<<23),
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VIF1_STAT_FQC = (31<<24)
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};
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// These are the stat flags that are the same for vif0 & vif1,
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// for occassions where we don't neccessarily know which we are using.
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enum vif_stat_flags
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{
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VIF_STAT_VPS_W = (1),
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VIF_STAT_VPS_D = (2),
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VIF_STAT_VPS_T = (3),
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VIF_STAT_VPS = (3),
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VIF_STAT_VEW = (1<<2),
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VIF_STAT_MRK = (1<<6),
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VIF_STAT_DBF = (1<<7),
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VIF_STAT_VSS = (1<<8),
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VIF_STAT_VFS = (1<<9),
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VIF_STAT_VIS = (1<<10),
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VIF_STAT_INT = (1<<11),
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VIF_STAT_ER0 = (1<<12),
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VIF_STAT_ER1 = (1<<13)
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};
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//GIF_STAT
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enum gif_stat_flags
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{
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GIF_STAT_M3R = (1), // GIF_MODE Mask
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GIF_STAT_M3P = (1<<1), // VIF PATH3 Mask
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GIF_STAT_IMT = (1<<2), // Intermittent Transfer Mode
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GIF_STAT_PSE = (1<<3), // Temporary Transfer Stop
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GIF_STAT_IP3 = (1<<5), // Interrupted PATH3
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GIF_STAT_P3Q = (1<<6), // PATH3 request Queued
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GIF_STAT_P2Q = (1<<7), // PATH2 request Queued
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GIF_STAT_P1Q = (1<<8), // PATH1 request Queued
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GIF_STAT_OPH = (1<<9), // Output Path (Outputting Data)
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GIF_STAT_APATH1 = (1<<10), // Data Transfer Path 1 (In progress)
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GIF_STAT_APATH2 = (2<<10), // Data Transfer Path 2 (In progress)
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GIF_STAT_APATH3 = (3<<10), // Data Transfer Path 3 (In progress) (Mask too)
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GIF_STAT_DIR = (1<<12), // Transfer Direction
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GIF_STAT_FQC = (31<<24) // QWC in GIF-FIFO
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};
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enum gif_mode_flags
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{
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GIF_MODE_M3R = (1),
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GIF_MODE_IMT = (1<<2)
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};
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//DMA interrupts & masks
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enum DMAInter
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{
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#include "Common.h"
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#include "IPU.h"
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#include "mpeg2lib/Mpeg.h"
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#include "yuv2rgb.h"
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#include "coroutine.h"
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#include "Vif.h"
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#include "Tags.h"
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break;
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ipucase(IPU_CTRL): // IPU_CTRL
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// CTRL = the first 16 bits of ctrl [0x8000ffff], + value for the next 16 bits,
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// minus the reserved bits. (18-19; 27-29) [0x47f30000]
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ipuRegs->ctrl._u32 = (value & 0x47f30000) | (ipuRegs->ctrl._u32 & 0x8000ffff);
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if (ipuRegs->ctrl.IDP == 3)
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{
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#define __IPU_H__
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#include "mpeg2lib/Mpeg.h"
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#include "coroutine.h"
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// IPU_INLINE_IRQS
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// Scheduling ints into the future is a purist approach to emulation, and
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//#define IPU_INLINE_IRQS
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#ifdef _MSC_VER
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#pragma pack(1)
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#endif
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#define ipucase( src ) case ipumsk(src)
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//
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// Bitfield Structure
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// Bitfield Structures
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//
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union tIPU_CMD {
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struct {
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};
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};
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//
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// Bitfield Structure
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//
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union tIPU_CTRL {
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struct {
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u32 IFC : 4; // Input FIFO counter
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u32 _u32;
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};
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//
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// Bitfield Structure
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//
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struct tIPU_BP {
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u32 BP; // Bit stream point
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u16 IFC; // Input FIFO counter
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extern int coded_block_pattern;
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extern int g_nIPU0Data; // or 0x80000000 whenever transferring
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extern u8* g_pIPU0Pointer;
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extern int FOreadpos;
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extern void FIFOfrom_readsingle(void *value);
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// The IPU can only do one task at once and never uses other buffers so these
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// should be made available to functions in other modules to save registers.
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extern int ipuFreeze(gzFile f, int Mode);
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extern bool ipuCanFreeze();
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extern u32 ipuRead32(u32 mem);
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extern u64 ipuRead64(u32 mem);
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extern void ipuWrite32(u32 mem,u32 value);
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#include "Common.h"
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#include "IPU/IPU.h"
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#include "IPU/coroutine.h"
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#include "Mpeg.h"
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#include "Vlc.h"
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49
pcsx2/VU.h
49
pcsx2/VU.h
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#pragma once
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#include "Vif.h"
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#define REG_STATUS_FLAG 16
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#define REG_MAC_FLAG 17
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#define REG_CLIP_FLAG 18
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#define REG_ACC_FLAG 19 // dummy flag that indicates that VFACC is written/read (nothing to do with VI[19])
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#define REG_R 20
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#define REG_I 21
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#define REG_Q 22
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#define REG_P 23 // only exists in micromode
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#define REG_VF0_FLAG 24 // dummy flag that indicates VF0 is read (nothing to do with VI[24])
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#define REG_TPC 26
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#define REG_CMSAR0 27
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#define REG_FBRST 28
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#define REG_VPU_STAT 29
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#define REG_CMSAR1 31
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enum VURegFlags
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{
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REG_STATUS_FLAG = 16,
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REG_MAC_FLAG = 17,
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REG_CLIP_FLAG = 18,
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REG_ACC_FLAG = 19, // dummy flag that indicates that VFACC is written/read (nothing to do with VI[19])
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REG_R = 20,
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REG_I = 21,
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REG_Q = 22,
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REG_P = 23, // only exists in micromode
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REG_VF0_FLAG = 24, // dummy flag that indicates VF0 is read (nothing to do with VI[24])
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REG_TPC = 26,
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REG_CMSAR0 = 27,
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REG_FBRST = 28,
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REG_VPU_STAT = 29,
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REG_CMSAR1 = 31
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};
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//interpreter hacks, WIP
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//#define INT_VUSTALLHACK //some games work without those, big speedup
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{
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}
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};
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#define VUPIPE_NONE 0
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#define VUPIPE_FMAC 1
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#define VUPIPE_FDIV 2
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#define VUPIPE_EFU 3
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#define VUPIPE_IALU 4
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#define VUPIPE_BRANCH 5
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#define VUPIPE_XGKICK 6
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enum VUPipeState
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{
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VUPIPE_NONE = 0,
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VUPIPE_FMAC,
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VUPIPE_FDIV,
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VUPIPE_EFU,
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VUPIPE_IALU,
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VUPIPE_BRANCH,
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VUPIPE_XGKICK
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};
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#define VUREG_READ 0x1
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#define VUREG_WRITE 0x2
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@ -15,6 +15,7 @@
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#pragma once
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#include "VU.h"
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#include "VUops.h"
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struct VUmicroCpu
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{
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@ -1294,19 +1295,13 @@ void (*PREFIX##_LOWER_OPCODE[128])(_VURegsNum *VUregsn) = { \
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VUM_LOG("%s", dis##VU##MicroUF(VU.code, VU.VI[REG_TPC].UL));
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#define IdebugLOWER(VU) \
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VUM_LOG("%s", dis##VU##MicroLF(VU.code, VU.VI[REG_TPC].UL));
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#define _vuExecMicroDebug(VU) \
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VUM_LOG("_vuExecMicro: %8.8x", VU.VI[REG_TPC].UL);
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#else
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#define IdebugUPPER(VU)
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#define IdebugLOWER(VU)
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#endif
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#ifdef VUM_LOG
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#define _vuExecMicroDebug(VU) \
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VUM_LOG("_vuExecMicro: %8.8x", VU.VI[REG_TPC].UL);
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#else
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#define _vuExecMicroDebug(VU)
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#endif
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#include "VUops.h"
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#endif
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89
pcsx2/Vif.h
89
pcsx2/Vif.h
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#ifndef __VIF_H__
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#define __VIF_H__
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struct vifCycle {
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u8 cl, wl;
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u8 pad[2];
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enum vif0_stat_flags
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{
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VIF0_STAT_VPS_W = (1),
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VIF0_STAT_VPS_D = (2),
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VIF0_STAT_VPS_T = (3),
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VIF0_STAT_VPS = (3),
|
||||
VIF0_STAT_VEW = (1<<2),
|
||||
VIF0_STAT_MRK = (1<<6),
|
||||
VIF0_STAT_DBF = (1<<7),
|
||||
VIF0_STAT_VSS = (1<<8),
|
||||
VIF0_STAT_VFS = (1<<9),
|
||||
VIF0_STAT_VIS = (1<<10),
|
||||
VIF0_STAT_INT = (1<<11),
|
||||
VIF0_STAT_ER0 = (1<<12),
|
||||
VIF0_STAT_ER1 = (1<<13),
|
||||
VIF0_STAT_FQC = (15<<24)
|
||||
};
|
||||
|
||||
enum vif1_stat_flags
|
||||
{
|
||||
VIF1_STAT_VPS_W = (1),
|
||||
VIF1_STAT_VPS_D = (2),
|
||||
VIF1_STAT_VPS_T = (3),
|
||||
VIF1_STAT_VPS = (3),
|
||||
VIF1_STAT_VEW = (1<<2),
|
||||
VIF1_STAT_VGW = (1<<3),
|
||||
VIF1_STAT_MRK = (1<<6),
|
||||
VIF1_STAT_DBF = (1<<7),
|
||||
VIF1_STAT_VSS = (1<<8),
|
||||
VIF1_STAT_VFS = (1<<9),
|
||||
VIF1_STAT_VIS = (1<<10),
|
||||
VIF1_STAT_INT = (1<<11),
|
||||
VIF1_STAT_ER0 = (1<<12),
|
||||
VIF1_STAT_ER1 = (1<<13),
|
||||
VIF1_STAT_FDR = (1<<23),
|
||||
VIF1_STAT_FQC = (31<<24)
|
||||
};
|
||||
|
||||
// These are the stat flags that are the same for vif0 & vif1,
|
||||
// for occassions where we don't neccessarily know which we are using.
|
||||
enum vif_stat_flags
|
||||
{
|
||||
VIF_STAT_VPS_W = (1),
|
||||
VIF_STAT_VPS_D = (2),
|
||||
VIF_STAT_VPS_T = (3),
|
||||
VIF_STAT_VPS = (3),
|
||||
VIF_STAT_VEW = (1<<2),
|
||||
VIF_STAT_MRK = (1<<6),
|
||||
VIF_STAT_DBF = (1<<7),
|
||||
VIF_STAT_VSS = (1<<8),
|
||||
VIF_STAT_VFS = (1<<9),
|
||||
VIF_STAT_VIS = (1<<10),
|
||||
VIF_STAT_INT = (1<<11),
|
||||
VIF_STAT_ER0 = (1<<12),
|
||||
VIF_STAT_ER1 = (1<<13)
|
||||
};
|
||||
|
||||
//
|
||||
|
@ -66,6 +118,11 @@ union tVIF_ERR {
|
|||
u32 _u32;
|
||||
};
|
||||
|
||||
struct vifCycle {
|
||||
u8 cl, wl;
|
||||
u8 pad[2];
|
||||
};
|
||||
|
||||
struct VIFregisters {
|
||||
u32 stat;
|
||||
u32 pad0[3];
|
||||
|
@ -119,26 +176,6 @@ struct VIFregisters {
|
|||
u32 addr;
|
||||
};
|
||||
|
||||
/*enum vif_errors
|
||||
{
|
||||
VIF_ERR_MII = 0x1,
|
||||
VIF_ERR_ME0 = 0x2,
|
||||
VIF_ERR_ME1 = 0x4
|
||||
};
|
||||
|
||||
// Masks or unmasks errors
|
||||
namespace VIF_ERR
|
||||
{
|
||||
// If true, interrupts by the i bit of Vifcode are masked.
|
||||
static __forceinline bool MII(VIFregisters *tag) { return !!(tag->err & VIF_ERR_MII); }
|
||||
|
||||
// If true, DMAtag Mismatch errors are masked. (We never check for this?)
|
||||
static __forceinline bool ME0(VIFregisters *tag) { return !!(tag->err & VIF_ERR_ME0); }
|
||||
|
||||
// If true, VifCode errors are masked.
|
||||
static __forceinline bool ME1(VIFregisters *tag) { return !!(tag->err & VIF_ERR_ME1); }
|
||||
}*/
|
||||
|
||||
extern "C"
|
||||
{
|
||||
// these use cdecl for Asm code references.
|
||||
|
@ -148,11 +185,6 @@ extern "C"
|
|||
extern u32* _vifCol;
|
||||
}
|
||||
|
||||
//extern u32 setVifRowRegs(u32 reg, u32 data);
|
||||
//extern u32 getVifRowRegs(u32 reg);
|
||||
//extern u32 setVifColRegs(u32 reg, u32 data);
|
||||
//extern u32 getVifColRegs(u32 reg);
|
||||
|
||||
#define vif0Regs ((VIFregisters*)&PS2MEM_HW[0x3800])
|
||||
#define vif1Regs ((VIFregisters*)&PS2MEM_HW[0x3c00])
|
||||
|
||||
|
@ -176,5 +208,4 @@ void __fastcall SetNewMask(u32* vif1masks, u32* hasmask, u32 mask, u32 oldmask);
|
|||
|
||||
#define XMM_R3 XMM_COL
|
||||
|
||||
|
||||
#endif /* __VIF_H__ */
|
||||
|
|
|
@ -16,11 +16,11 @@
|
|||
#include "PrecompiledHeader.h"
|
||||
|
||||
#include "Common.h"
|
||||
#include "Vif.h"
|
||||
#include "VUmicro.h"
|
||||
#include "GS.h"
|
||||
#include "Gif.h"
|
||||
#include "Vif.h"
|
||||
#include "VifDma.h"
|
||||
#include "VUmicro.h"
|
||||
#include "Tags.h"
|
||||
|
||||
#include <xmmintrin.h>
|
||||
|
|
|
@ -22,13 +22,6 @@ enum VifModes
|
|||
VIF_CHAIN_MODE = 2
|
||||
};
|
||||
|
||||
enum Path3Modes //0 = Image Mode (DirectHL), 1 = transferring, 2 = Stopped at End of Packet
|
||||
{
|
||||
IMAGE_MODE = 0,
|
||||
TRANSFER_MODE = 1,
|
||||
STOPPED_MODE = 2
|
||||
};
|
||||
|
||||
struct vifCode {
|
||||
u32 addr;
|
||||
u32 size;
|
||||
|
@ -58,7 +51,6 @@ struct vifStruct {
|
|||
};
|
||||
|
||||
extern vifStruct vif0, vif1;
|
||||
extern Path3Modes Path3progress;
|
||||
extern u8 schedulepath3msk;
|
||||
|
||||
void __fastcall UNPACK_S_32( u32 *dest, u32 *data, int size );
|
||||
|
|
|
@ -780,6 +780,7 @@ void AppApplySettings( const AppConfig* oldconf )
|
|||
}
|
||||
}
|
||||
|
||||
// Both AppInvokes cause unhandled runtime errors in Linux.
|
||||
AppInvoke( MainFrame, ApplySettings() );
|
||||
AppInvoke( CoreThread, ApplySettings( g_Conf->EmuOptions ) );
|
||||
}
|
||||
|
|
|
@ -16,7 +16,7 @@
|
|||
#include "PrecompiledHeader.h"
|
||||
#include "Common.h"
|
||||
#include "GS.h"
|
||||
|
||||
#include "Gif.h"
|
||||
#include "VifDma.h"
|
||||
|
||||
// --------------------------------------------------------------------------------------
|
||||
|
|
|
@ -31,8 +31,10 @@
|
|||
#include "Common.h"
|
||||
|
||||
#include "GS.h"
|
||||
#include "R5900.h"
|
||||
#include "Gif.h"
|
||||
#include "VU.h"
|
||||
|
||||
#include "R5900.h"
|
||||
#include "iR5900.h"
|
||||
|
||||
#include "sVU_zerorec.h"
|
||||
|
|
Loading…
Reference in New Issue