From c7deaad3c69d49961e9c81338e73370fb29838e6 Mon Sep 17 00:00:00 2001 From: cottonvibes Date: Sun, 15 Feb 2009 09:10:24 +0000 Subject: [PATCH] coded the microVU opcode tables, this took me all-day to get right lol xD git-svn-id: http://pcsx2.googlecode.com/svn/trunk@498 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/x86/microVU.cpp | 2 +- pcsx2/x86/microVU_Lower.cpp | 80 ++- pcsx2/x86/microVU_Tables.cpp | 913 +++++++++++++++++++++++++++-------- pcsx2/x86/microVU_Tables.h | 334 ++++++------- pcsx2/x86/microVU_Upper.cpp | 107 +++- 5 files changed, 1075 insertions(+), 361 deletions(-) diff --git a/pcsx2/x86/microVU.cpp b/pcsx2/x86/microVU.cpp index 42b4b331fe..e89e5a05eb 100644 --- a/pcsx2/x86/microVU.cpp +++ b/pcsx2/x86/microVU.cpp @@ -61,7 +61,7 @@ microVUt(void) mVUreset() { } // Dynarec Cache - mVU->cache = SysMmapEx(mVU->cacheAddr, mVU->cacheSize, 0x10000000, "Micro VU"); + mVU->cache = SysMmapEx(mVU->cacheAddr, mVU->cacheSize, 0x10000000, (vuIndex ? "Micro VU1" : "Micro VU0")); if ( mVU->cache == NULL ) throw Exception::OutOfMemory(fmt_string( "microVU Error: failed to allocate recompiler memory! (addr: 0x%x)", params (u32)mVU->cache)); // Other Variables diff --git a/pcsx2/x86/microVU_Lower.cpp b/pcsx2/x86/microVU_Lower.cpp index 2f2804bdb3..fa2e149909 100644 --- a/pcsx2/x86/microVU_Lower.cpp +++ b/pcsx2/x86/microVU_Lower.cpp @@ -15,5 +15,83 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA */ - +#pragma once #include "PrecompiledHeader.h" +#include "microVU.h" +#ifdef PCSX2_MICROVU + +//------------------------------------------------------------------ +// Micro VU Micromode Lower instructions +//------------------------------------------------------------------ + +microVUf(void) mVU_DIV(){} +microVUf(void) mVU_SQRT(){} +microVUf(void) mVU_RSQRT(){} +microVUf(void) mVU_IADD(){} +microVUf(void) mVU_IADDI(){} +microVUf(void) mVU_IADDIU(){} +microVUf(void) mVU_IAND(){} +microVUf(void) mVU_IOR(){} +microVUf(void) mVU_ISUB(){} +microVUf(void) mVU_ISUBIU(){} +microVUf(void) mVU_MOVE(){} +microVUf(void) mVU_MFIR(){} +microVUf(void) mVU_MTIR(){} +microVUf(void) mVU_MR32(){} +microVUf(void) mVU_LQ(){} +microVUf(void) mVU_LQD(){} +microVUf(void) mVU_LQI(){} +microVUf(void) mVU_SQ(){} +microVUf(void) mVU_SQD(){} +microVUf(void) mVU_SQI(){} +microVUf(void) mVU_ILW(){} +microVUf(void) mVU_ISW(){} +microVUf(void) mVU_ILWR(){} +microVUf(void) mVU_ISWR(){} +microVUf(void) mVU_LOI(){} +microVUf(void) mVU_RINIT(){} +microVUf(void) mVU_RGET(){} +microVUf(void) mVU_RNEXT(){} +microVUf(void) mVU_RXOR(){} +microVUf(void) mVU_WAITQ(){} +microVUf(void) mVU_FSAND(){} +microVUf(void) mVU_FSEQ(){} +microVUf(void) mVU_FSOR(){} +microVUf(void) mVU_FSSET(){} +microVUf(void) mVU_FMAND(){} +microVUf(void) mVU_FMEQ(){} +microVUf(void) mVU_FMOR(){} +microVUf(void) mVU_FCAND(){} +microVUf(void) mVU_FCEQ(){} +microVUf(void) mVU_FCOR(){} +microVUf(void) mVU_FCSET(){} +microVUf(void) mVU_FCGET(){} +microVUf(void) mVU_IBEQ(){} +microVUf(void) mVU_IBGEZ(){} +microVUf(void) mVU_IBGTZ(){} +microVUf(void) mVU_IBLTZ(){} +microVUf(void) mVU_IBLEZ(){} +microVUf(void) mVU_IBNE(){} +microVUf(void) mVU_B(){} +microVUf(void) mVU_BAL(){} +microVUf(void) mVU_JR(){} +microVUf(void) mVU_JALR(){} +microVUf(void) mVU_MFP(){} +microVUf(void) mVU_WAITP(){} +microVUf(void) mVU_ESADD(){} +microVUf(void) mVU_ERSADD(){} +microVUf(void) mVU_ELENG(){} +microVUf(void) mVU_ERLENG(){} +microVUf(void) mVU_EATANxy(){} +microVUf(void) mVU_EATANxz(){} +microVUf(void) mVU_ESUM(){} +microVUf(void) mVU_ERCPR(){} +microVUf(void) mVU_ESQRT(){} +microVUf(void) mVU_ERSQRT(){} +microVUf(void) mVU_ESIN(){} +microVUf(void) mVU_EATAN(){} +microVUf(void) mVU_EEXP(){} +microVUf(void) mVU_XGKICK(){} +microVUf(void) mVU_XTOP(){} +microVUf(void) mVU_XITOP(){} +#endif //PCSX2_MICROVU diff --git a/pcsx2/x86/microVU_Tables.cpp b/pcsx2/x86/microVU_Tables.cpp index 9377463346..0865137cac 100644 --- a/pcsx2/x86/microVU_Tables.cpp +++ b/pcsx2/x86/microVU_Tables.cpp @@ -18,210 +18,741 @@ #include "PrecompiledHeader.h" #include "microVU.h" +#include "microVU_Upper.cpp" +#include "microVU_Lower.cpp" -#ifdef PCSX2_MICROVU_lulz +#ifdef PCSX2_MICROVU -void mVU_UPPER_FD_00(VURegs* VU, s32 info); -void mVU_UPPER_FD_01(VURegs* VU, s32 info); -void mVU_UPPER_FD_10(VURegs* VU, s32 info); -void mVU_UPPER_FD_11(VURegs* VU, s32 info); -void mVULowerOP(VURegs* VU, s32 info); -void mVULowerOP_T3_00(VURegs* VU, s32 info); -void mVULowerOP_T3_01(VURegs* VU, s32 info); -void mVULowerOP_T3_10(VURegs* VU, s32 info); -void mVULowerOP_T3_11(VURegs* VU, s32 info); -void mVUunknown(VURegs* VU, s32 info); +//------------------------------------------------------------------ +// Declarations +//------------------------------------------------------------------ +extern PCSX2_ALIGNED16(microVU microVU0); +extern PCSX2_ALIGNED16(microVU microVU1); -void (*mVU_LOWER_OPCODE[128])(VURegs* VU, s32 info) = { - mVU_LQ , mVU_SQ , mVUunknown , mVUunknown, - mVU_ILW , mVU_ISW , mVUunknown , mVUunknown, - mVU_IADDIU , mVU_ISUBIU , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVU_FCEQ , mVU_FCSET , mVU_FCAND , mVU_FCOR, /* 0x10 */ - mVU_FSEQ , mVU_FSSET , mVU_FSAND , mVU_FSOR, - mVU_FMEQ , mVUunknown , mVU_FMAND , mVU_FMOR, - mVU_FCGET , mVUunknown , mVUunknown , mVUunknown, - mVU_B , mVU_BAL , mVUunknown , mVUunknown, /* 0x20 */ - mVU_JR , mVU_JALR , mVUunknown , mVUunknown, - mVU_IBEQ , mVU_IBNE , mVUunknown , mVUunknown, - mVU_IBLTZ , mVU_IBGTZ , mVU_IBLEZ , mVU_IBGEZ, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, /* 0x30 */ - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVULowerOP , mVUunknown , mVUunknown , mVUunknown, /* 0x40*/ - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, /* 0x50 */ - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, /* 0x60 */ - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, /* 0x70 */ - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, -}; +#define mVUgetCode (vuIndex ? microVU1.regs->code : microVU0.regs->code) -void (*mVULowerOP_T3_00_OPCODE[32])(VURegs* VU, s32 info) = { - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVU_MOVE , mVU_LQI , mVU_DIV , mVU_MTIR, - mVU_RNEXT , mVUunknown , mVUunknown , mVUunknown, /* 0x10 */ - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVU_MFP , mVU_XTOP , mVU_XGKICK, - mVU_ESADD , mVU_EATANxy , mVU_ESQRT , mVU_ESIN, -}; +microVUf(void) mVU_UPPER_FD_00(); +microVUf(void) mVU_UPPER_FD_01(); +microVUf(void) mVU_UPPER_FD_10(); +microVUf(void) mVU_UPPER_FD_11(); +microVUf(void) mVULowerOP(); +microVUf(void) mVULowerOP_T3_00(); +microVUf(void) mVULowerOP_T3_01(); +microVUf(void) mVULowerOP_T3_10(); +microVUf(void) mVULowerOP_T3_11(); +microVUf(void) mVUunknown(); +//------------------------------------------------------------------ -void (*mVULowerOP_T3_01_OPCODE[32])(VURegs* VU, s32 info) = { - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVU_MR32 , mVU_SQI , mVU_SQRT , mVU_MFIR, - mVU_RGET , mVUunknown , mVUunknown , mVUunknown, /* 0x10 */ - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVU_XITOP , mVUunknown, - mVU_ERSADD , mVU_EATANxz , mVU_ERSQRT , mVU_EATAN, -}; +//------------------------------------------------------------------ +// mVULOWER_OPCODE +//------------------------------------------------------------------ +void (* mVULOWER_OPCODE00 [128])() = { + mVU_LQ<0,0> , mVU_SQ<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVU_ILW<0,0> , mVU_ISW<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVU_IADDIU<0,0> , mVU_ISUBIU<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVU_FCEQ<0,0> , mVU_FCSET<0,0> , mVU_FCAND<0,0> , mVU_FCOR<0,0>, /* 0x10 */ + mVU_FSEQ<0,0> , mVU_FSSET<0,0> , mVU_FSAND<0,0> , mVU_FSOR<0,0>, + mVU_FMEQ<0,0> , mVUunknown<0,0> , mVU_FMAND<0,0> , mVU_FMOR<0,0>, + mVU_FCGET<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVU_B<0,0> , mVU_BAL<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, /* 0x20 */ + mVU_JR<0,0> , mVU_JALR<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVU_IBEQ<0,0> , mVU_IBNE<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVU_IBLTZ<0,0> , mVU_IBGTZ<0,0> , mVU_IBLEZ<0,0> , mVU_IBGEZ<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, /* 0x30 */ + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVULowerOP<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, /* 0x40*/ + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, /* 0x50 */ + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, /* 0x60 */ + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, /* 0x70 */ + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, +}; -void (*mVULowerOP_T3_10_OPCODE[32])(VURegs* VU, s32 info) = { - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVU_LQD , mVU_RSQRT , mVU_ILWR, - mVU_RINIT , mVUunknown , mVUunknown , mVUunknown, /* 0x10 */ - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVU_ELENG , mVU_ESUM , mVU_ERCPR , mVU_EEXP, -}; +void (* mVULOWER_OPCODE01 [128])() = { + mVU_LQ<0,1> , mVU_SQ<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVU_ILW<0,1> , mVU_ISW<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVU_IADDIU<0,1> , mVU_ISUBIU<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVU_FCEQ<0,1> , mVU_FCSET<0,1> , mVU_FCAND<0,1> , mVU_FCOR<0,1>, /* 0x10 */ + mVU_FSEQ<0,1> , mVU_FSSET<0,1> , mVU_FSAND<0,1> , mVU_FSOR<0,1>, + mVU_FMEQ<0,1> , mVUunknown<0,1> , mVU_FMAND<0,1> , mVU_FMOR<0,1>, + mVU_FCGET<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVU_B<0,1> , mVU_BAL<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, /* 0x20 */ + mVU_JR<0,1> , mVU_JALR<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVU_IBEQ<0,1> , mVU_IBNE<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVU_IBLTZ<0,1> , mVU_IBGTZ<0,1> , mVU_IBLEZ<0,1> , mVU_IBGEZ<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, /* 0x30 */ + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVULowerOP<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, /* 0x40*/ + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, /* 0x50 */ + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, /* 0x60 */ + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, /* 0x70 */ + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, +}; -void (*mVULowerOP_T3_11_OPCODE[32])(VURegs* VU, s32 info) = { - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVU_SQD , mVU_WAITQ , mVU_ISWR, - mVU_RXOR , mVUunknown , mVUunknown , mVUunknown, /* 0x10 */ - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVU_ERLENG , mVUunknown , mVU_WAITP , mVUunknown, -}; +void (* mVULOWER_OPCODE10 [128])() = { + mVU_LQ<1,0> , mVU_SQ<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVU_ILW<1,0> , mVU_ISW<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVU_IADDIU<1,0> , mVU_ISUBIU<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVU_FCEQ<1,0> , mVU_FCSET<1,0> , mVU_FCAND<1,0> , mVU_FCOR<1,0>, /* 0x10 */ + mVU_FSEQ<1,0> , mVU_FSSET<1,0> , mVU_FSAND<1,0> , mVU_FSOR<1,0>, + mVU_FMEQ<1,0> , mVUunknown<1,0> , mVU_FMAND<1,0> , mVU_FMOR<1,0>, + mVU_FCGET<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVU_B<1,0> , mVU_BAL<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, /* 0x20 */ + mVU_JR<1,0> , mVU_JALR<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVU_IBEQ<1,0> , mVU_IBNE<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVU_IBLTZ<1,0> , mVU_IBGTZ<1,0> , mVU_IBLEZ<1,0> , mVU_IBGEZ<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, /* 0x30 */ + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVULowerOP<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, /* 0x40*/ + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, /* 0x50 */ + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, /* 0x60 */ + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, /* 0x70 */ + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, +}; -void (*mVULowerOP_OPCODE[64])(VURegs* VU, s32 info) = { - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, /* 0x10 */ - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, /* 0x20 */ - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVU_IADD , mVU_ISUB , mVU_IADDI , mVUunknown, /* 0x30 */ - mVU_IAND , mVU_IOR , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVULowerOP_T3_00, mVULowerOP_T3_01, mVULowerOP_T3_10, mVULowerOP_T3_11, -}; +void (* mVULOWER_OPCODE11 [128])() = { + mVU_LQ<1,1> , mVU_SQ<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVU_ILW<1,1> , mVU_ISW<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVU_IADDIU<1,1> , mVU_ISUBIU<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVU_FCEQ<1,1> , mVU_FCSET<1,1> , mVU_FCAND<1,1> , mVU_FCOR<1,1>, /* 0x10 */ + mVU_FSEQ<1,1> , mVU_FSSET<1,1> , mVU_FSAND<1,1> , mVU_FSOR<1,1>, + mVU_FMEQ<1,1> , mVUunknown<1,1> , mVU_FMAND<1,1> , mVU_FMOR<1,1>, + mVU_FCGET<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVU_B<1,1> , mVU_BAL<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, /* 0x20 */ + mVU_JR<1,1> , mVU_JALR<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVU_IBEQ<1,1> , mVU_IBNE<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVU_IBLTZ<1,1> , mVU_IBGTZ<1,1> , mVU_IBLEZ<1,1> , mVU_IBGEZ<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, /* 0x30 */ + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVULowerOP<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, /* 0x40*/ + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, /* 0x50 */ + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, /* 0x60 */ + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, /* 0x70 */ + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, +}; +//------------------------------------------------------------------ -void (*mVU_UPPER_OPCODE[64])(VURegs* VU, s32 info) = { - mVU_ADDx , mVU_ADDy , mVU_ADDz , mVU_ADDw, - mVU_SUBx , mVU_SUBy , mVU_SUBz , mVU_SUBw, - mVU_MADDx , mVU_MADDy , mVU_MADDz , mVU_MADDw, - mVU_MSUBx , mVU_MSUBy , mVU_MSUBz , mVU_MSUBw, - mVU_MAXx , mVU_MAXy , mVU_MAXz , mVU_MAXw, /* 0x10 */ - mVU_MINIx , mVU_MINIy , mVU_MINIz , mVU_MINIw, - mVU_MULx , mVU_MULy , mVU_MULz , mVU_MULw, - mVU_MULq , mVU_MAXi , mVU_MULi , mVU_MINIi, - mVU_ADDq , mVU_MADDq , mVU_ADDi , mVU_MADDi, /* 0x20 */ - mVU_SUBq , mVU_MSUBq , mVU_SUBi , mVU_MSUBi, - mVU_ADD , mVU_MADD , mVU_MUL , mVU_MAX, - mVU_SUB , mVU_MSUB , mVU_OPMSUB , mVU_MINI, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, /* 0x30 */ - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVU_UPPER_FD_00, mVU_UPPER_FD_01, mVU_UPPER_FD_10, mVU_UPPER_FD_11, -}; +//------------------------------------------------------------------ +// mVULowerOP_T3_00_OPCODE +//------------------------------------------------------------------ +void (* mVULowerOP_T3_00_OPCODE00 [32])() = { + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVU_MOVE<0,0> , mVU_LQI<0,0> , mVU_DIV<0,0> , mVU_MTIR<0,0>, + mVU_RNEXT<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, /* 0x10 */ + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVU_MFP<0,0> , mVU_XTOP<0,0> , mVU_XGKICK<0,0>, + mVU_ESADD<0,0> , mVU_EATANxy<0,0> , mVU_ESQRT<0,0> , mVU_ESIN<0,0>, +}; -void (*mVU_UPPER_FD_00_TABLE[32])(VURegs* VU, s32 info) = { - mVU_ADDAx , mVU_SUBAx , mVU_MADDAx , mVU_MSUBAx, - mVU_ITOF0 , mVU_FTOI0 , mVU_MULAx , mVU_MULAq, - mVU_ADDAq , mVU_SUBAq , mVU_ADDA , mVU_SUBA, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, -}; +void (* mVULowerOP_T3_00_OPCODE01 [32])() = { + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVU_MOVE<0,1> , mVU_LQI<0,1> , mVU_DIV<0,1> , mVU_MTIR<0,1>, + mVU_RNEXT<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, /* 0x10 */ + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVU_MFP<0,1> , mVU_XTOP<0,1> , mVU_XGKICK<0,1>, + mVU_ESADD<0,1> , mVU_EATANxy<0,1> , mVU_ESQRT<0,1> , mVU_ESIN<0,1>, +}; -void (*mVU_UPPER_FD_01_TABLE[32])(VURegs* VU, s32 info) = { - mVU_ADDAy , mVU_SUBAy , mVU_MADDAy , mVU_MSUBAy, - mVU_ITOF4 , mVU_FTOI4 , mVU_MULAy , mVU_ABS, - mVU_MADDAq , mVU_MSUBAq , mVU_MADDA , mVU_MSUBA, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, -}; +void (* mVULowerOP_T3_00_OPCODE10 [32])() = { + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVU_MOVE<1,0> , mVU_LQI<1,0> , mVU_DIV<1,0> , mVU_MTIR<1,0>, + mVU_RNEXT<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, /* 0x10 */ + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVU_MFP<1,0> , mVU_XTOP<1,0> , mVU_XGKICK<1,0>, + mVU_ESADD<1,0> , mVU_EATANxy<1,0> , mVU_ESQRT<1,0> , mVU_ESIN<1,0>, +}; -void (*mVU_UPPER_FD_10_TABLE[32])(VURegs* VU, s32 info) = { - mVU_ADDAz , mVU_SUBAz , mVU_MADDAz , mVU_MSUBAz, - mVU_ITOF12 , mVU_FTOI12 , mVU_MULAz , mVU_MULAi, - mVU_ADDAi , mVU_SUBAi , mVU_MULA , mVU_OPMULA, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, -}; +void (* mVULowerOP_T3_00_OPCODE11 [32])() = { + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVU_MOVE<1,1> , mVU_LQI<1,1> , mVU_DIV<1,1> , mVU_MTIR<1,1>, + mVU_RNEXT<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, /* 0x10 */ + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVU_MFP<1,1> , mVU_XTOP<1,1> , mVU_XGKICK<1,1>, + mVU_ESADD<1,1> , mVU_EATANxy<1,1> , mVU_ESQRT<1,1> , mVU_ESIN<1,1>, +}; +//------------------------------------------------------------------ -void (*mVU_UPPER_FD_11_TABLE[32])(VURegs* VU, s32 info) = { - mVU_ADDAw , mVU_SUBAw , mVU_MADDAw , mVU_MSUBAw, - mVU_ITOF15 , mVU_FTOI15 , mVU_MULAw , mVU_CLIP, - mVU_MADDAi , mVU_MSUBAi , mVUunknown , mVU_NOP, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, - mVUunknown , mVUunknown , mVUunknown , mVUunknown, -}; +//------------------------------------------------------------------ +// mVULowerOP_T3_01_OPCODE +//------------------------------------------------------------------ +void (* mVULowerOP_T3_01_OPCODE00 [32])() = { + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVU_MR32<0,0> , mVU_SQI<0,0> , mVU_SQRT<0,0> , mVU_MFIR<0,0>, + mVU_RGET<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, /* 0x10 */ + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVU_XITOP<0,0> , mVUunknown<0,0>, + mVU_ERSADD<0,0> , mVU_EATANxz<0,0> , mVU_ERSQRT<0,0> , mVU_EATAN<0,0>, +}; -void mVU_UPPER_FD_00(VURegs* VU, s32 info) { - mVU_UPPER_FD_00_TABLE[ ( VU->code >> 6 ) & 0x1f ]( VU, info ); -} -void mVU_UPPER_FD_01(VURegs* VU, s32 info) { - mVU_UPPER_FD_01_TABLE[ ( VU->code >> 6 ) & 0x1f ]( VU, info ); -} -void mVU_UPPER_FD_10(VURegs* VU, s32 info) { - mVU_UPPER_FD_10_TABLE[ ( VU->code >> 6 ) & 0x1f ]( VU, info ); -} -void mVU_UPPER_FD_11(VURegs* VU, s32 info) { - mVU_UPPER_FD_11_TABLE[ ( VU->code >> 6 ) & 0x1f ]( VU, info ); -} -void mVULowerOP(VURegs* VU, s32 info) { - mVULowerOP_OPCODE[ VU->code & 0x3f ]( VU, info ); -} -void mVULowerOP_T3_00(VURegs* VU, s32 info) { - mVULowerOP_T3_00_OPCODE[ ( VU->code >> 6 ) & 0x1f ]( VU, info ); -} -void mVULowerOP_T3_01(VURegs* VU, s32 info) { - mVULowerOP_T3_01_OPCODE[ ( VU->code >> 6 ) & 0x1f ]( VU, info ); -} -void mVULowerOP_T3_10(VURegs* VU, s32 info) { - mVULowerOP_T3_10_OPCODE[ ( VU->code >> 6 ) & 0x1f ]( VU, info ); -} -void mVULowerOP_T3_11(VURegs* VU, s32 info) { - mVULowerOP_T3_11_OPCODE[ ( VU->code >> 6 ) & 0x1f ]( VU, info ); -} -void mVUunknown(VURegs* VU, s32 info) { - SysPrintf("Unknown Micro VU opcode called\n"); +void (* mVULowerOP_T3_01_OPCODE01 [32])() = { + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVU_MR32<0,1> , mVU_SQI<0,1> , mVU_SQRT<0,1> , mVU_MFIR<0,1>, + mVU_RGET<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, /* 0x10 */ + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVU_XITOP<0,1> , mVUunknown<0,1>, + mVU_ERSADD<0,1> , mVU_EATANxz<0,1> , mVU_ERSQRT<0,1> , mVU_EATAN<0,1>, +}; + +void (* mVULowerOP_T3_01_OPCODE10 [32])() = { + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVU_MR32<1,0> , mVU_SQI<1,0> , mVU_SQRT<1,0> , mVU_MFIR<1,0>, + mVU_RGET<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, /* 0x10 */ + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVU_XITOP<1,0> , mVUunknown<1,0>, + mVU_ERSADD<1,0> , mVU_EATANxz<1,0> , mVU_ERSQRT<1,0> , mVU_EATAN<1,0>, +}; + +void (* mVULowerOP_T3_01_OPCODE11 [32])() = { + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVU_MR32<1,1> , mVU_SQI<1,1> , mVU_SQRT<1,1> , mVU_MFIR<1,1>, + mVU_RGET<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, /* 0x10 */ + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVU_XITOP<1,1> , mVUunknown<1,1>, + mVU_ERSADD<1,1> , mVU_EATANxz<1,1> , mVU_ERSQRT<1,1> , mVU_EATAN<1,1>, +}; +//------------------------------------------------------------------ + +//------------------------------------------------------------------ +// mVULowerOP_T3_10_OPCODE +//------------------------------------------------------------------ +void (* mVULowerOP_T3_10_OPCODE00 [32])() = { + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVU_LQD<0,0> , mVU_RSQRT<0,0> , mVU_ILWR<0,0>, + mVU_RINIT<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, /* 0x10 */ + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVU_ELENG<0,0> , mVU_ESUM<0,0> , mVU_ERCPR<0,0> , mVU_EEXP<0,0>, +}; + +void (* mVULowerOP_T3_10_OPCODE01 [32])() = { + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVU_LQD<0,1> , mVU_RSQRT<0,1> , mVU_ILWR<0,1>, + mVU_RINIT<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, /* 0x10 */ + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVU_ELENG<0,1> , mVU_ESUM<0,1> , mVU_ERCPR<0,1> , mVU_EEXP<0,1>, +}; + +void (* mVULowerOP_T3_10_OPCODE10 [32])() = { + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVU_LQD<1,0> , mVU_RSQRT<1,0> , mVU_ILWR<1,0>, + mVU_RINIT<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, /* 0x10 */ + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVU_ELENG<1,0> , mVU_ESUM<1,0> , mVU_ERCPR<1,0> , mVU_EEXP<1,0>, +}; + +void (* mVULowerOP_T3_10_OPCODE11 [32])() = { + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVU_LQD<1,1> , mVU_RSQRT<1,1> , mVU_ILWR<1,1>, + mVU_RINIT<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, /* 0x10 */ + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVU_ELENG<1,1> , mVU_ESUM<1,1> , mVU_ERCPR<1,1> , mVU_EEXP<1,1>, +}; +//------------------------------------------------------------------ + +//------------------------------------------------------------------ +// mVULowerOP_T3_11_OPCODE +//------------------------------------------------------------------ +void (* mVULowerOP_T3_11_OPCODE00 [32])() = { + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVU_SQD<0,0> , mVU_WAITQ<0,0> , mVU_ISWR<0,0>, + mVU_RXOR<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, /* 0x10 */ + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVU_ERLENG<0,0> , mVUunknown<0,0> , mVU_WAITP<0,0> , mVUunknown<0,0>, +}; + +void (* mVULowerOP_T3_11_OPCODE01 [32])() = { + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVU_SQD<0,1> , mVU_WAITQ<0,1> , mVU_ISWR<0,1>, + mVU_RXOR<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, /* 0x10 */ + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVU_ERLENG<0,1> , mVUunknown<0,1> , mVU_WAITP<0,1> , mVUunknown<0,1>, +}; + +void (* mVULowerOP_T3_11_OPCODE10 [32])() = { + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVU_SQD<1,0> , mVU_WAITQ<1,0> , mVU_ISWR<1,0>, + mVU_RXOR<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, /* 0x10 */ + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVU_ERLENG<1,0> , mVUunknown<1,0> , mVU_WAITP<1,0> , mVUunknown<1,0>, +}; + +void (* mVULowerOP_T3_11_OPCODE11 [32])() = { + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVU_SQD<1,1> , mVU_WAITQ<1,1> , mVU_ISWR<1,1>, + mVU_RXOR<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, /* 0x10 */ + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVU_ERLENG<1,1> , mVUunknown<1,1> , mVU_WAITP<1,1> , mVUunknown<1,1>, +}; +//------------------------------------------------------------------ + +//------------------------------------------------------------------ +// mVULowerOP_OPCODE +//------------------------------------------------------------------ +void (* mVULowerOP_OPCODE00 [64])() = { + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, /* 0x10 */ + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, /* 0x20 */ + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVU_IADD<0,0> , mVU_ISUB<0,0> , mVU_IADDI<0,0> , mVUunknown<0,0>, /* 0x30 */ + mVU_IAND<0,0> , mVU_IOR<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVULowerOP_T3_00<0,0>, mVULowerOP_T3_01<0,0>, mVULowerOP_T3_10<0,0>, mVULowerOP_T3_11<0,0>, +}; + +void (* mVULowerOP_OPCODE01 [64])() = { + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, /* 0x10 */ + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, /* 0x20 */ + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVU_IADD<0,1> , mVU_ISUB<0,1> , mVU_IADDI<0,1> , mVUunknown<0,1>, /* 0x30 */ + mVU_IAND<0,1> , mVU_IOR<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVULowerOP_T3_00<0,1>, mVULowerOP_T3_01<0,1>, mVULowerOP_T3_10<0,1>, mVULowerOP_T3_11<0,1>, +}; + +void (* mVULowerOP_OPCODE10 [64])() = { + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, /* 0x10 */ + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, /* 0x20 */ + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVU_IADD<1,0> , mVU_ISUB<1,0> , mVU_IADDI<1,0> , mVUunknown<1,0>, /* 0x30 */ + mVU_IAND<1,0> , mVU_IOR<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVULowerOP_T3_00<1,0>, mVULowerOP_T3_01<1,0>, mVULowerOP_T3_10<1,0>, mVULowerOP_T3_11<1,0>, +}; + +void (* mVULowerOP_OPCODE11 [64])() = { + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, /* 0x10 */ + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, /* 0x20 */ + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVU_IADD<1,1> , mVU_ISUB<1,1> , mVU_IADDI<1,1> , mVUunknown<1,1>, /* 0x30 */ + mVU_IAND<1,1> , mVU_IOR<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVULowerOP_T3_00<1,1>, mVULowerOP_T3_01<1,1>, mVULowerOP_T3_10<1,1>, mVULowerOP_T3_11<1,1>, +}; +//------------------------------------------------------------------ + +//------------------------------------------------------------------ +// mVU_UPPER_OPCODE +//------------------------------------------------------------------ +void (* mVU_UPPER_OPCODE00 [64])() = { + mVU_ADDx<0,0> , mVU_ADDy<0,0> , mVU_ADDz<0,0> , mVU_ADDw<0,0>, + mVU_SUBx<0,0> , mVU_SUBy<0,0> , mVU_SUBz<0,0> , mVU_SUBw<0,0>, + mVU_MADDx<0,0> , mVU_MADDy<0,0> , mVU_MADDz<0,0> , mVU_MADDw<0,0>, + mVU_MSUBx<0,0> , mVU_MSUBy<0,0> , mVU_MSUBz<0,0> , mVU_MSUBw<0,0>, + mVU_MAXx<0,0> , mVU_MAXy<0,0> , mVU_MAXz<0,0> , mVU_MAXw<0,0>, /* 0x10 */ + mVU_MINIx<0,0> , mVU_MINIy<0,0> , mVU_MINIz<0,0> , mVU_MINIw<0,0>, + mVU_MULx<0,0> , mVU_MULy<0,0> , mVU_MULz<0,0> , mVU_MULw<0,0>, + mVU_MULq<0,0> , mVU_MAXi<0,0> , mVU_MULi<0,0> , mVU_MINIi<0,0>, + mVU_ADDq<0,0> , mVU_MADDq<0,0> , mVU_ADDi<0,0> , mVU_MADDi<0,0>, /* 0x20 */ + mVU_SUBq<0,0> , mVU_MSUBq<0,0> , mVU_SUBi<0,0> , mVU_MSUBi<0,0>, + mVU_ADD<0,0> , mVU_MADD<0,0> , mVU_MUL<0,0> , mVU_MAX<0,0>, + mVU_SUB<0,0> , mVU_MSUB<0,0> , mVU_OPMSUB<0,0> , mVU_MINI<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, /* 0x30 */ + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVU_UPPER_FD_00<0,0>, mVU_UPPER_FD_01<0,0>, mVU_UPPER_FD_10<0,0>, mVU_UPPER_FD_11<0,0>, +}; + +void (* mVU_UPPER_OPCODE01 [64])() = { + mVU_ADDx<0,1> , mVU_ADDy<0,1> , mVU_ADDz<0,1> , mVU_ADDw<0,1>, + mVU_SUBx<0,1> , mVU_SUBy<0,1> , mVU_SUBz<0,1> , mVU_SUBw<0,1>, + mVU_MADDx<0,1> , mVU_MADDy<0,1> , mVU_MADDz<0,1> , mVU_MADDw<0,1>, + mVU_MSUBx<0,1> , mVU_MSUBy<0,1> , mVU_MSUBz<0,1> , mVU_MSUBw<0,1>, + mVU_MAXx<0,1> , mVU_MAXy<0,1> , mVU_MAXz<0,1> , mVU_MAXw<0,1>, /* 0x10 */ + mVU_MINIx<0,1> , mVU_MINIy<0,1> , mVU_MINIz<0,1> , mVU_MINIw<0,1>, + mVU_MULx<0,1> , mVU_MULy<0,1> , mVU_MULz<0,1> , mVU_MULw<0,1>, + mVU_MULq<0,1> , mVU_MAXi<0,1> , mVU_MULi<0,1> , mVU_MINIi<0,1>, + mVU_ADDq<0,1> , mVU_MADDq<0,1> , mVU_ADDi<0,1> , mVU_MADDi<0,1>, /* 0x20 */ + mVU_SUBq<0,1> , mVU_MSUBq<0,1> , mVU_SUBi<0,1> , mVU_MSUBi<0,1>, + mVU_ADD<0,1> , mVU_MADD<0,1> , mVU_MUL<0,1> , mVU_MAX<0,1>, + mVU_SUB<0,1> , mVU_MSUB<0,1> , mVU_OPMSUB<0,1> , mVU_MINI<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, /* 0x30 */ + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVU_UPPER_FD_00<0,1>, mVU_UPPER_FD_01<0,1>, mVU_UPPER_FD_10<0,1>, mVU_UPPER_FD_11<0,1>, +}; + +void (* mVU_UPPER_OPCODE10 [64])() = { + mVU_ADDx<1,0> , mVU_ADDy<1,0> , mVU_ADDz<1,0> , mVU_ADDw<1,0>, + mVU_SUBx<1,0> , mVU_SUBy<1,0> , mVU_SUBz<1,0> , mVU_SUBw<1,0>, + mVU_MADDx<1,0> , mVU_MADDy<1,0> , mVU_MADDz<1,0> , mVU_MADDw<1,0>, + mVU_MSUBx<1,0> , mVU_MSUBy<1,0> , mVU_MSUBz<1,0> , mVU_MSUBw<1,0>, + mVU_MAXx<1,0> , mVU_MAXy<1,0> , mVU_MAXz<1,0> , mVU_MAXw<1,0>, /* 0x10 */ + mVU_MINIx<1,0> , mVU_MINIy<1,0> , mVU_MINIz<1,0> , mVU_MINIw<1,0>, + mVU_MULx<1,0> , mVU_MULy<1,0> , mVU_MULz<1,0> , mVU_MULw<1,0>, + mVU_MULq<1,0> , mVU_MAXi<1,0> , mVU_MULi<1,0> , mVU_MINIi<1,0>, + mVU_ADDq<1,0> , mVU_MADDq<1,0> , mVU_ADDi<1,0> , mVU_MADDi<1,0>, /* 0x20 */ + mVU_SUBq<1,0> , mVU_MSUBq<1,0> , mVU_SUBi<1,0> , mVU_MSUBi<1,0>, + mVU_ADD<1,0> , mVU_MADD<1,0> , mVU_MUL<1,0> , mVU_MAX<1,0>, + mVU_SUB<1,0> , mVU_MSUB<1,0> , mVU_OPMSUB<1,0> , mVU_MINI<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, /* 0x30 */ + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVU_UPPER_FD_00<1,0>, mVU_UPPER_FD_01<1,0>, mVU_UPPER_FD_10<1,0>, mVU_UPPER_FD_11<1,0>, +}; + +void (* mVU_UPPER_OPCODE11 [64])() = { + mVU_ADDx<1,1> , mVU_ADDy<1,1> , mVU_ADDz<1,1> , mVU_ADDw<1,1>, + mVU_SUBx<1,1> , mVU_SUBy<1,1> , mVU_SUBz<1,1> , mVU_SUBw<1,1>, + mVU_MADDx<1,1> , mVU_MADDy<1,1> , mVU_MADDz<1,1> , mVU_MADDw<1,1>, + mVU_MSUBx<1,1> , mVU_MSUBy<1,1> , mVU_MSUBz<1,1> , mVU_MSUBw<1,1>, + mVU_MAXx<1,1> , mVU_MAXy<1,1> , mVU_MAXz<1,1> , mVU_MAXw<1,1>, /* 0x10 */ + mVU_MINIx<1,1> , mVU_MINIy<1,1> , mVU_MINIz<1,1> , mVU_MINIw<1,1>, + mVU_MULx<1,1> , mVU_MULy<1,1> , mVU_MULz<1,1> , mVU_MULw<1,1>, + mVU_MULq<1,1> , mVU_MAXi<1,1> , mVU_MULi<1,1> , mVU_MINIi<1,1>, + mVU_ADDq<1,1> , mVU_MADDq<1,1> , mVU_ADDi<1,1> , mVU_MADDi<1,1>, /* 0x20 */ + mVU_SUBq<1,1> , mVU_MSUBq<1,1> , mVU_SUBi<1,1> , mVU_MSUBi<1,1>, + mVU_ADD<1,1> , mVU_MADD<1,1> , mVU_MUL<1,1> , mVU_MAX<1,1>, + mVU_SUB<1,1> , mVU_MSUB<1,1> , mVU_OPMSUB<1,1> , mVU_MINI<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, /* 0x30 */ + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVU_UPPER_FD_00<1,1>, mVU_UPPER_FD_01<1,1>, mVU_UPPER_FD_10<1,1>, mVU_UPPER_FD_11<1,1>, +}; +//------------------------------------------------------------------ + +//------------------------------------------------------------------ +// mVU_UPPER_FD_00_TABLE +//------------------------------------------------------------------ +void (* mVU_UPPER_FD_00_TABLE00 [32])() = { + mVU_ADDAx<0,0> , mVU_SUBAx<0,0> , mVU_MADDAx<0,0> , mVU_MSUBAx<0,0>, + mVU_ITOF0<0,0> , mVU_FTOI0<0,0> , mVU_MULAx<0,0> , mVU_MULAq<0,0>, + mVU_ADDAq<0,0> , mVU_SUBAq<0,0> , mVU_ADDA<0,0> , mVU_SUBA<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, +}; + +void (* mVU_UPPER_FD_00_TABLE01 [32])() = { + mVU_ADDAx<0,1> , mVU_SUBAx<0,1> , mVU_MADDAx<0,1> , mVU_MSUBAx<0,1>, + mVU_ITOF0<0,1> , mVU_FTOI0<0,1> , mVU_MULAx<0,1> , mVU_MULAq<0,1>, + mVU_ADDAq<0,1> , mVU_SUBAq<0,1> , mVU_ADDA<0,1> , mVU_SUBA<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, +}; + +void (* mVU_UPPER_FD_00_TABLE10 [32])() = { + mVU_ADDAx<1,0> , mVU_SUBAx<1,0> , mVU_MADDAx<1,0> , mVU_MSUBAx<1,0>, + mVU_ITOF0<1,0> , mVU_FTOI0<1,0> , mVU_MULAx<1,0> , mVU_MULAq<1,0>, + mVU_ADDAq<1,0> , mVU_SUBAq<1,0> , mVU_ADDA<1,0> , mVU_SUBA<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, +}; + +void (* mVU_UPPER_FD_00_TABLE11 [32])() = { + mVU_ADDAx<1,1> , mVU_SUBAx<1,1> , mVU_MADDAx<1,1> , mVU_MSUBAx<1,1>, + mVU_ITOF0<1,1> , mVU_FTOI0<1,1> , mVU_MULAx<1,1> , mVU_MULAq<1,1>, + mVU_ADDAq<1,1> , mVU_SUBAq<1,1> , mVU_ADDA<1,1> , mVU_SUBA<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, +}; +//------------------------------------------------------------------ + +//------------------------------------------------------------------ +// mVU_UPPER_FD_01_TABLE +//------------------------------------------------------------------ +void (* mVU_UPPER_FD_01_TABLE00 [32])() = { + mVU_ADDAy<0,0> , mVU_SUBAy<0,0> , mVU_MADDAy<0,0> , mVU_MSUBAy<0,0>, + mVU_ITOF4<0,0> , mVU_FTOI4<0,0> , mVU_MULAy<0,0> , mVU_ABS<0,0>, + mVU_MADDAq<0,0> , mVU_MSUBAq<0,0> , mVU_MADDA<0,0> , mVU_MSUBA<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, +}; + +void (* mVU_UPPER_FD_01_TABLE01 [32])() = { + mVU_ADDAy<0,1> , mVU_SUBAy<0,1> , mVU_MADDAy<0,1> , mVU_MSUBAy<0,1>, + mVU_ITOF4<0,1> , mVU_FTOI4<0,1> , mVU_MULAy<0,1> , mVU_ABS<0,1>, + mVU_MADDAq<0,1> , mVU_MSUBAq<0,1> , mVU_MADDA<0,1> , mVU_MSUBA<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, +}; + +void (* mVU_UPPER_FD_01_TABLE10 [32])() = { + mVU_ADDAy<1,0> , mVU_SUBAy<1,0> , mVU_MADDAy<1,0> , mVU_MSUBAy<1,0>, + mVU_ITOF4<1,0> , mVU_FTOI4<1,0> , mVU_MULAy<1,0> , mVU_ABS<1,0>, + mVU_MADDAq<1,0> , mVU_MSUBAq<1,0> , mVU_MADDA<1,0> , mVU_MSUBA<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, +}; + +void (* mVU_UPPER_FD_01_TABLE11 [32])() = { + mVU_ADDAy<1,1> , mVU_SUBAy<1,1> , mVU_MADDAy<1,1> , mVU_MSUBAy<1,1>, + mVU_ITOF4<1,1> , mVU_FTOI4<1,1> , mVU_MULAy<1,1> , mVU_ABS<1,1>, + mVU_MADDAq<1,1> , mVU_MSUBAq<1,1> , mVU_MADDA<1,1> , mVU_MSUBA<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, +}; +//------------------------------------------------------------------ + +//------------------------------------------------------------------ +// mVU_UPPER_FD_10_TABLE +//------------------------------------------------------------------ +void (* mVU_UPPER_FD_10_TABLE00 [32])() = { + mVU_ADDAz<0,0> , mVU_SUBAz<0,0> , mVU_MADDAz<0,0> , mVU_MSUBAz<0,0>, + mVU_ITOF12<0,0> , mVU_FTOI12<0,0> , mVU_MULAz<0,0> , mVU_MULAi<0,0>, + mVU_ADDAi<0,0> , mVU_SUBAi<0,0> , mVU_MULA<0,0> , mVU_OPMULA<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, +}; + +void (* mVU_UPPER_FD_10_TABLE01 [32])() = { + mVU_ADDAz<0,1> , mVU_SUBAz<0,1> , mVU_MADDAz<0,1> , mVU_MSUBAz<0,1>, + mVU_ITOF12<0,1> , mVU_FTOI12<0,1> , mVU_MULAz<0,1> , mVU_MULAi<0,1>, + mVU_ADDAi<0,1> , mVU_SUBAi<0,1> , mVU_MULA<0,1> , mVU_OPMULA<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, +}; + +void (* mVU_UPPER_FD_10_TABLE10 [32])() = { + mVU_ADDAz<1,0> , mVU_SUBAz<1,0> , mVU_MADDAz<1,0> , mVU_MSUBAz<1,0>, + mVU_ITOF12<1,0> , mVU_FTOI12<1,0> , mVU_MULAz<1,0> , mVU_MULAi<1,0>, + mVU_ADDAi<1,0> , mVU_SUBAi<1,0> , mVU_MULA<1,0> , mVU_OPMULA<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, +}; + +void (* mVU_UPPER_FD_10_TABLE11 [32])() = { + mVU_ADDAz<1,1> , mVU_SUBAz<1,1> , mVU_MADDAz<1,1> , mVU_MSUBAz<1,1>, + mVU_ITOF12<1,1> , mVU_FTOI12<1,1> , mVU_MULAz<1,1> , mVU_MULAi<1,1>, + mVU_ADDAi<1,1> , mVU_SUBAi<1,1> , mVU_MULA<1,1> , mVU_OPMULA<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, +}; +//------------------------------------------------------------------ + +//------------------------------------------------------------------ +// mVU_UPPER_FD_11_TABLE +//------------------------------------------------------------------ +void (* mVU_UPPER_FD_11_TABLE00 [32])() = { + mVU_ADDAw<0,0> , mVU_SUBAw<0,0> , mVU_MADDAw<0,0> , mVU_MSUBAw<0,0>, + mVU_ITOF15<0,0> , mVU_FTOI15<0,0> , mVU_MULAw<0,0> , mVU_CLIP<0,0>, + mVU_MADDAi<0,0> , mVU_MSUBAi<0,0> , mVUunknown<0,0> , mVU_NOP<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, + mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0> , mVUunknown<0,0>, +}; + +void (* mVU_UPPER_FD_11_TABLE01 [32])() = { + mVU_ADDAw<0,1> , mVU_SUBAw<0,1> , mVU_MADDAw<0,1> , mVU_MSUBAw<0,1>, + mVU_ITOF15<0,1> , mVU_FTOI15<0,1> , mVU_MULAw<0,1> , mVU_CLIP<0,1>, + mVU_MADDAi<0,1> , mVU_MSUBAi<0,1> , mVUunknown<0,1> , mVU_NOP<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, + mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1> , mVUunknown<0,1>, +}; + +void (* mVU_UPPER_FD_11_TABLE10 [32])() = { + mVU_ADDAw<1,0> , mVU_SUBAw<1,0> , mVU_MADDAw<1,0> , mVU_MSUBAw<1,0>, + mVU_ITOF15<1,0> , mVU_FTOI15<1,0> , mVU_MULAw<1,0> , mVU_CLIP<1,0>, + mVU_MADDAi<1,0> , mVU_MSUBAi<1,0> , mVUunknown<1,0> , mVU_NOP<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, + mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0> , mVUunknown<1,0>, +}; + +void (* mVU_UPPER_FD_11_TABLE11 [32])() = { + mVU_ADDAw<1,1> , mVU_SUBAw<1,1> , mVU_MADDAw<1,1> , mVU_MSUBAw<1,1>, + mVU_ITOF15<1,1> , mVU_FTOI15<1,1> , mVU_MULAw<1,1> , mVU_CLIP<1,1>, + mVU_MADDAi<1,1> , mVU_MSUBAi<1,1> , mVUunknown<1,1> , mVU_NOP<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, + mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1> , mVUunknown<1,1>, +}; +//------------------------------------------------------------------ + +//------------------------------------------------------------------ +// Table Functions +//------------------------------------------------------------------ +#define doTableStuff(tableName, args) { \ + if (recPass) { \ + if (vuIndex) tableName##11[ args ](); \ + else tableName##01[ args ](); \ + } \ + else { \ + if (vuIndex) tableName##10[ args ](); \ + else tableName##00[ args ](); \ + } \ } -#endif +microVUf(void) mVU_UPPER_FD_00() { doTableStuff(mVU_UPPER_FD_00_TABLE, ((mVUgetCode >> 6) & 0x1f)); } +microVUf(void) mVU_UPPER_FD_01() { doTableStuff(mVU_UPPER_FD_01_TABLE, ((mVUgetCode >> 6) & 0x1f)); } +microVUf(void) mVU_UPPER_FD_10() { doTableStuff(mVU_UPPER_FD_10_TABLE, ((mVUgetCode >> 6) & 0x1f)); } +microVUf(void) mVU_UPPER_FD_11() { doTableStuff(mVU_UPPER_FD_11_TABLE, ((mVUgetCode >> 6) & 0x1f)); } +microVUf(void) mVULowerOP() { doTableStuff(mVULowerOP_OPCODE, (mVUgetCode & 0x3f)); } +microVUf(void) mVULowerOP_T3_00() { doTableStuff(mVULowerOP_T3_00_OPCODE, ((mVUgetCode >> 6) & 0x1f)); } +microVUf(void) mVULowerOP_T3_01() { doTableStuff(mVULowerOP_T3_01_OPCODE, ((mVUgetCode >> 6) & 0x1f)); } +microVUf(void) mVULowerOP_T3_10() { doTableStuff(mVULowerOP_T3_10_OPCODE, ((mVUgetCode >> 6) & 0x1f)); } +microVUf(void) mVULowerOP_T3_11() { doTableStuff(mVULowerOP_T3_11_OPCODE, ((mVUgetCode >> 6) & 0x1f)); } +microVUf(void) mVUunknown() { SysPrintf("mVUunknown<%d,%d> : Unknown Micro VU opcode called\n", vuIndex, recPass); } +#endif //PCSX2_MICROVU diff --git a/pcsx2/x86/microVU_Tables.h b/pcsx2/x86/microVU_Tables.h index 1b36bab504..8071a30768 100644 --- a/pcsx2/x86/microVU_Tables.h +++ b/pcsx2/x86/microVU_Tables.h @@ -18,178 +18,180 @@ #pragma once +#define microVUf(aType) template aType + //------------------------------------------------------------------ // Micro VU Micromode Upper instructions //------------------------------------------------------------------ -void mVU_ABS(VURegs *vuRegs, int info); -void mVU_ADD(VURegs *vuRegs, int info); -void mVU_ADDi(VURegs *vuRegs, int info); -void mVU_ADDq(VURegs *vuRegs, int info); -void mVU_ADDx(VURegs *vuRegs, int info); -void mVU_ADDy(VURegs *vuRegs, int info); -void mVU_ADDz(VURegs *vuRegs, int info); -void mVU_ADDw(VURegs *vuRegs, int info); -void mVU_ADDA(VURegs *vuRegs, int info); -void mVU_ADDAi(VURegs *vuRegs, int info); -void mVU_ADDAq(VURegs *vuRegs, int info); -void mVU_ADDAx(VURegs *vuRegs, int info); -void mVU_ADDAy(VURegs *vuRegs, int info); -void mVU_ADDAz(VURegs *vuRegs, int info); -void mVU_ADDAw(VURegs *vuRegs, int info); -void mVU_SUB(VURegs *vuRegs, int info); -void mVU_SUBi(VURegs *vuRegs, int info); -void mVU_SUBq(VURegs *vuRegs, int info); -void mVU_SUBx(VURegs *vuRegs, int info); -void mVU_SUBy(VURegs *vuRegs, int info); -void mVU_SUBz(VURegs *vuRegs, int info); -void mVU_SUBw(VURegs *vuRegs, int info); -void mVU_SUBA(VURegs *vuRegs, int info); -void mVU_SUBAi(VURegs *vuRegs, int info); -void mVU_SUBAq(VURegs *vuRegs, int info); -void mVU_SUBAx(VURegs *vuRegs, int info); -void mVU_SUBAy(VURegs *vuRegs, int info); -void mVU_SUBAz(VURegs *vuRegs, int info); -void mVU_SUBAw(VURegs *vuRegs, int info); -void mVU_MUL(VURegs *vuRegs, int info); -void mVU_MULi(VURegs *vuRegs, int info); -void mVU_MULq(VURegs *vuRegs, int info); -void mVU_MULx(VURegs *vuRegs, int info); -void mVU_MULy(VURegs *vuRegs, int info); -void mVU_MULz(VURegs *vuRegs, int info); -void mVU_MULw(VURegs *vuRegs, int info); -void mVU_MULA(VURegs *vuRegs, int info); -void mVU_MULAi(VURegs *vuRegs, int info); -void mVU_MULAq(VURegs *vuRegs, int info); -void mVU_MULAx(VURegs *vuRegs, int info); -void mVU_MULAy(VURegs *vuRegs, int info); -void mVU_MULAz(VURegs *vuRegs, int info); -void mVU_MULAw(VURegs *vuRegs, int info); -void mVU_MADD(VURegs *vuRegs, int info); -void mVU_MADDi(VURegs *vuRegs, int info); -void mVU_MADDq(VURegs *vuRegs, int info); -void mVU_MADDx(VURegs *vuRegs, int info); -void mVU_MADDy(VURegs *vuRegs, int info); -void mVU_MADDz(VURegs *vuRegs, int info); -void mVU_MADDw(VURegs *vuRegs, int info); -void mVU_MADDA(VURegs *vuRegs, int info); -void mVU_MADDAi(VURegs *vuRegs, int info); -void mVU_MADDAq(VURegs *vuRegs, int info); -void mVU_MADDAx(VURegs *vuRegs, int info); -void mVU_MADDAy(VURegs *vuRegs, int info); -void mVU_MADDAz(VURegs *vuRegs, int info); -void mVU_MADDAw(VURegs *vuRegs, int info); -void mVU_MSUB(VURegs *vuRegs, int info); -void mVU_MSUBi(VURegs *vuRegs, int info); -void mVU_MSUBq(VURegs *vuRegs, int info); -void mVU_MSUBx(VURegs *vuRegs, int info); -void mVU_MSUBy(VURegs *vuRegs, int info); -void mVU_MSUBz(VURegs *vuRegs, int info); -void mVU_MSUBw(VURegs *vuRegs, int info); -void mVU_MSUBA(VURegs *vuRegs, int info); -void mVU_MSUBAi(VURegs *vuRegs, int info); -void mVU_MSUBAq(VURegs *vuRegs, int info); -void mVU_MSUBAx(VURegs *vuRegs, int info); -void mVU_MSUBAy(VURegs *vuRegs, int info); -void mVU_MSUBAz(VURegs *vuRegs, int info); -void mVU_MSUBAw(VURegs *vuRegs, int info); -void mVU_MAX(VURegs *vuRegs, int info); -void mVU_MAXi(VURegs *vuRegs, int info); -void mVU_MAXx(VURegs *vuRegs, int info); -void mVU_MAXy(VURegs *vuRegs, int info); -void mVU_MAXz(VURegs *vuRegs, int info); -void mVU_MAXw(VURegs *vuRegs, int info); -void mVU_MINI(VURegs *vuRegs, int info); -void mVU_MINIi(VURegs *vuRegs, int info); -void mVU_MINIx(VURegs *vuRegs, int info); -void mVU_MINIy(VURegs *vuRegs, int info); -void mVU_MINIz(VURegs *vuRegs, int info); -void mVU_MINIw(VURegs *vuRegs, int info); -void mVU_OPMULA(VURegs *vuRegs, int info); -void mVU_OPMSUB(VURegs *vuRegs, int info); -void mVU_NOP(VURegs *vuRegs, int info); -void mVU_FTOI0(VURegs *vuRegs, int info); -void mVU_FTOI4(VURegs *vuRegs, int info); -void mVU_FTOI12(VURegs *vuRegs, int info); -void mVU_FTOI15(VURegs *vuRegs, int info); -void mVU_ITOF0(VURegs *vuRegs, int info); -void mVU_ITOF4(VURegs *vuRegs, int info); -void mVU_ITOF12(VURegs *vuRegs, int info); -void mVU_ITOF15(VURegs *vuRegs, int info); -void mVU_CLIP(VURegs *vuRegs, int info); +microVUf(void) mVU_ABS(); +microVUf(void) mVU_ADD(); +microVUf(void) mVU_ADDi(); +microVUf(void) mVU_ADDq(); +microVUf(void) mVU_ADDx(); +microVUf(void) mVU_ADDy(); +microVUf(void) mVU_ADDz(); +microVUf(void) mVU_ADDw(); +microVUf(void) mVU_ADDA(); +microVUf(void) mVU_ADDAi(); +microVUf(void) mVU_ADDAq(); +microVUf(void) mVU_ADDAx(); +microVUf(void) mVU_ADDAy(); +microVUf(void) mVU_ADDAz(); +microVUf(void) mVU_ADDAw(); +microVUf(void) mVU_SUB(); +microVUf(void) mVU_SUBi(); +microVUf(void) mVU_SUBq(); +microVUf(void) mVU_SUBx(); +microVUf(void) mVU_SUBy(); +microVUf(void) mVU_SUBz(); +microVUf(void) mVU_SUBw(); +microVUf(void) mVU_SUBA(); +microVUf(void) mVU_SUBAi(); +microVUf(void) mVU_SUBAq(); +microVUf(void) mVU_SUBAx(); +microVUf(void) mVU_SUBAy(); +microVUf(void) mVU_SUBAz(); +microVUf(void) mVU_SUBAw(); +microVUf(void) mVU_MUL(); +microVUf(void) mVU_MULi(); +microVUf(void) mVU_MULq(); +microVUf(void) mVU_MULx(); +microVUf(void) mVU_MULy(); +microVUf(void) mVU_MULz(); +microVUf(void) mVU_MULw(); +microVUf(void) mVU_MULA(); +microVUf(void) mVU_MULAi(); +microVUf(void) mVU_MULAq(); +microVUf(void) mVU_MULAx(); +microVUf(void) mVU_MULAy(); +microVUf(void) mVU_MULAz(); +microVUf(void) mVU_MULAw(); +microVUf(void) mVU_MADD(); +microVUf(void) mVU_MADDi(); +microVUf(void) mVU_MADDq(); +microVUf(void) mVU_MADDx(); +microVUf(void) mVU_MADDy(); +microVUf(void) mVU_MADDz(); +microVUf(void) mVU_MADDw(); +microVUf(void) mVU_MADDA(); +microVUf(void) mVU_MADDAi(); +microVUf(void) mVU_MADDAq(); +microVUf(void) mVU_MADDAx(); +microVUf(void) mVU_MADDAy(); +microVUf(void) mVU_MADDAz(); +microVUf(void) mVU_MADDAw(); +microVUf(void) mVU_MSUB(); +microVUf(void) mVU_MSUBi(); +microVUf(void) mVU_MSUBq(); +microVUf(void) mVU_MSUBx(); +microVUf(void) mVU_MSUBy(); +microVUf(void) mVU_MSUBz(); +microVUf(void) mVU_MSUBw(); +microVUf(void) mVU_MSUBA(); +microVUf(void) mVU_MSUBAi(); +microVUf(void) mVU_MSUBAq(); +microVUf(void) mVU_MSUBAx(); +microVUf(void) mVU_MSUBAy(); +microVUf(void) mVU_MSUBAz(); +microVUf(void) mVU_MSUBAw(); +microVUf(void) mVU_MAX(); +microVUf(void) mVU_MAXi(); +microVUf(void) mVU_MAXx(); +microVUf(void) mVU_MAXy(); +microVUf(void) mVU_MAXz(); +microVUf(void) mVU_MAXw(); +microVUf(void) mVU_MINI(); +microVUf(void) mVU_MINIi(); +microVUf(void) mVU_MINIx(); +microVUf(void) mVU_MINIy(); +microVUf(void) mVU_MINIz(); +microVUf(void) mVU_MINIw(); +microVUf(void) mVU_OPMULA(); +microVUf(void) mVU_OPMSUB(); +microVUf(void) mVU_NOP(); +microVUf(void) mVU_FTOI0(); +microVUf(void) mVU_FTOI4(); +microVUf(void) mVU_FTOI12(); +microVUf(void) mVU_FTOI15(); +microVUf(void) mVU_ITOF0(); +microVUf(void) mVU_ITOF4(); +microVUf(void) mVU_ITOF12(); +microVUf(void) mVU_ITOF15(); +microVUf(void) mVU_CLIP(); //------------------------------------------------------------------ // Micro VU Micromode Lower instructions //------------------------------------------------------------------ -void mVU_DIV(VURegs *vuRegs, int info); -void mVU_SQRT(VURegs *vuRegs, int info); -void mVU_RSQRT(VURegs *vuRegs, int info); -void mVU_IADD(VURegs *vuRegs, int info); -void mVU_IADDI(VURegs *vuRegs, int info); -void mVU_IADDIU(VURegs *vuRegs, int info); -void mVU_IAND(VURegs *vuRegs, int info); -void mVU_IOR(VURegs *vuRegs, int info); -void mVU_ISUB(VURegs *vuRegs, int info); -void mVU_ISUBIU(VURegs *vuRegs, int info); -void mVU_MOVE(VURegs *vuRegs, int info); -void mVU_MFIR(VURegs *vuRegs, int info); -void mVU_MTIR(VURegs *vuRegs, int info); -void mVU_MR32(VURegs *vuRegs, int info); -void mVU_LQ(VURegs *vuRegs, int info); -void mVU_LQD(VURegs *vuRegs, int info); -void mVU_LQI(VURegs *vuRegs, int info); -void mVU_SQ(VURegs *vuRegs, int info); -void mVU_SQD(VURegs *vuRegs, int info); -void mVU_SQI(VURegs *vuRegs, int info); -void mVU_ILW(VURegs *vuRegs, int info); -void mVU_ISW(VURegs *vuRegs, int info); -void mVU_ILWR(VURegs *vuRegs, int info); -void mVU_ISWR(VURegs *vuRegs, int info); -void mVU_LOI(VURegs *vuRegs, int info); -void mVU_RINIT(VURegs *vuRegs, int info); -void mVU_RGET(VURegs *vuRegs, int info); -void mVU_RNEXT(VURegs *vuRegs, int info); -void mVU_RXOR(VURegs *vuRegs, int info); -void mVU_WAITQ(VURegs *vuRegs, int info); -void mVU_FSAND(VURegs *vuRegs, int info); -void mVU_FSEQ(VURegs *vuRegs, int info); -void mVU_FSOR(VURegs *vuRegs, int info); -void mVU_FSSET(VURegs *vuRegs, int info); -void mVU_FMAND(VURegs *vuRegs, int info); -void mVU_FMEQ(VURegs *vuRegs, int info); -void mVU_FMOR(VURegs *vuRegs, int info); -void mVU_FCAND(VURegs *vuRegs, int info); -void mVU_FCEQ(VURegs *vuRegs, int info); -void mVU_FCOR(VURegs *vuRegs, int info); -void mVU_FCSET(VURegs *vuRegs, int info); -void mVU_FCGET(VURegs *vuRegs, int info); -void mVU_IBEQ(VURegs *vuRegs, int info); -void mVU_IBGEZ(VURegs *vuRegs, int info); -void mVU_IBGTZ(VURegs *vuRegs, int info); -void mVU_IBLTZ(VURegs *vuRegs, int info); -void mVU_IBLEZ(VURegs *vuRegs, int info); -void mVU_IBNE(VURegs *vuRegs, int info); -void mVU_B(VURegs *vuRegs, int info); -void mVU_BAL(VURegs *vuRegs, int info); -void mVU_JR(VURegs *vuRegs, int info); -void mVU_JALR(VURegs *vuRegs, int info); -void mVU_MFP(VURegs *vuRegs, int info); -void mVU_WAITP(VURegs *vuRegs, int info); -void mVU_ESADD(VURegs *vuRegs, int info); -void mVU_ERSADD(VURegs *vuRegs, int info); -void mVU_ELENG(VURegs *vuRegs, int info); -void mVU_ERLENG(VURegs *vuRegs, int info); -void mVU_EATANxy(VURegs *vuRegs, int info); -void mVU_EATANxz(VURegs *vuRegs, int info); -void mVU_ESUM(VURegs *vuRegs, int info); -void mVU_ERCPR(VURegs *vuRegs, int info); -void mVU_ESQRT(VURegs *vuRegs, int info); -void mVU_ERSQRT(VURegs *vuRegs, int info); -void mVU_ESIN(VURegs *vuRegs, int info); -void mVU_EATAN(VURegs *vuRegs, int info); -void mVU_EEXP(VURegs *vuRegs, int info); -void mVU_XGKICK(VURegs *vuRegs, int info); -void mVU_XTOP(VURegs *vuRegs, int info); -void mVU_XITOP(VURegs *vuRegs, int info); -void mVU_XTOP( VURegs *VU , int info); +microVUf(void) mVU_DIV(); +microVUf(void) mVU_SQRT(); +microVUf(void) mVU_RSQRT(); +microVUf(void) mVU_IADD(); +microVUf(void) mVU_IADDI(); +microVUf(void) mVU_IADDIU(); +microVUf(void) mVU_IAND(); +microVUf(void) mVU_IOR(); +microVUf(void) mVU_ISUB(); +microVUf(void) mVU_ISUBIU(); +microVUf(void) mVU_MOVE(); +microVUf(void) mVU_MFIR(); +microVUf(void) mVU_MTIR(); +microVUf(void) mVU_MR32(); +microVUf(void) mVU_LQ(); +microVUf(void) mVU_LQD(); +microVUf(void) mVU_LQI(); +microVUf(void) mVU_SQ(); +microVUf(void) mVU_SQD(); +microVUf(void) mVU_SQI(); +microVUf(void) mVU_ILW(); +microVUf(void) mVU_ISW(); +microVUf(void) mVU_ILWR(); +microVUf(void) mVU_ISWR(); +microVUf(void) mVU_LOI(); +microVUf(void) mVU_RINIT(); +microVUf(void) mVU_RGET(); +microVUf(void) mVU_RNEXT(); +microVUf(void) mVU_RXOR(); +microVUf(void) mVU_WAITQ(); +microVUf(void) mVU_FSAND(); +microVUf(void) mVU_FSEQ(); +microVUf(void) mVU_FSOR(); +microVUf(void) mVU_FSSET(); +microVUf(void) mVU_FMAND(); +microVUf(void) mVU_FMEQ(); +microVUf(void) mVU_FMOR(); +microVUf(void) mVU_FCAND(); +microVUf(void) mVU_FCEQ(); +microVUf(void) mVU_FCOR(); +microVUf(void) mVU_FCSET(); +microVUf(void) mVU_FCGET(); +microVUf(void) mVU_IBEQ(); +microVUf(void) mVU_IBGEZ(); +microVUf(void) mVU_IBGTZ(); +microVUf(void) mVU_IBLTZ(); +microVUf(void) mVU_IBLEZ(); +microVUf(void) mVU_IBNE(); +microVUf(void) mVU_B(); +microVUf(void) mVU_BAL(); +microVUf(void) mVU_JR(); +microVUf(void) mVU_JALR(); +microVUf(void) mVU_MFP(); +microVUf(void) mVU_WAITP(); +microVUf(void) mVU_ESADD(); +microVUf(void) mVU_ERSADD(); +microVUf(void) mVU_ELENG(); +microVUf(void) mVU_ERLENG(); +microVUf(void) mVU_EATANxy(); +microVUf(void) mVU_EATANxz(); +microVUf(void) mVU_ESUM(); +microVUf(void) mVU_ERCPR(); +microVUf(void) mVU_ESQRT(); +microVUf(void) mVU_ERSQRT(); +microVUf(void) mVU_ESIN(); +microVUf(void) mVU_EATAN(); +microVUf(void) mVU_EEXP(); +microVUf(void) mVU_XGKICK(); +microVUf(void) mVU_XTOP(); +microVUf(void) mVU_XITOP(); + diff --git a/pcsx2/x86/microVU_Upper.cpp b/pcsx2/x86/microVU_Upper.cpp index addd54b008..1c71a6374a 100644 --- a/pcsx2/x86/microVU_Upper.cpp +++ b/pcsx2/x86/microVU_Upper.cpp @@ -15,8 +15,10 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA */ - +#pragma once #include "PrecompiledHeader.h" +#include "microVU.h" +#ifdef PCSX2_MICROVU /* Cotton's Notes on how things will work (*experimental*, subject to change if I get different ideas): @@ -68,4 +70,105 @@ The biggest problem I think I'll have is xgkick opcode having variable timing/st Other Notes: These notes are mostly to help me (cottonvibes) remember good ideas and to help confused devs to have an idea of how things work. Right now its all theoretical and I'll change things once implemented ;p -*/ \ No newline at end of file +*/ + +//------------------------------------------------------------------ +// Micro VU Micromode Upper instructions +//------------------------------------------------------------------ + +microVUf(void) mVU_ABS(){} +microVUf(void) mVU_ADD(){} +microVUf(void) mVU_ADDi(){} +microVUf(void) mVU_ADDq(){} +microVUf(void) mVU_ADDx(){} +microVUf(void) mVU_ADDy(){} +microVUf(void) mVU_ADDz(){} +microVUf(void) mVU_ADDw(){} +microVUf(void) mVU_ADDA(){} +microVUf(void) mVU_ADDAi(){} +microVUf(void) mVU_ADDAq(){} +microVUf(void) mVU_ADDAx(){} +microVUf(void) mVU_ADDAy(){} +microVUf(void) mVU_ADDAz(){} +microVUf(void) mVU_ADDAw(){} +microVUf(void) mVU_SUB(){} +microVUf(void) mVU_SUBi(){} +microVUf(void) mVU_SUBq(){} +microVUf(void) mVU_SUBx(){} +microVUf(void) mVU_SUBy(){} +microVUf(void) mVU_SUBz(){} +microVUf(void) mVU_SUBw(){} +microVUf(void) mVU_SUBA(){} +microVUf(void) mVU_SUBAi(){} +microVUf(void) mVU_SUBAq(){} +microVUf(void) mVU_SUBAx(){} +microVUf(void) mVU_SUBAy(){} +microVUf(void) mVU_SUBAz(){} +microVUf(void) mVU_SUBAw(){} +microVUf(void) mVU_MUL(){} +microVUf(void) mVU_MULi(){} +microVUf(void) mVU_MULq(){} +microVUf(void) mVU_MULx(){} +microVUf(void) mVU_MULy(){} +microVUf(void) mVU_MULz(){} +microVUf(void) mVU_MULw(){} +microVUf(void) mVU_MULA(){} +microVUf(void) mVU_MULAi(){} +microVUf(void) mVU_MULAq(){} +microVUf(void) mVU_MULAx(){} +microVUf(void) mVU_MULAy(){} +microVUf(void) mVU_MULAz(){} +microVUf(void) mVU_MULAw(){} +microVUf(void) mVU_MADD(){} +microVUf(void) mVU_MADDi(){} +microVUf(void) mVU_MADDq(){} +microVUf(void) mVU_MADDx(){} +microVUf(void) mVU_MADDy(){} +microVUf(void) mVU_MADDz(){} +microVUf(void) mVU_MADDw(){} +microVUf(void) mVU_MADDA(){} +microVUf(void) mVU_MADDAi(){} +microVUf(void) mVU_MADDAq(){} +microVUf(void) mVU_MADDAx(){} +microVUf(void) mVU_MADDAy(){} +microVUf(void) mVU_MADDAz(){} +microVUf(void) mVU_MADDAw(){} +microVUf(void) mVU_MSUB(){} +microVUf(void) mVU_MSUBi(){} +microVUf(void) mVU_MSUBq(){} +microVUf(void) mVU_MSUBx(){} +microVUf(void) mVU_MSUBy(){} +microVUf(void) mVU_MSUBz(){} +microVUf(void) mVU_MSUBw(){} +microVUf(void) mVU_MSUBA(){} +microVUf(void) mVU_MSUBAi(){} +microVUf(void) mVU_MSUBAq(){} +microVUf(void) mVU_MSUBAx(){} +microVUf(void) mVU_MSUBAy(){} +microVUf(void) mVU_MSUBAz(){} +microVUf(void) mVU_MSUBAw(){} +microVUf(void) mVU_MAX(){} +microVUf(void) mVU_MAXi(){} +microVUf(void) mVU_MAXx(){} +microVUf(void) mVU_MAXy(){} +microVUf(void) mVU_MAXz(){} +microVUf(void) mVU_MAXw(){} +microVUf(void) mVU_MINI(){} +microVUf(void) mVU_MINIi(){} +microVUf(void) mVU_MINIx(){} +microVUf(void) mVU_MINIy(){} +microVUf(void) mVU_MINIz(){} +microVUf(void) mVU_MINIw(){} +microVUf(void) mVU_OPMULA(){} +microVUf(void) mVU_OPMSUB(){} +microVUf(void) mVU_NOP(){} +microVUf(void) mVU_FTOI0(){} +microVUf(void) mVU_FTOI4(){} +microVUf(void) mVU_FTOI12(){} +microVUf(void) mVU_FTOI15(){} +microVUf(void) mVU_ITOF0(){} +microVUf(void) mVU_ITOF4(){} +microVUf(void) mVU_ITOF12(){} +microVUf(void) mVU_ITOF15(){} +microVUf(void) mVU_CLIP(){} +#endif //PCSX2_MICROVU