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EE: replace _checkMMXreg and _allocCheckGPRtoMMX 

Both functions return -1

Remove all conditions (-1 >= 0)
This commit is contained in:
Gregory Hainaut 2016-02-07 12:46:34 +01:00
parent e1651c752a
commit c3afcffc50
10 changed files with 80 additions and 338 deletions
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31
pcsx2/x86/iCore.cpp
View File

@ -373,8 +373,6 @@ int _allocGPRtoXMMreg(int xmmreg, int gprreg, int mode)
if (xmmregs[i].type != XMMTYPE_GPRREG) continue;
if (xmmregs[i].reg != gprreg) continue;
pxAssert( _checkMMXreg(MMX_GPR|gprreg, mode) == -1 );
g_xmmtypes[i] = XMMT_INT;
if (!(xmmregs[i].mode & MODE_READ) && (mode & MODE_READ))
@ -432,36 +430,9 @@ int _allocGPRtoXMMreg(int xmmreg, int gprreg, int mode)
else
{
// DOX86
int mmxreg;
if (mode & MODE_READ) _flushConstReg(gprreg);
mmxreg = _checkMMXreg(MMX_GPR+gprreg, 0);
if (mmxreg >= 0 )
{
// transfer
SetMMXstate();
xMOVQ(xRegisterSSE(xmmreg), xRegisterMMX(mmxreg));
xPUNPCK.LQDQ(xRegisterSSE(xmmreg), xRegisterSSE(xmmreg));
xPUNPCK.HQDQ(xRegisterSSE(xmmreg), ptr[&cpuRegs.GPR.r[gprreg].UL[0]]);
if (mmxregs[mmxreg].mode & MODE_WRITE )
{
// instead of setting to write, just flush to mem
if (!(mode & MODE_WRITE))
{
SetMMXstate();
xMOVQ(ptr[&cpuRegs.GPR.r[gprreg].UL[0]], xRegisterMMX(mmxreg));
}
//xmmregs[xmmreg].mode |= MODE_WRITE;
}
// don't flush
mmxregs[mmxreg].inuse = 0;
}
else
xMOVDQA(xRegisterSSE(xmmreg), ptr[&cpuRegs.GPR.r[gprreg].UL[0]]);
xMOVDQA(xRegisterSSE(xmmreg), ptr[&cpuRegs.GPR.r[gprreg].UL[0]]);
}
}
else

3
pcsx2/x86/iCore.h
View File

@ -312,7 +312,6 @@ struct _mmxregs {
};
void _initMMXregs();
int _checkMMXreg(int reg, int mode);
void _clearNeededMMXregs();
void _deleteMMXreg(int reg, int flush);
void _freeMMXreg(u32 mmxreg);
@ -321,8 +320,6 @@ u8 _hasFreeMMXreg();
void _freeMMXregs();
int _getNumMMXwrite();
int _allocCheckGPRtoMMX(EEINST* pinst, int reg, int mode);
// returns new index of reg, lower 32 bits already in mmx
// shift is used when the data is in the top bits of the mmx reg to begin with
// a negative shift is for sign extension

95
pcsx2/x86/iFPU.cpp
View File

@ -156,21 +156,11 @@ void recCTC1()
else
{
mmreg = _checkMMXreg(MMX_GPR+_Rt_, MODE_READ);
_deleteGPRtoXMMreg(_Rt_, 1);
_deleteMMXreg(MMX_GPR+_Rt_, 1);
if ( mmreg >= 0 )
{
xMOVD(ptr[&fpuRegs.fprc[ _Fs_ ]], xRegisterMMX(mmreg));
SetMMXstate();
}
else
{
_deleteGPRtoXMMreg(_Rt_, 1);
_deleteMMXreg(MMX_GPR+_Rt_, 1);
xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ]);
xMOV(ptr[&fpuRegs.fprc[ _Fs_ ]], eax);
}
xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ]);
xMOV(ptr[&fpuRegs.fprc[ _Fs_ ]], eax);
}
}
}
@ -194,49 +184,27 @@ void recMFC1()
if( regs >= 0 )
{
_deleteGPRtoXMMreg(_Rt_, 2);
regt = _allocCheckGPRtoMMX(g_pCurInstInfo, _Rt_, MODE_WRITE);
if( regt >= 0 )
{
xMOVQ(xRegisterMMX(regt), xRegisterSSE(regs));
_signExtendGPRtoMMX(regt, _Rt_, 0);
}
else
{
_signExtendXMMtoM((uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], regs, 0);
}
_signExtendXMMtoM((uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], regs, 0);
}
else
{
regs = _checkMMXreg(MMX_FPU+_Fs_, MODE_READ);
regt = _checkXMMreg(XMMTYPE_GPRREG, _Rt_, MODE_READ);
if( regs >= 0 )
if( regt >= 0 )
{
// convert to mmx reg
mmxregs[regs].reg = MMX_GPR+_Rt_;
mmxregs[regs].mode |= MODE_READ|MODE_WRITE;
_signExtendGPRtoMMX(regs, _Rt_, 0);
}
else
{
regt = _checkXMMreg(XMMTYPE_GPRREG, _Rt_, MODE_READ);
if( regt >= 0 )
if( xmmregs[regt].mode & MODE_WRITE )
{
if( xmmregs[regt].mode & MODE_WRITE )
{
xMOVH.PS(ptr[&cpuRegs.GPR.r[_Rt_].UL[2]], xRegisterSSE(regt));
}
xmmregs[regt].inuse = 0;
xMOVH.PS(ptr[&cpuRegs.GPR.r[_Rt_].UL[2]], xRegisterSSE(regt));
}
_deleteEEreg(_Rt_, 0);
xMOV(eax, ptr[&fpuRegs.fpr[ _Fs_ ].UL ]);
xCDQ( );
xMOV(ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]], eax);
xMOV(ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ]], edx);
xmmregs[regt].inuse = 0;
}
_deleteEEreg(_Rt_, 0);
xMOV(eax, ptr[&fpuRegs.fpr[ _Fs_ ].UL ]);
xCDQ( );
xMOV(ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]], eax);
xMOV(ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ]], edx);
}
}
@ -279,35 +247,16 @@ void recMTC1()
}
else
{
int mmreg2;
int mmreg2 = _allocCheckFPUtoXMM(g_pCurInstInfo, _Fs_, MODE_WRITE);
mmreg = _checkMMXreg(MMX_GPR+_Rt_, MODE_READ);
mmreg2 = _allocCheckFPUtoXMM(g_pCurInstInfo, _Fs_, MODE_WRITE);
if( mmreg >= 0 )
if( mmreg2 >= 0 )
{
if( mmreg2 >= 0 )
{
SetMMXstate();
xMOVQ(xRegisterSSE(mmreg2), xRegisterMMX(mmreg));
}
else
{
SetMMXstate();
xMOVD(ptr[&fpuRegs.fpr[ _Fs_ ].UL], xRegisterMMX(mmreg));
}
xMOVSSZX(xRegisterSSE(mmreg2), ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]]);
}
else
{
if( mmreg2 >= 0 )
{
xMOVSSZX(xRegisterSSE(mmreg2), ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]]);
}
else
{
xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]]);
xMOV(ptr[&fpuRegs.fpr[ _Fs_ ].UL], eax);
}
xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]]);
xMOV(ptr[&fpuRegs.fpr[ _Fs_ ].UL], eax);
}
}
}

20
pcsx2/x86/iMMI.cpp
View File

@ -57,7 +57,6 @@ REC_FUNC_DEL( PSLLW, _Rd_ );
void recPLZCW()
{
bool isXMMreg = false;
int regs = -1;
if ( ! _Rd_ ) return;
@ -80,11 +79,6 @@ void recPLZCW()
if( (regs = _checkXMMreg(XMMTYPE_GPRREG, _Rs_, MODE_READ)) >= 0 ) {
xMOVD(eax, xRegisterSSE(regs));
isXMMreg = true;
}
else if( (regs = _checkMMXreg(MMX_GPR+_Rs_, MODE_READ)) >= 0 ) {
xMOVD(eax, xRegisterMMX(regs));
SetMMXstate();
}
else {
xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]]);
@ -119,17 +113,9 @@ void recPLZCW()
// second word
if( regs >= 0) {
// Check if it was an XMM reg or MMX reg
if (isXMMreg) {
xPSHUF.D(xRegisterSSE(regs&0xf), xRegisterSSE(regs&0xf), 0xe1);
xMOVD(eax, xRegisterSSE(regs&0xf));
xPSHUF.D(xRegisterSSE(regs&0xf), xRegisterSSE(regs&0xf), 0xe1);
} else {
xPSHUF.W(xRegisterMMX(regs&0xf), xRegisterMMX(regs&0xf), 0x4e);
xMOVD(eax, xRegisterMMX(regs&0xf));
xPSHUF.W(xRegisterMMX(regs&0xf), xRegisterMMX(regs&0xf), 0x4e);
SetMMXstate();
}
xPSHUF.D(xRegisterSSE(regs&0xf), xRegisterSSE(regs&0xf), 0xe1);
xMOVD(eax, xRegisterSSE(regs&0xf));
xPSHUF.D(xRegisterSSE(regs&0xf), xRegisterSSE(regs&0xf), 0xe1);
}
else {
xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]]);

8
pcsx2/x86/iR5900Misc.cpp
View File

@ -98,10 +98,6 @@ void recMFSA()
if( mmreg >= 0 ) {
xMOVL.PS(xRegisterSSE(mmreg), ptr[&cpuRegs.sa]);
}
else if( (mmreg = _checkMMXreg(MMX_GPR+_Rd_, MODE_WRITE)) >= 0 ) {
xMOVDZX(xRegisterMMX(mmreg), ptr[&cpuRegs.sa]);
SetMMXstate();
}
else {
xMOV(eax, ptr[&cpuRegs.sa]);
_deleteEEreg(_Rd_, 0);
@ -122,10 +118,6 @@ void recMTSA()
if( (mmreg = _checkXMMreg(XMMTYPE_GPRREG, _Rs_, MODE_READ)) >= 0 ) {
xMOVSS(ptr[&cpuRegs.sa], xRegisterSSE(mmreg));
}
else if( (mmreg = _checkMMXreg(MMX_GPR+_Rs_, MODE_READ)) >= 0 ) {
xMOVD(ptr[&cpuRegs.sa], xRegisterMMX(mmreg));
SetMMXstate();
}
else {
xMOV(eax, ptr[&cpuRegs.GPR.r[_Rs_].UL[0]]);
xMOV(ptr[&cpuRegs.sa], eax);

10
pcsx2/x86/ix86-32/iCore-32.cpp
View File

@ -500,11 +500,6 @@ __fi void* _MMXGetAddr(int reg)
return NULL;
}
int _checkMMXreg(int reg, int mode)
{
return -1;
}
void _clearNeededMMXregs()
{
uint i;
@ -625,8 +620,3 @@ int _signExtendGPRtoMMX(x86MMXRegType to, u32 gprreg, int shift)
return -1;
}
int _allocCheckGPRtoMMX(EEINST* pinst, int reg, int mode)
{
return _checkMMXreg(MMX_GPR+reg, mode);
}

16
pcsx2/x86/ix86-32/iR5900-32.cpp
View File

@ -166,10 +166,6 @@ void _eeMoveGPRtoR(const xRegisterLong& to, int fromgpr)
if( (mmreg = _checkXMMreg(XMMTYPE_GPRREG, fromgpr, MODE_READ)) >= 0 && (xmmregs[mmreg].mode&MODE_WRITE)) {
xMOVD(to, xRegisterSSE(mmreg));
}
else if( (mmreg = _checkMMXreg(MMX_GPR+fromgpr, MODE_READ)) >= 0 && (mmxregs[mmreg].mode&MODE_WRITE) ) {
xMOVD(to, xRegisterMMX(mmreg));
SetMMXstate();
}
else {
xMOV(to, ptr[&cpuRegs.GPR.r[ fromgpr ].UL[ 0 ] ]);
}
@ -186,10 +182,6 @@ void _eeMoveGPRtoM(uptr to, int fromgpr)
if( (mmreg = _checkXMMreg(XMMTYPE_GPRREG, fromgpr, MODE_READ)) >= 0 ) {
xMOVSS(ptr[(void*)(to)], xRegisterSSE(mmreg));
}
else if( (mmreg = _checkMMXreg(MMX_GPR+fromgpr, MODE_READ)) >= 0 ) {
xMOVD(ptr[(void*)(to)], xRegisterMMX(mmreg));
SetMMXstate();
}
else {
xMOV(eax, ptr[&cpuRegs.GPR.r[ fromgpr ].UL[ 0 ] ]);
xMOV(ptr[(void*)(to)], eax);
@ -207,10 +199,6 @@ void _eeMoveGPRtoRm(x86IntRegType to, int fromgpr)
if( (mmreg = _checkXMMreg(XMMTYPE_GPRREG, fromgpr, MODE_READ)) >= 0 ) {
xMOVSS(ptr[xAddressReg(to)], xRegisterSSE(mmreg));
}
else if( (mmreg = _checkMMXreg(MMX_GPR+fromgpr, MODE_READ)) >= 0 ) {
xMOVD(ptr[xAddressReg(to)], xRegisterMMX(mmreg));
SetMMXstate();
}
else {
xMOV(eax, ptr[&cpuRegs.GPR.r[ fromgpr ].UL[ 0 ] ]);
xMOV(ptr[xAddressReg(to)], eax);
@ -868,10 +856,6 @@ void SetBranchReg( u32 reg )
// if( (mmreg = _checkXMMreg(XMMTYPE_GPRREG, reg, MODE_READ)) >= 0 ) {
// xMOVSS(ptr[&cpuRegs.pc], xRegisterSSE(mmreg));
// }
// else if( (mmreg = _checkMMXreg(MMX_GPR+reg, MODE_READ)) >= 0 ) {
// xMOVD(ptr[&cpuRegs.pc], xRegisterMMX(mmreg));
// SetMMXstate();
// }
// else {
// xMOV(eax, ptr[(void*)((int)&cpuRegs.GPR.r[ reg ].UL[ 0 ] )]);
// xMOV(ptr[&cpuRegs.pc], eax);

4
pcsx2/x86/ix86-32/iR5900Jump.cpp
View File

@ -121,10 +121,6 @@ void recJALR()
// if( (mmreg = _checkXMMreg(XMMTYPE_GPRREG, _Rs_, MODE_READ)) >= 0 ) {
// xMOVSS(ptr[&cpuRegs.pc], xRegisterSSE(mmreg));
// }
// else if( (mmreg = _checkMMXreg(MMX_GPR+_Rs_, MODE_READ)) >= 0 ) {
// xMOVD(ptr[&cpuRegs.pc], xRegisterMMX(mmreg));
// SetMMXstate();
// }
// else {
// xMOV(eax, ptr[(void*)((int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] )]);
// xMOV(ptr[&cpuRegs.pc], eax);

187
pcsx2/x86/ix86-32/iR5900Move.cpp
View File

@ -116,69 +116,21 @@ void recMFHILO(int hi)
}
}
else {
regd = _allocCheckGPRtoMMX(g_pCurInstInfo, _Rd_, MODE_WRITE);
if( regd >= 0 ) {
xMOVQ(xRegisterMMX(regd), xRegisterSSE(reghi));
}
else {
_deleteEEreg(_Rd_, 0);
xMOVQ(ptr[&cpuRegs.GPR.r[ _Rd_ ].UD[ 0 ]], xRegisterSSE(reghi));
}
_deleteEEreg(_Rd_, 0);
xMOVQ(ptr[&cpuRegs.GPR.r[ _Rd_ ].UD[ 0 ]], xRegisterSSE(reghi));
}
}
else {
reghi = _checkMMXreg(MMX_GPR+xmmhilo, MODE_READ);
if( reghi >= 0 ) {
if( regd >= 0 ) {
if( EEINST_ISLIVE2(_Rd_) ) {
if( xmmregs[regd].mode & MODE_WRITE ) {
xMOVH.PS(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 2 ]], xRegisterSSE(regd));
}
xmmregs[regd].inuse = 0;
xMOVQ(ptr[&cpuRegs.GPR.r[ _Rd_ ].UD[ 0 ]], xRegisterMMX(reghi));
}
else {
SetMMXstate();
xMOVQ(xRegisterSSE(regd), xRegisterMMX(reghi));
xmmregs[regd].mode |= MODE_WRITE;
}
}
else {
regd = _allocCheckGPRtoMMX(g_pCurInstInfo, _Rd_, MODE_WRITE);
SetMMXstate();
if( regd >= 0 ) {
xMOVQ(xRegisterMMX(regd), xRegisterMMX(reghi));
}
else {
_deleteEEreg(_Rd_, 0);
xMOVQ(ptr[&cpuRegs.GPR.r[ _Rd_ ].UD[ 0 ]], xRegisterMMX(reghi));
}
}
if( regd >= 0 ) {
if( EEINST_ISLIVE2(_Rd_) ) xMOVL.PS(xRegisterSSE(regd), ptr[(void*)(hi ? (uptr)&cpuRegs.HI.UD[ 0 ] : (uptr)&cpuRegs.LO.UD[ 0 ])]);
else xMOVQZX(xRegisterSSE(regd), ptr[(void*)(hi ? (uptr)&cpuRegs.HI.UD[ 0 ] : (uptr)&cpuRegs.LO.UD[ 0 ])]);
}
else {
if( regd >= 0 ) {
if( EEINST_ISLIVE2(_Rd_) ) xMOVL.PS(xRegisterSSE(regd), ptr[(void*)(hi ? (uptr)&cpuRegs.HI.UD[ 0 ] : (uptr)&cpuRegs.LO.UD[ 0 ])]);
else xMOVQZX(xRegisterSSE(regd), ptr[(void*)(hi ? (uptr)&cpuRegs.HI.UD[ 0 ] : (uptr)&cpuRegs.LO.UD[ 0 ])]);
}
else {
regd = _allocCheckGPRtoMMX(g_pCurInstInfo, _Rd_, MODE_WRITE);
if( regd >= 0 ) {
SetMMXstate();
xMOVQ(xRegisterMMX(regd), ptr[(void*)(hi ? (uptr)&cpuRegs.HI.UD[ 0 ] : (uptr)&cpuRegs.LO.UD[ 0 ])]);
}
else {
_deleteEEreg(_Rd_, 0);
xMOV(eax, ptr[(void*)(hi ? (uptr)&cpuRegs.HI.UL[ 0 ] : (uptr)&cpuRegs.LO.UL[ 0 ])]);
xMOV(edx, ptr[(void*)(hi ? (uptr)&cpuRegs.HI.UL[ 1 ] : (uptr)&cpuRegs.LO.UL[ 1 ])]);
xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], eax);
xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], edx);
}
}
_deleteEEreg(_Rd_, 0);
xMOV(eax, ptr[(void*)(hi ? (uptr)&cpuRegs.HI.UL[ 0 ] : (uptr)&cpuRegs.LO.UL[ 0 ])]);
xMOV(edx, ptr[(void*)(hi ? (uptr)&cpuRegs.HI.UL[ 1 ] : (uptr)&cpuRegs.LO.UL[ 1 ])]);
xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], eax);
xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], edx);
}
}
}
@ -209,76 +161,27 @@ void recMTHILO(int hi)
}
else {
regs = _checkMMXreg(MMX_GPR+_Rs_, MODE_READ);
if( regs >= 0 ) {
if( EEINST_ISLIVE2(xmmhilo) ) {
if( xmmregs[reghi].mode & MODE_WRITE ) {
xMOVH.PS(ptr[(void*)(addrhilo+8)], xRegisterSSE(reghi));
}
xmmregs[reghi].inuse = 0;
xMOVQ(ptr[(void*)(addrhilo)], xRegisterMMX(regs));
}
else {
SetMMXstate();
xMOVQ(xRegisterSSE(reghi), xRegisterMMX(regs));
xmmregs[reghi].mode |= MODE_WRITE;
}
}
else {
_flushConstReg(_Rs_);
xMOVL.PS(xRegisterSSE(reghi), ptr[&cpuRegs.GPR.r[ _Rs_ ].UD[ 0 ]]);
xmmregs[reghi].mode |= MODE_WRITE;
}
_flushConstReg(_Rs_);
xMOVL.PS(xRegisterSSE(reghi), ptr[&cpuRegs.GPR.r[ _Rs_ ].UD[ 0 ]]);
xmmregs[reghi].mode |= MODE_WRITE;
}
}
else {
reghi = _allocCheckGPRtoMMX(g_pCurInstInfo, xmmhilo, MODE_WRITE);
if( reghi >= 0 ) {
if( regs >= 0 ) {
//SetMMXstate();
xMOVQ(xRegisterMMX(reghi), xRegisterSSE(regs));
}
else {
regs = _checkMMXreg(MMX_GPR+_Rs_, MODE_WRITE);
if( regs >= 0 ) {
SetMMXstate();
xMOVQ(xRegisterMMX(reghi), xRegisterMMX(regs));
}
else {
_flushConstReg(_Rs_);
xMOVQ(xRegisterMMX(reghi), ptr[&cpuRegs.GPR.r[ _Rs_ ].UD[ 0 ]]);
}
}
if( regs >= 0 ) {
xMOVQ(ptr[(void*)(addrhilo)], xRegisterSSE(regs));
}
else {
if( regs >= 0 ) {
xMOVQ(ptr[(void*)(addrhilo)], xRegisterSSE(regs));
if( GPR_IS_CONST1(_Rs_) ) {
xMOV(ptr32[(u32*)(addrhilo)], g_cpuConstRegs[_Rs_].UL[0] );
xMOV(ptr32[(u32*)(addrhilo+4)], g_cpuConstRegs[_Rs_].UL[1] );
}
else {
regs = _checkMMXreg(MMX_GPR+_Rs_, MODE_WRITE);
if( regs >= 0 ) {
SetMMXstate();
xMOVQ(ptr[(void*)(addrhilo)], xRegisterMMX(regs));
}
else {
if( GPR_IS_CONST1(_Rs_) ) {
xMOV(ptr32[(u32*)(addrhilo)], g_cpuConstRegs[_Rs_].UL[0] );
xMOV(ptr32[(u32*)(addrhilo+4)], g_cpuConstRegs[_Rs_].UL[1] );
}
else {
_eeMoveGPRtoR(ecx, _Rs_);
_flushEEreg(_Rs_);
xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]]);
xMOV(edx, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]]);
xMOV(ptr[(void*)(addrhilo)], eax);
xMOV(ptr[(void*)(addrhilo+4)], edx);
}
}
_eeMoveGPRtoR(ecx, _Rs_);
_flushEEreg(_Rs_);
xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]]);
xMOV(edx, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]]);
xMOV(ptr[(void*)(addrhilo)], eax);
xMOV(ptr[(void*)(addrhilo+4)], edx);
}
}
}
@ -345,19 +248,11 @@ void recMFHILO1(int hi)
xmmregs[regd].mode |= MODE_WRITE;
}
else {
regd = _allocCheckGPRtoMMX(g_pCurInstInfo, _Rd_, MODE_WRITE);
if( regd >= 0 ) {
SetMMXstate();
xMOVQ(xRegisterMMX(regd), ptr[(void*)(hi ? (uptr)&cpuRegs.HI.UD[ 1 ] : (uptr)&cpuRegs.LO.UD[ 1 ])]);
}
else {
_deleteEEreg(_Rd_, 0);
xMOV(eax, ptr[(void*)(hi ? (uptr)&cpuRegs.HI.UL[ 2 ] : (uptr)&cpuRegs.LO.UL[ 2 ])]);
xMOV(edx, ptr[(void*)(hi ? (uptr)&cpuRegs.HI.UL[ 3 ] : (uptr)&cpuRegs.LO.UL[ 3 ])]);
xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], eax);
xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], edx);
}
_deleteEEreg(_Rd_, 0);
xMOV(eax, ptr[(void*)(hi ? (uptr)&cpuRegs.HI.UL[ 2 ] : (uptr)&cpuRegs.LO.UL[ 2 ])]);
xMOV(edx, ptr[(void*)(hi ? (uptr)&cpuRegs.HI.UL[ 3 ] : (uptr)&cpuRegs.LO.UL[ 3 ])]);
xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]], eax);
xMOV(ptr[&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]], edx);
}
}
}
@ -387,24 +282,16 @@ void recMTHILO1(int hi)
xMOVQ(ptr[(void*)(addrhilo+8)], xRegisterSSE(regs));
}
else {
regs = _checkMMXreg(MMX_GPR+_Rs_, MODE_WRITE);
if( regs >= 0 ) {
SetMMXstate();
xMOVQ(ptr[(void*)(addrhilo+8)], xRegisterMMX(regs));
if( GPR_IS_CONST1(_Rs_) ) {
xMOV(ptr32[(u32*)(addrhilo+8)], g_cpuConstRegs[_Rs_].UL[0] );
xMOV(ptr32[(u32*)(addrhilo+12)], g_cpuConstRegs[_Rs_].UL[1] );
}
else {
if( GPR_IS_CONST1(_Rs_) ) {
xMOV(ptr32[(u32*)(addrhilo+8)], g_cpuConstRegs[_Rs_].UL[0] );
xMOV(ptr32[(u32*)(addrhilo+12)], g_cpuConstRegs[_Rs_].UL[1] );
}
else {
_flushEEreg(_Rs_);
xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]]);
xMOV(edx, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]]);
xMOV(ptr[(void*)(addrhilo+8)], eax);
xMOV(ptr[(void*)(addrhilo+12)], edx);
}
_flushEEreg(_Rs_);
xMOV(eax, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]]);
xMOV(edx, ptr[&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]]);
xMOV(ptr[(void*)(addrhilo+8)], eax);
xMOV(ptr[(void*)(addrhilo+12)], edx);
}
}
}

44
pcsx2/x86/ix86-32/iR5900MultDiv.cpp
View File

@ -133,42 +133,32 @@ void recWritebackConstHILO(u64 res, int writed, int upper)
u8 testlive = upper?EEINST_LIVE2:EEINST_LIVE0;
if( g_pCurInstInfo->regs[XMMGPR_LO] & testlive ) {
if( !upper && (reglo = _allocCheckGPRtoMMX(g_pCurInstInfo, XMMGPR_LO, MODE_WRITE)) >= 0 ) {
xMOVQ(xRegisterMMX(reglo), ptr[recGetImm64(res & 0x80000000 ? -1 : 0, (u32)res)]);
reglo = _allocCheckGPRtoXMM(g_pCurInstInfo, XMMGPR_LO, MODE_WRITE|MODE_READ);
if( reglo >= 0 ) {
u32* mem_ptr = recGetImm64(res & 0x80000000 ? -1 : 0, (u32)res);
if( upper ) xMOVH.PS(xRegisterSSE(reglo), ptr[mem_ptr]);
else xMOVL.PS(xRegisterSSE(reglo), ptr[mem_ptr]);
}
else {
reglo = _allocCheckGPRtoXMM(g_pCurInstInfo, XMMGPR_LO, MODE_WRITE|MODE_READ);
if( reglo >= 0 ) {
u32* mem_ptr = recGetImm64(res & 0x80000000 ? -1 : 0, (u32)res);
if( upper ) xMOVH.PS(xRegisterSSE(reglo), ptr[mem_ptr]);
else xMOVL.PS(xRegisterSSE(reglo), ptr[mem_ptr]);
}
else {
xMOV(ptr32[(u32*)(loaddr)], res & 0xffffffff);
xMOV(ptr32[(u32*)(loaddr+4)], (res&0x80000000)?0xffffffff:0);
}
xMOV(ptr32[(u32*)(loaddr)], res & 0xffffffff);
xMOV(ptr32[(u32*)(loaddr+4)], (res&0x80000000)?0xffffffff:0);
}
}
if( g_pCurInstInfo->regs[XMMGPR_HI] & testlive ) {
if( !upper && (reghi = _allocCheckGPRtoMMX(g_pCurInstInfo, XMMGPR_HI, MODE_WRITE)) >= 0 ) {
xMOVQ(xRegisterMMX(reghi), ptr[recGetImm64((res >> 63) ? -1 : 0, res >> 32)]);
reghi = _allocCheckGPRtoXMM(g_pCurInstInfo, XMMGPR_HI, MODE_WRITE|MODE_READ);
if( reghi >= 0 ) {
u32* mem_ptr = recGetImm64((res >> 63) ? -1 : 0, res >> 32);
if( upper ) xMOVH.PS(xRegisterSSE(reghi), ptr[mem_ptr]);
else xMOVL.PS(xRegisterSSE(reghi), ptr[mem_ptr]);
}
else {
reghi = _allocCheckGPRtoXMM(g_pCurInstInfo, XMMGPR_HI, MODE_WRITE|MODE_READ);
if( reghi >= 0 ) {
u32* mem_ptr = recGetImm64((res >> 63) ? -1 : 0, res >> 32);
if( upper ) xMOVH.PS(xRegisterSSE(reghi), ptr[mem_ptr]);
else xMOVL.PS(xRegisterSSE(reghi), ptr[mem_ptr]);
}
else {
_deleteEEreg(XMMGPR_HI, 0);
xMOV(ptr32[(u32*)(hiaddr)], res >> 32);
xMOV(ptr32[(u32*)(hiaddr+4)], (res>>63)?0xffffffff:0);
}
_deleteEEreg(XMMGPR_HI, 0);
xMOV(ptr32[(u32*)(hiaddr)], res >> 32);
xMOV(ptr32[(u32*)(hiaddr+4)], (res>>63)?0xffffffff:0);
}
}