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Fixed a bug from r1038. PMADD and HADD instructions had inverted to/from fields. >_< 

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1045 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
Jake.Stine 2009-04-22 18:35:44 +00:00
parent e87d224cc9
commit c258a8d776
7 changed files with 57 additions and 77 deletions
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21
pcsx2/x86/ix86/implement/xmm/arithmetic.h
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@ -28,23 +28,14 @@ class _SimdShiftHelper
public:
_SimdShiftHelper() {}
template< typename OperandType >
__forceinline void operator()( const xRegisterSIMD<OperandType>& to, const xRegisterSIMD<OperandType>& from ) const
{
writeXMMop( 0x66, Opcode1, to, from );
}
__forceinline void operator()( const xRegisterSSE& to, const xRegisterSSE& from ) const { writeXMMop( 0x66, Opcode1, to, from ); }
__forceinline void operator()( const xRegisterSSE& to, const void* from ) const { writeXMMop( 0x66, Opcode1, to, from ); }
__forceinline void operator()( const xRegisterSSE& to, const ModSibBase& from ) const { writeXMMop( 0x66, Opcode1, to, from ); }
template< typename OperandType >
__forceinline void operator()( const xRegisterSIMD<OperandType>& to, const void* from ) const
{
writeXMMop( 0x66, Opcode1, to, from );
}
__forceinline void operator()( const xRegisterMMX& to, const xRegisterMMX& from ) const { writeXMMop( Opcode1, to, from ); }
__forceinline void operator()( const xRegisterMMX& to, const void* from ) const { writeXMMop( Opcode1, to, from ); }
__forceinline void operator()( const xRegisterMMX& to, const ModSibBase& from ) const { writeXMMop( Opcode1, to, from ); }
template< typename OperandType >
__noinline void operator()( const xRegisterSIMD<OperandType>& to, const ModSibBase& from ) const
{
writeXMMop( 0x66, Opcode1, to, from );
}
template< typename OperandType >
__emitinline void operator()( const xRegisterSIMD<OperandType>& to, u8 imm8 ) const

2
pcsx2/x86/ix86/implement/xmm/comparisons.h
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@ -43,7 +43,7 @@ protected:
{
__forceinline void operator()( const xRegisterSSE& to, const xRegisterSSE& from ) const { writeXMMop( Prefix, 0xc2, to, from ); xWrite<u8>( CType ); }
__forceinline void operator()( const xRegisterSSE& to, const void* from ) const { writeXMMop( Prefix, 0xc2, to, from ); xWrite<u8>( CType ); }
__noinline void operator()( const xRegisterSSE& to, const ModSibBase& from ) const { writeXMMop( Prefix, 0xc2, to, from ); xWrite<u8>( CType ); }
__forceinline void operator()( const xRegisterSSE& to, const ModSibBase& from ) const { writeXMMop( Prefix, 0xc2, to, from ); xWrite<u8>( CType ); }
Woot() {}
};

13
pcsx2/x86/ix86/implement/xmm/moremovs.h
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@ -29,15 +29,16 @@ protected:
template< u8 Prefix >
struct Woot
{
Woot() {}
__forceinline void operator()( const xRegisterSSE& to, const void* from ) const { writeXMMop( Prefix, Opcode, to, from ); }
__forceinline void operator()( const void* to, const xRegisterSSE& from ) const { writeXMMop( Prefix, Opcode+1, from, to ); }
__noinline void operator()( const xRegisterSSE& to, const ModSibBase& from ) const { writeXMMop( Prefix, Opcode, to, from ); }
__noinline void operator()( const ModSibBase& to, const xRegisterSSE& from ) const { writeXMMop( Prefix, Opcode+1, from, to ); }
__forceinline void operator()( const xRegisterSSE& to, const ModSibBase& from ) const { writeXMMop( Prefix, Opcode, to, from ); }
__forceinline void operator()( const ModSibBase& to, const xRegisterSSE& from ) const { writeXMMop( Prefix, Opcode+1, from, to ); }
};
public:
Woot<0x00> PS;
Woot<0x66> PD;
const Woot<0x00> PS;
const Woot<0x66> PD;
MovhlImplAll() {} //GCC.
};
@ -64,8 +65,8 @@ public:
__forceinline void operator()( const xRegisterSSE& to, const xRegisterSSE& from ) const { if( to != from ) writeXMMop( Prefix, Opcode, to, from ); }
__forceinline void operator()( const xRegisterSSE& to, const void* from ) const { writeXMMop( Prefix, Opcode, to, from ); }
__forceinline void operator()( const void* to, const xRegisterSSE& from ) const { writeXMMop( Prefix, OpcodeAlt, from, to ); }
__noinline void operator()( const xRegisterSSE& to, const ModSibBase& from ) const { writeXMMop( Prefix, Opcode, to, from ); }
__noinline void operator()( const ModSibBase& to, const xRegisterSSE& from ) const { writeXMMop( Prefix, OpcodeAlt, from, to ); }
__forceinline void operator()( const xRegisterSSE& to, const ModSibBase& from ) const { writeXMMop( Prefix, Opcode, to, from ); }
__forceinline void operator()( const ModSibBase& to, const xRegisterSSE& from ) const { writeXMMop( Prefix, OpcodeAlt, from, to ); }
MovapsImplAll() {} //GCC.
};

10
pcsx2/x86/ix86/implement/xmm/shufflepack.h
View File

@ -28,7 +28,7 @@ protected:
{
__forceinline void operator()( const xRegisterSSE& to, const xRegisterSSE& from, u8 cmptype ) const { writeXMMop( Prefix, OpcodeSSE, to, from ); xWrite<u8>( cmptype ); }
__forceinline void operator()( const xRegisterSSE& to, const void* from, u8 cmptype ) const { writeXMMop( Prefix, OpcodeSSE, to, from ); xWrite<u8>( cmptype ); }
__noinline void operator()( const xRegisterSSE& to, const ModSibBase& from, u8 cmptype ) const { writeXMMop( Prefix, OpcodeSSE, to, from ); xWrite<u8>( cmptype ); }
__forceinline void operator()( const xRegisterSSE& to, const ModSibBase& from, u8 cmptype ) const { writeXMMop( Prefix, OpcodeSSE, to, from ); xWrite<u8>( cmptype ); }
Woot() {}
};
@ -192,7 +192,7 @@ protected:
xWrite<u8>( imm8 );
}
__noinline void operator()( const xRegisterSSE& to, const ModSibBase& from, u8 imm8 ) const
__forceinline void operator()( const xRegisterSSE& to, const ModSibBase& from, u8 imm8 ) const
{
writeXMMop( 0x66, (Opcode<<8) | 0x3a, to, from );
xWrite<u8>( imm8 );
@ -220,7 +220,7 @@ public:
// Operation can be performed on either MMX or SSE src operands.
template< typename T >
__noinline void W( const xRegisterSIMD<T>& to, const ModSibBase& from, u8 imm8 ) const
__forceinline void W( const xRegisterSIMD<T>& to, const ModSibBase& from, u8 imm8 ) const
{
writeXMMop( 0x66, 0xc4, to, from );
xWrite<u8>( imm8 );
@ -260,7 +260,7 @@ protected:
xWrite<u8>( imm8 );
}
__noinline void operator()( const ModSibBase& dest, const xRegisterSSE& from, u8 imm8 ) const
__forceinline void operator()( const ModSibBase& dest, const xRegisterSSE& from, u8 imm8 ) const
{
writeXMMop( 0x66, (Opcode<<8) | 0x3a, from, dest );
xWrite<u8>( imm8 );
@ -289,7 +289,7 @@ public:
xWrite<u8>( imm8 );
}
__noinline void W( const ModSibBase& dest, const xRegisterSSE& from, u8 imm8 ) const
__forceinline void W( const ModSibBase& dest, const xRegisterSSE& from, u8 imm8 ) const
{
writeXMMop( 0x66, 0x153a, from, dest );
xWrite<u8>( imm8 );

13
pcsx2/x86/ix86/ix86.cpp
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@ -90,7 +90,7 @@ const xRegisterMMX
mm4( 4 ), mm5( 5 ),
mm6( 6 ), mm7( 7 );
const xRegister32
const xAddressReg
eax( 0 ), ebx( 3 ),
ecx( 1 ), edx( 2 ),
esi( 6 ), edi( 7 ),
@ -430,7 +430,6 @@ void ModSibBase::Reduce()
return;
}
// The Scale has a series of valid forms, all shown here:
switch( Scale )
@ -872,22 +871,22 @@ __forceinline void xMOVNTDQA( const xRegisterSSE& to, const void* from )
xWriteDisp( to.Id, from );
}
__noinline void xMOVNTDQA( const xRegisterSSE& to, const ModSibBase& from )
__forceinline void xMOVNTDQA( const xRegisterSSE& to, const ModSibBase& from )
{
xWrite<u32>( 0x2A380f66 );
EmitSibMagic( to.Id, from );
}
__forceinline void xMOVNTDQ( void* to, const xRegisterSSE& from ) { writeXMMop( 0x66, 0xe7, from, to ); }
__noinline void xMOVNTDQA( const ModSibBase& to, const xRegisterSSE& from ) { writeXMMop( 0x66, 0xe7, from, to ); }
__forceinline void xMOVNTDQA( const ModSibBase& to, const xRegisterSSE& from ) { writeXMMop( 0x66, 0xe7, from, to ); }
__forceinline void xMOVNTPD( void* to, const xRegisterSSE& from ) { writeXMMop( 0x66, 0x2b, from, to ); }
__noinline void xMOVNTPD( const ModSibBase& to, const xRegisterSSE& from ) { writeXMMop( 0x66, 0x2b, from, to ); }
__forceinline void xMOVNTPD( const ModSibBase& to, const xRegisterSSE& from ) { writeXMMop( 0x66, 0x2b, from, to ); }
__forceinline void xMOVNTPS( void* to, const xRegisterSSE& from ) { writeXMMop( 0x2b, from, to ); }
__noinline void xMOVNTPS( const ModSibBase& to, const xRegisterSSE& from ) { writeXMMop( 0x2b, from, to ); }
__forceinline void xMOVNTPS( const ModSibBase& to, const xRegisterSSE& from ) { writeXMMop( 0x2b, from, to ); }
__forceinline void xMOVNTQ( void* to, const xRegisterMMX& from ) { writeXMMop( 0xe7, from, to ); }
__noinline void xMOVNTQ( const ModSibBase& to, const xRegisterMMX& from ) { writeXMMop( 0xe7, from, to ); }
__forceinline void xMOVNTQ( const ModSibBase& to, const xRegisterMMX& from ) { writeXMMop( 0xe7, from, to ); }
__forceinline void xMOVMSKPS( const xRegister32& to, const xRegisterSSE& from) { writeXMMop( 0x50, to, from ); }
__forceinline void xMOVMSKPD( const xRegister32& to, const xRegisterSSE& from) { writeXMMop( 0x66, 0x50, to, from, true ); }

31
pcsx2/x86/ix86/ix86_legacy_sse.cpp
View File

@ -280,24 +280,22 @@ emitterT void SSSE3_PSIGND_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { x
emitterT void SSE_PEXTRW_XMM_to_R32(x86IntRegType to, x86SSERegType from, u8 imm8 ) { xPEXTR.W( xRegister32(to), xRegisterSSE(from), imm8 ); }
emitterT void SSE_PINSRW_R32_to_XMM(x86SSERegType to, x86IntRegType from, u8 imm8 ) { xPINSR.W( xRegisterSSE(to), xRegister32(from), imm8 ); }
emitterT void SSE4_INSERTPS_XMM_to_XMM(x86SSERegType to, x86SSERegType from, u8 imm8) { xINSERTPS( xRegisterSSE(to), xRegisterSSE(from), imm8 ); }
emitterT void SSE4_EXTRACTPS_XMM_to_R32(x86IntRegType to, x86SSERegType from, u8 imm8) { xEXTRACTPS( xRegister32(to), xRegisterSSE(from), imm8 ); }
emitterT void SSE2_PMADDWD_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { xPMADD.WD( xRegisterSSE(to), xRegisterSSE(from) ); }
emitterT void SSE3_HADDPS_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { xHADD.PS( xRegisterSSE(to), xRegisterSSE(from) ); }
emitterT void SSE3_HADDPS_M128_to_XMM(x86SSERegType to, uptr from) { xHADD.PS( xRegisterSSE(to), (void*)from ); }
emitterT void SSE4_PINSRD_R32_to_XMM(x86SSERegType to, x86IntRegType from, u8 imm8) { xPINSR.D( xRegisterSSE(to), xRegister32(from), imm8 ); }
emitterT void SSE4_INSERTPS_XMM_to_XMM(x86SSERegType to, x86SSERegType from, u8 imm8) { xINSERTPS( xRegisterSSE(to), xRegisterSSE(from), imm8 ); }
emitterT void SSE4_EXTRACTPS_XMM_to_R32(x86IntRegType to, x86SSERegType from, u8 imm8) { xEXTRACTPS( xRegister32(to), xRegisterSSE(from), imm8 ); }
emitterT void SSE_LDMXCSR( uptr from ) { xLDMXCSR( (u32*)from ); }
//////////////////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////////////////
//**********************************************************************************/
//PEXTRW,PINSRW: Packed Extract/Insert Word *
//**********************************************************************************}
emitterT void SSE2_PMADDWD_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { xPMADD.WD( xRegisterSSE(from), xRegisterSSE(to) ); }
emitterT void SSE3_HADDPS_XMM_to_XMM(x86SSERegType to, x86SSERegType from) { xHADD.PS( xRegisterSSE(from), xRegisterSSE(to) ); }
emitterT void SSE3_HADDPS_M128_to_XMM(x86SSERegType to, uptr from) { xHADD.PS( xRegisterSSE(from), (void*)to ); }
// SSE4.1
@ -360,15 +358,6 @@ emitterT void SSE4_PMOVZXDQ_XMM_to_XMM(x86SSERegType to, x86SSERegType from)
ModRM(3, to, from);
}
emitterT void SSE4_PINSRD_R32_to_XMM(x86SSERegType to, x86IntRegType from, u8 imm8)
{
write8(0x66);
RexRB(0, to, from);
write24(0x223A0F);
ModRM(3, to, from);
write8(imm8);
}
//////////////////////////////////////////////////////////////////////////////////////////
// SSE-X Helpers (generates either INT or FLOAT versions of certain SSE instructions)
//

44
pcsx2/x86/ix86/ix86_types.h
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@ -294,28 +294,6 @@ namespace x86Emitter
xRegisterCL(): xRegister8( 1 ) {}
};
extern const xRegisterSSE
xmm0, xmm1, xmm2, xmm3,
xmm4, xmm5, xmm6, xmm7;
extern const xRegisterMMX
mm0, mm1, mm2, mm3,
mm4, mm5, mm6, mm7;
extern const xRegister32
eax, ebx, ecx, edx,
esi, edi, ebp, esp;
extern const xRegister16
ax, bx, cx, dx,
si, di, bp, sp;
extern const xRegister8
al, dl, bl,
ah, ch, dh, bh;
extern const xRegisterCL cl; // I'm special!
//////////////////////////////////////////////////////////////////////////////////////////
// Use 32 bit registers as out index register (for ModSib memory address calculations)
// Only xAddressReg provides operators for constructing xAddressInfo types.
@ -403,6 +381,28 @@ namespace x86Emitter
__forceinline xAddressInfo operator-( s32 imm ) const { return xAddressInfo( *this ).Add( -imm ); }
};
extern const xRegisterSSE
xmm0, xmm1, xmm2, xmm3,
xmm4, xmm5, xmm6, xmm7;
extern const xRegisterMMX
mm0, mm1, mm2, mm3,
mm4, mm5, mm6, mm7;
extern const xAddressReg
eax, ebx, ecx, edx,
esi, edi, ebp, esp;
extern const xRegister16
ax, bx, cx, dx,
si, di, bp, sp;
extern const xRegister8
al, dl, bl,
ah, ch, dh, bh;
extern const xRegisterCL cl; // I'm special!
//////////////////////////////////////////////////////////////////////////////////////////
// ModSib - Internal low-level representation of the ModRM/SIB information.
//