mirror of https://github.com/PCSX2/pcsx2.git
Worked on SIF0dma a bit.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@2008 96395faa-99c1-11dd-bbfe-3dabce05a288
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@ -25,35 +25,6 @@ DMACh *sif0ch;
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DMACh *sif1ch;
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DMACh *sif2ch;
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#define FIFO_SIF0_W 128
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#define FIFO_SIF1_W 128
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struct _sif0
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{
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u32 fifoData[FIFO_SIF0_W];
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s32 fifoReadPos;
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s32 fifoWritePos;
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s32 fifoSize;
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s32 chain;
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s32 end;
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s32 tagMode;
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s32 counter;
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struct sifData sifData;
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};
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struct _sif1
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{
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u32 fifoData[FIFO_SIF1_W];
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s32 fifoReadPos;
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s32 fifoWritePos;
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s32 fifoSize;
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s32 chain;
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s32 end;
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s32 tagMode;
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s32 counter;
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};
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static _sif0 sif0;
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static _sif1 sif1;
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@ -123,7 +94,7 @@ static __forceinline void SIF1read(u32 *to, int words)
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__forceinline void SIF0Dma()
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{
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u32 *ptag;
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bool done = FALSE;
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bool done = false;
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int cycles = 0, psxCycles = 0;
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SIF_LOG("SIF0 DMA start...");
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@ -165,15 +136,18 @@ __forceinline void SIF0Dma()
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SIF0write((u32*)iopPhysMem(HW_DMA9_TADR + 8), 4);
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HW_DMA9_MADR = sif0.sifData.data & 0xFFFFFF;
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HW_DMA9_TADR += 16; ///HW_DMA9_MADR + 16 + sif0.sifData.words << 2;
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HW_DMA9_MADR = sif0.sifData.data & 0xFFFFFF;
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sif0.counter = sif0.sifData.words & 0xFFFFFF;
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SIF_LOG(" SIF0 Tag: madr=%lx, tadr=%lx, counter=%lx (%08X_%08X)", HW_DMA9_MADR, HW_DMA9_TADR, sif0.counter, sif0.sifData.words, sif0.sifData.data);
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if (sif0.sifData.data & 0x40000000)
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u32 tagId = Tag::Id(sif0.sifData.data);
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if ((tagId == TAG_REFE) || (tagId == TAG_END))
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SIF_LOG(" END");
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else
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SIF_LOG(" CNT %08X, %08X", sif0.sifData.data, sif0.sifData.words);
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done = false;
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}
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}
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@ -206,8 +180,6 @@ __forceinline void SIF0Dma()
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ptag = _dmaGetAddr(sif0dma, sif0dma->madr, DMAC_SIF0);
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if (ptag == NULL) return;
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//_dmaGetAddr(sif0dma, *ptag, sif0dma->madr, DMAC_SIF0);
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SIF0read((u32*)ptag, readSize << 2);
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@ -221,8 +193,7 @@ __forceinline void SIF0Dma()
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if (sif0dma->qwc == 0)
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{
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// Stop if TIE & the IRQ are set, or at the end. (I'll try to convert this to use the tags code later.)
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//if (((sif0dma->chcr._u32 & 0x80000080) == 0x80000080) || (sif0.end))
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// Stop if TIE & the IRQ are set, or at the end.
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if ((sif0dma->chcr.TIE && Tag::IRQ(sif0dma->chcr._u32)) || sif0.end)
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{
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if (sif0.end)
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@ -237,22 +208,34 @@ __forceinline void SIF0Dma()
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else if (sif0.fifoSize >= 4) // Read a tag
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{
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static __aligned16 u32 tag[4];
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SIF0read((u32*)&tag[0], 4); // Tag
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SIF_LOG(" EE SIF read tag: %x %x %x %x", tag[0], tag[1], tag[2], tag[3]);
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sif0dma->qwc = (u16)tag[0];
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Tag::UnsafeTransfer(sif0dma,&tag[0]);
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sif0dma->madr = tag[1];
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sif0dma->chcr._u32 = (sif0dma->chcr._u32 & 0xffff) | (tag[0] & 0xffff0000);
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SIF_LOG(" EE SIF dest chain tag madr:%08X qwc:%04X id:%X irq:%d(%08X_%08X)", sif0dma->madr, sif0dma->qwc, (tag[0] >> 28)&3, (tag[0] >> 31)&1, tag[1], tag[0]);
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// (tag[0] >> 28) & 3? Surely this is supposed to be (tag[0] >> 28) & 7? --arcum42
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if ((dmacRegs->ctrl.STS != NO_STS) && ((tag[0] >> 28) & 3) == 0)
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switch (Tag::Id(tag[0]))
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{
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dmacRegs->stadr.ADDR = sif0dma->madr + (sif0dma->qwc * 16);
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case TAG_REFE:
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sif0.end = 1;
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if (dmacRegs->ctrl.STS != NO_STS)
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dmacRegs->stadr.ADDR = sif0dma->madr + (sif0dma->qwc * 16);
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break;
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case TAG_REFS:
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if (dmacRegs->ctrl.STS != NO_STS)
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dmacRegs->stadr.ADDR = sif0dma->madr + (sif0dma->qwc * 16);
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break;
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case TAG_END:
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sif0.end = 1;
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break;
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}
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sif0.chain = 1;
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if (tag[0] & 0x40000000) sif0.end = 1;
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//sif0.chain = 1;
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done = false;
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}
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}
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@ -284,7 +267,7 @@ __forceinline void SIF1Dma()
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eesifbusy[1] = false;
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done = true;
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CPU_INT(6, cycles*BIAS);
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sif1.chain = 0;
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//sif1.chain = 0;
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sif1.end = 0;
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}
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else // Chain mode
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@ -304,7 +287,7 @@ __forceinline void SIF1Dma()
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SIF1write(ptag + 2, 2);
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}
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sif1.chain = 1;
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//sif1.chain = 1;
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switch (Tag::Id(ptag))
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{
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@ -405,7 +388,7 @@ __forceinline void SIF1Dma()
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}
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else if (sif1.fifoSize >= 4) // Read a tag
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{
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struct sifData d;
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struct sifData d;
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SIF1read((u32*)&d, 4);
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SIF_LOG(" IOP SIF dest chain tag madr:%08X wc:%04X id:%X irq:%d", d.data & 0xffffff, d.words, (d.data >> 28)&7, (d.data >> 31)&1);
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HW_DMA10_MADR = d.data & 0xffffff;
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28
pcsx2/Sif.h
28
pcsx2/Sif.h
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@ -16,6 +16,9 @@
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#ifndef __SIF_H__
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#define __SIF_H__
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#define FIFO_SIF0_W 128
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#define FIFO_SIF1_W 128
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struct sifData
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{
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s32 data;
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@ -24,6 +27,31 @@ struct sifData
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s32 addr;
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};
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struct _sif0
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{
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u32 fifoData[FIFO_SIF0_W];
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s32 fifoReadPos;
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s32 fifoWritePos;
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s32 fifoSize;
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s32 chain;
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s32 end;
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s32 tagMode;
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s32 counter;
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struct sifData sifData;
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};
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struct _sif1
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{
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u32 fifoData[FIFO_SIF1_W];
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s32 fifoReadPos;
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s32 fifoWritePos;
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s32 fifoSize;
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s32 chain;
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s32 end;
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s32 tagMode;
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s32 counter;
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struct sifData sifData;
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};
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extern DMACh *sif0ch;
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extern DMACh *sif1ch;
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extern DMACh *sif2ch;
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