mirror of https://github.com/PCSX2/pcsx2.git
made recUpdateFlags more readable while keeping most (all?) of the optimizations from last update.
git-svn-id: http://pcsx2-playground.googlecode.com/svn/trunk@632 a6443dda-0b58-4228-96e9-037be469359c
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c787b00cc7
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@ -145,13 +145,13 @@ void recUpdateFlags(VURegs * VU, int reg, int info)
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static u8 *pjmp, *pjmp2;
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static u32 *pjmp32;
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static u32 macaddr, stataddr, prevstataddr;
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static int x86macflag, x86temp;
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static int x86macflag, x86statflag, x86temp;
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static int t1reg, t1regBoolean;
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static const int flipMask[16] = {0, 8, 4, 12, 2, 10, 6, 14, 1, 9, 5, 13, 3, 11, 7, 15};
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if( !(info & PROCESS_VU_UPDATEFLAGS) ) return;
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//SysPrintf ("recUpdateFlags \n");
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//SysPrintf ("recUpdateFlags\n");
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macaddr = VU_VI_ADDR(REG_MAC_FLAG, 0);
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stataddr = VU_VI_ADDR(REG_STATUS_FLAG, 0); // write address
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@ -162,10 +162,10 @@ void recUpdateFlags(VURegs * VU, int reg, int info)
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SysPrintf( "VU ALLOCATION WARNING: Using Mac Flag Previous Address!\n" );
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macaddr = VU_VI_ADDR(REG_MAC_FLAG, 2);
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}
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x86macflag = ALLOCTEMPX86(0);
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x86temp = ALLOCTEMPX86(0);
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x86statflag = ALLOCTEMPX86(0);
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if (reg == EEREC_TEMP) {
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t1reg = _vuGetTempXMMreg(info);
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if (t1reg < 0) {
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@ -182,11 +182,14 @@ void recUpdateFlags(VURegs * VU, int reg, int info)
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}
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SSE_SHUFPS_XMM_to_XMM(reg, reg, 0x1B); // Flip wzyx to xyzw
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MOV32MtoR(x86temp, prevstataddr); // Load the previous status in to x86temp
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AND16ItoR(x86temp, 0xff0); // Keep Sticky and D/I flags
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MOV32MtoR(x86statflag, prevstataddr); // Load the previous status in to x86statflag
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AND16ItoR(x86statflag, 0xff0); // Keep Sticky and D/I flags
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if (CHECK_VU_EXTRA_FLAGS) {
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if (CHECK_VU_EXTRA_FLAGS) { // Checks all flags
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x86temp = ALLOCTEMPX86(0);
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//-------------------------Check for Overflow flags------------------------------
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//SSE_XORPS_XMM_to_XMM(t1reg, t1reg); // Clear t1reg
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@ -205,7 +208,7 @@ void recUpdateFlags(VURegs * VU, int reg, int info)
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AND16ItoR(x86macflag, _X_Y_Z_W ); // Grab "Has Overflowed" bits from the previous calculation (also make sure we're only grabbing from the XYZW being modified)
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pjmp = JZ8(0); // Skip if none are
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OR16ItoR(x86temp, 0x208); // OS, O flags
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OR16ItoR(x86statflag, 0x208); // OS, O flags
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SHL16ItoR(x86macflag, 12);
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if (_XYZW_SS) pjmp32 = JMP32(0); // Skip Underflow Check
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x86SetJ8(pjmp);
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@ -225,7 +228,7 @@ void recUpdateFlags(VURegs * VU, int reg, int info)
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AND16ItoR(EAX, _X_Y_Z_W ); // Grab "Has Underflowed" bits from the previous calculation
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pjmp = JZ8(0); // Skip if none are
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OR16ItoR(x86temp, 0x104); // US, U flags
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OR16ItoR(x86statflag, 0x104); // US, U flags
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SHL16ItoR(EAX, 8);
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OR32RtoR(x86macflag, EAX);
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x86SetJ8(pjmp);
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@ -240,96 +243,66 @@ void recUpdateFlags(VURegs * VU, int reg, int info)
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}
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if (_XYZW_SS) x86SetJ32(pjmp32); // If we skipped the Underflow Flag Checking (when we had an Overflow), return here
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}
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vuFloat2(reg, t1reg, flipMask[_X_Y_Z_W]); // Clamp overflowed vectors that were modified (remember reg's vectors have been flipped, so have to use a flipmask)
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vuFloat2(reg, t1reg, flipMask[_X_Y_Z_W]); // Clamp overflowed vectors that were modified (remember reg's vectors have been flipped, so have to use a flipmask)
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if (_XYZW_SS) {
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//-------------------------Check for Signed flags------------------------------
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// The following code makes sure the Signed Bit isn't set with Negative Zero
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SSE_XORPS_XMM_to_XMM(t1reg, t1reg); // Clear t1reg
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SSE_CMPEQPS_XMM_to_XMM(t1reg, reg); // Set all F's if each vector is zero
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if (CHECK_VU_EXTRA_FLAGS) {
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SSE_ANDNPS_XMM_to_XMM(t1reg, reg);
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SSE_MOVMSKPS_XMM_to_R32(EAX, t1reg); // Move the sign bits of the t1reg
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AND16ItoR(EAX, _X_Y_Z_W ); // Grab "Is Signed" bits from the previous calculation
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pjmp = JZ8(0); // Skip if none are
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OR16ItoR(x86temp, 0x82); // SS, S flags
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SHL16ItoR(EAX, 4);
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OR32RtoR(x86macflag, EAX);
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pjmp2 = JMP8(0); // If negative and not Zero, we can skip the Zero Flag checking
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x86SetJ8(pjmp);
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}
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else {
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SSE_MOVMSKPS_XMM_to_R32(EAX, t1reg); // Move the sign bits of the t1reg (for zero flag)
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SSE_ANDNPS_XMM_to_XMM(t1reg, reg);
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SSE_MOVMSKPS_XMM_to_R32(x86macflag, t1reg); // Move the sign bits of the t1reg
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AND16ItoR(x86macflag, _X_Y_Z_W ); // Grab "Is Signed" bits from the previous calculation
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pjmp = JZ8(0); // Skip if none are
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OR16ItoR(x86temp, 0x82); // SS, S flags
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SHL16ItoR(x86macflag, 4);
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pjmp2 = JMP8(0); // If negative and not Zero, we can skip the Zero Flag checking
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x86SetJ8(pjmp);
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}
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//-------------------------Check for Zero flags------------------------------
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if (CHECK_VU_EXTRA_FLAGS) {
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SSE_XORPS_XMM_to_XMM(t1reg, t1reg); // Clear t1reg
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SSE_CMPEQPS_XMM_to_XMM(t1reg, reg); // Set all F's if each vector is zero
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SSE_MOVMSKPS_XMM_to_R32(EAX, t1reg); // Move the sign bits of the previous calculation
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}
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AND16ItoR(EAX, _X_Y_Z_W ); // Grab "Is Zero" bits from the previous calculation
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pjmp = JZ8(0); // Skip if none are
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OR16ItoR(x86temp, 0x41); // ZS, Z flags
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OR32RtoR(x86macflag, EAX);
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x86SetJ8(pjmp);
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}
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else {
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//-------------------------Check for Zero flags------------------------------
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SSE_XORPS_XMM_to_XMM(t1reg, t1reg); // Clear t1reg
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SSE_CMPEQPS_XMM_to_XMM(t1reg, reg); // Set all F's if each vector is zero
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if (CHECK_VU_EXTRA_FLAGS) {
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SSE_MOVMSKPS_XMM_to_R32(EAX, t1reg); // Move the sign bits of the previous calculation
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AND16ItoR(EAX, _X_Y_Z_W ); // Grab "Is Zero" bits from the previous calculation
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pjmp = JZ8(0); // Skip if none are
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OR16ItoR(x86temp, 0x41); // ZS, Z flags
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OR32RtoR(x86macflag, EAX);
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x86SetJ8(pjmp);
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}
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else {
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SSE_MOVMSKPS_XMM_to_R32(x86macflag, t1reg); // Move the sign bits of the previous calculation
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AND16ItoR(x86macflag, _X_Y_Z_W ); // Grab "Is Zero" bits from the previous calculation
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pjmp = JZ8(0); // Skip if none are
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OR16ItoR(x86temp, 0x41); // ZS, Z flags
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x86SetJ8(pjmp);
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}
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//-------------------------Check for Signed flags------------------------------
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// The following code makes sure the Signed Bit isn't set with Negative Zero
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SSE_MOVMSKPS_XMM_to_R32(x86temp, t1reg); // Used for Zero Flag Calculation
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SSE_ANDNPS_XMM_to_XMM(t1reg, reg);
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SSE_MOVMSKPS_XMM_to_R32(EAX, t1reg); // Move the sign bits of the t1reg
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AND16ItoR(EAX, _X_Y_Z_W ); // Grab "Is Signed" bits from the previous calculation
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pjmp = JZ8(0); // Skip if none are
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OR16ItoR(x86temp, 0x82); // SS, S flags
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OR16ItoR(x86statflag, 0x82); // SS, S flags
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SHL16ItoR(EAX, 4);
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OR32RtoR(x86macflag, EAX);
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if (_XYZW_SS) pjmp2 = JMP8(0); // If negative and not Zero, we can skip the Zero Flag checking
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x86SetJ8(pjmp);
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//-------------------------Check for Zero flags------------------------------
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AND16ItoR(x86temp, _X_Y_Z_W ); // Grab "Is Zero" bits from the previous calculation
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pjmp = JZ8(0); // Skip if none are
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OR16ItoR(x86statflag, 0x41); // ZS, Z flags
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OR32RtoR(x86macflag, x86temp);
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x86SetJ8(pjmp);
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_freeX86reg(x86temp);
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}
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else { // Only Checks for Sign and Zero Flags
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vuFloat2(reg, t1reg, flipMask[_X_Y_Z_W]); // Clamp overflowed vectors that were modified (remember reg's vectors have been flipped, so have to use a flipmask)
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//-------------------------Check for Signed flags------------------------------
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// The following code makes sure the Signed Bit isn't set with Negative Zero
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SSE_XORPS_XMM_to_XMM(t1reg, t1reg); // Clear t1reg
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SSE_CMPEQPS_XMM_to_XMM(t1reg, reg); // Set all F's if each vector is zero
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SSE_MOVMSKPS_XMM_to_R32(EAX, t1reg); // Used for Zero Flag Calculation
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SSE_ANDNPS_XMM_to_XMM(t1reg, reg);
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SSE_MOVMSKPS_XMM_to_R32(x86macflag, t1reg); // Move the sign bits of the t1reg
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AND16ItoR(x86macflag, _X_Y_Z_W ); // Grab "Is Signed" bits from the previous calculation
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pjmp = JZ8(0); // Skip if none are
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OR16ItoR(x86statflag, 0x82); // SS, S flags
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SHL16ItoR(x86macflag, 4);
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if (_XYZW_SS) pjmp2 = JMP8(0); // If negative and not Zero, we can skip the Zero Flag checking
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x86SetJ8(pjmp);
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//-------------------------Check for Zero flags------------------------------
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AND16ItoR(EAX, _X_Y_Z_W ); // Grab "Is Zero" bits from the previous calculation
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pjmp = JZ8(0); // Skip if none are
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OR16ItoR(x86statflag, 0x41); // ZS, Z flags
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OR32RtoR(x86macflag, EAX);
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x86SetJ8(pjmp);
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}
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//-------------------------Finally: Send the Flags to the Mac Flag Address------------------------------
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if (_XYZW_SS) x86SetJ8(pjmp2); // If we skipped the Zero Flag Checking, return here
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@ -339,10 +312,10 @@ void recUpdateFlags(VURegs * VU, int reg, int info)
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else _freeXMMreg(t1reg); // Free temp reg
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MOV16RtoM(macaddr, x86macflag);
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MOV16RtoM(stataddr, x86temp);
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MOV16RtoM(stataddr, x86statflag);
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_freeX86reg(x86macflag);
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_freeX86reg(x86temp);
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_freeX86reg(x86statflag);
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}
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//------------------------------------------------------------------
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