From bd1d3724c146493c90c58d913a77db7213ec94be Mon Sep 17 00:00:00 2001 From: Gregory Hainaut Date: Thu, 26 Nov 2015 09:34:29 +0100 Subject: [PATCH] core: manually convert few functions to new emitter Remaining part will be done by a sed scripts --- pcsx2/x86/iCore.cpp | 6 +++--- pcsx2/x86/ix86-32/iR5900MultDiv.cpp | 4 ++-- pcsx2/x86/microVU_Macro.inl | 2 +- pcsx2/x86/sVU_Lower.cpp | 15 +++++++++------ pcsx2/x86/sVU_Micro.cpp | 4 ++-- 5 files changed, 17 insertions(+), 14 deletions(-) diff --git a/pcsx2/x86/iCore.cpp b/pcsx2/x86/iCore.cpp index 6230c6fa4d..f5b2b23652 100644 --- a/pcsx2/x86/iCore.cpp +++ b/pcsx2/x86/iCore.cpp @@ -218,13 +218,13 @@ int _checkXMMreg(int type, int reg, int mode) if ( !(xmmregs[i].mode & MODE_READ) ) { if (mode & MODE_READ) { - SSEX_MOVDQA_M128_to_XMM(i, (uptr)_XMMGetAddr(xmmregs[i].type, xmmregs[i].reg, xmmregs[i].VU ? &VU1 : &VU0)); + xMOVDQA(xRegisterSSE(i), ptr[_XMMGetAddr(xmmregs[i].type, xmmregs[i].reg, xmmregs[i].VU ? &VU1 : &VU0)]); } else if (mode & MODE_READHALF) { if( g_xmmtypes[i] == XMMT_INT ) - SSE2_MOVQ_M64_to_XMM(i, (uptr)_XMMGetAddr(xmmregs[i].type, xmmregs[i].reg, xmmregs[i].VU ? &VU1 : &VU0)); + xMOVQZX(xRegisterSSE(i), ptr[(void*)(uptr)_XMMGetAddr(xmmregs[i].type, xmmregs[i].reg, xmmregs[i].VU ? &VU1 : &VU0)]); else - SSE_MOVLPS_M64_to_XMM(i, (uptr)_XMMGetAddr(xmmregs[i].type, xmmregs[i].reg, xmmregs[i].VU ? &VU1 : &VU0)); + xMOVL.PS(xRegisterSSE(i), ptr[(void*)(uptr)_XMMGetAddr(xmmregs[i].type, xmmregs[i].reg, xmmregs[i].VU ? &VU1 : &VU0)]); } } diff --git a/pcsx2/x86/ix86-32/iR5900MultDiv.cpp b/pcsx2/x86/ix86-32/iR5900MultDiv.cpp index 03bc2c847c..4e76ec5d4d 100644 --- a/pcsx2/x86/ix86-32/iR5900MultDiv.cpp +++ b/pcsx2/x86/ix86-32/iR5900MultDiv.cpp @@ -254,7 +254,7 @@ void recWritebackConstHILO(u64 res, int writed, int upper) if( g_pCurInstInfo->regs[XMMGPR_LO] & testlive ) { if( !upper && (reglo = _allocCheckGPRtoMMX(g_pCurInstInfo, XMMGPR_LO, MODE_WRITE)) >= 0 ) { - MOVQMtoR(reglo, (uptr)recGetImm64(res & 0x80000000 ? -1 : 0, (u32)res)); + xMOVQ(xRegisterMMX(reglo), ptr[recGetImm64(res & 0x80000000 ? -1 : 0, (u32)res)]); } else { reglo = _allocCheckGPRtoXMM(g_pCurInstInfo, XMMGPR_LO, MODE_WRITE|MODE_READ); @@ -274,7 +274,7 @@ void recWritebackConstHILO(u64 res, int writed, int upper) if( g_pCurInstInfo->regs[XMMGPR_HI] & testlive ) { if( !upper && (reghi = _allocCheckGPRtoMMX(g_pCurInstInfo, XMMGPR_HI, MODE_WRITE)) >= 0 ) { - MOVQMtoR(reghi, (uptr)recGetImm64((res >> 63) ? -1 : 0, res >> 32)); + xMOVQ(xRegisterMMX(reghi), ptr[recGetImm64((res >> 63) ? -1 : 0, res >> 32)]); } else { reghi = _allocCheckGPRtoXMM(g_pCurInstInfo, XMMGPR_HI, MODE_WRITE|MODE_READ); diff --git a/pcsx2/x86/microVU_Macro.inl b/pcsx2/x86/microVU_Macro.inl index 3ada688a59..a725ddc02f 100644 --- a/pcsx2/x86/microVU_Macro.inl +++ b/pcsx2/x86/microVU_Macro.inl @@ -232,7 +232,7 @@ INTERPRETATE_COP2_FUNC(CALLMSR); void _setupBranchTest(u32*(jmpType)(u32), bool isLikely) { printCOP2("COP2 Branch"); _eeFlushAllUnused(); - TEST32ItoM((uptr)&vif1Regs.stat._u32, 0x4); + xTEST(ptr32[&vif1Regs.stat._u32], 0x4); //TEST32ItoM((uptr)&VU0.VI[REG_VPU_STAT].UL, 0x100); recDoBranchImm(jmpType(0), isLikely); } diff --git a/pcsx2/x86/sVU_Lower.cpp b/pcsx2/x86/sVU_Lower.cpp index f1100185d3..9ed269a2c4 100644 --- a/pcsx2/x86/sVU_Lower.cpp +++ b/pcsx2/x86/sVU_Lower.cpp @@ -535,20 +535,23 @@ void recVUMI_MFIR( VURegs *VU, int info ) _deleteX86reg(X86TYPE_VI|((VU==&VU1)?X86TYPE_VU1:0), _Is_, 1); if( _XYZW_SS ) { - SSE2_MOVD_M32_to_XMM(EEREC_TEMP, VU_VI_ADDR(_Is_, 1)-2); + xMOVDZX(xRegisterSSE(EEREC_TEMP), ptr[(void*)(VU_VI_ADDR(_Is_, 1)-2)]); + _vuFlipRegSS(VU, EEREC_T); SSE2_PSRAD_I8_to_XMM(EEREC_TEMP, 16); SSE_MOVSS_XMM_to_XMM(EEREC_T, EEREC_TEMP); _vuFlipRegSS(VU, EEREC_T); } else if (_X_Y_Z_W != 0xf) { - SSE2_MOVD_M32_to_XMM(EEREC_TEMP, VU_VI_ADDR(_Is_, 1)-2); + xMOVDZX(xRegisterSSE(EEREC_TEMP), ptr[(void*)(VU_VI_ADDR(_Is_, 1)-2)]); + SSE2_PSRAD_I8_to_XMM(EEREC_TEMP, 16); SSE_SHUFPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP, 0); VU_MERGE_REGS(EEREC_T, EEREC_TEMP); } else { - SSE2_MOVD_M32_to_XMM(EEREC_T, VU_VI_ADDR(_Is_, 1)-2); + xMOVDZX(xRegisterSSE(EEREC_T), ptr[(void*)(VU_VI_ADDR(_Is_, 1)-2)]); + SSE2_PSRAD_I8_to_XMM(EEREC_T, 16); SSE_SHUFPS_XMM_to_XMM(EEREC_T, EEREC_T, 0); } @@ -1011,7 +1014,7 @@ void recVUMI_ILW(VURegs *VU, int info) itreg = ALLOCVI(_It_, MODE_WRITE); if ( _Is_ == 0 ) { - MOVZX32M16toR( itreg, (uptr)GET_VU_MEM(VU, (int)imm * 16 + off) ); + xMOVZX(xRegister32(itreg), ptr16[GET_VU_MEM(VU, (int)imm * 16 + off)]); } else { int isreg = ALLOCVI(_Is_, MODE_READ); @@ -1079,7 +1082,7 @@ void recVUMI_ILWR( VURegs *VU, int info ) } else { int isreg = ALLOCVI(_Is_, MODE_READ); - MOVZX32Rm16toR(itreg, recVUTransformAddr(isreg, VU, _Is_, 0), (uptr)VU->Mem + off); + xMOVZX(xRegister32(itreg), ptr16[xAddressReg( recVUTransformAddr(isreg, VU, _Is_, 0) ) + (uptr)VU->Mem + off]); } } //------------------------------------------------------------------ @@ -1481,7 +1484,7 @@ void recVUMI_FCSET( VURegs *VU, int info ) { u32 addr = VU_VI_ADDR(REG_CLIP_FLAG, 0); //Console.WriteLn("recVUMI_FCSET"); - MOV32ItoM(addr ? addr : VU_VI_ADDR(REG_CLIP_FLAG, 2), VU->code&0xffffff ); + xMOV(ptr32[(u32*)(addr ? addr : VU_VI_ADDR(REG_CLIP_FLAG, 2))], VU->code&0xffffff); if( !(info & (PROCESS_VU_SUPER|PROCESS_VU_COP2)) ) MOV32ItoM( VU_VI_ADDR(REG_CLIP_FLAG, 1), VU->code&0xffffff ); diff --git a/pcsx2/x86/sVU_Micro.cpp b/pcsx2/x86/sVU_Micro.cpp index 895c11654c..18afd3739e 100644 --- a/pcsx2/x86/sVU_Micro.cpp +++ b/pcsx2/x86/sVU_Micro.cpp @@ -751,11 +751,11 @@ void _unpackVFSS_xyzw(int dstreg, int srcreg, int xyzw) { switch (xyzw) { case 0: SSE_MOVSS_XMM_to_XMM(dstreg, srcreg); break; - case 1: if ( x86caps.hasStreamingSIMD4Extensions ) SSE4_INSERTPS_XMM_to_XMM(dstreg, srcreg, _MM_MK_INSERTPS_NDX(1, 0, 0)); + case 1: if ( x86caps.hasStreamingSIMD4Extensions ) xINSERTPS(xRegisterSSE(dstreg), xRegisterSSE(srcreg), _MM_MK_INSERTPS_NDX(1, 0, 0)); else SSE2_PSHUFLW_XMM_to_XMM(dstreg, srcreg, 0xee); break; case 2: SSE_MOVHLPS_XMM_to_XMM(dstreg, srcreg); break; - case 3: if ( x86caps.hasStreamingSIMD4Extensions ) SSE4_INSERTPS_XMM_to_XMM(dstreg, srcreg, _MM_MK_INSERTPS_NDX(3, 0, 0)); + case 3: if ( x86caps.hasStreamingSIMD4Extensions ) xINSERTPS(xRegisterSSE(dstreg), xRegisterSSE(srcreg), _MM_MK_INSERTPS_NDX(3, 0, 0)); else { SSE_MOVHLPS_XMM_to_XMM(dstreg, srcreg); SSE2_PSHUFLW_XMM_to_XMM(dstreg, dstreg, 0xee); } break; }