mirror of https://github.com/PCSX2/pcsx2.git
Clang: Format GS.h
This commit is contained in:
refractionpcsx2
parent
7717450044
commit
b843989719
108
pcsx2/GS.h
108
pcsx2/GS.h
|
|
@ -51,7 +51,7 @@ union tGS_CSR
|
|||
// Read:
|
||||
// 0 - No SIGNAL pending.
|
||||
// 1 - SIGNAL has been generated.
|
||||
u64 SIGNAL :1;
|
||||
u64 SIGNAL : 1;
|
||||
|
||||
// Write:
|
||||
// 0 - No action;
|
||||
|
|
@ -59,7 +59,7 @@ union tGS_CSR
|
|||
// Read:
|
||||
// 0 - No FINISH event pending.
|
||||
// 1 - FINISH event has been generated.
|
||||
u64 FINISH :1;
|
||||
u64 FINISH : 1;
|
||||
|
||||
// Hsync Interrupt Control
|
||||
// Write:
|
||||
|
|
@ -68,7 +68,7 @@ union tGS_CSR
|
|||
// Read:
|
||||
// 0 - No Hsync interrupt pending.
|
||||
// 1 - Hsync interrupt has been generated.
|
||||
u64 HSINT :1;
|
||||
u64 HSINT : 1;
|
||||
|
||||
// Vsync Interrupt Control
|
||||
// Write:
|
||||
|
|
@ -77,7 +77,7 @@ union tGS_CSR
|
|||
// Read:
|
||||
// 0 - No Vsync interrupt pending.
|
||||
// 1 - Vsync interrupt has been generated.
|
||||
u64 VSINT :1;
|
||||
u64 VSINT : 1;
|
||||
|
||||
// Rect Area Write Termination Control
|
||||
// 0 - No action;
|
||||
|
|
@ -85,18 +85,18 @@ union tGS_CSR
|
|||
// Read:
|
||||
// 0 - No RAWrite interrupt pending.
|
||||
// 1 - RAWrite interrupt has been generated.
|
||||
u64 EDWINT :1;
|
||||
u64 EDWINT : 1;
|
||||
|
||||
u64 _zero1 :1;
|
||||
u64 _zero2 :1;
|
||||
u64 pad1 :1;
|
||||
u64 _zero1 : 1;
|
||||
u64 _zero2 : 1;
|
||||
u64 pad1 : 1;
|
||||
|
||||
// FLUSH (write-only!)
|
||||
// Write:
|
||||
// 0 - Resume drawing if suspended (?)
|
||||
// 1 - Flush the GS FIFO and suspend drawing
|
||||
// Read: Always returns 0. (?)
|
||||
u64 FLUSH :1;
|
||||
u64 FLUSH : 1;
|
||||
|
||||
// RESET (write-only!)
|
||||
// Write:
|
||||
|
|
@ -104,18 +104,18 @@ union tGS_CSR
|
|||
// 1 - GS soft system reset. Clears FIFOs and resets IMR to all 1's.
|
||||
// (PCSX2 implementation also clears GIFpaths, though that behavior may differ on real HW).
|
||||
// Read: Always returns 0. (?)
|
||||
u64 RESET :1;
|
||||
u64 RESET : 1;
|
||||
|
||||
u64 _pad2 :2;
|
||||
u64 _pad2 : 2;
|
||||
|
||||
// (I have no idea what this reg is-- air)
|
||||
// Output value is updated by sampling the VSync. (?)
|
||||
u64 NFIELD :1;
|
||||
u64 NFIELD : 1;
|
||||
|
||||
// Current Field of Display [page flipping] (read-only?)
|
||||
// 0 - EVEN
|
||||
// 1 - ODD
|
||||
u64 FIELD :1;
|
||||
u64 FIELD : 1;
|
||||
|
||||
// GS FIFO Status (read-only)
|
||||
// 00 - Somewhere in between
|
||||
|
|
@ -123,13 +123,13 @@ union tGS_CSR
|
|||
// 10 - Almost Full
|
||||
// 11 - Reserved (unused)
|
||||
// Assign values using the CSR_FifoState enum.
|
||||
u64 FIFO :2;
|
||||
u64 FIFO : 2;
|
||||
|
||||
// Revision number of the GS (fairly arbitrary)
|
||||
u64 REV :8;
|
||||
u64 REV : 8;
|
||||
|
||||
// ID of the GS (also fairly arbitrary)
|
||||
u64 ID :8;
|
||||
u64 ID : 8;
|
||||
};
|
||||
|
||||
u64 _u64;
|
||||
|
|
@ -165,7 +165,7 @@ union tGS_CSR
|
|||
return _u32 & 0x1f;
|
||||
}
|
||||
|
||||
void SetAllInterrupts(bool value=true)
|
||||
void SetAllInterrupts(bool value = true)
|
||||
{
|
||||
SIGNAL = FINISH = HSINT = VSINT = EDWINT = value;
|
||||
}
|
||||
|
|
@ -254,13 +254,13 @@ struct GSRegSIGBLID
|
|||
};
|
||||
|
||||
#define PS2MEM_GS g_RealGSMem
|
||||
#define PS2GS_BASE(mem) (PS2MEM_GS+(mem&0x13ff))
|
||||
#define PS2GS_BASE(mem) (PS2MEM_GS + (mem & 0x13ff))
|
||||
|
||||
#define CSRreg ((tGS_CSR&)*(PS2MEM_GS+0x1000))
|
||||
#define CSRreg ((tGS_CSR&)*(PS2MEM_GS + 0x1000))
|
||||
|
||||
#define GSCSRr ((u32&)*(PS2MEM_GS+0x1000))
|
||||
#define GSIMR ((tGS_IMR&)*(PS2MEM_GS+0x1010))
|
||||
#define GSSIGLBLID ((GSRegSIGBLID&)*(PS2MEM_GS+0x1080))
|
||||
#define GSCSRr ((u32&)*(PS2MEM_GS + 0x1000))
|
||||
#define GSIMR ((tGS_IMR&)*(PS2MEM_GS + 0x1010))
|
||||
#define GSSIGLBLID ((GSRegSIGBLID&)*(PS2MEM_GS + 0x1080))
|
||||
|
||||
enum class GS_VideoMode : int
|
||||
{
|
||||
|
|
@ -387,17 +387,17 @@ public:
|
|||
void WaitGS(bool syncRegs=true, bool weakWait=false, bool isMTVU=false);
|
||||
void ResetGS(bool hardware_reset);
|
||||
|
||||
void PrepDataPacket( MTGS_RingCommand cmd, u32 size );
|
||||
void PrepDataPacket( GIF_PATH pathidx, u32 size );
|
||||
void PrepDataPacket(MTGS_RingCommand cmd, u32 size);
|
||||
void PrepDataPacket(GIF_PATH pathidx, u32 size);
|
||||
void SendDataPacket();
|
||||
void SendGameCRC( u32 crc );
|
||||
void SendGameCRC(u32 crc);
|
||||
bool WaitForOpen();
|
||||
void WaitForClose();
|
||||
void Freeze( FreezeAction mode, MTGS_FreezeData& data );
|
||||
void Freeze(FreezeAction mode, MTGS_FreezeData& data);
|
||||
|
||||
void SendSimpleGSPacket( MTGS_RingCommand type, u32 offset, u32 size, GIF_PATH path );
|
||||
void SendSimplePacket( MTGS_RingCommand type, int data0, int data1, int data2 );
|
||||
void SendPointerPacket( MTGS_RingCommand type, u32 data0, void* data1 );
|
||||
void SendSimpleGSPacket(MTGS_RingCommand type, u32 offset, u32 size, GIF_PATH path);
|
||||
void SendSimplePacket(MTGS_RingCommand type, int data0, int data1, int data2);
|
||||
void SendPointerPacket(MTGS_RingCommand type, u32 data0, void* data1);
|
||||
|
||||
u8* GetDataPacketPtr() const;
|
||||
void SetEvent();
|
||||
|
|
@ -421,7 +421,7 @@ protected:
|
|||
void ThreadEntryPoint();
|
||||
void MainLoop();
|
||||
|
||||
void GenericStall( uint size );
|
||||
void GenericStall(uint size);
|
||||
|
||||
// Used internally by SendSimplePacket type functions
|
||||
void _FinishSimplePacket();
|
||||
|
|
@ -454,13 +454,13 @@ extern void gsWrite8(u32 mem, u8 value);
|
|||
extern void gsWrite16(u32 mem, u16 value);
|
||||
extern void gsWrite32(u32 mem, u32 value);
|
||||
|
||||
extern void gsWrite64_page_00( u32 mem, const mem64_t* value );
|
||||
extern void gsWrite64_page_01( u32 mem, const mem64_t* value );
|
||||
extern void gsWrite64_generic( u32 mem, const mem64_t* value );
|
||||
extern void gsWrite64_page_00(u32 mem, const mem64_t* value);
|
||||
extern void gsWrite64_page_01(u32 mem, const mem64_t* value);
|
||||
extern void gsWrite64_generic(u32 mem, const mem64_t* value);
|
||||
|
||||
extern void gsWrite128_page_00( u32 mem, const mem128_t* value );
|
||||
extern void gsWrite128_page_01( u32 mem, const mem128_t* value );
|
||||
extern void gsWrite128_generic( u32 mem, const mem128_t* value );
|
||||
extern void gsWrite128_page_00(u32 mem, const mem128_t* value);
|
||||
extern void gsWrite128_page_01(u32 mem, const mem128_t* value);
|
||||
extern void gsWrite128_generic(u32 mem, const mem128_t* value);
|
||||
|
||||
extern u8 gsRead8(u32 mem);
|
||||
extern u16 gsRead16(u32 mem);
|
||||
|
|
@ -479,7 +479,7 @@ extern tGS_CSR CSRr;
|
|||
static const uint RingBufferSizeFactor = 19;
|
||||
|
||||
// size of the ringbuffer in simd128's.
|
||||
static const uint RingBufferSize = 1<<RingBufferSizeFactor;
|
||||
static const uint RingBufferSize = 1 << RingBufferSizeFactor;
|
||||
|
||||
// Mask to apply to ring buffer indices to wrap the pointer from end to
|
||||
// start (the wrapping is what makes it a ringbuffer, yo!)
|
||||
|
|
@ -492,9 +492,9 @@ struct MTGS_BufferedData
|
|||
|
||||
MTGS_BufferedData() {}
|
||||
|
||||
u128& operator[]( uint idx )
|
||||
u128& operator[](uint idx)
|
||||
{
|
||||
pxAssert( idx < RingBufferSize );
|
||||
pxAssert(idx < RingBufferSize);
|
||||
return m_Ring[idx];
|
||||
}
|
||||
};
|
||||
|
|
@ -503,30 +503,36 @@ alignas(32) extern MTGS_BufferedData RingBuffer;
|
|||
|
||||
// FIXME: These belong in common with other memcpy tools. Will move them there later if no one
|
||||
// else beats me to it. --air
|
||||
inline void MemCopy_WrappedDest( const u128* src, u128* destBase, uint& destStart, uint destSize, uint len ) {
|
||||
inline void MemCopy_WrappedDest(const u128* src, u128* destBase, uint& destStart, uint destSize, uint len)
|
||||
{
|
||||
uint endpos = destStart + len;
|
||||
if ( endpos < destSize ) {
|
||||
memcpy(&destBase[destStart], src, len*16);
|
||||
if (endpos < destSize)
|
||||
{
|
||||
memcpy(&destBase[destStart], src, len * 16);
|
||||
destStart += len;
|
||||
}
|
||||
else {
|
||||
else
|
||||
{
|
||||
uint firstcopylen = destSize - destStart;
|
||||
memcpy(&destBase[destStart], src, firstcopylen*16);
|
||||
memcpy(&destBase[destStart], src, firstcopylen * 16);
|
||||
destStart = endpos % destSize;
|
||||
memcpy(destBase, src+firstcopylen, destStart*16);
|
||||
memcpy(destBase, src + firstcopylen, destStart * 16);
|
||||
}
|
||||
}
|
||||
|
||||
inline void MemCopy_WrappedSrc( const u128* srcBase, uint& srcStart, uint srcSize, u128* dest, uint len ) {
|
||||
inline void MemCopy_WrappedSrc(const u128* srcBase, uint& srcStart, uint srcSize, u128* dest, uint len)
|
||||
{
|
||||
uint endpos = srcStart + len;
|
||||
if ( endpos < srcSize ) {
|
||||
memcpy(dest, &srcBase[srcStart], len*16);
|
||||
if (endpos < srcSize)
|
||||
{
|
||||
memcpy(dest, &srcBase[srcStart], len * 16);
|
||||
srcStart += len;
|
||||
}
|
||||
else {
|
||||
else
|
||||
{
|
||||
uint firstcopylen = srcSize - srcStart;
|
||||
memcpy(dest, &srcBase[srcStart], firstcopylen*16);
|
||||
memcpy(dest, &srcBase[srcStart], firstcopylen * 16);
|
||||
srcStart = endpos % srcSize;
|
||||
memcpy(dest+firstcopylen, srcBase, srcStart*16);
|
||||
memcpy(dest + firstcopylen, srcBase, srcStart * 16);
|
||||
}
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue