ShuriZma
/
pcsx2
mirror of https://github.com/PCSX2/pcsx2.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Make simplifcations in the disassembler optional

This commit is contained in:
Kingcom 2014-08-19 15:43:38 +02:00
parent a696bf0d02
commit b72963ee5f
7 changed files with 37 additions and 28 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
pcsx2/DebugTools/Debug.h
View File

@ -28,7 +28,7 @@ extern char* disVU1MicroLF(u32 code, u32 pc);
namespace R5900
{
void disR5900Fasm( std::string& output, u32 code, u32 pc);
void disR5900Fasm( std::string& output, u32 code, u32 pc, bool simplify);
extern const char * const GPR_REG[32];
extern const char * const COP0_REG[32];

8
pcsx2/DebugTools/DebugInterface.cpp
View File

@ -487,12 +487,12 @@ void R5900DebugInterface::setRegister(int cat, int num, u128 newValue)
}
}
std::string R5900DebugInterface::disasm(u32 address)
std::string R5900DebugInterface::disasm(u32 address, bool simplify)
{
std::string out;
u32 op = read32(address);
R5900::disR5900Fasm(out,op,address);
R5900::disR5900Fasm(out,op,address,simplify);
return out;
}
@ -739,12 +739,12 @@ void R3000DebugInterface::setRegister(int cat, int num, u128 newValue)
}
}
std::string R3000DebugInterface::disasm(u32 address)
std::string R3000DebugInterface::disasm(u32 address, bool simplify)
{
std::string out;
u32 op = read32(address);
R5900::disR5900Fasm(out,op,address);
R5900::disR5900Fasm(out,op,address,simplify);
return out;
}

6
pcsx2/DebugTools/DebugInterface.h
View File

@ -45,7 +45,7 @@ public:
virtual void setPc(u32 newPc) = 0;
virtual void setRegister(int cat, int num, u128 newValue) = 0;
virtual std::string disasm(u32 address) = 0;
virtual std::string disasm(u32 address, bool simplify) = 0;
virtual bool isValidAddress(u32 address) = 0;
virtual u32 getCycles() = 0;
@ -83,7 +83,7 @@ public:
virtual void setPc(u32 newPc);
virtual void setRegister(int cat, int num, u128 newValue);
virtual std::string disasm(u32 address);
virtual std::string disasm(u32 address, bool simplify);
virtual bool isValidAddress(u32 address);
virtual u32 getCycles();
};
@ -115,7 +115,7 @@ public:
virtual void setPc(u32 newPc);
virtual void setRegister(int cat, int num, u128 newValue);
virtual std::string disasm(u32 address);
virtual std::string disasm(u32 address, bool simplify);
virtual bool isValidAddress(u32 address);
virtual u32 getCycles();
};

43
pcsx2/DebugTools/DisR5900asm.cpp
View File

@ -27,6 +27,7 @@
unsigned long opcode_addr;
u32 disasmOpcode;
bool disSimplify;
namespace R5900
{
@ -605,10 +606,11 @@ void (*COP2SPECIAL2PrintTable[128])( std::string& output ) =
//**************************TABLES CALLS***********************
void disR5900Fasm( std::string& output, u32 code, u32 pc )
void disR5900Fasm( std::string& output, u32 code, u32 pc, bool simplify )
{
opcode_addr = pc;
disasmOpcode = code;
disSimplify = simplify;
GetInstruction(code).disasm( output );
}
@ -695,6 +697,13 @@ const char* signedImmediate(s16 imm, int len = 0)
{
static char buffer[32];
if (!disSimplify)
{
u16 uimm = imm;
sprintf(buffer,"0x%*X",len,uimm);
return buffer;
}
if (imm >= 0)
sprintf(buffer,"0x%*X",len,imm);
else
@ -712,11 +721,11 @@ void BEQ( std::string& output )
int rs = DECODE_RS;
int rt = DECODE_RT;
if (rs == rt)
if (disSimplify && rs == rt)
ssappendf(output, "b\t");
else if (rs == 0 && rt != 0)
else if (disSimplify && rs == 0 && rt != 0)
ssappendf(output, "beqz\t%s, ",GPR_REG[rt]);
else if (rs != 0 && rt == 0)
else if (disSimplify && rs != 0 && rt == 0)
ssappendf(output, "beqz\t%s, ",GPR_REG[rs]);
else
ssappendf(output, "beq\t%s, %s, ",GPR_REG[rs], GPR_REG[rt]);
@ -729,9 +738,9 @@ void BNE( std::string& output )
int rs = DECODE_RS;
int rt = DECODE_RT;
if (rs == 0 && rt != 0)
if (disSimplify && rs == 0 && rt != 0)
ssappendf(output, "bnez\t%s, ",GPR_REG[rt]);
else if (rs != 0 && rt == 0)
else if (disSimplify && rs != 0 && rt == 0)
ssappendf(output, "bnez\t%s, ",GPR_REG[rs]);
else
ssappendf(output, "bne\t%s, %s, ",GPR_REG[rs], GPR_REG[rt]);
@ -749,7 +758,7 @@ void ADDIU( std::string& output )
int rs = DECODE_RS;
s16 imm = DECODE_IMMED;
if (rs == 0)
if (disSimplify && rs == 0)
ssappendf(output, "li\t%s, %s",GPR_REG[rt],signedImmediate(imm));
else
ssappendf(output, "addiu\t%s, %s, %s",GPR_REG[rt],GPR_REG[rs],signedImmediate(imm));
@ -766,7 +775,7 @@ void ORI( std::string& output )
u32 unsignedImm = (u16) DECODE_IMMED;
if (rs == 0)
if (disSimplify && rs == 0)
ssappendf(output, "li\t%s, 0x%X",GPR_REG[rt],unsignedImm);
else
ssappendf(output, "ori\t%s, %s, 0x%X",GPR_REG[rt],GPR_REG[rs],unsignedImm);
@ -780,11 +789,11 @@ void BEQL( std::string& output )
int rs = DECODE_RS;
int rt = DECODE_RT;
if (rs == rt)
if (disSimplify && rs == rt)
ssappendf(output, "b\t");
else if (rs == 0 && rt != 0)
else if (disSimplify && rs == 0 && rt != 0)
ssappendf(output, "beqzl\t%s, ",GPR_REG[rt]);
else if (rs != 0 && rt == 0)
else if (disSimplify && rs != 0 && rt == 0)
ssappendf(output, "beqzl\t%s, ",GPR_REG[rs]);
else
ssappendf(output, "beql\t%s, %s, ",GPR_REG[rs], GPR_REG[rt]);
@ -797,9 +806,9 @@ void BNEL( std::string& output )
int rs = DECODE_RS;
int rt = DECODE_RT;
if (rs == 0 && rt != 0)
if (disSimplify && rs == 0 && rt != 0)
ssappendf(output, "bnezl\t%s, ",GPR_REG[rt]);
else if (rs != 0 && rt == 0)
else if (disSimplify && rs != 0 && rt == 0)
ssappendf(output, "bnezl\t%s, ",GPR_REG[rs]);
else
ssappendf(output, "bnel\t%s, %s, ",GPR_REG[rs], GPR_REG[rt]);
@ -883,9 +892,9 @@ void disAddAddu( std::string& output, const char* name )
int rs = DECODE_RS;
int rt = DECODE_RT;
if (rs == 0)
if (disSimplify && rs == 0)
ssappendf(output,"move\t%s, %s",GPR_REG[rd],GPR_REG[rt]);
else if (rt == 0)
else if (disSimplify && rt == 0)
ssappendf(output,"move\t%s, %s",GPR_REG[rd],GPR_REG[rs]);
else
ssappendf(output, "%s\t%s, %s, %s",name,GPR_REG[rd], GPR_REG[rs], GPR_REG[rt]);
@ -909,9 +918,9 @@ void disDaddDaddu( std::string& output, const char* name )
int rs = DECODE_RS;
int rt = DECODE_RT;
if (rs == 0)
if (disSimplify && rs == 0)
ssappendf(output,"dmove\t%s, %s",GPR_REG[DECODE_RD],GPR_REG[DECODE_RT]);
else if (rt == 0)
else if (disSimplify && rt == 0)
ssappendf(output,"dmove\t%s, %s",GPR_REG[DECODE_RD],GPR_REG[DECODE_RS]);
else
ssappendf(output, "%s\t%s, %s, %s",name,GPR_REG[DECODE_RD], GPR_REG[DECODE_RS], GPR_REG[DECODE_RT]);

2
pcsx2/DebugTools/DisassemblyManager.cpp
View File

@ -691,7 +691,7 @@ bool DisassemblyOpcode::disassemble(u32 address, DisassemblyLineInfo& dest, bool
{
char opcode[64],arguments[256];
std::string dis = cpu->disasm(address);
std::string dis = cpu->disasm(address,insertSymbols);
parseDisasm(dis.c_str(),opcode,arguments,insertSymbols);
dest.type = DISTYPE_OPCODE;
dest.name = opcode;

2
pcsx2/Dump.cpp
View File

@ -219,7 +219,7 @@ void iDumpBlock( int startpc, u8 * ptr )
for ( uint i = startpc; i < s_nEndBlock; i += 4 )
{
std::string output;
disR5900Fasm( output, memRead32( i ), i );
disR5900Fasm( output, memRead32( i ), i, false );
eff.Printf( "%s\n", output.c_str() );
}

2
pcsx2/x86/ix86-32/iR5900-32.cpp
View File

@ -1678,7 +1678,7 @@ void recompileNextInstruction(int delayslot)
DevCon.Warning("Possible old value used in COP2 code");
for (u32 i = s_pCurBlockEx->startpc; i < s_nEndBlock; i += 4)
{
disR5900Fasm(disasm, memRead32(i), i);
disR5900Fasm(disasm, memRead32(i), i,false);
DevCon.Warning("%s%08X %s", i == pc - 4 ? "*" : i == p ? "=" : " ", memRead32(i), disasm.c_str());
}
break;