mirror of https://github.com/PCSX2/pcsx2.git
microVU:
- Implemented E-bit Conditional Branches and Jumps. Should fix infinite loop problems in games like Zone of the Enders, but it hasn't been tested yet since I don't have the game xD. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1343 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
cottonvibes
parent
96fb298371
commit
b61f7cc4d1
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@ -32,27 +32,27 @@
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class microBlockManager {
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private:
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static const int MaxBlocks = mMaxBlocks - 1;
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microBlock blockList[mMaxBlocks]; // note: should always be first in the class to ensure xmm alignment
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microBlock blockList[mMaxBlocks]; // Should always be first in the class to ensure 16-byte alignment
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int listSize; // Total Items - 1
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int listI; // Index to Add new block
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public:
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// our aligned replacement for 'new':
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// Aligned replacement for 'new'
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static microBlockManager* AlignedNew() {
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microBlockManager* alloc = (microBlockManager*)_aligned_malloc(sizeof(microBlockManager), 16);
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new (alloc) microBlockManager();
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return alloc;
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}
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static void Delete( microBlockManager* dead ) {
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if( dead == NULL ) return;
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// Use instead of normal 'delete'
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static void Delete(microBlockManager* dead) {
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if (dead == NULL) return;
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dead->~microBlockManager();
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_aligned_free( dead );
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}
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microBlockManager() { reset(); }
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~microBlockManager() { }
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void reset() { listSize = -1; listI = -1; };
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~microBlockManager() {}
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void reset() { listSize = -1; listI = -1; };
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microBlock* add(microBlock* pBlock) {
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microBlock* thisBlock = search(&pBlock->pState);
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if (!thisBlock) {
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@ -22,15 +22,30 @@
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// Helper Macros
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//------------------------------------------------------------------
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#define branchCase(JMPcc, nJMPcc) \
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mVUsetupBranch(mVU, xStatus, xMac, xClip, xCycles); \
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CMP16ItoM((uptr)&mVU->branch, 0); \
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incPC2(1); \
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if (!mVUblocks[iPC/2]) { mVUblocks[iPC/2] = microBlockManager::AlignedNew(); } \
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bBlock = mVUblocks[iPC/2]->search((microRegInfo*)&mVUregs); \
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incPC2(-1); \
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if (bBlock) { nJMPcc((uptr)bBlock->x86ptrStart - ((uptr)x86Ptr + 6)); } \
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else { ajmp = JMPcc((uptr)0); } \
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#define branchCase(JMPcc, nJMPcc, ebitJMP) \
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mVUsetupBranch(mVU, xStatus, xMac, xClip, xCycles); \
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CMP16ItoM((uptr)&mVU->branch, 0); \
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if (mVUup.eBit) { /* Conditional Branch With E-Bit Set */ \
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mVUendProgram(mVU, 2, xStatus, xMac, xClip); \
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u8* eJMP = ebitJMP(0); \
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incPC(1); /* Set PC to First instruction of Non-Taken Side */ \
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MOV32ItoM((uptr)&mVU->regs->VI[REG_TPC].UL, xPC); \
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JMP32((uptr)mVU->exitFunct - ((uptr)x86Ptr + 5)); \
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x86SetJ8(eJMP); \
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incPC(-4); /* Go Back to Branch Opcode to get branchAddr */ \
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iPC = branchAddr/4; \
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MOV32ItoM((uptr)&mVU->regs->VI[REG_TPC].UL, xPC); \
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JMP32((uptr)mVU->exitFunct - ((uptr)x86Ptr + 5)); \
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return thisPtr; \
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} \
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else { /* Normal Conditional Branch */ \
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incPC2(1); /* Check if Branch Non-Taken Side has already been recompiled */ \
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if (!mVUblocks[iPC/2]) { mVUblocks[iPC/2] = microBlockManager::AlignedNew(); } \
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bBlock = mVUblocks[iPC/2]->search((microRegInfo*)&mVUregs); \
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incPC2(-1); \
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if (bBlock) { nJMPcc((uptr)bBlock->x86ptrStart - ((uptr)x86Ptr + 6)); } \
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else { ajmp = JMPcc((uptr)0); } \
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} \
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break
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#define branchWarning() { \
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@ -40,15 +55,6 @@
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} \
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}
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#define branchEbit() { \
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if (branch == 2) { \
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if (!((mVUbranch == 1) || (mVUbranch == 2))) { \
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Console::Error("microVU%d Warning: Jump with E-bit not Implemented [%04x]", params vuIndex, xPC); \
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} \
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else { eBitBranch = 1; } \
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} \
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}
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#define doBackupVF1() { \
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if (mVUinfo.backupVF && !mVUlow.noWriteVF) { \
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DevCon::Status("microVU%d: Backing Up VF Reg [%04x]", params getIndex, xPC); \
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@ -205,7 +211,31 @@ microVUt(void) mVUsetCycles(mV) {
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tCycles(mVUregs.xgkick, mVUregsTemp.xgkick);
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}
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microVUt(void) mVUendProgram(mV, bool clearIsBusy, int qInst, int pInst, int fStatus, int fMac, int fClip) {
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#define sI ((mVUpBlock->pState.needExactMatch & 0x000f) ? 0 : ((mVUpBlock->pState.flags >> 0) & 3))
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#define cI ((mVUpBlock->pState.needExactMatch & 0x0f00) ? 0 : ((mVUpBlock->pState.flags >> 2) & 3))
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microVUt(void) mVUendProgram(mV, int isEbit, int* xStatus, int* xMac, int* xClip) {
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int fStatus = (isEbit) ? findFlagInst(xStatus, 0x7fffffff) : sI;
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int fMac = (isEbit) ? findFlagInst(xMac, 0x7fffffff) : 0;
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int fClip = (isEbit) ? findFlagInst(xClip, 0x7fffffff) : cI;
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int qInst = 0;
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int pInst = 0;
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if (isEbit) {
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mVUprint("mVUcompile ebit");
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memset(&mVUinfo, 0, sizeof(mVUinfo));
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mVUincCycles(mVU, 100); // Ensures Valid P/Q instances (And sets all cycle data to 0)
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mVUcycles -= 100;
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qInst = mVU->q;
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pInst = mVU->p;
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if (mVUinfo.doDivFlag) {
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sFLAG.doFlag = 1;
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sFLAG.write = fStatus;
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mVUdivSet(mVU);
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}
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if (mVUinfo.doXGKICK) { mVU_XGKICK_DELAY(mVU, 1); }
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}
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// Save P/Q Regs
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if (qInst) { SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, 0xe5); }
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@ -223,19 +253,18 @@ microVUt(void) mVUendProgram(mV, bool clearIsBusy, int qInst, int pInst, int fSt
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MOV32RtoM((uptr)&mVU->regs->VI[REG_MAC_FLAG].UL, gprT1);
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MOV32RtoM((uptr)&mVU->regs->VI[REG_CLIP_FLAG].UL, gprT2);
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if (clearIsBusy) { // Clear 'is busy' Flags
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if (isEbit || !isVU1) { // Clear 'is busy' Flags
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AND32ItoM((uptr)&VU0.VI[REG_VPU_STAT].UL, (isVU1 ? ~0x100 : ~0x001)); // VBS0/VBS1 flag
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AND32ItoM((uptr)&mVU->regs->vifRegs->stat, ~0x4); // Clear VU 'is busy' signal for vif
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}
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//Save PC, and Jump to Exit Point
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MOV32ItoM((uptr)&mVU->regs->VI[REG_TPC].UL, xPC);
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JMP32((uptr)mVU->exitFunct - ((uptr)x86Ptr + 5));
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if (isEbit != 2) { // Save PC, and Jump to Exit Point
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mVUsetupRange(mVU, xPC);
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MOV32ItoM((uptr)&mVU->regs->VI[REG_TPC].UL, xPC);
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JMP32((uptr)mVU->exitFunct - ((uptr)x86Ptr + 5));
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}
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}
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#define sI ((mVUpBlock->pState.needExactMatch & 0x000f) ? 0 : ((mVUpBlock->pState.flags >> 0) & 3))
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#define cI ((mVUpBlock->pState.needExactMatch & 0x0f00) ? 0 : ((mVUpBlock->pState.flags >> 2) & 3))
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void __fastcall mVUwarning0(u32 PC) { Console::Error("microVU0 Warning: Exiting from Possible Infinite Loop [%04x]", params PC); }
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void __fastcall mVUwarning1(u32 PC) { Console::Error("microVU1 Warning: Exiting from Possible Infinite Loop [%04x]", params PC); }
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void __fastcall mVUprintPC1(u32 PC) { Console::Write("Block PC [%04x] ", params PC); }
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@ -250,7 +279,7 @@ microVUt(void) mVUtestCycles(mV) {
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if (isVU1) CALLFunc((uptr)mVUwarning1);
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//else CALLFunc((uptr)mVUwarning0); // VU0 is allowed early exit for COP2 Interlock Simulation
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MOV32ItoR(gprR, Roffset); // Restore gprR
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mVUendProgram(mVU, (isVU1)?1:0, 0, 0, sI, 0, cI);
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mVUendProgram(mVU, 0, NULL, NULL, NULL);
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x86SetJ32(jmp32);
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}
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@ -292,7 +321,6 @@ microVUf(void*) __fastcall mVUcompile(u32 startPC, uptr pState) {
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mVUregs.flags = 0;
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mVUflagInfo = 0;
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mVUsFlagHack = CHECK_VU_FLAGHACK;
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bool eBitBranch = 0; // E-bit Set on Branch
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for (int branch = 0; mVUcount < (vuIndex ? (0x3fff/8) : (0xfff/8)); ) {
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incPC(1);
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@ -311,7 +339,7 @@ microVUf(void*) __fastcall mVUcompile(u32 startPC, uptr pState) {
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mVUinfo.writeP = !mVU->p;
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if (branch >= 2) { mVUinfo.isEOB = 1; if (branch == 3) { mVUinfo.isBdelay = 1; } mVUcount++; branchWarning(); break; }
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else if (branch == 1) { branch = 2; }
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if (mVUbranch) { mVUsetFlagInfo(mVU); branchEbit(); branch = 3; mVUbranch = 0; }
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if (mVUbranch) { mVUsetFlagInfo(mVU); branch = 3; mVUbranch = 0; }
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incPC(1);
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mVUcount++;
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}
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@ -342,18 +370,18 @@ microVUf(void*) __fastcall mVUcompile(u32 startPC, uptr pState) {
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mVUdebugNOW(1);
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switch (mVUbranch) {
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case 3: branchCase(JE32, JNE32); // IBEQ
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case 4: branchCase(JGE32, JNGE32); // IBGEZ
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case 5: branchCase(JG32, JNG32); // IBGTZ
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case 6: branchCase(JLE32, JNLE32); // IBLEQ
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case 7: branchCase(JL32, JNL32); // IBLTZ
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case 8: branchCase(JNE32, JE32); // IBNEQ
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case 3: branchCase(JE32, JNE32, JE8); // IBEQ
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case 4: branchCase(JGE32, JNGE32, JGE8); // IBGEZ
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case 5: branchCase(JG32, JNG32, JG8); // IBGTZ
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case 6: branchCase(JLE32, JNLE32, JLE8); // IBLEQ
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case 7: branchCase(JL32, JNL32, JL8); // IBLTZ
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case 8: branchCase(JNE32, JE32, JNE8); // IBNEQ
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case 1: case 2: // B/BAL
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mVUprint("mVUcompile B/BAL");
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incPC(-3); // Go back to branch opcode (to get branch imm addr)
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if (eBitBranch) { iPC = branchAddr/4; goto eBitTemination; } // E-bit Was Set on Branch
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if (mVUup.eBit) { iPC = branchAddr/4; mVUendProgram(mVU, 1, xStatus, xMac, xClip); } // E-bit Branch
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mVUsetupBranch(mVU, xStatus, xMac, xClip, xCycles);
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if (mVUblocks[branchAddr/8] == NULL)
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@ -368,6 +396,16 @@ microVUf(void*) __fastcall mVUcompile(u32 startPC, uptr pState) {
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case 9: case 10: // JR/JALR
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mVUprint("mVUcompile JR/JALR");
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incPC(-3); // Go back to jump opcode
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if (mVUup.eBit) { // E-bit Jump
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mVUendProgram(mVU, 2, xStatus, xMac, xClip);
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MOV32MtoR(gprT1, (uptr)&mVU->branch);
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MOV32RtoM((uptr)&mVU->regs->VI[REG_TPC].UL, gprT1);
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JMP32((uptr)mVU->exitFunct - ((uptr)x86Ptr + 5));
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return thisPtr;
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}
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memcpy_fast(&pBlock->pStateEnd, &mVUregs, sizeof(microRegInfo));
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mVUsetupBranch(mVU, xStatus, xMac, xClip, xCycles);
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@ -375,8 +413,8 @@ microVUf(void*) __fastcall mVUcompile(u32 startPC, uptr pState) {
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MOV32MtoR(gprT2, (uptr)&mVU->branch); // Get startPC (ECX first argument for __fastcall)
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MOV32ItoR(gprR, (u32)&pBlock->pStateEnd); // Get pState (EDX second argument for __fastcall)
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if (!isVU1) CALLFunc((uptr)mVUcompileVU0); //(u32 startPC, uptr pState)
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else CALLFunc((uptr)mVUcompileVU1);
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if (!vuIndex) CALLFunc((uptr)mVUcompileVU0); //(u32 startPC, uptr pState)
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else CALLFunc((uptr)mVUcompileVU1);
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mVUrestoreRegs(mVU);
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JMPR(gprT1); // Jump to rec-code address
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return thisPtr;
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@ -397,8 +435,7 @@ microVUf(void*) __fastcall mVUcompile(u32 startPC, uptr pState) {
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}
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else {
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uptr jumpAddr;
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u32 bPC = iPC; // mVUcompile can modify iPC, mVUregs, and mVUflagInfo, so back them up
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u32 bFlagInfo = mVUflagInfo;
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u32 bPC = iPC; // mVUcompile can modify iPC and mVUregs so back them up
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memcpy_fast(&pBlock->pStateEnd, &mVUregs, sizeof(microRegInfo));
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incPC2(1); // Get PC for branch not-taken
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@ -406,7 +443,6 @@ microVUf(void*) __fastcall mVUcompile(u32 startPC, uptr pState) {
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else mVUcompileVU1(xPC, (uptr)&mVUregs);
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iPC = bPC;
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mVUflagInfo = bFlagInfo;
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incPC(-3); // Go back to branch opcode (to get branch imm addr)
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if (!vuIndex) jumpAddr = (uptr)mVUcompileVU0(branchAddr, (uptr)&pBlock->pStateEnd);
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else jumpAddr = (uptr)mVUcompileVU1(branchAddr, (uptr)&pBlock->pStateEnd);
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@ -417,27 +453,8 @@ microVUf(void*) __fastcall mVUcompile(u32 startPC, uptr pState) {
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}
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if (x == (vuIndex?(0x3fff/8):(0xfff/8))) { Console::Error("microVU%d: Possible infinite compiling loop!", params vuIndex); }
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eBitTemination:
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mVUprint("mVUcompile ebit");
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int lStatus = findFlagInst(xStatus, 0x7fffffff);
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int lMac = findFlagInst(xMac, 0x7fffffff);
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int lClip = findFlagInst(xClip, 0x7fffffff);
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memset(&mVUinfo, 0, sizeof(mVUinfo));
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mVUincCycles(mVU, 100); // Ensures Valid P/Q instances (And sets all cycle data to 0)
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mVUcycles -= 100;
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if (mVUinfo.doDivFlag) {
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int flagReg;
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getFlagReg(flagReg, lStatus);
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AND32ItoR (flagReg, 0xfff3ffff);
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OR32MtoR (flagReg, (uptr)&mVU->divFlag);
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}
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if (mVUinfo.doXGKICK) { mVU_XGKICK_DELAY(mVU, 1); }
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// Do E-bit end stuff here
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mVUsetupRange(mVU, xPC - 8);
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mVUendProgram(mVU, 1, mVU->q, mVU->p, lStatus, lMac, lClip);
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// E-bit End
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mVUendProgram(mVU, 1, xStatus, xMac, xClip);
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return thisPtr;
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}
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