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SPU2: Move WaveDump and friends behind PCSX2_DEVBUILD

This commit is contained in:
Stenzek 2023-01-01 16:22:22 +10:00 committed by refractionpcsx2
parent 0c5b43bcdd
commit b5a61d2915
13 changed files with 340 additions and 323 deletions
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1
pcsx2/CMakeLists.txt
View File

@ -283,7 +283,6 @@ set(pcsx2SPU2Sources
SPU2/Mixer.cpp
SPU2/spu2.cpp
SPU2/ReadInput.cpp
SPU2/RegLog.cpp
SPU2/RegTable.cpp
SPU2/Reverb.cpp
SPU2/SndOut.cpp

296
pcsx2/SPU2/Debug.cpp
View File

@ -267,4 +267,298 @@ void SPU2::DoFullDump()
}
}
#endif
static const char* ParamNames[8] = {"VOLL", "VOLR", "PITCH", "ADSR1", "ADSR2", "ENVX", "VOLXL", "VOLXR"};
static const char* AddressNames[6] = {"SSAH", "SSAL", "LSAH", "LSAL", "NAXH", "NAXL"};
__forceinline static void _RegLog_(const char* action, int level, const char* RName, u32 mem, u32 core, u16 value)
{
if (level > 1)
{
SPU2::FileLog("[%10d] SPU2 %s mem %08x (core %d, register %s) value %04x\n",
Cycles, action, mem, core, RName, value);
}
}
#define RegLog(lev, rname, mem, core, val) _RegLog_(action, lev, rname, mem, core, val)
void SPU2::WriteRegLog(const char* action, u32 rmem, u16 value)
{
//u32 vx=0, vc=0;
u32 core = 0, omem, mem;
omem = mem = rmem & 0x7FF; //FFFF;
if (mem & 0x400)
{
omem ^= 0x400;
core = 1;
}
if (omem < 0x0180) // Voice Params (VP)
{
const u32 voice = (omem & 0x1F0) >> 4;
const u32 param = (omem & 0xF) >> 1;
char dest[192];
snprintf(dest, std::size(dest), "Voice %d %s", voice, ParamNames[param]);
RegLog(2, dest, rmem, core, value);
}
else if ((omem >= 0x01C0) && (omem < 0x02E0)) // Voice Addressing Params (VA)
{
const u32 voice = ((omem - 0x01C0) / 12);
const u32 address = ((omem - 0x01C0) % 12) >> 1;
char dest[192];
snprintf(dest, std::size(dest), "Voice %d %s", voice, AddressNames[address]);
RegLog(2, dest, rmem, core, value);
}
else if ((mem >= 0x0760) && (mem < 0x07b0))
{
omem = mem;
core = 0;
if (mem >= 0x0788)
{
omem -= 0x28;
core = 1;
}
switch (omem)
{
case REG_P_EVOLL:
RegLog(2, "EVOLL", rmem, core, value);
break;
case REG_P_EVOLR:
RegLog(2, "EVOLR", rmem, core, value);
break;
case REG_P_AVOLL:
if (core)
{
RegLog(2, "AVOLL", rmem, core, value);
}
break;
case REG_P_AVOLR:
if (core)
{
RegLog(2, "AVOLR", rmem, core, value);
}
break;
case REG_P_BVOLL:
RegLog(2, "BVOLL", rmem, core, value);
break;
case REG_P_BVOLR:
RegLog(2, "BVOLR", rmem, core, value);
break;
case REG_P_MVOLXL:
RegLog(2, "MVOLXL", rmem, core, value);
break;
case REG_P_MVOLXR:
RegLog(2, "MVOLXR", rmem, core, value);
break;
case R_IIR_VOL:
RegLog(2, "IIR_VOL", rmem, core, value);
break;
case R_COMB1_VOL:
RegLog(2, "COMB1_VOL", rmem, core, value);
break;
case R_COMB2_VOL:
RegLog(2, "COMB2_VOL", rmem, core, value);
break;
case R_COMB3_VOL:
RegLog(2, "COMB3_VOL", rmem, core, value);
break;
case R_COMB4_VOL:
RegLog(2, "COMB4_VOL", rmem, core, value);
break;
case R_WALL_VOL:
RegLog(2, "WALL_VOL", rmem, core, value);
break;
case R_APF1_VOL:
RegLog(2, "APF1_VOL", rmem, core, value);
break;
case R_APF2_VOL:
RegLog(2, "APF2_VOL", rmem, core, value);
break;
case R_IN_COEF_L:
RegLog(2, "IN_COEF_L", rmem, core, value);
break;
case R_IN_COEF_R:
RegLog(2, "IN_COEF_R", rmem, core, value);
break;
}
}
else if ((mem >= 0x07C0) && (mem < 0x07CE))
{
switch (mem)
{
case SPDIF_OUT:
RegLog(2, "SPDIF_OUT", rmem, -1, value);
break;
case SPDIF_IRQINFO:
RegLog(2, "SPDIF_IRQINFO", rmem, -1, value);
break;
case 0x7c4:
if (Spdif.Unknown1 != value && SPU2::MsgToConsole())
SPU2::ConLog("* SPU2: SPDIF Unknown Register 1 set to %04x\n", value);
RegLog(2, "SPDIF_UNKNOWN1", rmem, -1, value);
break;
case SPDIF_MODE:
if (Spdif.Mode != value && SPU2::MsgToConsole())
SPU2::ConLog("* SPU2: SPDIF Mode set to %04x\n", value);
RegLog(2, "SPDIF_MODE", rmem, -1, value);
break;
case SPDIF_MEDIA:
if (Spdif.Media != value && SPU2::MsgToConsole())
SPU2::ConLog("* SPU2: SPDIF Media set to %04x\n", value);
RegLog(2, "SPDIF_MEDIA", rmem, -1, value);
break;
case 0x7ca:
if (Spdif.Unknown2 != value && SPU2::MsgToConsole())
SPU2::ConLog("* SPU2: SPDIF Unknown Register 2 set to %04x\n", value);
RegLog(2, "SPDIF_UNKNOWN2", rmem, -1, value);
break;
case SPDIF_PROTECT:
if (Spdif.Protection != value && SPU2::MsgToConsole())
SPU2::ConLog("* SPU2: SPDIF Copy set to %04x\n", value);
RegLog(2, "SPDIF_PROTECT", rmem, -1, value);
break;
}
UpdateSpdifMode();
}
else
{
switch (omem)
{
case REG_C_ATTR:
RegLog(4, "ATTR", rmem, core, value);
break;
case REG_S_PMON:
RegLog(1, "PMON0", rmem, core, value);
break;
case (REG_S_PMON + 2):
RegLog(1, "PMON1", rmem, core, value);
break;
case REG_S_NON:
RegLog(1, "NON0", rmem, core, value);
break;
case (REG_S_NON + 2):
RegLog(1, "NON1", rmem, core, value);
break;
case REG_S_VMIXL:
RegLog(1, "VMIXL0", rmem, core, value);
break;
case (REG_S_VMIXL + 2):
RegLog(1, "VMIXL1", rmem, core, value);
break;
case REG_S_VMIXEL:
RegLog(1, "VMIXEL0", rmem, core, value);
break;
case (REG_S_VMIXEL + 2):
RegLog(1, "VMIXEL1", rmem, core, value);
break;
case REG_S_VMIXR:
RegLog(1, "VMIXR0", rmem, core, value);
break;
case (REG_S_VMIXR + 2):
RegLog(1, "VMIXR1", rmem, core, value);
break;
case REG_S_VMIXER:
RegLog(1, "VMIXER0", rmem, core, value);
break;
case (REG_S_VMIXER + 2):
RegLog(1, "VMIXER1", rmem, core, value);
break;
case REG_P_MMIX:
RegLog(1, "MMIX", rmem, core, value);
break;
case REG_A_IRQA:
RegLog(2, "IRQAH", rmem, core, value);
break;
case (REG_A_IRQA + 2):
RegLog(2, "IRQAL", rmem, core, value);
break;
case (REG_S_KON + 2):
RegLog(1, "KON1", rmem, core, value);
break;
case REG_S_KON:
RegLog(1, "KON0", rmem, core, value);
break;
case (REG_S_KOFF + 2):
RegLog(1, "KOFF1", rmem, core, value);
break;
case REG_S_KOFF:
RegLog(1, "KOFF0", rmem, core, value);
break;
case REG_A_TSA:
RegLog(2, "TSAH", rmem, core, value);
break;
case (REG_A_TSA + 2):
RegLog(2, "TSAL", rmem, core, value);
break;
case REG_S_ENDX:
//ConLog("* SPU2: Core %d ENDX cleared!\n",core);
RegLog(2, "ENDX0", rmem, core, value);
break;
case (REG_S_ENDX + 2):
//ConLog("* SPU2: Core %d ENDX cleared!\n",core);
RegLog(2, "ENDX1", rmem, core, value);
break;
case REG_P_MVOLL:
RegLog(1, "MVOLL", rmem, core, value);
break;
case REG_P_MVOLR:
RegLog(1, "MVOLR", rmem, core, value);
break;
case REG_S_ADMAS:
RegLog(3, "ADMAS", rmem, core, value);
//ConLog("* SPU2: Core %d AutoDMAControl set to %d\n",core,value);
break;
case REG_P_STATX:
RegLog(3, "STATX", rmem, core, value);
break;
case REG_A_ESA:
RegLog(2, "ESAH", rmem, core, value);
break;
case (REG_A_ESA + 2):
RegLog(2, "ESAL", rmem, core, value);
break;
case REG_A_EEA:
RegLog(2, "EEAH", rmem, core, value);
break;
#define LOG_REVB_REG(n, t) \
case R_##n: \
RegLog(2, t "H", mem, core, value); \
break; \
case (R_##n + 2): \
RegLog(2, t "L", mem, core, value); \
break;
LOG_REVB_REG(APF1_SIZE, "APF1_SIZE")
LOG_REVB_REG(APF2_SIZE, "APF2_SIZE")
LOG_REVB_REG(SAME_L_SRC, "SAME_L_SRC")
LOG_REVB_REG(SAME_R_SRC, "SAME_R_SRC")
LOG_REVB_REG(DIFF_L_SRC, "DIFF_L_SRC")
LOG_REVB_REG(DIFF_R_SRC, "DIFF_R_SRC")
LOG_REVB_REG(SAME_L_DST, "SAME_L_DST")
LOG_REVB_REG(SAME_R_DST, "SAME_R_DST")
LOG_REVB_REG(DIFF_L_DST, "DIFF_L_DST")
LOG_REVB_REG(DIFF_R_DST, "DIFF_R_DST")
LOG_REVB_REG(COMB1_L_SRC, "COMB1_L_SRC")
LOG_REVB_REG(COMB1_R_SRC, "COMB1_R_SRC")
LOG_REVB_REG(COMB2_L_SRC, "COMB2_L_SRC")
LOG_REVB_REG(COMB2_R_SRC, "COMB2_R_SRC")
LOG_REVB_REG(COMB3_L_SRC, "COMB3_L_SRC")
LOG_REVB_REG(COMB3_R_SRC, "COMB3_R_SRC")
LOG_REVB_REG(COMB4_L_SRC, "COMB4_L_SRC")
LOG_REVB_REG(COMB4_R_SRC, "COMB4_R_SRC")
LOG_REVB_REG(APF1_L_DST, "APF1_L_DST")
LOG_REVB_REG(APF1_R_DST, "APF1_R_DST")
LOG_REVB_REG(APF2_L_DST, "APF2_L_DST")
LOG_REVB_REG(APF2_R_DST, "APF2_R_DST")
default:
RegLog(2, "UNKNOWN", rmem, core, value);
spu2Ru16(mem) = value;
}
}
}
#undef RegLog
#endif // PCSX2_DEVBUILD

6
pcsx2/SPU2/Debug.h
View File

@ -48,6 +48,8 @@ namespace SPU2
extern void DoFullDump();
extern void WriteRegLog(const char* action, u32 rmem, u16 value);
#else
__fi static constexpr bool MsgToConsole() { return false; }
@ -72,6 +74,8 @@ namespace SPU2
#endif
} // namespace SPU2
#ifdef PCSX2_DEVBUILD
namespace WaveDump
{
enum CoreSourceType
@ -110,3 +114,5 @@ using WaveDump::CoreSrc_Input;
using WaveDump::CoreSrc_PostReverb;
using WaveDump::CoreSrc_PreReverb;
using WaveDump::CoreSrc_WetVoiceMix;
#endif

8
pcsx2/SPU2/Dma.cpp
View File

@ -21,7 +21,7 @@
#include "IopHw.h"
#include "Config.h"
extern u8 callirq;
#ifdef PCSX2_DEVBUILD
static FILE* DMA4LogFile = nullptr;
static FILE* DMA7LogFile = nullptr;
@ -89,6 +89,8 @@ void DMALogClose()
safe_fclose(ADMAOutLogFile);
}
#endif
void V_Core::LogAutoDMA(FILE* fp)
{
if (!SPU2::DMALog() || !fp || !DMAPtr)
@ -109,7 +111,9 @@ void V_Core::AutoDMAReadBuffer(int mode) //mode: 0= split stereo; 1 = do not spl
int size = std::min(InputDataLeft, (u32)0x200);
if (!leftbuffer)
size = std::min(size, 0x100);
#ifdef PCSX2_DEVBUILD
LogAutoDMA(Index ? ADMA7LogFile : ADMA4LogFile);
#endif
//ConLog("Refilling ADMA buffer at %x OutPos %x with %x\n", spos, OutPos, size);
// HACKFIX!! DMAPtr can be invalid after a savestate load, so the savestate just forces it
// to nullptr and we ignore it here. (used to work in old VM editions of PCSX2 with fixed
@ -246,10 +250,12 @@ void V_Core::FinishDMAwrite()
DMAICounter = ReadSize;
#ifdef PCSX2_DEVBUILD
if (Index == 0)
DMA4LogWrite(DMAPtr, ReadSize << 1);
else
DMA7LogWrite(DMAPtr, ReadSize << 1);
#endif
u32 buff1end = ActiveTSA + std::min(ReadSize, (u32)0x100 + std::abs(DMAICounter / 4));
u32 start = ActiveTSA;

4
pcsx2/SPU2/Dma.h
View File

@ -18,8 +18,12 @@
#define MADR (Index == 0 ? HW_DMA4_MADR : HW_DMA7_MADR)
#define TADR (Index == 0 ? HW_DMA4_TADR : HW_DMA7_TADR)
#ifdef PCSX2_DEVBUILD
extern void DMALogOpen();
extern void ADMAOutLogWrite(void* lpData, u32 ulSize);
extern void DMA4LogWrite(void* lpData, u32 ulSize);
extern void DMA7LogWrite(void* lpData, u32 ulSize);
extern void DMALogClose();
#endif

10
pcsx2/SPU2/Mixer.cpp
View File

@ -684,8 +684,10 @@ StereoOut32 V_Core::Mix(const VoiceMixSet& inVoices, const StereoOut32& Input, c
// Write mixed results to logfile (if enabled)
#ifdef PCSX2_DEVBUILD
WaveDump::WriteCore(Index, CoreSrc_DryVoiceMix, Voices.Dry);
WaveDump::WriteCore(Index, CoreSrc_WetVoiceMix, Voices.Wet);
#endif
// Mix in the Input data
@ -739,11 +741,15 @@ StereoOut32 V_Core::Mix(const VoiceMixSet& inVoices, const StereoOut32& Input, c
TW.Left += Ext.Left & WetGate.ExtL;
TW.Right += Ext.Right & WetGate.ExtR;
#ifdef PCSX2_DEVBUILD
WaveDump::WriteCore(Index, CoreSrc_PreReverb, TW);
#endif
StereoOut32 RV = DoReverb(TW);
#ifdef PCSX2_DEVBUILD
WaveDump::WriteCore(Index, CoreSrc_PostReverb, RV);
#endif
// Mix Dry + Wet
// (master volume is applied later to the result of both outputs added together).
@ -773,8 +779,10 @@ __forceinline
// CDDA is on Core 1:
(PlayMode & 8) ? StereoOut32::Empty : ApplyVolume(Cores[1].ReadInput(), Cores[1].InpVol)};
#ifdef PCSX2_DEVBUILD
WaveDump::WriteCore(0, CoreSrc_Input, InputData[0]);
WaveDump::WriteCore(1, CoreSrc_Input, InputData[1]);
#endif
// Todo: Replace me with memzero initializer!
VoiceMixSet VoiceData[2] = {VoiceMixSet::Empty, VoiceMixSet::Empty}; // mixed voice data for each core.
@ -794,7 +802,9 @@ __forceinline
spu2M_WriteFast(0x800 + OutPos, Ext.Left);
spu2M_WriteFast(0xA00 + OutPos, Ext.Right);
#ifdef PCSX2_DEVBUILD
WaveDump::WriteCore(0, CoreSrc_External, Ext);
#endif
Ext = ApplyVolume(Ext, Cores[1].ExtVol);
StereoOut32 Out(Cores[1].Mix(VoiceData[1], InputData[1], Ext));

310
pcsx2/SPU2/RegLog.cpp
View File

@ -1,310 +0,0 @@
/* PCSX2 - PS2 Emulator for PCs
* Copyright (C) 2002-2020 PCSX2 Dev Team
*
* PCSX2 is free software: you can redistribute it and/or modify it under the terms
* of the GNU Lesser General Public License as published by the Free Software Found-
* ation, either version 3 of the License, or (at your option) any later version.
*
* PCSX2 is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along with PCSX2.
* If not, see <http://www.gnu.org/licenses/>.
*/
#include "PrecompiledHeader.h"
#include "Global.h"
const char* ParamNames[8] = {"VOLL", "VOLR", "PITCH", "ADSR1", "ADSR2", "ENVX", "VOLXL", "VOLXR"};
const char* AddressNames[6] = {"SSAH", "SSAL", "LSAH", "LSAL", "NAXH", "NAXL"};
__forceinline void _RegLog_(const char* action, int level, const char* RName, u32 mem, u32 core, u16 value)
{
if (level > 1)
SPU2::FileLog("[%10d] SPU2 %s mem %08x (core %d, register %s) value %04x\n",
Cycles, action, mem, core, RName, value);
}
#define RegLog(lev, rname, mem, core, val) _RegLog_(action, lev, rname, mem, core, val)
void SPU2writeLog(const char* action, u32 rmem, u16 value)
{
if (!IsDevBuild)
return;
//u32 vx=0, vc=0;
u32 core = 0, omem, mem;
omem = mem = rmem & 0x7FF; //FFFF;
if (mem & 0x400)
{
omem ^= 0x400;
core = 1;
}
if (omem < 0x0180) // Voice Params (VP)
{
const u32 voice = (omem & 0x1F0) >> 4;
const u32 param = (omem & 0xF) >> 1;
char dest[192];
sprintf(dest, "Voice %d %s", voice, ParamNames[param]);
RegLog(2, dest, rmem, core, value);
}
else if ((omem >= 0x01C0) && (omem < 0x02E0)) // Voice Addressing Params (VA)
{
const u32 voice = ((omem - 0x01C0) / 12);
const u32 address = ((omem - 0x01C0) % 12) >> 1;
char dest[192];
sprintf(dest, "Voice %d %s", voice, AddressNames[address]);
RegLog(2, dest, rmem, core, value);
}
else if ((mem >= 0x0760) && (mem < 0x07b0))
{
omem = mem;
core = 0;
if (mem >= 0x0788)
{
omem -= 0x28;
core = 1;
}
switch (omem)
{
case REG_P_EVOLL:
RegLog(2, "EVOLL", rmem, core, value);
break;
case REG_P_EVOLR:
RegLog(2, "EVOLR", rmem, core, value);
break;
case REG_P_AVOLL:
if (core)
{
RegLog(2, "AVOLL", rmem, core, value);
}
break;
case REG_P_AVOLR:
if (core)
{
RegLog(2, "AVOLR", rmem, core, value);
}
break;
case REG_P_BVOLL:
RegLog(2, "BVOLL", rmem, core, value);
break;
case REG_P_BVOLR:
RegLog(2, "BVOLR", rmem, core, value);
break;
case REG_P_MVOLXL:
RegLog(2, "MVOLXL", rmem, core, value);
break;
case REG_P_MVOLXR:
RegLog(2, "MVOLXR", rmem, core, value);
break;
case R_IIR_VOL:
RegLog(2, "IIR_VOL", rmem, core, value);
break;
case R_COMB1_VOL:
RegLog(2, "COMB1_VOL", rmem, core, value);
break;
case R_COMB2_VOL:
RegLog(2, "COMB2_VOL", rmem, core, value);
break;
case R_COMB3_VOL:
RegLog(2, "COMB3_VOL", rmem, core, value);
break;
case R_COMB4_VOL:
RegLog(2, "COMB4_VOL", rmem, core, value);
break;
case R_WALL_VOL:
RegLog(2, "WALL_VOL", rmem, core, value);
break;
case R_APF1_VOL:
RegLog(2, "APF1_VOL", rmem, core, value);
break;
case R_APF2_VOL:
RegLog(2, "APF2_VOL", rmem, core, value);
break;
case R_IN_COEF_L:
RegLog(2, "IN_COEF_L", rmem, core, value);
break;
case R_IN_COEF_R:
RegLog(2, "IN_COEF_R", rmem, core, value);
break;
}
}
else if ((mem >= 0x07C0) && (mem < 0x07CE))
{
switch (mem)
{
case SPDIF_OUT:
RegLog(2, "SPDIF_OUT", rmem, -1, value);
break;
case SPDIF_IRQINFO:
RegLog(2, "SPDIF_IRQINFO", rmem, -1, value);
break;
case 0x7c4:
if (Spdif.Unknown1 != value && SPU2::MsgToConsole())
SPU2::ConLog("* SPU2: SPDIF Unknown Register 1 set to %04x\n", value);
RegLog(2, "SPDIF_UNKNOWN1", rmem, -1, value);
break;
case SPDIF_MODE:
if (Spdif.Mode != value && SPU2::MsgToConsole())
SPU2::ConLog("* SPU2: SPDIF Mode set to %04x\n", value);
RegLog(2, "SPDIF_MODE", rmem, -1, value);
break;
case SPDIF_MEDIA:
if (Spdif.Media != value && SPU2::MsgToConsole())
SPU2::ConLog("* SPU2: SPDIF Media set to %04x\n", value);
RegLog(2, "SPDIF_MEDIA", rmem, -1, value);
break;
case 0x7ca:
if (Spdif.Unknown2 != value && SPU2::MsgToConsole())
SPU2::ConLog("* SPU2: SPDIF Unknown Register 2 set to %04x\n", value);
RegLog(2, "SPDIF_UNKNOWN2", rmem, -1, value);
break;
case SPDIF_PROTECT:
if (Spdif.Protection != value && SPU2::MsgToConsole())
SPU2::ConLog("* SPU2: SPDIF Copy set to %04x\n", value);
RegLog(2, "SPDIF_PROTECT", rmem, -1, value);
break;
}
UpdateSpdifMode();
}
else
{
switch (omem)
{
case REG_C_ATTR:
RegLog(4, "ATTR", rmem, core, value);
break;
case REG_S_PMON:
RegLog(1, "PMON0", rmem, core, value);
break;
case (REG_S_PMON + 2):
RegLog(1, "PMON1", rmem, core, value);
break;
case REG_S_NON:
RegLog(1, "NON0", rmem, core, value);
break;
case (REG_S_NON + 2):
RegLog(1, "NON1", rmem, core, value);
break;
case REG_S_VMIXL:
RegLog(1, "VMIXL0", rmem, core, value);
break;
case (REG_S_VMIXL + 2):
RegLog(1, "VMIXL1", rmem, core, value);
break;
case REG_S_VMIXEL:
RegLog(1, "VMIXEL0", rmem, core, value);
break;
case (REG_S_VMIXEL + 2):
RegLog(1, "VMIXEL1", rmem, core, value);
break;
case REG_S_VMIXR:
RegLog(1, "VMIXR0", rmem, core, value);
break;
case (REG_S_VMIXR + 2):
RegLog(1, "VMIXR1", rmem, core, value);
break;
case REG_S_VMIXER:
RegLog(1, "VMIXER0", rmem, core, value);
break;
case (REG_S_VMIXER + 2):
RegLog(1, "VMIXER1", rmem, core, value);
break;
case REG_P_MMIX:
RegLog(1, "MMIX", rmem, core, value);
break;
case REG_A_IRQA:
RegLog(2, "IRQAH", rmem, core, value);
break;
case (REG_A_IRQA + 2):
RegLog(2, "IRQAL", rmem, core, value);
break;
case (REG_S_KON + 2):
RegLog(1, "KON1", rmem, core, value);
break;
case REG_S_KON:
RegLog(1, "KON0", rmem, core, value);
break;
case (REG_S_KOFF + 2):
RegLog(1, "KOFF1", rmem, core, value);
break;
case REG_S_KOFF:
RegLog(1, "KOFF0", rmem, core, value);
break;
case REG_A_TSA:
RegLog(2, "TSAH", rmem, core, value);
break;
case (REG_A_TSA + 2):
RegLog(2, "TSAL", rmem, core, value);
break;
case REG_S_ENDX:
//ConLog("* SPU2: Core %d ENDX cleared!\n",core);
RegLog(2, "ENDX0", rmem, core, value);
break;
case (REG_S_ENDX + 2):
//ConLog("* SPU2: Core %d ENDX cleared!\n",core);
RegLog(2, "ENDX1", rmem, core, value);
break;
case REG_P_MVOLL:
RegLog(1, "MVOLL", rmem, core, value);
break;
case REG_P_MVOLR:
RegLog(1, "MVOLR", rmem, core, value);
break;
case REG_S_ADMAS:
RegLog(3, "ADMAS", rmem, core, value);
//ConLog("* SPU2: Core %d AutoDMAControl set to %d\n",core,value);
break;
case REG_P_STATX:
RegLog(3, "STATX", rmem, core, value);
break;
case REG_A_ESA:
RegLog(2, "ESAH", rmem, core, value);
break;
case (REG_A_ESA + 2):
RegLog(2, "ESAL", rmem, core, value);
break;
case REG_A_EEA:
RegLog(2, "EEAH", rmem, core, value);
break;
#define LOG_REVB_REG(n, t) \
case R_##n: \
RegLog(2, t "H", mem, core, value); \
break; \
case (R_##n + 2): \
RegLog(2, t "L", mem, core, value); \
break;
LOG_REVB_REG(APF1_SIZE, "APF1_SIZE")
LOG_REVB_REG(APF2_SIZE, "APF2_SIZE")
LOG_REVB_REG(SAME_L_SRC, "SAME_L_SRC")
LOG_REVB_REG(SAME_R_SRC, "SAME_R_SRC")
LOG_REVB_REG(DIFF_L_SRC, "DIFF_L_SRC")
LOG_REVB_REG(DIFF_R_SRC, "DIFF_R_SRC")
LOG_REVB_REG(SAME_L_DST, "SAME_L_DST")
LOG_REVB_REG(SAME_R_DST, "SAME_R_DST")
LOG_REVB_REG(DIFF_L_DST, "DIFF_L_DST")
LOG_REVB_REG(DIFF_R_DST, "DIFF_R_DST")
LOG_REVB_REG(COMB1_L_SRC, "COMB1_L_SRC")
LOG_REVB_REG(COMB1_R_SRC, "COMB1_R_SRC")
LOG_REVB_REG(COMB2_L_SRC, "COMB2_L_SRC")
LOG_REVB_REG(COMB2_R_SRC, "COMB2_R_SRC")
LOG_REVB_REG(COMB3_L_SRC, "COMB3_L_SRC")
LOG_REVB_REG(COMB3_R_SRC, "COMB3_R_SRC")
LOG_REVB_REG(COMB4_L_SRC, "COMB4_L_SRC")
LOG_REVB_REG(COMB4_R_SRC, "COMB4_R_SRC")
LOG_REVB_REG(APF1_L_DST, "APF1_L_DST")
LOG_REVB_REG(APF1_R_DST, "APF1_R_DST")
LOG_REVB_REG(APF2_L_DST, "APF2_L_DST")
LOG_REVB_REG(APF2_R_DST, "APF2_R_DST")
default:
RegLog(2, "UNKNOWN", rmem, core, value);
spu2Ru16(mem) = value;
}
}
}

2
pcsx2/SPU2/SndOut.cpp
View File

@ -447,8 +447,10 @@ void SPU2::SetOutputPaused(bool paused)
void SndBuffer::Write(const StereoOut32& Sample)
{
#ifdef PCSX2_DEVBUILD
// Log final output to wavefile.
WaveDump::WriteCore(1, CoreSrc_External, Sample.DownSample());
#endif
if (WavRecordEnabled)
RecordWrite(Sample.DownSample());

4
pcsx2/SPU2/Wavedump_wav.cpp
View File

@ -26,6 +26,8 @@
#include <memory>
#include <mutex>
#ifdef PCSX2_DEVBUILD
namespace WaveDump
{
static std::unique_ptr<Common::WAVWriter> m_CoreWav[2][CoreSrc_Count];
@ -88,6 +90,8 @@ namespace WaveDump
}
} // namespace WaveDump
#endif // PCSX2_DEVBUILD
bool WavRecordEnabled = false;
static std::unique_ptr<Common::WAVWriter> m_wavrecord;

15
pcsx2/SPU2/spu2.cpp
View File

@ -15,6 +15,7 @@
#include "PrecompiledHeader.h"
#include "SPU2/Global.h"
#include "SPU2/Debug.h"
#include "SPU2/spu2.h"
#include "SPU2/Dma.h"
#include "R3000A.h"
@ -214,9 +215,11 @@ bool SPU2::Open()
SPU2::OpenFileLog();
#endif
#ifdef PCSX2_DEVBUILD
DMALogOpen();
FileLog("[%10d] SPU2 Open\n", Cycles);
#endif
lClocks = psxRegs.cycle;
@ -224,7 +227,9 @@ bool SPU2::Open()
SampleRate = static_cast<int>(std::round(static_cast<double>(GetConsoleSampleRate()) * s_device_sample_rate_multiplier));
InitSndBuffer();
#ifdef PCSX2_DEVBUILD
WaveDump::Open();
#endif
return true;
}
@ -235,10 +240,10 @@ void SPU2::Close()
SndBuffer::Cleanup();
#ifdef PCSX2_DEVBUILD
WaveDump::Close();
DMALogClose();
#ifdef PCSX2_DEVBUILD
DoFullDump();
CloseFileLog();
#endif
@ -301,8 +306,10 @@ u16 SPU2read(u32 rmem)
else
{
ret = *(regtable[(mem >> 1)]);
#ifdef PCSX2_DEVBUILD
//FileLog("[%10d] SPU2 read mem %x (core %d, register %x): %x\n",Cycles, mem, core, (omem & 0x7ff), ret);
SPU2writeLog("read", rmem, ret);
SPU2::WriteRegLog("read", rmem, ret);
#endif
}
}
@ -321,7 +328,9 @@ void SPU2write(u32 rmem, u16 value)
Cores[0].WriteRegPS1(rmem, value);
else
{
SPU2writeLog("write", rmem, value);
#ifdef PCSX2_DEVBUILD
SPU2::WriteRegLog("write", rmem, value);
#endif
SPU2_FastWrite(rmem, value);
}
}

3
pcsx2/SPU2/spu2.h
View File

@ -74,11 +74,8 @@ void SPU2interruptDMA7();
void SPU2readDMA7Mem(u16* pMem, u32 size);
void SPU2writeDMA7Mem(u16* pMem, u32 size);
extern u8 callirq;
extern u32 lClocks;
extern void SPU2writeLog(const char* action, u32 rmem, u16 value);
extern void TimeUpdate(u32 cClocks);
extern void SPU2_FastWrite(u32 rmem, u16 value);

1
pcsx2/pcsx2core.vcxproj
View File

@ -246,7 +246,6 @@
<ClCompile Include="SPU2\Debug.cpp" />
<ClCompile Include="SPU2\Dma.cpp" />
<ClCompile Include="SPU2\DplIIdecoder.cpp" />
<ClCompile Include="SPU2\RegLog.cpp" />
<ClCompile Include="SPU2\SndOut_Cubeb.cpp" />
<ClCompile Include="SPU2\SndOut_XAudio2.cpp" />
<ClCompile Include="SPU2\wavedump_wav.cpp" />

3
pcsx2/pcsx2core.vcxproj.filters
View File

@ -854,9 +854,6 @@
<ClCompile Include="SPU2\ReadInput.cpp">
<Filter>System\Ps2\SPU2</Filter>
</ClCompile>
<ClCompile Include="SPU2\RegLog.cpp">
<Filter>System\Ps2\SPU2</Filter>
</ClCompile>
<ClCompile Include="SPU2\RegTable.cpp">
<Filter>System\Ps2\SPU2</Filter>
</ClCompile>