mirror of https://github.com/PCSX2/pcsx2.git
Merge pull request #214 from xsacha/init_vars
Init vars directly instead of using dedicated functions
This commit is contained in:
commit
b574d06f5f
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@ -25,7 +25,7 @@
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using namespace Threading;
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using namespace R5900;
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__aligned16 u8 g_RealGSMem[0x2000];
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__aligned16 u8 g_RealGSMem[Ps2MemSize::GSregs];
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void gsOnModeChanged( Fixed100 framerate, u32 newTickrate )
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{
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@ -46,11 +46,6 @@ void gsSetRegionMode( GS_RegionMode region )
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// Make sure framelimiter options are in sync with the plugin's capabilities.
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void gsInit()
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{
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memzero(g_RealGSMem);
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}
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void gsReset()
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{
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GetMTGS().ResetGS();
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@ -359,7 +359,6 @@ extern SysMtgsThread& GetMTGS();
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/////////////////////////////////////////////////////////////////////////////
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// Generalized GS Functions and Stuff
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extern void gsInit();
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extern s32 gsOpen();
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extern void gsClose();
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extern void gsReset();
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12
pcsx2/Hw.cpp
12
pcsx2/Hw.cpp
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@ -39,10 +39,9 @@ void hwInit()
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VifUnpackSSE_Init();
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gsInit();
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sifInit();
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sprInit();
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ipuInit();
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// From ipuInit
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decoder.picture_structure = FRAME_PICTURE; //default: progressive...my guess:P
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ipu_cmd.current = 0xffffffff;
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hwInitialized = true;
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}
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@ -70,8 +69,7 @@ void hwReset()
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SPU2reset();
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sifInit();
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sprInit();
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sifReset();
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gsReset();
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gifUnit.Reset();
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@ -87,7 +85,7 @@ __fi uint intcInterrupt()
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{
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if ((psHu32(INTC_STAT)) == 0) {
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//DevCon.Warning("*PCSX2*: intcInterrupt already cleared");
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return 0;
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return 0;
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}
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if ((psHu32(INTC_STAT) & psHu32(INTC_MASK)) == 0)
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{
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@ -67,23 +67,16 @@ __fi void IPUProcessInterrupt()
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/////////////////////////////////////////////////////////
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// Register accesses (run on EE thread)
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int ipuInit()
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{
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memzero(ipuRegs);
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memzero(g_BP);
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memzero(decoder);
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decoder.picture_structure = FRAME_PICTURE; //default: progressive...my guess:P
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ipu_fifo.init();
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ipu_cmd.clear();
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return 0;
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}
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void ipuReset()
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{
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ipuInit();
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memzero(g_BP);
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memzero(decoder);
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memzero(ipuRegs);
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decoder.picture_structure = FRAME_PICTURE; //default: progressive...my guess:P
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ipu_fifo.init();
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ipu_cmd.clear();
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}
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void ReportIPU()
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@ -284,7 +284,6 @@ static IPUregisters& ipuRegs = (IPUregisters&)eeHw[0x2000];
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extern __aligned16 tIPU_cmd ipu_cmd;
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extern int coded_block_pattern;
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extern int ipuInit();
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extern void ipuReset();
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extern u32 ipuRead32(u32 mem);
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@ -28,10 +28,6 @@ static bool spr0lastqwc = false;
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static bool spr1lastqwc = false;
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static u32 mfifotransferred = 0;
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void sprInit()
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{
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}
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static void TestClearVUs(u32 madr, u32 qwc, bool isWrite)
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{
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if (madr >= 0x11000000 && (madr < 0x11010000))
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@ -119,8 +115,7 @@ int _SPR0chain()
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__fi void SPR0chain()
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{
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int cycles = 0;
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cycles = _SPR0chain() * BIAS;
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int cycles = _SPR0chain() * BIAS;
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CPU_INT(DMAC_FROM_SPR, cycles);
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}
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@ -17,7 +17,6 @@
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#ifndef __SPR_H__
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#define __SPR_H__
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extern void sprInit();
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extern void dmaSPR0();
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extern void dmaSPR1();
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extern void SPRFROMinterrupt();
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@ -20,7 +20,7 @@
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#include "IopCommon.h"
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#include "Sif.h"
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void sifInit()
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void sifReset()
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{
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memzero(sif0);
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memzero(sif1);
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@ -124,7 +124,7 @@ struct _sif
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extern _sif sif0, sif1, sif2;
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extern void sifInit();
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extern void sifReset();
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extern void SIF0Dma();
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extern void SIF1Dma();
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