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sVU: same address translation fix as in r3697 

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3700 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
sudonim1 2010-08-30 18:26:36 +00:00
parent f438a8c8a3
commit b5472c80ec
1 changed files with 12 additions and 10 deletions
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22
pcsx2/x86/sVU_Lower.cpp
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@ -27,6 +27,8 @@
#include "sVU_Debug.h" #include "sVU_Debug.h"
#include "sVU_zerorec.h" #include "sVU_zerorec.h"
#include "Gif.h" #include "Gif.h"
using namespace x86Emitter;
//------------------------------------------------------------------ //------------------------------------------------------------------
//------------------------------------------------------------------ //------------------------------------------------------------------
@ -678,7 +680,6 @@ void _loadEAX(VURegs *VU, int x86reg, uptr offset, int info)
//------------------------------------------------------------------ //------------------------------------------------------------------
int recVUTransformAddr(int x86reg, VURegs* VU, int vireg, int imm) int recVUTransformAddr(int x86reg, VURegs* VU, int vireg, int imm)
{ {
u8* pjmp[2];
if( x86reg == EAX ) { if( x86reg == EAX ) {
if (imm) ADD32ItoR(x86reg, imm); if (imm) ADD32ItoR(x86reg, imm);
} }
@ -694,16 +695,17 @@ int recVUTransformAddr(int x86reg, VURegs* VU, int vireg, int imm)
else { else {
// VU0 has a somewhat interesting memory mapping: // VU0 has a somewhat interesting memory mapping:
// if addr >= 0x4000, reads VU1's VF regs and VI regs // if addr & 0x4000, reads VU1's VF regs and VI regs
// if addr < 0x4000, wrap around at 0x1000 // otherwise, wrap around at 0x1000
CMP32ItoR(EAX, 0x400); xTEST(eax, 0x400);
pjmp[0] = JL8(0); // if addr >= 0x4000, reads VU1's VF regs and VI regs xForwardJNZ8 vu1regs; // if addr & 0x4000, reads VU1's VF regs and VI regs
AND32ItoR(EAX, 0x43f); xAND(eax, 0xff); // if !(addr & 0x4000), wrap around
pjmp[1] = JMP8(0); xForwardJump8 done;
x86SetJ8(pjmp[0]); vu1regs.SetTarget();
AND32ItoR(EAX, 0xff); // if addr < 0x4000, wrap around xAND(eax, 0x3f);
x86SetJ8(pjmp[1]); xADD(eax, (u128*)VU1.VF - (u128*)VU0.Mem);
done.SetTarget();
SHL32ItoR(EAX, 4); // multiply by 16 (shift left by 4) SHL32ItoR(EAX, 4); // multiply by 16 (shift left by 4)
} }