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Applied SUPERVU_VIBRANCHDELAY fix to IBGEZ/IBGTZ/IBLEZ/IBLTZ opcodes. ICO SPS will be gone without gamefix now :) 

WinGUI: Added SSSE3 detection message into a CPU config dialog.

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@596 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
tmkkmac 2009-02-25 09:22:36 +00:00
parent 2110018e58
commit b50b9df3cf
2 changed files with 45 additions and 4 deletions
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1
pcsx2/windows/CpuDlg.cpp
View File

@ -80,6 +80,7 @@ BOOL CALLBACK CpuDlgProc(HWND hW, UINT uMsg, WPARAM wParam, LPARAM lParam)
if(cpucaps.hasStreamingSIMDExtensions) strcat(features,",SSE");
if(cpucaps.hasStreamingSIMD2Extensions) strcat(features,",SSE2");
if(cpucaps.hasStreamingSIMD3Extensions) strcat(features,",SSE3");
if(cpucaps.hasSupplementalStreamingSIMD3Extensions) strcat(features,",SSSE3");
if(cpucaps.hasStreamingSIMD4Extensions) strcat(features,",SSE4.1");
// if(cpucaps.has3DNOWInstructionExtensions) strcat(features,",3DNOW");
// if(cpucaps.has3DNOWInstructionExtensionsExt)strcat(features,",3DNOW+");

48
pcsx2/x86/iVUzerorec.cpp
View File

@ -3686,9 +3686,19 @@ void recVUMI_IBEQ( VURegs* vuu, s32 info )
void recVUMI_IBGEZ( VURegs* vuu, s32 info )
{
int fsreg = _checkX86reg(X86TYPE_VI|(VU==&VU1?X86TYPE_VU1:0), _Fs_, MODE_READ);
int fsreg;
s_JumpX86 = _allocX86reg(-1, X86TYPE_VUJUMP, 0, MODE_WRITE);
#ifdef SUPERVU_VIBRANCHDELAY
if( s_pCurInst->vicached >= 0 && s_pCurInst->vicached == _Fs_ ) {
fsreg = -1;
}
else
#endif
{
fsreg = _checkX86reg(X86TYPE_VI|(VU==&VU1?X86TYPE_VU1:0), _Fs_, MODE_READ);
}
if( fsreg >= 0 ) {
OR16RtoR(fsreg, fsreg);
j8Ptr[ 0 ] = JS8( 0 );
@ -3703,9 +3713,19 @@ void recVUMI_IBGEZ( VURegs* vuu, s32 info )
void recVUMI_IBGTZ( VURegs* vuu, s32 info )
{
int fsreg = _checkX86reg(X86TYPE_VI|(VU==&VU1?X86TYPE_VU1:0), _Fs_, MODE_READ);
int fsreg;
s_JumpX86 = _allocX86reg(-1, X86TYPE_VUJUMP, 0, MODE_WRITE);
#ifdef SUPERVU_VIBRANCHDELAY
if( s_pCurInst->vicached >= 0 && s_pCurInst->vicached == _Fs_ ) {
fsreg = -1;
}
else
#endif
{
fsreg = _checkX86reg(X86TYPE_VI|(VU==&VU1?X86TYPE_VU1:0), _Fs_, MODE_READ);
}
if( fsreg >= 0 ) {
CMP16ItoR(fsreg, 0);
j8Ptr[ 0 ] = JLE8( 0 );
@ -3719,9 +3739,19 @@ void recVUMI_IBGTZ( VURegs* vuu, s32 info )
void recVUMI_IBLEZ( VURegs* vuu, s32 info )
{
int fsreg = _checkX86reg(X86TYPE_VI|(VU==&VU1?X86TYPE_VU1:0), _Fs_, MODE_READ);
int fsreg;
s_JumpX86 = _allocX86reg(-1, X86TYPE_VUJUMP, 0, MODE_WRITE);
#ifdef SUPERVU_VIBRANCHDELAY
if( s_pCurInst->vicached >= 0 && s_pCurInst->vicached == _Fs_ ) {
fsreg = -1;
}
else
#endif
{
fsreg = _checkX86reg(X86TYPE_VI|(VU==&VU1?X86TYPE_VU1:0), _Fs_, MODE_READ);
}
if( fsreg >= 0 ) {
CMP16ItoR(fsreg, 0);
j8Ptr[ 0 ] = JG8( 0 );
@ -3735,9 +3765,19 @@ void recVUMI_IBLEZ( VURegs* vuu, s32 info )
void recVUMI_IBLTZ( VURegs* vuu, s32 info )
{
int fsreg = _checkX86reg(X86TYPE_VI|(VU==&VU1?X86TYPE_VU1:0), _Fs_, MODE_READ);
int fsreg;
s_JumpX86 = _allocX86reg(-1, X86TYPE_VUJUMP, 0, MODE_WRITE);
#ifdef SUPERVU_VIBRANCHDELAY
if( s_pCurInst->vicached >= 0 && s_pCurInst->vicached == _Fs_ ) {
fsreg = -1;
}
else
#endif
{
fsreg = _checkX86reg(X86TYPE_VI|(VU==&VU1?X86TYPE_VU1:0), _Fs_, MODE_READ);
}
if( fsreg >= 0 ) {
OR16RtoR(fsreg, fsreg);
j8Ptr[ 0 ] = JNS8( 0 );