mirror of https://github.com/PCSX2/pcsx2.git
IPU: Wait for IPU_FROM to be ready
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@ -698,13 +698,6 @@ __fi bool mpeg2sliceIDEC()
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{
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u16 code;
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// If FROM_IPU is running and there's stuff in the output fifo
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// wait for FROM_IPU to grab it.
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// Tekken 4 does this then kills the IDEC command after IPU0 finishes
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// so it expects no extra data to have been processed, the processing is probably triggered by Output FIFO requests
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if (ipu0ch.chcr.STR && ipuRegs.ctrl.OFC)
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return false;
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switch (ipu_cmd.pos[0])
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{
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case 0:
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@ -728,6 +721,10 @@ __fi bool mpeg2sliceIDEC()
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ipu_cmd.pos[0] = 2;
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while (1)
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{
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// IPU0 isn't ready for data, so let's wait for it to be
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if (!ipu0ch.chcr.STR || ipuRegs.ctrl.OFC || ipu0ch.qwc == 0)
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return false;
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macroblock_8& mb8 = decoder.mb8;
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macroblock_rgb16& rgb16 = decoder.rgb16;
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macroblock_rgb32& rgb32 = decoder.rgb32;
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@ -908,9 +905,6 @@ __fi bool mpeg2sliceIDEC()
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ipu_cmd.pos[1] = 0;
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ipu_cmd.pos[2] = 0;
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if ((ipu0ch.qwc - ipuRegs.ctrl.OFC) <= 0)
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return false;
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}
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finish_idec:
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@ -976,13 +970,6 @@ __fi bool mpeg2_slice()
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{
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int DCT_offset, DCT_stride;
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// If FROM_IPU is running and there's stuff in the output fifo
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// wait for FROM_IPU to grab it.
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// Tekken 4 does this then kills the IDEC command after IPU0 finishes
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// so it expects no extra data to have been processed, the processing is probably triggered by Output FIFO requests
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if (ipu0ch.chcr.STR && ipuRegs.ctrl.OFC)
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return false;
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macroblock_8& mb8 = decoder.mb8;
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macroblock_16& mb16 = decoder.mb16;
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@ -1199,6 +1186,13 @@ __fi bool mpeg2_slice()
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case 3:
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{
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// IPU0 isn't ready for data, so let's wait for it to be
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if (!ipu0ch.chcr.STR || ipuRegs.ctrl.OFC || ipu0ch.qwc == 0)
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{
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ipu_cmd.pos[0] = 3;
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return false;
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}
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pxAssert(decoder.ipu0_data > 0);
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uint read = ipu_fifo.out.write((u32*)decoder.GetIpuDataPtr(), decoder.ipu0_data);
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