IPU: Wait for IPU_FROM to be ready

This commit is contained in:
refractionpcsx2 2022-06-05 15:14:02 +01:00
parent da21a649c0
commit b45b082c06
1 changed files with 12 additions and 18 deletions

View File

@ -698,13 +698,6 @@ __fi bool mpeg2sliceIDEC()
{ {
u16 code; u16 code;
// If FROM_IPU is running and there's stuff in the output fifo
// wait for FROM_IPU to grab it.
// Tekken 4 does this then kills the IDEC command after IPU0 finishes
// so it expects no extra data to have been processed, the processing is probably triggered by Output FIFO requests
if (ipu0ch.chcr.STR && ipuRegs.ctrl.OFC)
return false;
switch (ipu_cmd.pos[0]) switch (ipu_cmd.pos[0])
{ {
case 0: case 0:
@ -728,6 +721,10 @@ __fi bool mpeg2sliceIDEC()
ipu_cmd.pos[0] = 2; ipu_cmd.pos[0] = 2;
while (1) while (1)
{ {
// IPU0 isn't ready for data, so let's wait for it to be
if (!ipu0ch.chcr.STR || ipuRegs.ctrl.OFC || ipu0ch.qwc == 0)
return false;
macroblock_8& mb8 = decoder.mb8; macroblock_8& mb8 = decoder.mb8;
macroblock_rgb16& rgb16 = decoder.rgb16; macroblock_rgb16& rgb16 = decoder.rgb16;
macroblock_rgb32& rgb32 = decoder.rgb32; macroblock_rgb32& rgb32 = decoder.rgb32;
@ -908,9 +905,6 @@ __fi bool mpeg2sliceIDEC()
ipu_cmd.pos[1] = 0; ipu_cmd.pos[1] = 0;
ipu_cmd.pos[2] = 0; ipu_cmd.pos[2] = 0;
if ((ipu0ch.qwc - ipuRegs.ctrl.OFC) <= 0)
return false;
} }
finish_idec: finish_idec:
@ -976,13 +970,6 @@ __fi bool mpeg2_slice()
{ {
int DCT_offset, DCT_stride; int DCT_offset, DCT_stride;
// If FROM_IPU is running and there's stuff in the output fifo
// wait for FROM_IPU to grab it.
// Tekken 4 does this then kills the IDEC command after IPU0 finishes
// so it expects no extra data to have been processed, the processing is probably triggered by Output FIFO requests
if (ipu0ch.chcr.STR && ipuRegs.ctrl.OFC)
return false;
macroblock_8& mb8 = decoder.mb8; macroblock_8& mb8 = decoder.mb8;
macroblock_16& mb16 = decoder.mb16; macroblock_16& mb16 = decoder.mb16;
@ -1199,6 +1186,13 @@ __fi bool mpeg2_slice()
case 3: case 3:
{ {
// IPU0 isn't ready for data, so let's wait for it to be
if (!ipu0ch.chcr.STR || ipuRegs.ctrl.OFC || ipu0ch.qwc == 0)
{
ipu_cmd.pos[0] = 3;
return false;
}
pxAssert(decoder.ipu0_data > 0); pxAssert(decoder.ipu0_data > 0);
uint read = ipu_fifo.out.write((u32*)decoder.GetIpuDataPtr(), decoder.ipu0_data); uint read = ipu_fifo.out.write((u32*)decoder.GetIpuDataPtr(), decoder.ipu0_data);