mirror of https://github.com/PCSX2/pcsx2.git
* Disable newVifUnpack, which I left enabled in the prev commit (it's not ready yet!)
* Added feature to align call targets for EErec functions and blocks on P4's and AMDs, and pack them on Core2/i7's. * Fixed some svn:native props. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@2347 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
Jake.Stine
parent
b5f643950c
commit
b3fead5dc9
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@ -157,9 +157,12 @@ template< typename T > void xWrite( T val );
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class ModSibBase;
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extern void xSetPtr( void* ptr );
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extern u8* xGetPtr();
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extern void xAlignPtr( uint bytes );
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extern void xAdvancePtr( uint bytes );
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extern void xAlignCallTarget();
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extern u8* xGetPtr();
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extern u8* xGetAlignedCallTarget();
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extern JccComparisonType xInvertCond( JccComparisonType src );
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@ -395,6 +395,32 @@ __emitinline void xAlignPtr( uint bytes )
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x86Ptr = (u8*)( ( (uptr)x86Ptr + bytes - 1) & ~(bytes - 1) );
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}
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// Performs best-case alignment for the target CPU, for use prior to starting a new
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// function. This is not meant to be used prior to jump targets, since it doesn't
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// add padding (additionally, speed benefit from jump alignment is minimal, and often
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// a loss).
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__emitinline void xAlignCallTarget()
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{
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// Core2/i7 CPUs prefer unaligned addresses. Checking for SSSE3 is a decent filter.
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// (also align in debug modes for disasm convenience)
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if( IsDebugBuild || !x86caps.hasSupplementalStreamingSIMD3Extensions )
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{
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// - P4's and earlier prefer 16 byte alignment.
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// - AMD Athlons and Phenoms prefer 8 byte alignment, but I don't have an easy
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// heuristic for it yet.
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// - AMD Phenom IIs are unknown (either prefer 8 byte, or unaligned).
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xAlignPtr( 16 );
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}
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}
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__emitinline u8* xGetAlignedCallTarget()
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{
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xAlignCallTarget();
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return x86Ptr;
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}
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__emitinline void xAdvancePtr( uint bytes )
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{
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if( IsDevBuild )
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@ -58,6 +58,11 @@ __forceinline void vif1FLUSH()
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void vif1Init()
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{
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#ifdef newVif1
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extern void initNewVif(int idx);
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initNewVif(1);
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#endif
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SetNewMask(g_vif1Masks, g_vif1HasMask3, 0, 0xffffffff);
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}
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@ -313,19 +318,13 @@ static int __fastcall Vif1TransDirectHL(u32 *data)
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return ret;
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}
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#ifdef newVif1
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extern void initNewVif(int idx);
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extern int nVifUnpack(int idx, u32 *data);
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static int testVif = 0;
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#endif
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static int __fastcall Vif1TransUnpack(u32 *data)
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{
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#ifdef newVif1
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if (!testVif) { initNewVif(1); testVif = 1; }
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//int temp = nVifUnpack(1, data);
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//if (temp >= 0) return temp;
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extern int nVifUnpack(int idx, u32 *data);
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return nVifUnpack(1, data);
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#endif
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XMMRegisters::Freeze();
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if (vif1.vifpacketsize < vif1.tag.size)
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@ -60,7 +60,7 @@ static __forceinline u32 vif_size(u8 num)
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return (num == 0) ? 0x1000 : 0x4000;
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}
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#define newVif // Enable 'newVif' Code (if the below macros are not defined, it will use old non-sse code)
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#define newVif1 // Use New Code for Vif1 Unpacks (needs newVif defined)
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//#define newVif // Enable 'newVif' Code (if the below macros are not defined, it will use old non-sse code)
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//#define newVif1 // Use New Code for Vif1 Unpacks (needs newVif defined)
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//#define newVif0 // Use New Code for Vif0 Unpacks (not implemented)
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#endif
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@ -371,7 +371,7 @@ static DynGenFunc* _DynGen_JITCompile()
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{
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pxAssertMsg( DispatcherReg != NULL, "Please compile the DispatcherReg subroutine *before* JITComple. Thanks." );
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u8* retval = xGetPtr();
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u8* retval = xGetAlignedCallTarget();
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_DynGen_StackFrameCheck();
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xMOV( ecx, &cpuRegs.pc );
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@ -388,7 +388,7 @@ static DynGenFunc* _DynGen_JITCompile()
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static DynGenFunc* _DynGen_JITCompileInBlock()
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{
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u8* retval = xGetPtr();
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u8* retval = xGetAlignedCallTarget();
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xJMP( JITCompile );
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return (DynGenFunc*)retval;
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}
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@ -396,7 +396,7 @@ static DynGenFunc* _DynGen_JITCompileInBlock()
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// called when jumping to variable pc address
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static DynGenFunc* _DynGen_DispatcherReg()
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{
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u8* retval = xGetPtr();
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u8* retval = xGetPtr(); // fallthrough target, can't align it!
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_DynGen_StackFrameCheck();
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xMOV( eax, &cpuRegs.pc );
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@ -410,7 +410,7 @@ static DynGenFunc* _DynGen_DispatcherReg()
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static DynGenFunc* _DynGen_EnterRecompiledCode()
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{
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u8* retval = xGetPtr();
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u8* retval = xGetAlignedCallTarget();
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// "standard" frame pointer setup for aligned stack: Record the original
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// esp into ebp, and then align esp. ebp references the original esp base
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@ -446,6 +446,8 @@ static DynGenFunc* _DynGen_EnterRecompiledCode()
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xMOV( &s_store_ebp, ebp );
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xJMP( ptr32[&DispatcherReg] );
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xAlignCallTarget();
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imm = (uptr)xGetPtr();
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ExitRecompiledCode = (DynGenFunc*)xGetPtr();
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@ -1254,7 +1256,7 @@ void recompileNextInstruction(int delayslot)
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// _flushCachedRegs();
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// g_cpuHasConstReg = 1;
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if (!delayslot && x86Ptr - recPtr > 0x1000)
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if (!delayslot && (xGetPtr() - recPtr > 0x1000) )
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s_nEndBlock = pc;
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}
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@ -1335,9 +1337,8 @@ static void __fastcall recRecompile( const u32 startpc )
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recResetEE();
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}
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x86SetPtr( recPtr );
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x86Align(16);
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recPtr = x86Ptr;
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xSetPtr( recPtr );
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recPtr = xGetAlignedCallTarget();
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s_nBlockFF = false;
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if (HWADDR(startpc) == 0x81fc0)
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@ -1718,14 +1719,14 @@ StartRecomp:
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}
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}
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pxAssert( x86Ptr < recMem+REC_CACHEMEM );
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pxAssert( xGetPtr() < recMem+REC_CACHEMEM );
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pxAssert( recConstBufPtr < recConstBuf + RECCONSTBUF_SIZE );
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pxAssert( x86FpuState == 0 );
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pxAssert(x86Ptr - recPtr < 0x10000);
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s_pCurBlockEx->x86size = x86Ptr - recPtr;
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pxAssert(xGetPtr() - recPtr < 0x10000);
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s_pCurBlockEx->x86size = xGetPtr() - recPtr;
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recPtr = x86Ptr;
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recPtr = xGetPtr();
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pxAssert( (g_cpuHasConstReg&g_cpuFlushedConstReg) == g_cpuHasConstReg );
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@ -26,7 +26,8 @@ struct nVifStruct {
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u32 vuMemLimit; // Use for fast AND
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BlockBuffer* vifBlock; // Block Buffer
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};
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nVifStruct nVif[2];
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static __aligned16 nVifStruct nVif[2];
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void initNewVif(int idx) {
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nVif[idx].idx = idx;
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@ -112,6 +113,7 @@ static void setMasks(const VIFregisters& v) {
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// has a lot of setup code to establish which unpack function to call. The best way to
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// optimize this is to cache the unpack function's base (see fnbase below) and update it
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// when the variables it depends on are modified: writes to vif->tag.cmd and vif->usn.
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// Problem: vif->tag.cmd is modified a lot. Like, constantly. So won't work.
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//
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// A secondary optimization would be adding special handlers for packets where vifRegs->num==1.
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// (which would remove the loop, simplify the incVUptr code, etc). But checking for it has
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@ -119,11 +121,13 @@ static void setMasks(const VIFregisters& v) {
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// -- air
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template< int idx, bool doMode, bool isFill >
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__releaseinline void __fastcall _nVifUnpackLoop( u8 *data, u32 size )
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//template< int idx, bool doMode, bool isFill >
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//__releaseinline void __fastcall _nVifUnpackLoop( u8 *data, u32 size )
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__releaseinline void __fastcall _nVifUnpackLoop( int idx, u8 *data, u32 size )
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{
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// Eh... template attempt, tho not sure it helped much. There's too much setup code (see
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// optimization note above) -- air
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// comment out the following 2 lines to test templated version...
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const bool doMode = !!vifRegs->mode;
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const bool isFill = (vifRegs->cycle.cl < vifRegs->cycle.wl);
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const int usn = !!(vif->usn);
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const int doMask = !!(vif->tag.cmd & 0x10);
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@ -131,12 +135,13 @@ __releaseinline void __fastcall _nVifUnpackLoop( u8 *data, u32 size )
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const u32& vift = nVifT[upkNum];
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u8* dest = setVUptr(idx, vif->tag.addr);
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const VIFUnpackFuncTable& ft = VIFfuncTable[vif->tag.cmd & 0xf];
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UNPACKFUNCTYPE func = vif->usn ? ft.funcU : ft.funcS;
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const VIFUnpackFuncTable& ft = VIFfuncTable[upkNum];
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UNPACKFUNCTYPE func = usn ? ft.funcU : ft.funcS;
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const nVifCall* fnbase = &nVifUpk[
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((usn*2*16) + (doMask*16) + (upkNum)) * (4*4)
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];
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// Did a bunch of work to make it so I could optimize this index lookup to outside
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// the main loop but it was for naught -- too often the loop is only 1-2 iterations,
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// so this setup code ends up being slower (1 iter) or same speed (2 iters).
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const nVifCall* fnbase = &nVifUpk[ ((usn*2*16) + (doMask*16) + (upkNum)) * (4*4) ];
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const int cycleSize = isFill ? vifRegs->cycle.cl : vifRegs->cycle.wl;
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const int blockSize = isFill ? vifRegs->cycle.wl : vifRegs->cycle.cl;
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@ -145,6 +150,11 @@ __releaseinline void __fastcall _nVifUnpackLoop( u8 *data, u32 size )
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setMasks(*vifRegs);
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if (vif->cl >= blockSize) {
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// This condition doesn't appear to ever occur, and really it never should.
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// Normally it wouldn't matter, but even simple setup code matters here (see
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// optimization notes above) >_<
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vif->cl = 0;
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}
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@ -167,7 +177,6 @@ __releaseinline void __fastcall _nVifUnpackLoop( u8 *data, u32 size )
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vifRegs->num--;
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}
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else {
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//DevCon.WriteLn("SSE Unpack!");
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int c = aMin((cycleSize - vif->cl), 3);
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size -= vift * c;
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@ -185,10 +194,10 @@ __releaseinline void __fastcall _nVifUnpackLoop( u8 *data, u32 size )
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}
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incVUptr(idx, dest, 16);
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// Removing this modulo was a huge speedup for God of War. (62->73 fps)
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// (GoW uses a lot of blockSize==1 packets, resulting in tons of loops -- so the biggest
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// factor in performance ends up being the top-level conditionals of the loop, and
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// also the loop prep code.) --air
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// Removing this modulo was a huge speedup for God of War start menu. (62->73 fps)
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// (GoW and tri-ace games both use a lot of blockSize==1 packets, resulting in tons
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// of loops -- so the biggest factor in performance ends up being the top-level
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// conditionals of the loop, and also the loop prep code.) --air
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//vif->cl = (vif->cl+1) % blockSize;
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if( ++vif->cl == blockSize ) vif->cl = 0;
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@ -202,9 +211,18 @@ void _nVifUnpack(int idx, u8 *data, u32 size) {
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return;
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}
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else*/ { // filling write
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vif = nVif[idx].vif;
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vifRegs = nVif[idx].vifRegs;
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#if 1
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_nVifUnpackLoop( idx, data, size );
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#else
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// Eh... template attempt, tho it didn't help much. There's too much setup code,
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// and the template only optimizes code inside the loop, which often times seems to
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// only be run once or twice anyway. Better to use recompilation than templating
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// anyway, but I'll leave it in for now for reference. -- air
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const bool doMode = !!vifRegs->mode;
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const bool isFill = (vifRegs->cycle.cl < vifRegs->cycle.wl);
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@ -231,7 +249,7 @@ void _nVifUnpack(int idx, u8 *data, u32 size) {
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{
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pxFailDev( "No VIF0 support yet, sorry!" );
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}
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#endif
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//if (isFill)
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//DevCon.WriteLn("%s Write! [num = %d][%s]", (isFill?"Filling":"Skipping"), vifRegs->num, (vifRegs->num%3 ? "bad!" : "ok"));
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//DevCon.WriteLn("%s Write! [mask = %08x][type = %02d][num = %d]", (isFill?"Filling":"Skipping"), vifRegs->mask, upkNum, vifRegs->num);
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@ -85,8 +85,7 @@ struct VifUnpackIndexer
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void xSetCall( int packType ) const
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{
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xAlignPtr(16);
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GetCall( packType ) = (nVifCall)xGetPtr();
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GetCall( packType ) = (nVifCall)xGetAlignedCallTarget();
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}
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void xSetNullCall( int packType ) const
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