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Small fix for a regression i caused in r604 with Ridge Racer V, also fixed a bug in MAXbc on the VUrecs and added an optimization for MINIbc 

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@605 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
refraction 2009-02-26 02:13:51 +00:00
parent 441b70239a
commit b372f359b5
2 changed files with 29 additions and 10 deletions
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18
pcsx2/SPR.cpp
View File

@ -179,7 +179,7 @@ static __forceinline void _dmaSPR0() {
spr0->madr = ptag[1]; //MADR = ADDR field spr0->madr = ptag[1]; //MADR = ADDR field
SPR_LOG("spr0 dmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx spr=%lx\n", SPR_LOG("spr0 dmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx spr=%lx\n",
ptag[1], ptag[0], spr0->qwc, id, spr0->madr); ptag[1], ptag[0], spr0->qwc, id, spr0->madr, spr0->sadr);
if ((psHu32(DMAC_CTRL) & 0x30) == 0x20) { // STS == fromSPR if ((psHu32(DMAC_CTRL) & 0x30) == 0x20) { // STS == fromSPR
SysPrintf("SPR stall control\n"); SysPrintf("SPR stall control\n");
@ -270,12 +270,12 @@ void dmaSPR0() { // fromSPR
SPR_LOG("dmaSPR0 chcr = %lx, madr = %lx, qwc = %lx, sadr = %lx\n", SPR_LOG("dmaSPR0 chcr = %lx, madr = %lx, qwc = %lx, sadr = %lx\n",
spr0->chcr, spr0->madr, spr0->qwc, spr0->sadr); spr0->chcr, spr0->madr, spr0->qwc, spr0->sadr);
if ((spr0->chcr & 0xc) == 0x4){ if ((spr0->chcr & 0xc) == 0x4 && spr0->qwc == 0){
u32 *ptag; u32 *ptag;
ptag = (u32*)&PS2MEM_SCRATCH[spr0->sadr & 0x3fff]; //Set memory pointer to SADR ptag = (u32*)&PS2MEM_SCRATCH[spr0->sadr & 0x3fff]; //Set memory pointer to SADR
spr0->qwc = (u16)ptag[0]; //QWC set to lower 16bits of the tag ptag[0] &= 0xffff; //QWC set to lower 16bits of the tag
CPU_INT(8, spr0->qwc / BIAS); CPU_INT(8, ptag[0] / BIAS);
spr0->qwc = 0; // spr0->qwc = 0;
return; return;
} }
// COMPLETE HACK!!! For now at least.. FFX Videos dont rely on interrupts or reading DMA values // COMPLETE HACK!!! For now at least.. FFX Videos dont rely on interrupts or reading DMA values
@ -429,12 +429,12 @@ void dmaSPR1() { // toSPR
spr1->tadr, spr1->sadr); spr1->tadr, spr1->sadr);
#endif #endif
if ((spr1->chcr & 0xc) == 0x4){ if ((spr1->chcr & 0xc) == 0x4 && spr1->qwc == 0){
u32 *ptag; u32 *ptag;
ptag = (u32*)dmaGetAddr(spr1->tadr); //Set memory pointer to TADR ptag = (u32*)dmaGetAddr(spr1->tadr); //Set memory pointer to TADR
spr1->qwc = (u16)ptag[0]; //QWC set to lower 16bits of the tag ptag[0] &= 0xffff; //QWC set to lower 16bits of the tag
CPU_INT(9, spr1->qwc / BIAS); CPU_INT(9, ptag[0] / BIAS);
spr1->qwc = 0; //spr1->qwc = 0;
return; return;
} }
// COMPLETE HACK!!! For now at least.. FFX Videos dont rely on interrupts or reading DMA values // COMPLETE HACK!!! For now at least.. FFX Videos dont rely on interrupts or reading DMA values

21
pcsx2/x86/iVUmicroUpper.cpp
View File

@ -1746,6 +1746,7 @@ void recVUMI_MADD_toD(VURegs *VU, int regd, int info)
vuFloat5_useEAX( EEREC_ACC, EEREC_TEMP, _X_Y_Z_W ); vuFloat5_useEAX( EEREC_ACC, EEREC_TEMP, _X_Y_Z_W );
} }
if( _X_Y_Z_W == 8 ) { if( _X_Y_Z_W == 8 ) {
if( regd == EEREC_ACC ) { if( regd == EEREC_ACC ) {
SSE_MOVSS_XMM_to_XMM(EEREC_TEMP, EEREC_S); SSE_MOVSS_XMM_to_XMM(EEREC_TEMP, EEREC_S);
@ -2583,7 +2584,8 @@ void recVUMI_MAX_xyzw(VURegs *VU, int xyzw, int info)
VU_MERGE_REGS(EEREC_D, EEREC_TEMP); VU_MERGE_REGS(EEREC_D, EEREC_TEMP);
} }
else { else {
if( xyzw < 3 ) SSE_XORPS_XMM_to_XMM(EEREC_D, EEREC_D); //If VF0.w isnt chosen as the constant, then its going to be MAX( 0, VF0 ), so the result is VF0
if( xyzw < 3 ) { SSE_MOVAPS_M128_to_XMM(EEREC_D, (uptr)&VU->VF[0].UL[0]); }
else SSE_MOVAPS_M128_to_XMM(EEREC_D, (uptr)s_fones); else SSE_MOVAPS_M128_to_XMM(EEREC_D, (uptr)s_fones);
} }
return; return;
@ -2753,6 +2755,23 @@ void recVUMI_MINI_xyzw(VURegs *VU, int xyzw, int info)
if ( _Fd_ == 0 ) return; if ( _Fd_ == 0 ) return;
//SysPrintf ("recVUMI_MINI_xyzw \n"); //SysPrintf ("recVUMI_MINI_xyzw \n");
if (_Fs_ == 0 && _Ft_ == 0)
{
if( _X_Y_Z_W == 0xf )
{
//If VF0.w is the constant, the result will match VF0, else its all 0's
if(xyzw == 3) SSE_MOVAPS_M128_to_XMM(EEREC_D, (uptr)&VU->VF[0].UL[0]);
else SSE_XORPS_XMM_to_XMM(EEREC_D, EEREC_D);
}
else
{
//If VF0.w is the constant, the result will match VF0, else its all 0's
if(xyzw == 3) SSE_MOVAPS_M128_to_XMM(EEREC_TEMP, (uptr)&VU->VF[0].UL[0]);
else SSE_XORPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP);
VU_MERGE_REGS(EEREC_D, EEREC_TEMP);
}
return;
}
if (MINMAXFIX) if (MINMAXFIX)
MINMAXlogical(VU, info, 1, 2, 0, xyzw); MINMAXlogical(VU, info, 1, 2, 0, xyzw);
else else