mirror of https://github.com/PCSX2/pcsx2.git
Small fix for a regression i caused in r604 with Ridge Racer V, also fixed a bug in MAXbc on the VUrecs and added an optimization for MINIbc
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@605 96395faa-99c1-11dd-bbfe-3dabce05a288
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@ -179,7 +179,7 @@ static __forceinline void _dmaSPR0() {
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spr0->madr = ptag[1]; //MADR = ADDR field
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SPR_LOG("spr0 dmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx spr=%lx\n",
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ptag[1], ptag[0], spr0->qwc, id, spr0->madr);
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ptag[1], ptag[0], spr0->qwc, id, spr0->madr, spr0->sadr);
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if ((psHu32(DMAC_CTRL) & 0x30) == 0x20) { // STS == fromSPR
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SysPrintf("SPR stall control\n");
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@ -270,12 +270,12 @@ void dmaSPR0() { // fromSPR
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SPR_LOG("dmaSPR0 chcr = %lx, madr = %lx, qwc = %lx, sadr = %lx\n",
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spr0->chcr, spr0->madr, spr0->qwc, spr0->sadr);
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if ((spr0->chcr & 0xc) == 0x4){
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if ((spr0->chcr & 0xc) == 0x4 && spr0->qwc == 0){
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u32 *ptag;
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ptag = (u32*)&PS2MEM_SCRATCH[spr0->sadr & 0x3fff]; //Set memory pointer to SADR
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spr0->qwc = (u16)ptag[0]; //QWC set to lower 16bits of the tag
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CPU_INT(8, spr0->qwc / BIAS);
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spr0->qwc = 0;
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ptag[0] &= 0xffff; //QWC set to lower 16bits of the tag
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CPU_INT(8, ptag[0] / BIAS);
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// spr0->qwc = 0;
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return;
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}
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// COMPLETE HACK!!! For now at least.. FFX Videos dont rely on interrupts or reading DMA values
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@ -429,12 +429,12 @@ void dmaSPR1() { // toSPR
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spr1->tadr, spr1->sadr);
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#endif
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if ((spr1->chcr & 0xc) == 0x4){
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if ((spr1->chcr & 0xc) == 0x4 && spr1->qwc == 0){
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u32 *ptag;
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ptag = (u32*)dmaGetAddr(spr1->tadr); //Set memory pointer to TADR
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spr1->qwc = (u16)ptag[0]; //QWC set to lower 16bits of the tag
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CPU_INT(9, spr1->qwc / BIAS);
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spr1->qwc = 0;
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ptag[0] &= 0xffff; //QWC set to lower 16bits of the tag
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CPU_INT(9, ptag[0] / BIAS);
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//spr1->qwc = 0;
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return;
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}
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// COMPLETE HACK!!! For now at least.. FFX Videos dont rely on interrupts or reading DMA values
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@ -1746,6 +1746,7 @@ void recVUMI_MADD_toD(VURegs *VU, int regd, int info)
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vuFloat5_useEAX( EEREC_ACC, EEREC_TEMP, _X_Y_Z_W );
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}
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if( _X_Y_Z_W == 8 ) {
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if( regd == EEREC_ACC ) {
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SSE_MOVSS_XMM_to_XMM(EEREC_TEMP, EEREC_S);
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@ -2583,7 +2584,8 @@ void recVUMI_MAX_xyzw(VURegs *VU, int xyzw, int info)
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VU_MERGE_REGS(EEREC_D, EEREC_TEMP);
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}
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else {
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if( xyzw < 3 ) SSE_XORPS_XMM_to_XMM(EEREC_D, EEREC_D);
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//If VF0.w isnt chosen as the constant, then its going to be MAX( 0, VF0 ), so the result is VF0
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if( xyzw < 3 ) { SSE_MOVAPS_M128_to_XMM(EEREC_D, (uptr)&VU->VF[0].UL[0]); }
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else SSE_MOVAPS_M128_to_XMM(EEREC_D, (uptr)s_fones);
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}
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return;
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@ -2753,6 +2755,23 @@ void recVUMI_MINI_xyzw(VURegs *VU, int xyzw, int info)
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if ( _Fd_ == 0 ) return;
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//SysPrintf ("recVUMI_MINI_xyzw \n");
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if (_Fs_ == 0 && _Ft_ == 0)
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{
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if( _X_Y_Z_W == 0xf )
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{
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//If VF0.w is the constant, the result will match VF0, else its all 0's
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if(xyzw == 3) SSE_MOVAPS_M128_to_XMM(EEREC_D, (uptr)&VU->VF[0].UL[0]);
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else SSE_XORPS_XMM_to_XMM(EEREC_D, EEREC_D);
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}
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else
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{
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//If VF0.w is the constant, the result will match VF0, else its all 0's
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if(xyzw == 3) SSE_MOVAPS_M128_to_XMM(EEREC_TEMP, (uptr)&VU->VF[0].UL[0]);
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else SSE_XORPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP);
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VU_MERGE_REGS(EEREC_D, EEREC_TEMP);
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}
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return;
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}
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if (MINMAXFIX)
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MINMAXlogical(VU, info, 1, 2, 0, xyzw);
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else
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