From b2cf9d026f32c4797746eda6b0e7d84be5786b08 Mon Sep 17 00:00:00 2001
From: refraction <refraction@96395faa-99c1-11dd-bbfe-3dabce05a288>
Date: Tue, 22 Feb 2011 22:19:21 +0000
Subject: [PATCH] MFIFO fixed Guitar Hero Videos, another case of developers
 assuming SPR1 will be finished before SPR0 gets to the data being written >.<

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@4343 96395faa-99c1-11dd-bbfe-3dabce05a288
---
 pcsx2/SPR.cpp        | 20 +++++++++++---------
 pcsx2/Vif1_MFIFO.cpp |  4 ++--
 2 files changed, 13 insertions(+), 11 deletions(-)

diff --git a/pcsx2/SPR.cpp b/pcsx2/SPR.cpp
index d2b8fedddc..7543fd5979 100644
--- a/pcsx2/SPR.cpp
+++ b/pcsx2/SPR.cpp
@@ -50,7 +50,7 @@ static void TestClearVUs(u32 madr, u32 size)
 int  _SPR0chain()
 {
 	tDMA_TAG *pMem;
-
+	int partialqwc = 0;
 	if (spr0ch.qwc == 0) return 0;
 	pMem = SPRdmaGetAddr(spr0ch.madr, true);
 	if (pMem == NULL) return -1;
@@ -59,21 +59,24 @@ int  _SPR0chain()
 	{
 		case MFD_VIF1:
 		case MFD_GIF:
+			if(spr0ch.qwc > 1) partialqwc = spr0ch.qwc - 1;
+			else partialqwc = spr0ch.qwc;
+
 			if ((spr0ch.madr & ~dmacRegs.rbsr.RMSK) != dmacRegs.rbor.ADDR)
 				Console.WriteLn("SPR MFIFO Write outside MFIFO area");
 			else
-				mfifotransferred += spr0ch.qwc;
+				mfifotransferred += partialqwc;
 
-			hwMFIFOWrite(spr0ch.madr, &psSu128(spr0ch.sadr), spr0ch.qwc);
-			spr0ch.madr += spr0ch.qwc << 4;
+			hwMFIFOWrite(spr0ch.madr, &psSu128(spr0ch.sadr), partialqwc);
+			spr0ch.madr += partialqwc << 4;
 			spr0ch.madr = dmacRegs.rbor.ADDR + (spr0ch.madr & dmacRegs.rbsr.RMSK);
-			spr0ch.sadr += spr0ch.qwc << 4;
-			spr0ch.qwc = 0;
+			spr0ch.sadr += partialqwc << 4;
+			spr0ch.qwc -= partialqwc;
 			break;
 
 		case NO_MFD:
 		case MFD_RESERVED:
-			int partialqwc = 0;
+			
 			//Taking an arbitary small value for games which like to check the QWC/MADR instead of STR, so get most of
 			//the cycle delay out of the way before the end.
 			if(spr0ch.qwc > 1) partialqwc = spr0ch.qwc - 1;
@@ -87,13 +90,12 @@ int  _SPR0chain()
 			spr0ch.sadr += partialqwc << 4;
 			spr0ch.qwc -= partialqwc;
 
-			return (partialqwc);
 			break;
 	}
 
 	
 
-	return (spr0ch.qwc); // bus is 1/2 the ee speed
+	return (partialqwc); // bus is 1/2 the ee speed
 }
 
 __fi void SPR0chain()
diff --git a/pcsx2/Vif1_MFIFO.cpp b/pcsx2/Vif1_MFIFO.cpp
index cb399060fb..6986d39e6c 100644
--- a/pcsx2/Vif1_MFIFO.cpp
+++ b/pcsx2/Vif1_MFIFO.cpp
@@ -37,7 +37,7 @@ static u16 QWCinVIFMFIFO(u32 DrainADDR)
 	u32 ret;
 	
 
-	SPR_LOG("VIF MFIFO Requesting %x QWC from the MFIFO Base %x, SPR MADR %x Drain %x", vif1ch.qwc, dmacRegs.rbor.ADDR, spr0ch.madr, DrainADDR);
+	SPR_LOG("VIF MFIFO Requesting %x QWC from the MFIFO Base %x MFIFO Top %x, SPR MADR %x Drain %x", vif1ch.qwc, dmacRegs.rbor.ADDR, dmacRegs.rbor.ADDR + dmacRegs.rbsr.RMSK + 16, spr0ch.madr, DrainADDR);
 	//Calculate what we have in the fifo.
 	if(DrainADDR <= spr0ch.madr)
 	{
@@ -166,7 +166,7 @@ void mfifoVIF1transfer(int qwc)
 			if(vif1ch.chcr.STR == true && !(cpuRegs.interrupt & (1<<DMAC_MFIFO_VIF)))
 			{
 				SPR_LOG("Data Added, Resuming");
-				CPU_INT(DMAC_MFIFO_VIF, 4);
+				CPU_INT(DMAC_MFIFO_VIF, 16);
 			}
 
 			//Apparently this is bad, i guess so, the data is going to memory rather than the FIFO