From b26d7fad2fc1afdec9d2d3f10a97d2c8386446aa Mon Sep 17 00:00:00 2001 From: ramapcsx2 Date: Mon, 18 Jan 2010 15:25:00 +0000 Subject: [PATCH] Cleanup commit: - Remove code dealing with "PROCESS_EE_MMX" ( not used without "EEINST_MMX" ) git-svn-id: http://pcsx2.googlecode.com/svn/trunk@2454 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/x86/iCore.h | 10 +- pcsx2/x86/ix86-32/iR5900Arit.cpp | 1318 ++++++++------------------- pcsx2/x86/ix86-32/iR5900AritImm.cpp | 104 +-- pcsx2/x86/ix86-32/iR5900Branch.cpp | 71 +- pcsx2/x86/ix86-32/iR5900Move.cpp | 82 -- pcsx2/x86/ix86-32/iR5900MultDiv.cpp | 106 +-- pcsx2/x86/ix86-32/iR5900Shift.cpp | 411 ++------- 7 files changed, 507 insertions(+), 1595 deletions(-) diff --git a/pcsx2/x86/iCore.h b/pcsx2/x86/iCore.h index 34178f10dc..7af35e04d9 100644 --- a/pcsx2/x86/iCore.h +++ b/pcsx2/x86/iCore.h @@ -35,7 +35,7 @@ #define MODE_NOFRAME 0x40 // when allocating x86regs, don't use ebp reg #define MODE_8BITREG 0x80 // when allocating x86regs, use only eax, ecx, edx, and ebx -#define PROCESS_EE_MMX 0x01 +//#define PROCESS_EE_MMX 0x01 // removed #define PROCESS_EE_XMM 0x02 // currently only used in FPU @@ -201,18 +201,12 @@ static const int MEM_XMMTAG = 0x8000; // mmreg is xmmreg #define EEINST_LIVE1 2 // if cur var's next 32 bits are needed #define EEINST_LIVE2 4 // if cur var's next 64 bits are needed #define EEINST_LASTUSE 8 // if var isn't written/read anymore +//#define EEINST_MMX 0x10 // removed #define EEINST_XMM 0x20 // var will be used in xmm ops #define EEINST_USED 0x40 -// MMX is disabled by setting this to 0, which seems a general speedup and fixes several -// random tlb miss problems. -#define EEINST_MMX 0 - - #define EEINSTINFO_COP1 1 #define EEINSTINFO_COP2 2 -#define EEINSTINFO_MMX EEINST_MMX -#define EEINSTINFO_XMM EEINST_XMM struct EEINST { diff --git a/pcsx2/x86/ix86-32/iR5900Arit.cpp b/pcsx2/x86/ix86-32/iR5900Arit.cpp index d991c6a73e..074a940e42 100644 --- a/pcsx2/x86/ix86-32/iR5900Arit.cpp +++ b/pcsx2/x86/ix86-32/iR5900Arit.cpp @@ -65,82 +65,57 @@ void recADD_constv(int info, int creg, int vreg) { pxAssert( !(info&PROCESS_EE_XMM) ); - if( info & PROCESS_EE_MMX ) { - int mmreg = vreg == _Rt_ ? EEREC_T : EEREC_S; + if(!g_cpuConstRegs[ creg ].UL[0]) { + int mmreg = _allocMMXreg(-1, MMX_GPR+_Rd_, MODE_WRITE); + SetMMXstate(); - if( g_cpuConstRegs[ creg ].UL[0] ) { - u32* ptempmem; - - ptempmem = _eeGetConstReg(creg); - if( EEREC_D != mmreg ) MOVQRtoR(EEREC_D, mmreg); - PADDDMtoR(EEREC_D, (u32)ptempmem); - - _signExtendGPRtoMMX(EEREC_D, _Rd_, 0); + if( EEINST_HASLIVE1(vreg) && EEINST_ISLIVE1(_Rd_) ) { + MOVQMtoR(mmreg, (int)&cpuRegs.GPR.r[ vreg ].UL[ 0 ]); } else { - // just move and sign extend - if( EEINST_HASLIVE1(vreg) ) { - if( EEREC_D != mmreg ) MOVQRtoR(EEREC_D, mmreg); + if( g_cpuConstRegs[creg].UL[0] ) { + MOVDMtoMMX(mmreg, (u32)_eeGetConstReg(creg)); + PADDDMtoR(mmreg, (u32)&cpuRegs.GPR.r[ vreg ].UL[ 0 ]); } else { - _signExtendGPRMMXtoMMX(EEREC_D, _Rd_, mmreg, vreg); + if( EEINST_ISLIVE1(_Rd_) ) { + _signExtendMtoMMX(mmreg, (u32)&cpuRegs.GPR.r[ vreg ].UL[ 0 ]); + } + else { + MOVDMtoMMX(mmreg, (u32)&cpuRegs.GPR.r[ vreg ].UL[ 0 ]); + EEINST_RESETHASLIVE1(_Rd_); + } } } } else { - - if(!g_cpuConstRegs[ creg ].UL[0]) { - int mmreg = _allocMMXreg(-1, MMX_GPR+_Rd_, MODE_WRITE); - SetMMXstate(); - - if( EEINST_HASLIVE1(vreg) && EEINST_ISLIVE1(_Rd_) ) { - MOVQMtoR(mmreg, (int)&cpuRegs.GPR.r[ vreg ].UL[ 0 ]); + if( _Rd_ == vreg ) { + if( EEINST_ISLIVE1(_Rd_) ) + { + // must perform the ADD unconditionally, to maintain flags status: + ADD32ItoM((int)&cpuRegs.GPR.r[_Rd_].UL[ 0 ], g_cpuConstRegs[creg].UL[0]); + _signExtendSFtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]); } - else { - if( g_cpuConstRegs[creg].UL[0] ) { - MOVDMtoMMX(mmreg, (u32)_eeGetConstReg(creg)); - PADDDMtoR(mmreg, (u32)&cpuRegs.GPR.r[ vreg ].UL[ 0 ]); - } - else { - if( EEINST_ISLIVE1(_Rd_) ) { - _signExtendMtoMMX(mmreg, (u32)&cpuRegs.GPR.r[ vreg ].UL[ 0 ]); - } - else { - MOVDMtoMMX(mmreg, (u32)&cpuRegs.GPR.r[ vreg ].UL[ 0 ]); - EEINST_RESETHASLIVE1(_Rd_); - } - } + else + { + if( g_cpuConstRegs[creg].UL[0] ) + ADD32ItoM((int)&cpuRegs.GPR.r[_Rd_].UL[ 0 ], g_cpuConstRegs[creg].UL[0]); + EEINST_RESETHASLIVE1(_Rd_); } } else { - if( _Rd_ == vreg ) { - if( EEINST_ISLIVE1(_Rd_) ) - { - // must perform the ADD unconditionally, to maintain flags status: - ADD32ItoM((int)&cpuRegs.GPR.r[_Rd_].UL[ 0 ], g_cpuConstRegs[creg].UL[0]); - _signExtendSFtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]); - } - else - { - if( g_cpuConstRegs[creg].UL[0] ) - ADD32ItoM((int)&cpuRegs.GPR.r[_Rd_].UL[ 0 ], g_cpuConstRegs[creg].UL[0]); - EEINST_RESETHASLIVE1(_Rd_); - } + MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ vreg ].UL[ 0 ] ); + if( g_cpuConstRegs[ creg ].UL[0] ) + ADD32ItoR( EAX, g_cpuConstRegs[ creg ].UL[0] ); + + if( EEINST_ISLIVE1(_Rd_) ) { + CDQ( ); + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); } else { - MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ vreg ].UL[ 0 ] ); - if( g_cpuConstRegs[ creg ].UL[0] ) - ADD32ItoR( EAX, g_cpuConstRegs[ creg ].UL[0] ); - - if( EEINST_ISLIVE1(_Rd_) ) { - CDQ( ); - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); - } - else { - EEINST_RESETHASLIVE1(_Rd_); - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - } + EEINST_RESETHASLIVE1(_Rd_); + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); } } } @@ -170,61 +145,40 @@ void recADD_(int info) EEINST_SETSIGNEXT(_Rs_); EEINST_SETSIGNEXT(_Rt_); - if( info & PROCESS_EE_MMX ) { - - if( EEREC_D == EEREC_S ) PADDDRtoR(EEREC_D, EEREC_T); - else if( EEREC_D == EEREC_T ) PADDDRtoR(EEREC_D, EEREC_S); + if( _Rd_ == _Rs_ ) { + if( _Rd_ == _Rt_ ) SHL32ItoM((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], 1); // mult by 2 else { - MOVQRtoR(EEREC_D, EEREC_T); - PADDDRtoR(EEREC_D, EEREC_S); + MOV32MtoR(ECX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]); + ADD32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], ECX); } - if( EEINST_ISLIVE1(_Rd_) ) { - // sign extend - _signExtendGPRtoMMX(EEREC_D, _Rd_, 0); - } - else { - EEINST_RESETHASLIVE1(_Rd_); - } + if( EEINST_ISLIVE1(_Rd_) ) _signExtendSFtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]); + else EEINST_RESETHASLIVE1(_Rd_); + + return; + } + else if( _Rd_ == _Rt_ ) { + EEINST_RESETHASLIVE1(_Rd_); + MOV32MtoR(ECX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); + ADD32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], ECX); + + if( EEINST_ISLIVE1(_Rd_) ) _signExtendSFtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]); + else EEINST_RESETHASLIVE1(_Rd_); } else { + MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); + if( _Rs_ != _Rt_ ) ADD32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + else SHL32ItoR(EAX, 1); // mult by 2 - if( _Rd_ == _Rs_ ) { - if( _Rd_ == _Rt_ ) SHL32ItoM((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], 1); // mult by 2 - else { - MOV32MtoR(ECX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]); - ADD32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], ECX); - } - - if( EEINST_ISLIVE1(_Rd_) ) _signExtendSFtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]); - else EEINST_RESETHASLIVE1(_Rd_); - - return; - } - else if( _Rd_ == _Rt_ ) { - EEINST_RESETHASLIVE1(_Rd_); - MOV32MtoR(ECX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); - ADD32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], ECX); - - if( EEINST_ISLIVE1(_Rd_) ) _signExtendSFtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]); - else EEINST_RESETHASLIVE1(_Rd_); + if( EEINST_ISLIVE1(_Rd_) ) { + CDQ( ); + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); } else { - MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - if( _Rs_ != _Rt_ ) ADD32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - else SHL32ItoR(EAX, 1); // mult by 2 - - if( EEINST_ISLIVE1(_Rd_) ) { - CDQ( ); - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); - } - else { - EEINST_RESETHASLIVE1(_Rd_); - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - } + EEINST_RESETHASLIVE1(_Rd_); + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); } - } } @@ -246,63 +200,48 @@ void recDADD_constv(int info, int creg, int vreg) { pxAssert( !(info&PROCESS_EE_XMM) ); - if( info & PROCESS_EE_MMX ) { - int mmreg = vreg == _Rt_ ? EEREC_T : EEREC_S; - - if( g_cpuConstRegs[ creg ].UD[0] ) { - - if( EEREC_D != mmreg ) MOVQRtoR(EEREC_D, mmreg); - PADDQMtoR(EEREC_D, (u32)_eeGetConstReg(creg)); - } + if( g_cpuConstRegs[ creg ].UL[0] == 0 && g_cpuConstRegs[ creg ].UL[1] == 0 && _hasFreeMMXreg() ) { + // copy + int mmreg = _allocMMXreg(-1, MMX_GPR+_Rd_, MODE_WRITE); + if( EEINST_ISLIVE1(_Rd_) ) MOVQMtoR(mmreg, (int)&cpuRegs.GPR.r[ vreg ].UL[ 0 ]); else { - if( EEREC_D != mmreg ) MOVQRtoR(EEREC_D, mmreg); + MOVDMtoMMX(mmreg, (int)&cpuRegs.GPR.r[ vreg ].UL[ 0 ]); + EEINST_RESETHASLIVE1(_Rd_); } } else { - if( g_cpuConstRegs[ creg ].UL[0] == 0 && g_cpuConstRegs[ creg ].UL[1] == 0 && _hasFreeMMXreg() ) { - // copy - int mmreg = _allocMMXreg(-1, MMX_GPR+_Rd_, MODE_WRITE); - if( EEINST_ISLIVE1(_Rd_) ) MOVQMtoR(mmreg, (int)&cpuRegs.GPR.r[ vreg ].UL[ 0 ]); - else { - MOVDMtoMMX(mmreg, (int)&cpuRegs.GPR.r[ vreg ].UL[ 0 ]); + if( _Rd_ == vreg ) { + + if( EEINST_ISLIVE1(_Rd_) && (g_cpuConstRegs[ creg ].UL[ 0 ] || g_cpuConstRegs[ creg ].UL[ 1 ]) ) { + ADD32ItoM( (u32)&cpuRegs.GPR.r[_Rd_].UL[0], g_cpuConstRegs[ creg ].UL[ 0 ] ); + ADC32ItoM( (u32)&cpuRegs.GPR.r[_Rd_].UL[1], g_cpuConstRegs[ creg ].UL[ 1 ] ); + } + else if( g_cpuConstRegs[ creg ].UL[ 0 ] ) { EEINST_RESETHASLIVE1(_Rd_); + ADD32ItoM( (u32)&cpuRegs.GPR.r[_Rd_].UL[0], g_cpuConstRegs[ creg ].UL[ 0 ] ); } + + return; } - else { - if( _Rd_ == vreg ) { + MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ vreg ].UL[ 0 ] ); - if( EEINST_ISLIVE1(_Rd_) && (g_cpuConstRegs[ creg ].UL[ 0 ] || g_cpuConstRegs[ creg ].UL[ 1 ]) ) { - ADD32ItoM( (u32)&cpuRegs.GPR.r[_Rd_].UL[0], g_cpuConstRegs[ creg ].UL[ 0 ] ); - ADC32ItoM( (u32)&cpuRegs.GPR.r[_Rd_].UL[1], g_cpuConstRegs[ creg ].UL[ 1 ] ); - } - else if( g_cpuConstRegs[ creg ].UL[ 0 ] ) { - EEINST_RESETHASLIVE1(_Rd_); - ADD32ItoM( (u32)&cpuRegs.GPR.r[_Rd_].UL[0], g_cpuConstRegs[ creg ].UL[ 0 ] ); - } - - return; - } - - MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ vreg ].UL[ 0 ] ); + if( EEINST_ISLIVE1(_Rd_) ) + MOV32MtoR( EDX, (int)&cpuRegs.GPR.r[ vreg ].UL[ 1 ] ); + if( g_cpuConstRegs[ creg ].UL[0] || g_cpuConstRegs[ creg ].UL[1] ) { + ADD32ItoR( EAX, g_cpuConstRegs[ creg ].UL[ 0 ] ); if( EEINST_ISLIVE1(_Rd_) ) - MOV32MtoR( EDX, (int)&cpuRegs.GPR.r[ vreg ].UL[ 1 ] ); - - if( g_cpuConstRegs[ creg ].UL[0] || g_cpuConstRegs[ creg ].UL[1] ) { - ADD32ItoR( EAX, g_cpuConstRegs[ creg ].UL[ 0 ] ); - if( EEINST_ISLIVE1(_Rd_) ) - ADC32ItoR( EDX, g_cpuConstRegs[ creg ].UL[ 1 ] ); - } - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - - if( EEINST_ISLIVE1(_Rd_) ) - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); - - if( !EEINST_ISLIVE1(_Rd_) ) - EEINST_RESETHASLIVE1(_Rd_); + ADC32ItoR( EDX, g_cpuConstRegs[ creg ].UL[ 1 ] ); } + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); + + if( EEINST_ISLIVE1(_Rd_) ) + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); + + if( !EEINST_ISLIVE1(_Rd_) ) + EEINST_RESETHASLIVE1(_Rd_); } } @@ -319,43 +258,31 @@ void recDADD_constt(int info) void recDADD_(int info) { pxAssert( !(info&PROCESS_EE_XMM) ); - - if( info & PROCESS_EE_MMX ) { - - if( EEREC_D == EEREC_S ) PADDQRtoR(EEREC_D, EEREC_T); - else if( EEREC_D == EEREC_T ) PADDQRtoR(EEREC_D, EEREC_S); - else { - MOVQRtoR(EEREC_D, EEREC_T); - PADDQRtoR(EEREC_D, EEREC_S); - } + + if( _Rd_ == _Rs_ || _Rd_ == _Rt_ ) { + int vreg = _Rd_ == _Rs_ ? _Rt_ : _Rs_; + MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ vreg ].UL[ 0 ] ); + if( EEINST_ISLIVE1(_Rd_) ) + MOV32MtoR( EDX, (int)&cpuRegs.GPR.r[ vreg ].UL[ 1 ] ); + ADD32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX); + if( EEINST_ISLIVE1(_Rd_) ) + ADC32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX); + else + EEINST_RESETHASLIVE1(_Rd_); } else { - - if( _Rd_ == _Rs_ || _Rd_ == _Rt_ ) { - int vreg = _Rd_ == _Rs_ ? _Rt_ : _Rs_; - MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ vreg ].UL[ 0 ] ); - if( EEINST_ISLIVE1(_Rd_) ) - MOV32MtoR( EDX, (int)&cpuRegs.GPR.r[ vreg ].UL[ 1 ] ); - ADD32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX); - if( EEINST_ISLIVE1(_Rd_) ) - ADC32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX); - else - EEINST_RESETHASLIVE1(_Rd_); - } - else { - MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - if( EEINST_ISLIVE1(_Rd_) ) - MOV32MtoR( EDX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ] ); - ADD32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - if( EEINST_ISLIVE1(_Rd_) ) - ADC32MtoR( EDX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ); - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - if( EEINST_ISLIVE1(_Rd_) ) - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); + MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); + if( EEINST_ISLIVE1(_Rd_) ) + MOV32MtoR( EDX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ] ); + ADD32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + if( EEINST_ISLIVE1(_Rd_) ) + ADC32MtoR( EDX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ); + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); + if( EEINST_ISLIVE1(_Rd_) ) + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); - if( !EEINST_ISLIVE1(_Rd_) ) - EEINST_RESETHASLIVE1(_Rd_); - } + if( !EEINST_ISLIVE1(_Rd_) ) + EEINST_RESETHASLIVE1(_Rd_); } } @@ -380,69 +307,77 @@ void recSUB_consts(int info) EEINST_SETSIGNEXT(_Rt_); EEINST_SETSIGNEXT(_Rd_); - if( info & PROCESS_EE_MMX ) { - if( g_cpuConstRegs[ _Rs_ ].UL[0] ) { - - if( EEREC_D != EEREC_T ) { - MOVQMtoR(EEREC_D, (u32)_eeGetConstReg(_Rs_)); - PSUBDRtoR(EEREC_D, EEREC_T); + if( _Rd_ == _Rt_ ) { + if( g_cpuConstRegs[ _Rs_ ].UL[ 0 ] ) SUB32ItoM((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], g_cpuConstRegs[ _Rs_ ].UL[ 0 ]); + NEG32M((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]); - if( EEINST_ISLIVE1(_Rd_) ) _signExtendGPRtoMMX(EEREC_D, _Rd_, 0); - else EEINST_RESETHASLIVE1(_Rd_); - } - else { - int t0reg = _allocMMXreg(-1, MMX_TEMP, 0); - MOVDMtoMMX(t0reg, (u32)_eeGetConstReg(_Rs_)); - PSUBDRtoR(t0reg, EEREC_T); - - // swap mmx regs - mmxregs[t0reg] = mmxregs[EEREC_D]; - mmxregs[EEREC_D].inuse = 0; - - if( EEINST_ISLIVE1(_Rd_) ) _signExtendGPRtoMMX(t0reg, _Rd_, 0); - else EEINST_RESETHASLIVE1(_Rd_); - } + if( EEINST_ISLIVE1(_Rd_) ) _signExtendSFtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]); + else EEINST_RESETHASLIVE1(_Rd_); + } + else { + if( g_cpuConstRegs[ _Rs_ ].UL[ 0 ] ) { + MOV32ItoR( EAX, g_cpuConstRegs[ _Rs_ ].UL[ 0 ] ); + SUB32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); } else { - // just move and sign extend - if( EEREC_D != EEREC_T ) { - PXORRtoR(EEREC_D, EEREC_D); - PSUBDRtoR(EEREC_D, EEREC_T); + MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + NEG32R(EAX); + } - if( EEINST_ISLIVE1(_Rd_) ) _signExtendGPRtoMMX(EEREC_D, _Rd_, 0); - else EEINST_RESETHASLIVE1(_Rd_); + if( EEINST_ISLIVE1(_Rd_) ) { + CDQ( ); + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); + } + else { + EEINST_RESETHASLIVE1(_Rd_); + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); + } + } +} + +void recSUB_constt(int info) +{ + pxAssert( !(info&PROCESS_EE_XMM) ); + EEINST_SETSIGNEXT(_Rs_); + EEINST_SETSIGNEXT(_Rd_); + + if(!g_cpuConstRegs[_Rt_].UL[0]) { + int mmreg = _allocMMXreg(-1, MMX_GPR+_Rd_, MODE_WRITE); + SetMMXstate(); + + if( EEINST_HASLIVE1(_Rs_) && EEINST_ISLIVE1(_Rd_) ) { + MOVQMtoR(mmreg, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); + } + else { + if( g_cpuConstRegs[_Rt_].UL[0] ) { + MOVDMtoMMX(mmreg, (u32)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); + PSUBDMtoR(mmreg, (u32)_eeGetConstReg(_Rt_)); } else { - int t0reg = _allocMMXreg(-1, MMX_TEMP, 0); - PXORRtoR(t0reg, t0reg); - PSUBDRtoR(t0reg, EEREC_T); - - // swap mmx regs.. don't ask - mmxregs[t0reg] = mmxregs[EEREC_D]; - mmxregs[EEREC_D].inuse = 0; - - if( EEINST_ISLIVE1(_Rd_) ) _signExtendGPRtoMMX(t0reg, _Rd_, 0); - else EEINST_RESETHASLIVE1(_Rd_); + if( EEINST_ISLIVE1(_Rd_) ) { + _signExtendMtoMMX(mmreg, (u32)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); + } + else { + MOVDMtoMMX(mmreg, (u32)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); + EEINST_RESETHASLIVE1(_Rd_); + } } } } else { - if( _Rd_ == _Rt_ ) { - if( g_cpuConstRegs[ _Rs_ ].UL[ 0 ] ) SUB32ItoM((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], g_cpuConstRegs[ _Rs_ ].UL[ 0 ]); - NEG32M((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]); + if( _Rd_ == _Rs_ ) { + if( g_cpuConstRegs[ _Rt_ ].UL[ 0 ] ) { + SUB32ItoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], g_cpuConstRegs[ _Rt_ ].UL[ 0 ]); - if( EEINST_ISLIVE1(_Rd_) ) _signExtendSFtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]); - else EEINST_RESETHASLIVE1(_Rd_); + if( EEINST_ISLIVE1(_Rd_) ) _signExtendSFtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]); + else EEINST_RESETHASLIVE1(_Rd_); + } } else { - if( g_cpuConstRegs[ _Rs_ ].UL[ 0 ] ) { - MOV32ItoR( EAX, g_cpuConstRegs[ _Rs_ ].UL[ 0 ] ); - SUB32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - } - else { - MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - NEG32R(EAX); - } + MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); + if( g_cpuConstRegs[ _Rt_ ].UL[ 0 ] ) + SUB32ItoR( EAX, g_cpuConstRegs[ _Rt_ ].UL[ 0 ] ); if( EEINST_ISLIVE1(_Rd_) ) { CDQ( ); @@ -457,84 +392,6 @@ void recSUB_consts(int info) } } -void recSUB_constt(int info) -{ - pxAssert( !(info&PROCESS_EE_XMM) ); - EEINST_SETSIGNEXT(_Rs_); - EEINST_SETSIGNEXT(_Rd_); - - if( info & PROCESS_EE_MMX ) { - if( g_cpuConstRegs[ _Rt_ ].UL[0] ) { - - u32* ptempmem = _eeGetConstReg(_Rt_); - if( EEREC_D != EEREC_S ) MOVQRtoR(EEREC_D, EEREC_S); - PSUBDMtoR(EEREC_D, (u32)ptempmem); - - _signExtendGPRtoMMX(EEREC_D, _Rd_, 0); - } - else { - // just move and sign extend - if( EEINST_HASLIVE1(_Rs_) ) { - if( EEREC_D != EEREC_S ) MOVQRtoR(EEREC_D, EEREC_S); - } - else { - _signExtendGPRMMXtoMMX(EEREC_D, _Rd_, EEREC_S, _Rs_); - } - } - } - else { - - if(!g_cpuConstRegs[_Rt_].UL[0]) { - int mmreg = _allocMMXreg(-1, MMX_GPR+_Rd_, MODE_WRITE); - SetMMXstate(); - - if( EEINST_HASLIVE1(_Rs_) && EEINST_ISLIVE1(_Rd_) ) { - MOVQMtoR(mmreg, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); - } - else { - if( g_cpuConstRegs[_Rt_].UL[0] ) { - MOVDMtoMMX(mmreg, (u32)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); - PSUBDMtoR(mmreg, (u32)_eeGetConstReg(_Rt_)); - } - else { - if( EEINST_ISLIVE1(_Rd_) ) { - _signExtendMtoMMX(mmreg, (u32)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); - } - else { - MOVDMtoMMX(mmreg, (u32)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); - EEINST_RESETHASLIVE1(_Rd_); - } - } - } - } - else { - if( _Rd_ == _Rs_ ) { - if( g_cpuConstRegs[ _Rt_ ].UL[ 0 ] ) { - SUB32ItoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], g_cpuConstRegs[ _Rt_ ].UL[ 0 ]); - - if( EEINST_ISLIVE1(_Rd_) ) _signExtendSFtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ]); - else EEINST_RESETHASLIVE1(_Rd_); - } - } - else { - MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - if( g_cpuConstRegs[ _Rt_ ].UL[ 0 ] ) - SUB32ItoR( EAX, g_cpuConstRegs[ _Rt_ ].UL[ 0 ] ); - - if( EEINST_ISLIVE1(_Rd_) ) { - CDQ( ); - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); - } - else { - EEINST_RESETHASLIVE1(_Rd_); - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - } - } - } - } -} - void recSUB_(int info) { pxAssert( !(info&PROCESS_EE_XMM) ); @@ -542,55 +399,26 @@ void recSUB_(int info) EEINST_SETSIGNEXT(_Rt_); EEINST_SETSIGNEXT(_Rd_); - if( info & PROCESS_EE_MMX ) { - - if( EEREC_D == EEREC_S ) PSUBDRtoR(EEREC_D, EEREC_T); - else if( EEREC_D == EEREC_T ) { - int t0reg = _allocMMXreg(-1, MMX_TEMP, 0); - MOVQRtoR(t0reg, EEREC_S); - PSUBDRtoR(t0reg, EEREC_T); - - // swap mmx regs.. don't ask - mmxregs[t0reg] = mmxregs[EEREC_D]; - mmxregs[EEREC_D].inuse = 0; - info = (info&~PROCESS_EE_SET_D(0xf))|PROCESS_EE_SET_D(t0reg); - } - else { - MOVQRtoR(EEREC_D, EEREC_S); - PSUBDRtoR(EEREC_D, EEREC_T); - } - - if( EEINST_ISLIVE1(_Rd_) ) { - // sign extend - _signExtendGPRtoMMX(EEREC_D, _Rd_, 0); - } - else { + if( !EEINST_ISLIVE1(_Rd_) ) { + if( _Rd_ == _Rs_) { EEINST_RESETHASLIVE1(_Rd_); + MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + SUB32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); + return; } } + + MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); + SUB32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + + if( EEINST_ISLIVE1(_Rd_) ) { + CDQ( ); + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); + } else { - - if( !EEINST_ISLIVE1(_Rd_) ) { - if( _Rd_ == _Rs_) { - EEINST_RESETHASLIVE1(_Rd_); - MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - SUB32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - return; - } - } - - MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - SUB32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - - if( EEINST_ISLIVE1(_Rd_) ) { - CDQ( ); - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); - } - else { - EEINST_RESETHASLIVE1(_Rd_); - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - } + EEINST_RESETHASLIVE1(_Rd_); + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); } } @@ -612,141 +440,88 @@ void recDSUB_consts(int info) { pxAssert( !(info&PROCESS_EE_XMM) ); - if( info & PROCESS_EE_MMX ) { + if( g_cpuConstRegs[ _Rs_ ].UL[ 0 ] || g_cpuConstRegs[ _Rs_ ].UL[ 1 ] ) { + MOV32ItoR( EAX, g_cpuConstRegs[ _Rs_ ].UL[ 0 ] ); + if( EEINST_ISLIVE1(_Rd_) ) + MOV32ItoR( EDX, g_cpuConstRegs[ _Rs_ ].UL[ 1 ] ); + SUB32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + if( EEINST_ISLIVE1(_Rd_) ) + SBB32MtoR( EDX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ); - if( g_cpuConstRegs[ _Rs_ ].UD[0] ) { - - // flush - if( EEREC_D != EEREC_T ) { - MOVQMtoR(EEREC_D, (u32)_eeGetConstReg(_Rs_)); - PSUBQRtoR(EEREC_D, EEREC_T); - } - else { - int t0reg = _allocMMXreg(-1, MMX_TEMP, 0); - MOVQMtoR(t0reg, (u32)_eeGetConstReg(_Rs_)); - PSUBQRtoR(t0reg, EEREC_T); - - // swap mmx regs.. don't ask - mmxregs[t0reg] = mmxregs[EEREC_D]; - mmxregs[EEREC_D].inuse = 0; - } - } - else { - // just move and sign extend - if( EEREC_D != EEREC_T ) { - PXORRtoR(EEREC_D, EEREC_D); - PSUBQRtoR(EEREC_D, EEREC_T); - } - else { - int t0reg = _allocMMXreg(-1, MMX_TEMP, 0); - PXORRtoR(t0reg, t0reg); - PSUBQRtoR(t0reg, EEREC_T); - - // swap mmx regs.. don't ask - mmxregs[t0reg] = mmxregs[EEREC_D]; - mmxregs[EEREC_D].inuse = 0; - } - } + if( !EEINST_ISLIVE1(_Rd_) ) + EEINST_RESETHASLIVE1(_Rd_); } else { - - if( g_cpuConstRegs[ _Rs_ ].UL[ 0 ] || g_cpuConstRegs[ _Rs_ ].UL[ 1 ] ) { - MOV32ItoR( EAX, g_cpuConstRegs[ _Rs_ ].UL[ 0 ] ); - if( EEINST_ISLIVE1(_Rd_) ) - MOV32ItoR( EDX, g_cpuConstRegs[ _Rs_ ].UL[ 1 ] ); - SUB32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - if( EEINST_ISLIVE1(_Rd_) ) - SBB32MtoR( EDX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ); - - if( !EEINST_ISLIVE1(_Rd_) ) - EEINST_RESETHASLIVE1(_Rd_); - } - else { - - if( _Rd_ == _Rt_ ) { - // negate _Rt_ all in memory - if( EEINST_ISLIVE1(_Rd_) ) { - MOV32MtoR( EDX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ); - NEG32M((int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]); - ADC32ItoR(EDX, 0); - NEG32R(EDX); - MOV32RtoM((int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], EDX); - } - else { - EEINST_RESETHASLIVE1(_Rd_); - NEG32M((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]); - } - return; - } - - MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - if( EEINST_ISLIVE1(_Rd_) ) - MOV32MtoR( EDX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ); - // take negative of 64bit number - NEG32R(EAX); + if( _Rd_ == _Rt_ ) { + // negate _Rt_ all in memory if( EEINST_ISLIVE1(_Rd_) ) { + MOV32MtoR( EDX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ); + NEG32M((int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]); ADC32ItoR(EDX, 0); NEG32R(EDX); + MOV32RtoM((int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], EDX); } else { EEINST_RESETHASLIVE1(_Rd_); + NEG32M((int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ]); } + return; } - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); + MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); if( EEINST_ISLIVE1(_Rd_) ) - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); + MOV32MtoR( EDX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ); + // take negative of 64bit number + NEG32R(EAX); + + if( EEINST_ISLIVE1(_Rd_) ) { + ADC32ItoR(EDX, 0); + NEG32R(EDX); + } else { EEINST_RESETHASLIVE1(_Rd_); } } + + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); + if( EEINST_ISLIVE1(_Rd_) ) + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); + else { + EEINST_RESETHASLIVE1(_Rd_); + } } void recDSUB_constt(int info) { pxAssert( !(info&PROCESS_EE_XMM) ); - if( info & PROCESS_EE_MMX ) { - - if( g_cpuConstRegs[ _Rt_ ].UD[0] ) { - - if( EEREC_D != EEREC_S ) MOVQRtoR(EEREC_D, EEREC_S); - PSUBQMtoR(EEREC_D, (u32)_eeGetConstReg(_Rt_)); + if( _Rd_ == _Rs_ ) { + if( EEINST_ISLIVE1(_Rd_) && (g_cpuConstRegs[ _Rt_ ].UL[ 0 ] || g_cpuConstRegs[ _Rt_ ].UL[ 1 ]) ) { + SUB32ItoM( (u32)&cpuRegs.GPR.r[_Rd_].UL[0], g_cpuConstRegs[ _Rt_ ].UL[ 0 ] ); + SBB32ItoM( (u32)&cpuRegs.GPR.r[_Rd_].UL[1], g_cpuConstRegs[ _Rt_ ].UL[ 1 ] ); } - else { - if( EEREC_D != EEREC_S ) MOVQRtoR(EEREC_D, EEREC_S); + else if( g_cpuConstRegs[ _Rt_ ].UL[ 0 ] ) { + EEINST_RESETHASLIVE1(_Rd_); + SUB32ItoM( (u32)&cpuRegs.GPR.r[_Rd_].UL[0], g_cpuConstRegs[ _Rt_ ].UL[ 0 ] ); } } else { - - if( _Rd_ == _Rs_ ) { - if( EEINST_ISLIVE1(_Rd_) && (g_cpuConstRegs[ _Rt_ ].UL[ 0 ] || g_cpuConstRegs[ _Rt_ ].UL[ 1 ]) ) { - SUB32ItoM( (u32)&cpuRegs.GPR.r[_Rd_].UL[0], g_cpuConstRegs[ _Rt_ ].UL[ 0 ] ); - SBB32ItoM( (u32)&cpuRegs.GPR.r[_Rd_].UL[1], g_cpuConstRegs[ _Rt_ ].UL[ 1 ] ); - } - else if( g_cpuConstRegs[ _Rt_ ].UL[ 0 ] ) { - EEINST_RESETHASLIVE1(_Rd_); - SUB32ItoM( (u32)&cpuRegs.GPR.r[_Rd_].UL[0], g_cpuConstRegs[ _Rt_ ].UL[ 0 ] ); - } - } - else { - MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - if( EEINST_ISLIVE1(_Rd_) ) - MOV32MtoR( EDX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ] ); + MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); + if( EEINST_ISLIVE1(_Rd_) ) + MOV32MtoR( EDX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ] ); - if( g_cpuConstRegs[ _Rt_ ].UL[ 0 ] || g_cpuConstRegs[ _Rt_ ].UL[ 1 ] ) { - SUB32ItoR( EAX, g_cpuConstRegs[ _Rt_ ].UL[ 0 ] ); - if( EEINST_ISLIVE1(_Rd_) ) - SBB32ItoR( EDX, g_cpuConstRegs[ _Rt_ ].UL[ 1 ] ); - } - - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); + if( g_cpuConstRegs[ _Rt_ ].UL[ 0 ] || g_cpuConstRegs[ _Rt_ ].UL[ 1 ] ) { + SUB32ItoR( EAX, g_cpuConstRegs[ _Rt_ ].UL[ 0 ] ); if( EEINST_ISLIVE1(_Rd_) ) - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); - else - EEINST_RESETHASLIVE1(_Rd_); + SBB32ItoR( EDX, g_cpuConstRegs[ _Rt_ ].UL[ 1 ] ); } + + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); + if( EEINST_ISLIVE1(_Rd_) ) + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); + else + EEINST_RESETHASLIVE1(_Rd_); } } @@ -754,49 +529,30 @@ void recDSUB_(int info) { pxAssert( !(info&PROCESS_EE_XMM) ); - if( info & PROCESS_EE_MMX ) { - - if( EEREC_D == EEREC_S ) PSUBQRtoR(EEREC_D, EEREC_T); - else if( EEREC_D == EEREC_T ) { - int t0reg = _allocMMXreg(-1, MMX_TEMP, 0); - MOVQRtoR(t0reg, EEREC_S); - PSUBQRtoR(t0reg, EEREC_T); - - // swap mmx regs.. don't ask - mmxregs[t0reg] = mmxregs[EEREC_D]; - mmxregs[EEREC_D].inuse = 0; - } - else { - MOVQRtoR(EEREC_D, EEREC_S); - PSUBQRtoR(EEREC_D, EEREC_T); - } + if( _Rd_ == _Rs_ ) { + MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + if( EEINST_ISLIVE1(_Rd_) ) + MOV32MtoR( EDX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ); + SUB32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); + if( EEINST_ISLIVE1(_Rd_) ) + SBB32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); + else + EEINST_RESETHASLIVE1(_Rd_); } else { - - if( _Rd_ == _Rs_ ) { - MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - if( EEINST_ISLIVE1(_Rd_) ) - MOV32MtoR( EDX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ); - SUB32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - if( EEINST_ISLIVE1(_Rd_) ) - SBB32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); - else - EEINST_RESETHASLIVE1(_Rd_); - } - else { - MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - if( EEINST_ISLIVE1(_Rd_) ) - MOV32MtoR( EDX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ] ); - SUB32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - if( EEINST_ISLIVE1(_Rd_) ) - SBB32MtoR( EDX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ); - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - if( EEINST_ISLIVE1(_Rd_) ) - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); - else - EEINST_RESETHASLIVE1(_Rd_); - } + MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); + if( EEINST_ISLIVE1(_Rd_) ) + MOV32MtoR( EDX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ] ); + SUB32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + if( EEINST_ISLIVE1(_Rd_) ) + SBB32MtoR( EDX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ); + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); + if( EEINST_ISLIVE1(_Rd_) ) + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); + else + EEINST_RESETHASLIVE1(_Rd_); } + } EERECOMPILE_CODE0(DSUB, XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITED); @@ -817,51 +573,36 @@ void recAND_constv(int info, int creg, int vreg) { pxAssert( !(info & PROCESS_EE_XMM) ); - if( info & PROCESS_EE_MMX ) { - int mmreg = vreg == _Rt_ ? EEREC_T : EEREC_S; + if( g_cpuConstRegs[ creg ].UL[0] || g_cpuConstRegs[ creg ].UL[1] ) { - if( g_cpuConstRegs[ creg ].UL[0] || g_cpuConstRegs[ creg ].UL[1] ) { - _flushConstReg(creg); - if( EEREC_D != mmreg ) MOVQRtoR(EEREC_D, mmreg); - PANDMtoR(EEREC_D, (u32)&cpuRegs.GPR.r[creg].UL[0] ); - } - else { - PXORRtoR(EEREC_D, EEREC_D); - } - } - else { - - if( g_cpuConstRegs[ creg ].UL[0] || g_cpuConstRegs[ creg ].UL[1] ) { - - if( _Rd_ == vreg ) { - AND32ItoM((int)&cpuRegs.GPR.r[ vreg ].UL[0], g_cpuConstRegs[creg].UL[0]); - if( EEINST_ISLIVE1(_Rd_) ) { - if( g_cpuConstRegs[creg].UL[1] != 0xffffffff ) AND32ItoM((int)&cpuRegs.GPR.r[ vreg ].UL[1], g_cpuConstRegs[creg].UL[1]); - } - else - EEINST_RESETHASLIVE1(_Rd_); + if( _Rd_ == vreg ) { + AND32ItoM((int)&cpuRegs.GPR.r[ vreg ].UL[0], g_cpuConstRegs[creg].UL[0]); + if( EEINST_ISLIVE1(_Rd_) ) { + if( g_cpuConstRegs[creg].UL[1] != 0xffffffff ) AND32ItoM((int)&cpuRegs.GPR.r[ vreg ].UL[1], g_cpuConstRegs[creg].UL[1]); } - else { - MOV32MtoR(EAX, (int)&cpuRegs.GPR.r[ vreg ]); - if( EEINST_ISLIVE1(_Rd_) ) - MOV32MtoR(ECX, (int)&cpuRegs.GPR.r[ vreg ] + 4 ); - AND32ItoR(EAX, g_cpuConstRegs[ creg ].UL[0]); - if( EEINST_ISLIVE1(_Rd_) ) - AND32ItoR(ECX, g_cpuConstRegs[ creg ].UL[1]); - MOV32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ], EAX); - if( EEINST_ISLIVE1(_Rd_) ) - MOV32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ]+4, ECX); - else - EEINST_RESETHASLIVE1(_Rd_); - } - } - else { - MOV32ItoM((int)&cpuRegs.GPR.r[ _Rd_ ], 0); - if( EEINST_ISLIVE1(_Rd_) ) - MOV32ItoM((int)&cpuRegs.GPR.r[ _Rd_ ]+4, 0); else EEINST_RESETHASLIVE1(_Rd_); } + else { + MOV32MtoR(EAX, (int)&cpuRegs.GPR.r[ vreg ]); + if( EEINST_ISLIVE1(_Rd_) ) + MOV32MtoR(ECX, (int)&cpuRegs.GPR.r[ vreg ] + 4 ); + AND32ItoR(EAX, g_cpuConstRegs[ creg ].UL[0]); + if( EEINST_ISLIVE1(_Rd_) ) + AND32ItoR(ECX, g_cpuConstRegs[ creg ].UL[1]); + MOV32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ], EAX); + if( EEINST_ISLIVE1(_Rd_) ) + MOV32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ]+4, ECX); + else + EEINST_RESETHASLIVE1(_Rd_); + } + } + else { + MOV32ItoM((int)&cpuRegs.GPR.r[ _Rd_ ], 0); + if( EEINST_ISLIVE1(_Rd_) ) + MOV32ItoM((int)&cpuRegs.GPR.r[ _Rd_ ]+4, 0); + else + EEINST_RESETHASLIVE1(_Rd_); } } @@ -879,51 +620,41 @@ void recLogicalOp(int info, int op) { pxAssert( !(info & PROCESS_EE_XMM) ); - if( info & PROCESS_EE_MMX ) { - if( EEREC_D == EEREC_S ) LogicalOpRtoR(EEREC_D, EEREC_T, op); - else if( EEREC_D == EEREC_T ) LogicalOpRtoR(EEREC_D, EEREC_S, op); - else { - MOVQRtoR(EEREC_D, EEREC_S); - LogicalOpRtoR(EEREC_D, EEREC_T, op); + if( _Rd_ == _Rs_ || _Rd_ == _Rt_ ) { + int vreg = _Rd_ == _Rs_ ? _Rt_ : _Rs_; + MOV32MtoR(EAX, (int)&cpuRegs.GPR.r[ vreg ]); + if( EEINST_ISLIVE1(_Rd_) ) + MOV32MtoR(EDX, (int)&cpuRegs.GPR.r[ vreg ] + 4 ); + LogicalOp32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ], EAX, op ); + if( EEINST_ISLIVE1(_Rd_) ) + LogicalOp32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ] + 4, EDX, op ); + if( op == 3 ) { + NOT32M((int)&cpuRegs.GPR.r[ _Rd_ ]); + if( EEINST_ISLIVE1(_Rd_) ) + NOT32M((int)&cpuRegs.GPR.r[ _Rd_ ]+4); } + + if( !EEINST_ISLIVE1(_Rd_) ) EEINST_RESETHASLIVE1(_Rd_); } else { - if( _Rd_ == _Rs_ || _Rd_ == _Rt_ ) { - int vreg = _Rd_ == _Rs_ ? _Rt_ : _Rs_; - MOV32MtoR(EAX, (int)&cpuRegs.GPR.r[ vreg ]); - if( EEINST_ISLIVE1(_Rd_) ) - MOV32MtoR(EDX, (int)&cpuRegs.GPR.r[ vreg ] + 4 ); - LogicalOp32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ], EAX, op ); - if( EEINST_ISLIVE1(_Rd_) ) - LogicalOp32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ] + 4, EDX, op ); - if( op == 3 ) { - NOT32M((int)&cpuRegs.GPR.r[ _Rd_ ]); - if( EEINST_ISLIVE1(_Rd_) ) - NOT32M((int)&cpuRegs.GPR.r[ _Rd_ ]+4); - } + MOV32MtoR(EAX, (int)&cpuRegs.GPR.r[ _Rs_ ]); + if( EEINST_ISLIVE1(_Rd_) ) + MOV32MtoR(ECX, (int)&cpuRegs.GPR.r[ _Rs_ ] + 4 ); + LogicalOp32MtoR(EAX, (int)&cpuRegs.GPR.r[ _Rt_ ], op ); + if( EEINST_ISLIVE1(_Rd_) ) + LogicalOp32MtoR(ECX, (int)&cpuRegs.GPR.r[ _Rt_ ] + 4, op ); - if( !EEINST_ISLIVE1(_Rd_) ) EEINST_RESETHASLIVE1(_Rd_); + if( op == 3 ) { + NOT32R(EAX); + if( EEINST_ISLIVE1(_Rd_) ) + NOT32R(ECX); } - else { - MOV32MtoR(EAX, (int)&cpuRegs.GPR.r[ _Rs_ ]); - if( EEINST_ISLIVE1(_Rd_) ) - MOV32MtoR(ECX, (int)&cpuRegs.GPR.r[ _Rs_ ] + 4 ); - LogicalOp32MtoR(EAX, (int)&cpuRegs.GPR.r[ _Rt_ ], op ); - if( EEINST_ISLIVE1(_Rd_) ) - LogicalOp32MtoR(ECX, (int)&cpuRegs.GPR.r[ _Rt_ ] + 4, op ); - if( op == 3 ) { - NOT32R(EAX); - if( EEINST_ISLIVE1(_Rd_) ) - NOT32R(ECX); - } - - MOV32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ], EAX); - if( EEINST_ISLIVE1(_Rd_) ) - MOV32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ]+4, ECX); - else - EEINST_RESETHASLIVE1(_Rd_); - } + MOV32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ], EAX); + if( EEINST_ISLIVE1(_Rd_) ) + MOV32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ]+4, ECX); + else + EEINST_RESETHASLIVE1(_Rd_); } } @@ -944,53 +675,38 @@ void recOR_constv(int info, int creg, int vreg) { pxAssert( !(info & PROCESS_EE_XMM) ); - if( info & PROCESS_EE_MMX ) { - int mmreg = vreg == _Rt_ ? EEREC_T : EEREC_S; + if(_Rd_ != vreg && _hasFreeMMXreg()) { + int rdreg = _allocMMXreg(-1, MMX_GPR+_Rd_, MODE_WRITE); + SetMMXstate(); + + MOVQMtoR(rdreg, (u32)&cpuRegs.GPR.r[vreg].UL[0] ); if( g_cpuConstRegs[ creg ].UL[0] || g_cpuConstRegs[ creg ].UL[1] ) { - _flushConstReg(creg); - if( EEREC_D != mmreg ) MOVQRtoR(EEREC_D, mmreg); - PORMtoR(EEREC_D, (u32)&cpuRegs.GPR.r[creg].UL[0] ); - } - else { - if( EEREC_D != mmreg ) MOVQRtoR(EEREC_D, mmreg); + PORMtoR(rdreg, (u32)_eeGetConstReg(creg) ); } } else { - - if(_Rd_ != vreg && _hasFreeMMXreg()) { - int rdreg = _allocMMXreg(-1, MMX_GPR+_Rd_, MODE_WRITE); - SetMMXstate(); - - MOVQMtoR(rdreg, (u32)&cpuRegs.GPR.r[vreg].UL[0] ); - - if( g_cpuConstRegs[ creg ].UL[0] || g_cpuConstRegs[ creg ].UL[1] ) { - PORMtoR(rdreg, (u32)_eeGetConstReg(creg) ); + if( _Rd_ == vreg ) { + OR32ItoM((int)&cpuRegs.GPR.r[ vreg ].UL[0], g_cpuConstRegs[creg].UL[0]); + if( EEINST_ISLIVE1(_Rd_) ) { + if( g_cpuConstRegs[creg].UL[1] ) OR32ItoM((int)&cpuRegs.GPR.r[ vreg ].UL[1], g_cpuConstRegs[creg].UL[1]); } + else + EEINST_RESETHASLIVE1(_Rd_); } else { - if( _Rd_ == vreg ) { - OR32ItoM((int)&cpuRegs.GPR.r[ vreg ].UL[0], g_cpuConstRegs[creg].UL[0]); - if( EEINST_ISLIVE1(_Rd_) ) { - if( g_cpuConstRegs[creg].UL[1] ) OR32ItoM((int)&cpuRegs.GPR.r[ vreg ].UL[1], g_cpuConstRegs[creg].UL[1]); - } - else - EEINST_RESETHASLIVE1(_Rd_); - } - else { - MOV32MtoR(EAX, (int)&cpuRegs.GPR.r[ vreg ]); - if( EEINST_ISLIVE1(_Rd_) ) - MOV32MtoR(ECX, (int)&cpuRegs.GPR.r[ vreg ] + 4 ); + MOV32MtoR(EAX, (int)&cpuRegs.GPR.r[ vreg ]); + if( EEINST_ISLIVE1(_Rd_) ) + MOV32MtoR(ECX, (int)&cpuRegs.GPR.r[ vreg ] + 4 ); - if( g_cpuConstRegs[ creg ].UL[0] ) OR32ItoR(EAX, g_cpuConstRegs[ creg ].UL[0]); - if( g_cpuConstRegs[ creg ].UL[1] && EEINST_ISLIVE1(_Rd_) ) OR32ItoR(ECX, g_cpuConstRegs[ creg ].UL[1]); + if( g_cpuConstRegs[ creg ].UL[0] ) OR32ItoR(EAX, g_cpuConstRegs[ creg ].UL[0]); + if( g_cpuConstRegs[ creg ].UL[1] && EEINST_ISLIVE1(_Rd_) ) OR32ItoR(ECX, g_cpuConstRegs[ creg ].UL[1]); - MOV32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ], EAX); - if( EEINST_ISLIVE1(_Rd_) ) - MOV32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ]+4, ECX); - else - EEINST_RESETHASLIVE1(_Rd_); - } + MOV32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ], EAX); + if( EEINST_ISLIVE1(_Rd_) ) + MOV32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ]+4, ECX); + else + EEINST_RESETHASLIVE1(_Rd_); } } } @@ -1022,52 +738,37 @@ void recXOR_constv(int info, int creg, int vreg) { pxAssert( !(info & PROCESS_EE_XMM) ); - if( info & PROCESS_EE_MMX ) { - int mmreg = vreg == _Rt_ ? EEREC_T : EEREC_S; + if(_Rd_ != vreg && _hasFreeMMXreg()) { + int rdreg = _allocMMXreg(-1, MMX_GPR+_Rd_, MODE_WRITE); + SetMMXstate(); + MOVQMtoR(rdreg, (u32)&cpuRegs.GPR.r[vreg].UL[0] ); if( g_cpuConstRegs[ creg ].UL[0] || g_cpuConstRegs[ creg ].UL[1] ) { - _flushConstReg(creg); - if( EEREC_D != mmreg ) MOVQRtoR(EEREC_D, mmreg); - PXORMtoR(EEREC_D, (u32)&cpuRegs.GPR.r[creg].UL[0] ); - } - else { - if( EEREC_D != mmreg ) MOVQRtoR(EEREC_D, mmreg); + PXORMtoR(rdreg, (u32)_eeGetConstReg(creg) ); } } else { - - if(_Rd_ != vreg && _hasFreeMMXreg()) { - int rdreg = _allocMMXreg(-1, MMX_GPR+_Rd_, MODE_WRITE); - SetMMXstate(); - MOVQMtoR(rdreg, (u32)&cpuRegs.GPR.r[vreg].UL[0] ); - - if( g_cpuConstRegs[ creg ].UL[0] || g_cpuConstRegs[ creg ].UL[1] ) { - PXORMtoR(rdreg, (u32)_eeGetConstReg(creg) ); + if( _Rd_ == vreg ) { + XOR32ItoM((int)&cpuRegs.GPR.r[ vreg ].UL[0], g_cpuConstRegs[creg].UL[0]); + if( EEINST_ISLIVE1(_Rd_) ) { + if( g_cpuConstRegs[creg].UL[1] ) XOR32ItoM((int)&cpuRegs.GPR.r[ vreg ].UL[1], g_cpuConstRegs[creg].UL[1]); } + else + EEINST_RESETHASLIVE1(_Rd_); } else { - if( _Rd_ == vreg ) { - XOR32ItoM((int)&cpuRegs.GPR.r[ vreg ].UL[0], g_cpuConstRegs[creg].UL[0]); - if( EEINST_ISLIVE1(_Rd_) ) { - if( g_cpuConstRegs[creg].UL[1] ) XOR32ItoM((int)&cpuRegs.GPR.r[ vreg ].UL[1], g_cpuConstRegs[creg].UL[1]); - } - else - EEINST_RESETHASLIVE1(_Rd_); - } - else { - MOV32MtoR(EAX, (int)&cpuRegs.GPR.r[ vreg ]); - if( EEINST_ISLIVE1(_Rd_) ) - MOV32MtoR(ECX, (int)&cpuRegs.GPR.r[ vreg ] + 4 ); + MOV32MtoR(EAX, (int)&cpuRegs.GPR.r[ vreg ]); + if( EEINST_ISLIVE1(_Rd_) ) + MOV32MtoR(ECX, (int)&cpuRegs.GPR.r[ vreg ] + 4 ); - if( g_cpuConstRegs[ creg ].UL[0] ) XOR32ItoR(EAX, g_cpuConstRegs[ creg ].UL[0]); - if( g_cpuConstRegs[ creg ].UL[1] && EEINST_ISLIVE1(_Rd_) ) XOR32ItoR(ECX, g_cpuConstRegs[ creg ].UL[1]); + if( g_cpuConstRegs[ creg ].UL[0] ) XOR32ItoR(EAX, g_cpuConstRegs[ creg ].UL[0]); + if( g_cpuConstRegs[ creg ].UL[1] && EEINST_ISLIVE1(_Rd_) ) XOR32ItoR(ECX, g_cpuConstRegs[ creg ].UL[1]); - MOV32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ], EAX); - if( EEINST_ISLIVE1(_Rd_) ) - MOV32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ]+4, ECX); - else - EEINST_RESETHASLIVE1(_Rd_); - } + MOV32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ], EAX); + if( EEINST_ISLIVE1(_Rd_) ) + MOV32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ]+4, ECX); + else + EEINST_RESETHASLIVE1(_Rd_); } } } @@ -1099,67 +800,47 @@ void recNOR_constv(int info, int creg, int vreg) { pxAssert( !(info & PROCESS_EE_XMM) ); - if( info & PROCESS_EE_MMX ) { - int mmreg = vreg == _Rt_ ? EEREC_T : EEREC_S; + if(_Rd_ != vreg && _hasFreeMMXreg()) { + int rdreg = _allocMMXreg(-1, MMX_GPR+_Rd_, MODE_WRITE); int t0reg = _allocMMXreg(-1, MMX_TEMP, 0); - if( g_cpuConstRegs[ creg ].UL[0] || g_cpuConstRegs[ creg ].UL[1] ) { - if( EEREC_D != mmreg ) MOVQRtoR(EEREC_D, mmreg); - PORMtoR(EEREC_D, (u32)_eeGetConstReg(creg)); - } - else { - if( EEREC_D != mmreg ) MOVQRtoR(EEREC_D, mmreg); - } + SetMMXstate(); - // take the NOT + MOVQMtoR(rdreg, (u32)&cpuRegs.GPR.r[vreg].UL[0] ); PCMPEQDRtoR( t0reg,t0reg); - PXORRtoR( EEREC_D,t0reg); + if( g_cpuConstRegs[ creg ].UD[0] ) PORMtoR(rdreg, (u32)_eeGetConstReg(creg) ); + + // take the NOT + PXORRtoR( rdreg,t0reg); + _freeMMXreg(t0reg); } else { + if( _Rd_ == vreg ) { + NOT32M((int)&cpuRegs.GPR.r[ vreg ].UL[0]); + if( EEINST_ISLIVE1(_Rd_) ) NOT32M((int)&cpuRegs.GPR.r[ vreg ].UL[1]); - if(_Rd_ != vreg && _hasFreeMMXreg()) { - int rdreg = _allocMMXreg(-1, MMX_GPR+_Rd_, MODE_WRITE); - int t0reg = _allocMMXreg(-1, MMX_TEMP, 0); - - SetMMXstate(); - - MOVQMtoR(rdreg, (u32)&cpuRegs.GPR.r[vreg].UL[0] ); - PCMPEQDRtoR( t0reg,t0reg); - if( g_cpuConstRegs[ creg ].UD[0] ) PORMtoR(rdreg, (u32)_eeGetConstReg(creg) ); - - // take the NOT - PXORRtoR( rdreg,t0reg); - - _freeMMXreg(t0reg); + if( g_cpuConstRegs[creg].UL[0] ) AND32ItoM((int)&cpuRegs.GPR.r[ vreg ].UL[0], ~g_cpuConstRegs[creg].UL[0]); + if( EEINST_ISLIVE1(_Rd_) ) { + if( g_cpuConstRegs[creg].UL[1] ) AND32ItoM((int)&cpuRegs.GPR.r[ vreg ].UL[1], ~g_cpuConstRegs[creg].UL[1]); + } + else + EEINST_RESETHASLIVE1(_Rd_); } else { - if( _Rd_ == vreg ) { - NOT32M((int)&cpuRegs.GPR.r[ vreg ].UL[0]); - if( EEINST_ISLIVE1(_Rd_) ) NOT32M((int)&cpuRegs.GPR.r[ vreg ].UL[1]); - - if( g_cpuConstRegs[creg].UL[0] ) AND32ItoM((int)&cpuRegs.GPR.r[ vreg ].UL[0], ~g_cpuConstRegs[creg].UL[0]); - if( EEINST_ISLIVE1(_Rd_) ) { - if( g_cpuConstRegs[creg].UL[1] ) AND32ItoM((int)&cpuRegs.GPR.r[ vreg ].UL[1], ~g_cpuConstRegs[creg].UL[1]); - } - else - EEINST_RESETHASLIVE1(_Rd_); - } - else { - MOV32MtoR(EAX, (int)&cpuRegs.GPR.r[ vreg ]); - if( EEINST_ISLIVE1(_Rd_) ) - MOV32MtoR(ECX, (int)&cpuRegs.GPR.r[ vreg ] + 4 ); - if( g_cpuConstRegs[ creg ].UL[0] ) OR32ItoR(EAX, g_cpuConstRegs[ creg ].UL[0]); - if( g_cpuConstRegs[ creg ].UL[1] && EEINST_ISLIVE1(_Rd_) ) OR32ItoR(ECX, g_cpuConstRegs[ creg ].UL[1]); - NOT32R(EAX); - if( EEINST_ISLIVE1(_Rd_) ) - NOT32R(ECX); - MOV32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ], EAX); - if( EEINST_ISLIVE1(_Rd_) ) - MOV32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ]+4, ECX); - else - EEINST_RESETHASLIVE1(_Rd_); - } + MOV32MtoR(EAX, (int)&cpuRegs.GPR.r[ vreg ]); + if( EEINST_ISLIVE1(_Rd_) ) + MOV32MtoR(ECX, (int)&cpuRegs.GPR.r[ vreg ] + 4 ); + if( g_cpuConstRegs[ creg ].UL[0] ) OR32ItoR(EAX, g_cpuConstRegs[ creg ].UL[0]); + if( g_cpuConstRegs[ creg ].UL[1] && EEINST_ISLIVE1(_Rd_) ) OR32ItoR(ECX, g_cpuConstRegs[ creg ].UL[1]); + NOT32R(EAX); + if( EEINST_ISLIVE1(_Rd_) ) + NOT32R(ECX); + MOV32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ], EAX); + if( EEINST_ISLIVE1(_Rd_) ) + MOV32RtoM((int)&cpuRegs.GPR.r[ _Rd_ ]+4, ECX); + else + EEINST_RESETHASLIVE1(_Rd_); } } } @@ -1194,54 +875,8 @@ u32 s_sltone = 1; void recSLTs_consts(int info, int sign) { pxAssert( !(info & PROCESS_EE_XMM) ); - - if( info & PROCESS_EE_MMX ) { - - if( _Rs_ == _Rt_ ) { - PXORRtoR(EEREC_D, EEREC_D); - return; - } - - if( g_cpuConstRegs[_Rs_].UL[1] == (g_cpuConstRegs[_Rs_].SL[0]<0?0xffffffff:0) && EEINST_ISSIGNEXT(_Rt_) ) { - // just compare the lower values - if( sign ) { - if( EEREC_D != EEREC_T ) MOVQRtoR(EEREC_D, EEREC_T); - PCMPGTDMtoR(EEREC_D, (u32)_eeGetConstReg(_Rs_)); - - PUNPCKLDQRtoR(EEREC_D, EEREC_D); - PSRLQItoR(EEREC_D, 63); - } - else { - if( EEREC_D != EEREC_T ) { - MOVDMtoMMX(EEREC_D, (u32)&s_sltconst); - PXORRtoR(EEREC_D, EEREC_T); - } - else { - PXORMtoR(EEREC_D, (u32)&s_sltconst); - } - - PCMPGTDMtoR(EEREC_D, (uptr)recGetImm64(0, g_cpuConstRegs[_Rs_].UL[0] ^ 0x80000000)); - - PUNPCKLDQRtoR(EEREC_D, EEREC_D); - PSRLQItoR(EEREC_D, 63); - } - - return; - } - else { - // need to compare total 64 bit value - if( info & PROCESS_EE_MODEWRITET ) { - MOVQRtoM((u32)&cpuRegs.GPR.r[_Rt_], EEREC_T); - if( mmxregs[EEREC_T].reg == MMX_GPR+_Rt_ ) mmxregs[EEREC_T].mode &= ~MODE_WRITE; - } - - // fall through - mmxregs[EEREC_D].mode |= MODE_WRITE; // in case EEREC_D was just flushed - } - } - if( info & PROCESS_EE_MMX ) PXORRtoR(EEREC_D, EEREC_D); - else XOR32RtoR(EAX, EAX); + XOR32RtoR(EAX, EAX); CMP32ItoM( (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], g_cpuConstRegs[_Rs_].UL[1]); if( sign ) { @@ -1257,17 +892,15 @@ void recSLTs_consts(int info, int sign) j8Ptr[1] = JBE8(0); x86SetJ8(j8Ptr[2]); - if( info & PROCESS_EE_MMX ) MOVDMtoMMX(EEREC_D, (u32)&s_sltone); - else MOV32ItoR(EAX, 1); + MOV32ItoR(EAX, 1); x86SetJ8(j8Ptr[0]); x86SetJ8(j8Ptr[1]); - if( !(info & PROCESS_EE_MMX) ) { - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - if( EEINST_ISLIVE1(_Rd_) ) MOV32ItoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], 0 ); - else EEINST_RESETHASLIVE1(_Rd_); - } + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); + if( EEINST_ISLIVE1(_Rd_) ) MOV32ItoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], 0 ); + else EEINST_RESETHASLIVE1(_Rd_); + } // SLT with one operand coming from mem (compares only low 32 bits) @@ -1328,38 +961,8 @@ void recSLTmemconstt(int regd, int regs, u32 mem, int sign) void recSLTs_constt(int info, int sign) { pxAssert( !(info & PROCESS_EE_XMM) ); - - if( info & PROCESS_EE_MMX ) { - if( _Rs_ == _Rt_ ) { - PXORRtoR(EEREC_D, EEREC_D); - return; - } - - if( EEINST_ISSIGNEXT(_Rs_) && g_cpuConstRegs[_Rt_].UL[1] == (g_cpuConstRegs[_Rt_].SL[0]<0?0xffffffff:0) ) { - // just compare the lower values - if( sign ) { - recSLTmemconstt(EEREC_D, EEREC_S, (u32)_eeGetConstReg(_Rt_), 1); - } - else { - recSLTmemconstt(EEREC_D, EEREC_S, (uptr)recGetImm64(0, g_cpuConstRegs[_Rt_].UL[0] ^ 0x80000000), 0); - } - - return; - } - else { - // need to compare total 64 bit value - if( info & PROCESS_EE_MODEWRITES ) { - MOVQRtoM((u32)&cpuRegs.GPR.r[_Rs_], EEREC_S); - if( mmxregs[EEREC_S].reg == MMX_GPR+_Rs_ ) mmxregs[EEREC_S].mode &= ~MODE_WRITE; - } - mmxregs[EEREC_D].mode |= MODE_WRITE; // in case EEREC_D was just flushed - - // fall through - } - } - if( info & PROCESS_EE_MMX ) MOVDMtoMMX(EEREC_D, (u32)&s_sltone); - else MOV32ItoR(EAX, 1); + MOV32ItoR(EAX, 1); CMP32ItoM( (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ], g_cpuConstRegs[_Rt_].UL[1]); if( sign ) { @@ -1375,23 +978,20 @@ void recSLTs_constt(int info, int sign) j8Ptr[1] = JB8(0); x86SetJ8(j8Ptr[2]); - if( info & PROCESS_EE_MMX ) PXORRtoR(EEREC_D, EEREC_D); - else XOR32RtoR(EAX, EAX); + XOR32RtoR(EAX, EAX); x86SetJ8(j8Ptr[0]); x86SetJ8(j8Ptr[1]); - if( !(info & PROCESS_EE_MMX) ) { - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - if( EEINST_ISLIVE1(_Rd_) ) MOV32ItoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], 0 ); - else EEINST_RESETHASLIVE1(_Rd_); - } + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); + if( EEINST_ISLIVE1(_Rd_) ) MOV32ItoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], 0 ); + else EEINST_RESETHASLIVE1(_Rd_); + } void recSLTs_(int info, int sign) { - if( info & PROCESS_EE_MMX ) MOVDMtoMMX(EEREC_D, (u32)&s_sltone); - else MOV32ItoR(EAX, 1); + MOV32ItoR(EAX, 1); MOV32MtoR(ECX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]); CMP32MtoR( ECX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ]); @@ -1410,17 +1010,14 @@ void recSLTs_(int info, int sign) j8Ptr[1] = JB8(0); x86SetJ8(j8Ptr[2]); - if( info & PROCESS_EE_MMX ) PXORRtoR(EEREC_D, EEREC_D); - else XOR32RtoR(EAX, EAX); + XOR32RtoR(EAX, EAX); x86SetJ8(j8Ptr[0]); x86SetJ8(j8Ptr[1]); - if( !(info & PROCESS_EE_MMX) ) { - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - if( EEINST_ISLIVE1(_Rd_) ) MOV32ItoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], 0 ); - else EEINST_RESETHASLIVE1(_Rd_); - } + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); + if( EEINST_ISLIVE1(_Rd_) ) MOV32ItoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], 0 ); + else EEINST_RESETHASLIVE1(_Rd_); } void recSLT_consts(int info) @@ -1435,54 +1032,9 @@ void recSLT_constt(int info) void recSLT_(int info) { - int t0reg; pxAssert( !(info & PROCESS_EE_XMM) ); - if( !(info & PROCESS_EE_MMX) ) { - recSLTs_(info, 1); - return; - } - - if( !EEINST_ISSIGNEXT(_Rs_) || !EEINST_ISSIGNEXT(_Rt_) ) { - // need to compare total 64 bit value - if( info & PROCESS_EE_MODEWRITES ) { - MOVQRtoM((u32)&cpuRegs.GPR.r[_Rs_], EEREC_S); - if( mmxregs[EEREC_S].reg == MMX_GPR+_Rs_ ) mmxregs[EEREC_S].mode &= ~MODE_WRITE; - } - if( info & PROCESS_EE_MODEWRITET ) { - MOVQRtoM((u32)&cpuRegs.GPR.r[_Rt_], EEREC_T); - if( mmxregs[EEREC_T].reg == MMX_GPR+_Rt_ ) mmxregs[EEREC_T].mode &= ~MODE_WRITE; - } - mmxregs[EEREC_D].mode |= MODE_WRITE; // in case EEREC_D was just flushed - recSLTs_(info, 1); - return; - } - - if( EEREC_S == EEREC_T ) { - PXORRtoR(EEREC_D, EEREC_D); - return; - } - - // just compare the lower values - if( EEREC_D == EEREC_S ) { - t0reg = _allocMMXreg(-1, MMX_TEMP, 0); - MOVQRtoR(t0reg, EEREC_T); - PCMPGTDRtoR(t0reg, EEREC_S); - - PUNPCKLDQRtoR(t0reg, t0reg); - PSRLQItoR(t0reg, 63); - - // swap regs - mmxregs[t0reg] = mmxregs[EEREC_D]; - mmxregs[EEREC_D].inuse = 0; - } - else { - if( EEREC_D != EEREC_T ) MOVQRtoR(EEREC_D, EEREC_T); - PCMPGTDRtoR(EEREC_D, EEREC_S); - - PUNPCKLDQRtoR(EEREC_D, EEREC_D); - PSRLQItoR(EEREC_D, 63); - } + recSLTs_(info, 1); } EERECOMPILE_CODE0(SLT, XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITED); @@ -1507,70 +1059,10 @@ void recSLTU_constt(int info) void recSLTU_(int info) { - int t1reg; - pxAssert( !(info & PROCESS_EE_XMM) ); EEINST_SETSIGNEXT(_Rd_); - if( !(info & PROCESS_EE_MMX) ) { - recSLTs_(info, 0); - return; - } - - if( EEREC_S == EEREC_T ) { - PXORRtoR(EEREC_D, EEREC_D); - return; - } - - if( !EEINST_ISSIGNEXT(_Rs_) || !EEINST_ISSIGNEXT(_Rt_) ) { - // need to compare total 64 bit value - if( info & PROCESS_EE_MODEWRITES ) { - MOVQRtoM((u32)&cpuRegs.GPR.r[_Rs_], EEREC_S); - if( mmxregs[EEREC_S].reg == MMX_GPR+_Rs_ ) mmxregs[EEREC_S].mode &= ~MODE_WRITE; - } - if( info & PROCESS_EE_MODEWRITET ) { - MOVQRtoM((u32)&cpuRegs.GPR.r[_Rt_], EEREC_T); - if( mmxregs[EEREC_T].reg == MMX_GPR+_Rt_ ) mmxregs[EEREC_T].mode &= ~MODE_WRITE; - } - mmxregs[EEREC_D].mode |= MODE_WRITE; // in case EEREC_D was just flushed - recSLTs_(info, 0); - return; - } - - t1reg = _allocMMXreg(-1, MMX_TEMP, 0); - - MOVDMtoMMX(t1reg, (u32)&s_sltconst); - - if( EEREC_D == EEREC_S ) { - PXORRtoR(EEREC_S, t1reg); - PXORRtoR(t1reg, EEREC_T); - PCMPGTDRtoR(t1reg, EEREC_S); - - PUNPCKLDQRtoR(t1reg, t1reg); - PSRLQItoR(t1reg, 63); - - // swap regs - mmxregs[t1reg] = mmxregs[EEREC_D]; - mmxregs[EEREC_D].inuse = 0; - } - else { - if( EEREC_D != EEREC_T ) { - MOVDMtoMMX(EEREC_D, (u32)&s_sltconst); - PXORRtoR(t1reg, EEREC_S); - PXORRtoR(EEREC_D, EEREC_T); - } - else { - PXORRtoR(EEREC_D, t1reg); - PXORRtoR(t1reg, EEREC_S); - } - - PCMPGTDRtoR(EEREC_D, t1reg); - - PUNPCKLDQRtoR(EEREC_D, EEREC_D); - PSRLQItoR(EEREC_D, 63); - - _freeMMXreg(t1reg); - } + recSLTs_(info, 0); } EERECOMPILE_CODE0(SLTU, XMMINFO_READS|XMMINFO_READT|XMMINFO_WRITED); diff --git a/pcsx2/x86/ix86-32/iR5900AritImm.cpp b/pcsx2/x86/ix86-32/iR5900AritImm.cpp index 6e2b33bef7..2a5bc54c07 100644 --- a/pcsx2/x86/ix86-32/iR5900AritImm.cpp +++ b/pcsx2/x86/ix86-32/iR5900AritImm.cpp @@ -59,24 +59,6 @@ void recADDI_(int info) EEINST_SETSIGNEXT(_Rt_); EEINST_SETSIGNEXT(_Rs_); - if ( info & PROCESS_EE_MMX ) { - if ( _Imm_ != 0 ) { - if ( EEREC_T != EEREC_S ) MOVQRtoR(EEREC_T, EEREC_S); - PADDDMtoR(EEREC_T, (uptr)recGetImm64(0, _Imm_)); - if ( EEINST_ISLIVE1(_Rt_) ) _signExtendGPRtoMMX(EEREC_T, _Rt_, 0); - else EEINST_RESETHASLIVE1(_Rt_); - } - else { - // just move and sign extend - if ( !EEINST_HASLIVE1(_Rs_) ) { - if ( EEINST_ISLIVE1(_Rt_) ) _signExtendGPRMMXtoMMX(EEREC_T, _Rt_, EEREC_S, _Rs_); - else EEINST_RESETHASLIVE1(_Rt_); - } - else if ( EEREC_T != EEREC_S ) MOVQRtoR(EEREC_T, EEREC_S); - } - return; - } - if ( _Rt_ == _Rs_ ) { if ( EEINST_ISLIVE1(_Rt_) ) { @@ -124,18 +106,6 @@ void recDADDI_const( void ) void recDADDI_(int info) { pxAssert( !(info&PROCESS_EE_XMM) ); - - if( info & PROCESS_EE_MMX ) { - - if( _Imm_ != 0 ) { - if( EEREC_T != EEREC_S ) MOVQRtoR(EEREC_T, EEREC_S); - PADDQMtoR(EEREC_T, (uptr)recGetImm64(-(_Imm_ < 0), _Imm_)); - } - else { - if( EEREC_T != EEREC_S ) MOVQRtoR(EEREC_T, EEREC_S); - } - return; - } if( _Rt_ == _Rs_ ) { ADD32ItoM((int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], _Imm_); @@ -184,22 +154,7 @@ extern u32 s_sltone; void recSLTIU_(int info) { - if( info & PROCESS_EE_MMX ) { - if( EEINST_ISSIGNEXT(_Rs_) ) { - recSLTmemconstt(EEREC_T, EEREC_S, (uptr)recGetImm64(0, ((s32)_Imm_)^0x80000000), 0); - EEINST_SETSIGNEXT(_Rt_); - return; - } - - if( info & PROCESS_EE_MODEWRITES ) { - MOVQRtoM((u32)&cpuRegs.GPR.r[_Rs_], EEREC_S); - if( mmxregs[EEREC_S].reg == MMX_GPR+_Rs_ ) mmxregs[EEREC_S].mode &= ~MODE_WRITE; - } - mmxregs[EEREC_T].mode |= MODE_WRITE; // in case EEREC_T==EEREC_S - } - - if( info & PROCESS_EE_MMX ) MOVDMtoMMX(EEREC_T, (u32)&s_sltone); - else MOV32ItoR(EAX, 1); + MOV32ItoR(EAX, 1); CMP32ItoM( (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ], _Imm_ >= 0 ? 0 : 0xffffffff); j8Ptr[0] = JB8( 0 ); @@ -209,17 +164,15 @@ void recSLTIU_(int info) j8Ptr[1] = JB8(0); x86SetJ8(j8Ptr[2]); - if( info & PROCESS_EE_MMX ) PXORRtoR(EEREC_T, EEREC_T); - else XOR32RtoR(EAX, EAX); + XOR32RtoR(EAX, EAX); x86SetJ8(j8Ptr[0]); x86SetJ8(j8Ptr[1]); - if( !(info & PROCESS_EE_MMX) ) { - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], EAX ); - if( EEINST_ISLIVE1(_Rt_) ) MOV32ItoM( (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], 0 ); - else EEINST_RESETHASLIVE1(_Rt_); - } + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], EAX ); + if( EEINST_ISLIVE1(_Rt_) ) MOV32ItoM( (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], 0 ); + else EEINST_RESETHASLIVE1(_Rt_); + EEINST_SETSIGNEXT(_Rt_); } @@ -233,24 +186,8 @@ void recSLTI_const() void recSLTI_(int info) { - if( info & PROCESS_EE_MMX) { - - if( EEINST_ISSIGNEXT(_Rs_) ) { - recSLTmemconstt(EEREC_T, EEREC_S, (uptr)recGetImm64(0, _Imm_), 1); - EEINST_SETSIGNEXT(_Rt_); - return; - } - - if( info & PROCESS_EE_MODEWRITES ) { - MOVQRtoM((u32)&cpuRegs.GPR.r[_Rs_], EEREC_S); - if( mmxregs[EEREC_S].reg == MMX_GPR+_Rs_ ) mmxregs[EEREC_S].mode &= ~MODE_WRITE; - } - mmxregs[EEREC_T].mode |= MODE_WRITE; // in case EEREC_T==EEREC_S - } - // test silent hill if modding - if( info & PROCESS_EE_MMX ) MOVDMtoMMX(EEREC_T, (u32)&s_sltone); - else MOV32ItoR(EAX, 1); + MOV32ItoR(EAX, 1); CMP32ItoM( (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ], _Imm_ >= 0 ? 0 : 0xffffffff); j8Ptr[0] = JL8( 0 ); @@ -260,17 +197,15 @@ void recSLTI_(int info) j8Ptr[1] = JB8(0); x86SetJ8(j8Ptr[2]); - if( info & PROCESS_EE_MMX ) PXORRtoR(EEREC_T, EEREC_T); - else XOR32RtoR(EAX, EAX); + XOR32RtoR(EAX, EAX); x86SetJ8(j8Ptr[0]); x86SetJ8(j8Ptr[1]); - if( !(info & PROCESS_EE_MMX) ) { - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], EAX ); - if( EEINST_ISLIVE1(_Rt_) ) MOV32ItoM( (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], 0 ); - else EEINST_RESETHASLIVE1(_Rt_); - } + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], EAX ); + if( EEINST_ISLIVE1(_Rt_) ) MOV32ItoM( (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], 0 ); + else EEINST_RESETHASLIVE1(_Rt_); + EEINST_SETSIGNEXT(_Rt_); } @@ -284,21 +219,6 @@ void recANDI_const() void recLogicalOpI(int info, int op) { - if( info & PROCESS_EE_MMX ) { - SetMMXstate(); - - if( _ImmU_ != 0 ) { - if( EEREC_T != EEREC_S ) MOVQRtoR(EEREC_T, EEREC_S); - LogicalOpMtoR(EEREC_T, (uptr)recGetImm64(0, _ImmU_), op); - } - else { - if( op == 0 ) PXORRtoR(EEREC_T, EEREC_T); - else if( EEREC_T != EEREC_S ) MOVQRtoR(EEREC_T, EEREC_S); - } - return; - } - - if ( _ImmU_ != 0 ) { if( _Rt_ == _Rs_ ) { diff --git a/pcsx2/x86/ix86-32/iR5900Branch.cpp b/pcsx2/x86/ix86-32/iR5900Branch.cpp index 88e8006116..2f5efe5534 100644 --- a/pcsx2/x86/ix86-32/iR5900Branch.cpp +++ b/pcsx2/x86/ix86-32/iR5900Branch.cpp @@ -58,76 +58,7 @@ REC_SYS_DEL(BGEZALL, 31); void recSetBranchEQ(int info, int bne, int process) { - if( info & PROCESS_EE_MMX ) { - int t0reg; - - SetMMXstate(); - - if( process & PROCESS_CONSTS ) { - if( (g_pCurInstInfo->regs[_Rt_] & EEINST_LASTUSE) || !EEINST_ISLIVE64(_Rt_) ) { - _deleteMMXreg(_Rt_, 1); - mmxregs[EEREC_T].inuse = 0; - t0reg = EEREC_T; - } - else { - t0reg = _allocMMXreg(-1, MMX_TEMP, 0); - MOVQRtoR(t0reg, EEREC_T); - } - - _flushConstReg(_Rs_); - PCMPEQDMtoR(t0reg, (u32)&cpuRegs.GPR.r[_Rs_].UL[0]); - - if( t0reg != EEREC_T ) _freeMMXreg(t0reg); - } - else if( process & PROCESS_CONSTT ) { - if( (g_pCurInstInfo->regs[_Rs_] & EEINST_LASTUSE) || !EEINST_ISLIVE64(_Rs_) ) { - _deleteMMXreg(_Rs_, 1); - mmxregs[EEREC_S].inuse = 0; - t0reg = EEREC_S; - } - else { - t0reg = _allocMMXreg(-1, MMX_TEMP, 0); - MOVQRtoR(t0reg, EEREC_S); - } - - _flushConstReg(_Rt_); - PCMPEQDMtoR(t0reg, (u32)&cpuRegs.GPR.r[_Rt_].UL[0]); - - if( t0reg != EEREC_S ) _freeMMXreg(t0reg); - } - else { - - if( (g_pCurInstInfo->regs[_Rs_] & EEINST_LASTUSE) || !EEINST_ISLIVE64(_Rs_) ) { - _deleteMMXreg(_Rs_, 1); - mmxregs[EEREC_S].inuse = 0; - t0reg = EEREC_S; - PCMPEQDRtoR(t0reg, EEREC_T); - } - else if( (g_pCurInstInfo->regs[_Rt_] & EEINST_LASTUSE) || !EEINST_ISLIVE64(_Rt_) ) { - _deleteMMXreg(_Rt_, 1); - mmxregs[EEREC_T].inuse = 0; - t0reg = EEREC_T; - PCMPEQDRtoR(t0reg, EEREC_S); - } - else { - t0reg = _allocMMXreg(-1, MMX_TEMP, 0); - MOVQRtoR(t0reg, EEREC_S); - PCMPEQDRtoR(t0reg, EEREC_T); - } - - if( t0reg != EEREC_S && t0reg != EEREC_T ) _freeMMXreg(t0reg); - } - - PMOVMSKBMMXtoR(EAX, t0reg); - - _eeFlushAllUnused(); - - CMP8ItoR( EAX, 0xff ); - - if( bne ) j32Ptr[ 1 ] = JE32( 0 ); - else j32Ptr[ 0 ] = j32Ptr[ 1 ] = JNE32( 0 ); - } - else if( info & PROCESS_EE_XMM ) { + if( info & PROCESS_EE_XMM ) { int t0reg; if( process & PROCESS_CONSTS ) { diff --git a/pcsx2/x86/ix86-32/iR5900Move.cpp b/pcsx2/x86/ix86-32/iR5900Move.cpp index 904354d289..14e38aa41e 100644 --- a/pcsx2/x86/ix86-32/iR5900Move.cpp +++ b/pcsx2/x86/ix86-32/iR5900Move.cpp @@ -430,28 +430,6 @@ void recMOVZtemp_const() void recMOVZtemp_consts(int info) { - if( info & PROCESS_EE_MMX ) { - - u32* mem; - int t0reg = _allocMMXreg(-1, MMX_TEMP, 0); - PXORRtoR(t0reg, t0reg); - PCMPEQDRtoR(t0reg, EEREC_T); - PMOVMSKBMMXtoR(EAX, t0reg); - CMP8ItoR(EAX, 0xff); - j8Ptr[ 0 ] = JNE8( 0 ); - - if( g_cpuFlushedConstReg & (1<<_Rs_) ) - mem = &cpuRegs.GPR.r[_Rs_].UL[0]; - else - mem = recGetImm64(g_cpuConstRegs[_Rs_].UL[1], g_cpuConstRegs[_Rs_].UL[0]); - - MOVQMtoR(EEREC_D, (uptr)mem); - x86SetJ8( j8Ptr[ 0 ] ); - - _freeMMXreg(t0reg); - return; - } - MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); OR32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ); j8Ptr[ 0 ] = JNZ8( 0 ); @@ -464,11 +442,6 @@ void recMOVZtemp_consts(int info) void recMOVZtemp_constt(int info) { - if( info & PROCESS_EE_MMX ) { - if( EEREC_D != EEREC_S ) MOVQRtoR(EEREC_D, EEREC_S); - return; - } - if( _hasFreeXMMreg() ) { int t0reg = _allocMMXreg(-1, MMX_TEMP, 0); MOVQMtoR(t0reg, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); @@ -487,22 +460,6 @@ void recMOVZtemp_(int info) { int t0reg = -1; - if( info & PROCESS_EE_MMX ) { - - t0reg = _allocMMXreg(-1, MMX_TEMP, 0); - PXORRtoR(t0reg, t0reg); - PCMPEQDRtoR(t0reg, EEREC_T); - PMOVMSKBMMXtoR(EAX, t0reg); - CMP8ItoR(EAX, 0xff); - j8Ptr[ 0 ] = JNE8( 0 ); - - MOVQRtoR(EEREC_D, EEREC_S); - x86SetJ8( j8Ptr[ 0 ] ); - - _freeMMXreg(t0reg); - return; - } - if( _hasFreeXMMreg() ) t0reg = _allocMMXreg(-1, MMX_TEMP, 0); @@ -550,29 +507,6 @@ void recMOVNtemp_const() void recMOVNtemp_consts(int info) { - if( info & PROCESS_EE_MMX ) { - - u32* mem; - int t0reg = _allocMMXreg(-1, MMX_TEMP, 0); - PXORRtoR(t0reg, t0reg); - PCMPEQDRtoR(t0reg, EEREC_T); - - PMOVMSKBMMXtoR(EAX, t0reg); - CMP8ItoR(EAX, 0xff); - j8Ptr[ 0 ] = JE8( 0 ); - - if( g_cpuFlushedConstReg & (1<<_Rs_) ) - mem = &cpuRegs.GPR.r[_Rs_].UL[0]; - else - mem = recGetImm64(g_cpuConstRegs[_Rs_].UL[1], g_cpuConstRegs[_Rs_].UL[0]); - - MOVQMtoR(EEREC_D, (uptr)mem); - x86SetJ8( j8Ptr[ 0 ] ); - - _freeMMXreg(t0reg); - return; - } - MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); OR32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ); j8Ptr[ 0 ] = JZ8( 0 ); @@ -603,22 +537,6 @@ void recMOVNtemp_(int info) { int t0reg=-1; - if( info & PROCESS_EE_MMX ) { - - t0reg = _allocMMXreg(-1, MMX_TEMP, 0); - PXORRtoR(t0reg, t0reg); - PCMPEQDRtoR(t0reg, EEREC_T); - PMOVMSKBMMXtoR(EAX, t0reg); - CMP8ItoR(EAX, 0xff); - j8Ptr[ 0 ] = JE8( 0 ); - - MOVQRtoR(EEREC_D, EEREC_S); - x86SetJ8( j8Ptr[ 0 ] ); - - _freeMMXreg(t0reg); - return; - } - if( _hasFreeXMMreg() ) t0reg = _allocMMXreg(-1, MMX_TEMP, 0); diff --git a/pcsx2/x86/ix86-32/iR5900MultDiv.cpp b/pcsx2/x86/ix86-32/iR5900MultDiv.cpp index 7b2ff10c86..8579d1d5f7 100644 --- a/pcsx2/x86/ix86-32/iR5900MultDiv.cpp +++ b/pcsx2/x86/ix86-32/iR5900MultDiv.cpp @@ -310,7 +310,6 @@ void recMULT_const() void recMULTUsuper(int info, int upper, int process); void recMULTsuper(int info, int upper, int process) { - pxAssert( !(info&PROCESS_EE_MMX) ); if( _Rd_ ) EEINST_SETSIGNEXT(_Rd_); EEINST_SETSIGNEXT(_Rs_); EEINST_SETSIGNEXT(_Rt_); @@ -333,7 +332,7 @@ void recMULTsuper(int info, int upper, int process) //void recMULT_process(int info, int process) //{ -// if( EEINST_ISLIVE64(XMMGPR_HI) || !(info&PROCESS_EE_MMX) ) { +// if( EEINST_ISLIVE64(XMMGPR_HI) ) { // recMULTsuper(info, 0, process); // } // else { @@ -376,28 +375,19 @@ void recMULTsuper(int info, int upper, int process) void recMULT_(int info) { //recMULT_process(info, 0); - if( (g_pCurInstInfo->regs[XMMGPR_HI]&EEINST_LIVE2) || !(info&PROCESS_EE_MMX) ) { - recMULTsuper(info, 0, 0); - } - else recMULTUsuper(info, 0, 0); + recMULTsuper(info, 0, 0); } void recMULT_consts(int info) { //recMULT_process(info, PROCESS_CONSTS); - if( (g_pCurInstInfo->regs[XMMGPR_HI]&EEINST_LIVE2) || !(info&PROCESS_EE_MMX) ) { - recMULTsuper(info, 0, PROCESS_CONSTS); - } - else recMULTUsuper(info, 0, PROCESS_CONSTS); + recMULTsuper(info, 0, PROCESS_CONSTS); } void recMULT_constt(int info) { //recMULT_process(info, PROCESS_CONSTT); - if( (g_pCurInstInfo->regs[XMMGPR_HI]&EEINST_LIVE2) || !(info&PROCESS_EE_MMX) ) { - recMULTsuper(info, 0, PROCESS_CONSTT); - } - else recMULTUsuper(info, 0, PROCESS_CONSTT); + recMULTsuper(info, 0, PROCESS_CONSTT); } // don't set XMMINFO_WRITED|XMMINFO_WRITELO|XMMINFO_WRITEHI @@ -417,82 +407,17 @@ void recMULTUsuper(int info, int upper, int process) EEINST_SETSIGNEXT(_Rs_); EEINST_SETSIGNEXT(_Rt_); - if( (info & PROCESS_EE_MMX) ) { - - if( !_Rd_ ) { - // need some temp reg - int t0reg = _allocMMXreg(-1, MMX_TEMP, 0); - pxAssert( EEREC_D == 0 ); - info |= PROCESS_EE_SET_D(t0reg); - } - - if( process & PROCESS_CONSTS ) { - u32* ptempmem = _eeGetConstReg(_Rs_); - if( EEREC_D != EEREC_T ) MOVQRtoR(EEREC_D, EEREC_T); - PMULUDQMtoR(EEREC_D, (u32)ptempmem); - } - else if( process & PROCESS_CONSTT ) { - u32* ptempmem = _eeGetConstReg(_Rt_); - if( EEREC_D != EEREC_S ) MOVQRtoR(EEREC_D, EEREC_S); - PMULUDQMtoR(EEREC_D, (u32)ptempmem); - } - else { - if( EEREC_D == EEREC_S ) PMULUDQRtoR(EEREC_D, EEREC_T); - else if( EEREC_D == EEREC_T ) PMULUDQRtoR(EEREC_D, EEREC_S); - else { - MOVQRtoR(EEREC_D, EEREC_S); - PMULUDQRtoR(EEREC_D, EEREC_T); - } - } - - recWritebackHILOMMX(info, EEREC_D, 1, upper); - - if( !_Rd_ ) _freeMMXreg(EEREC_D); - return; - } - - if( info & PROCESS_EE_MMX ) { - if( info & PROCESS_EE_MODEWRITES ) { - MOVQRtoM((u32)&cpuRegs.GPR.r[_Rs_].UL[0], EEREC_S); - if( mmxregs[EEREC_S].reg == MMX_GPR+_Rs_ ) mmxregs[EEREC_S].mode &= ~MODE_WRITE; - } - if( info & PROCESS_EE_MODEWRITET ) { - MOVQRtoM((u32)&cpuRegs.GPR.r[_Rt_].UL[0], EEREC_T); - if( mmxregs[EEREC_T].reg == MMX_GPR+_Rt_ ) mmxregs[EEREC_T].mode &= ~MODE_WRITE; - } - _deleteMMXreg(MMX_GPR+_Rd_, 0); - } - if( process & PROCESS_CONSTS ) { MOV32ItoR( EAX, g_cpuConstRegs[_Rs_].UL[0] ); - - if( info & PROCESS_EE_MMX ) { - MOVD32MMXtoR(EDX, EEREC_T); - MUL32R(EDX); - } - else - MUL32M( (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + MUL32M( (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); } else if( process & PROCESS_CONSTT) { MOV32ItoR( EAX, g_cpuConstRegs[_Rt_].UL[0] ); - - if( info & PROCESS_EE_MMX ) { - MOVD32MMXtoR(EDX, EEREC_S); - MUL32R(EDX); - } - else - MUL32M( (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); + MUL32M( (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); } else { - if( info & PROCESS_EE_MMX ) { - MOVD32MMXtoR(EAX, EEREC_S); - MOVD32MMXtoR(EDX, EEREC_T); - MUL32R(EDX); - } - else { - MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - MUL32M( (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - } + MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); + MUL32M( (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); } recWritebackHILO(info, 1, upper); @@ -526,26 +451,17 @@ void recMULT1_const() void recMULT1_(int info) { - if( (g_pCurInstInfo->regs[XMMGPR_HI]&EEINST_LIVE2) || !(info&PROCESS_EE_MMX) ) { - recMULTsuper(info, 1, 0); - } - else recMULTUsuper(info, 1, 0); + recMULTsuper(info, 1, 0); } void recMULT1_consts(int info) { - if( (g_pCurInstInfo->regs[XMMGPR_HI]&EEINST_LIVE2) || !(info&PROCESS_EE_MMX) ) { - recMULTsuper(info, 1, PROCESS_CONSTS); - } - else recMULTUsuper(info, 1, PROCESS_CONSTS); + recMULTsuper(info, 1, PROCESS_CONSTS); } void recMULT1_constt(int info) { - if( (g_pCurInstInfo->regs[XMMGPR_HI]&EEINST_LIVE2) || !(info&PROCESS_EE_MMX) ) { - recMULTsuper(info, 1, PROCESS_CONSTT); - } - else recMULTUsuper(info, 1, PROCESS_CONSTT); + recMULTsuper(info, 1, PROCESS_CONSTT); } EERECOMPILE_CODE0(MULT1, XMMINFO_READS|XMMINFO_READT|(_Rd_?XMMINFO_WRITED:0) ); diff --git a/pcsx2/x86/ix86-32/iR5900Shift.cpp b/pcsx2/x86/ix86-32/iR5900Shift.cpp index 35a703de82..70008321bb 100644 --- a/pcsx2/x86/ix86-32/iR5900Shift.cpp +++ b/pcsx2/x86/ix86-32/iR5900Shift.cpp @@ -61,55 +61,22 @@ void recSLL_const() void recSLLs_(int info, int sa) { - int rtreg, rdreg, t0reg; pxAssert( !(info & PROCESS_EE_XMM) ); - if( info & PROCESS_EE_MMX ) { - rtreg = EEREC_T; - rdreg = EEREC_D; + MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + if ( sa != 0 ) + { + SHL32ItoR( EAX, sa ); + } + + if( EEINST_ISLIVE1(_Rd_) ) { + CDQ( ); + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); } else { - MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - if ( sa != 0 ) - { - SHL32ItoR( EAX, sa ); - } - - if( EEINST_ISLIVE1(_Rd_) ) { - CDQ( ); - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); - } - else { - EEINST_RESETHASLIVE1(_Rd_); - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - } - return; - } - - if( rtreg != rdreg ) MOVQRtoR(rdreg, rtreg); - - if( !EEINST_ISLIVE1(_Rd_) ) { EEINST_RESETHASLIVE1(_Rd_); - PSLLDItoR(rdreg, sa); - return; - } - - if ( sa != 0 ) { - t0reg = _allocMMXreg(-1, MMX_TEMP, 0); - - // it is a signed shift - PSLLDItoR(rdreg, sa); - MOVQRtoR(t0reg, rdreg); - PSRADItoR(t0reg, 31); - - // take lower dword of rdreg and lower dword of t0reg - PUNPCKLDQRtoR(rdreg, t0reg); - _freeMMXreg(t0reg); - } - else { - if( EEINST_ISLIVE1(_Rd_) ) _signExtendGPRtoMMX(rdreg, _Rd_, 0); - else EEINST_RESETHASLIVE1(_Rd_); + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); } } @@ -129,55 +96,19 @@ void recSRL_const() void recSRLs_(int info, int sa) { - int rtreg, rdreg; pxAssert( !(info & PROCESS_EE_XMM) ); - if( info & PROCESS_EE_MMX ) { - rtreg = EEREC_T; - rdreg = EEREC_D; + MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + if ( sa != 0 ) SHR32ItoR( EAX, sa); + + if( EEINST_ISLIVE1(_Rd_) ) { + CDQ( ); + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); } else { - MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - if ( sa != 0 ) SHR32ItoR( EAX, sa); - - if( EEINST_ISLIVE1(_Rd_) ) { - CDQ( ); - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); - } - else { - EEINST_RESETHASLIVE1(_Rd_); - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - } - return; - } - - if( rtreg != rdreg ) MOVQRtoR(rdreg, rtreg); - - if( !EEINST_ISLIVE1(_Rd_) ) { EEINST_RESETHASLIVE1(_Rd_); - PSRLDItoR(rdreg, sa); - return; - } - - if ( sa != 0 ) { - // rdreg already sign extended - PSLLQItoR(rdreg, 32); - PSRLQItoR(rdreg, 32+sa); -// t0reg = _allocMMXreg(-1, MMX_TEMP, 0); -// -// // it is a signed shift -// PSRLDItoR(rdreg, sa); -// MOVQRtoR(t0reg, rdreg); -// PSRADItoR(t0reg, 31); -// -// take lower dword of rdreg and lower dword of t0reg -// PUNPCKLDQRtoR(rdreg, t0reg); -// _freeMMXreg(t0reg); - } - else { - if( EEINST_ISLIVE1(_Rd_) ) _signExtendGPRtoMMX(rdreg, _Rd_, 0); - else EEINST_RESETHASLIVE1(_Rd_); + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); } } @@ -197,60 +128,19 @@ void recSRA_const() void recSRAs_(int info, int sa) { - int rtreg, rdreg, t0reg; pxAssert( !(info & PROCESS_EE_XMM) ); - if( info & PROCESS_EE_MMX ) { - rtreg = EEREC_T; - rdreg = EEREC_D; + MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + if ( sa != 0 ) SAR32ItoR( EAX, sa); + + if( EEINST_ISLIVE1(_Rd_) ) { + CDQ(); + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); } else { - MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - if ( sa != 0 ) SAR32ItoR( EAX, sa); - - if( EEINST_ISLIVE1(_Rd_) ) { - CDQ(); - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); - } - else { - EEINST_RESETHASLIVE1(_Rd_); - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - } - return; - } - - if( rtreg != rdreg ) MOVQRtoR(rdreg, rtreg); - - if( EEINST_ISSIGNEXT(_Rt_) && EEINST_HASLIVE1(_Rt_) ) { - PSRADItoR(rdreg, sa); - return; - } - - if( !EEINST_ISLIVE1(_Rd_) ) { EEINST_RESETHASLIVE1(_Rd_); - PSRADItoR(rdreg, sa); - return; - } - - if ( sa != 0 ) { - t0reg = _allocMMXreg(-1, MMX_TEMP, 0); - - // it is a signed shift - PSRADItoR(rdreg, sa); - MOVQRtoR(t0reg, rdreg); - PSRADItoR(rdreg, 31); - - // take lower dword of rdreg and lower dword of t0reg - PUNPCKLDQRtoR(t0reg, rdreg); - - // swap regs - mmxregs[t0reg] = mmxregs[rdreg]; - mmxregs[rdreg].inuse = 0; - } - else { - if( EEINST_ISLIVE1(_Rd_) ) _signExtendGPRtoMMX(rdreg, _Rd_, 0); - else EEINST_RESETHASLIVE1(_Rd_); + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); } } @@ -273,18 +163,12 @@ void recDSLLs_(int info, int sa) int rtreg, rdreg; pxAssert( !(info & PROCESS_EE_XMM) ); - if( info & PROCESS_EE_MMX ) { - rtreg = EEREC_T; - rdreg = EEREC_D; - } - else { - _addNeededMMXreg(MMX_GPR+_Rt_); - _addNeededMMXreg(MMX_GPR+_Rd_); - rtreg = _allocMMXreg(-1, MMX_GPR+_Rt_, MODE_READ); - rdreg = _allocMMXreg(-1, MMX_GPR+_Rd_, MODE_WRITE); - SetMMXstate(); - } - + _addNeededMMXreg(MMX_GPR+_Rt_); + _addNeededMMXreg(MMX_GPR+_Rd_); + rtreg = _allocMMXreg(-1, MMX_GPR+_Rt_, MODE_READ); + rdreg = _allocMMXreg(-1, MMX_GPR+_Rd_, MODE_WRITE); + SetMMXstate(); + if( rtreg != rdreg ) MOVQRtoR(rdreg, rtreg); PSLLQItoR(rdreg, sa); } @@ -307,18 +191,12 @@ void recDSRLs_(int info, int sa) int rtreg, rdreg; pxAssert( !(info & PROCESS_EE_XMM) ); - if( info & PROCESS_EE_MMX ) { - rtreg = EEREC_T; - rdreg = EEREC_D; - } - else { - _addNeededMMXreg(MMX_GPR+_Rt_); - _addNeededMMXreg(MMX_GPR+_Rd_); - rtreg = _allocMMXreg(-1, MMX_GPR+_Rt_, MODE_READ); - rdreg = _allocMMXreg(-1, MMX_GPR+_Rd_, MODE_WRITE); - SetMMXstate(); - } - + _addNeededMMXreg(MMX_GPR+_Rt_); + _addNeededMMXreg(MMX_GPR+_Rd_); + rtreg = _allocMMXreg(-1, MMX_GPR+_Rt_, MODE_READ); + rdreg = _allocMMXreg(-1, MMX_GPR+_Rd_, MODE_WRITE); + SetMMXstate(); + if( rtreg != rdreg ) MOVQRtoR(rdreg, rtreg); PSRLQItoR(rdreg, sa); } @@ -341,18 +219,12 @@ void recDSRAs_(int info, int sa) int rtreg, rdreg, t0reg; pxAssert( !(info & PROCESS_EE_XMM) ); - if( info & PROCESS_EE_MMX ) { - rtreg = EEREC_T; - rdreg = EEREC_D; - } - else { - _addNeededMMXreg(MMX_GPR+_Rt_); - _addNeededMMXreg(MMX_GPR+_Rd_); - rtreg = _allocMMXreg(-1, MMX_GPR+_Rt_, MODE_READ); - rdreg = _allocMMXreg(-1, MMX_GPR+_Rd_, MODE_WRITE); - SetMMXstate(); - } - + _addNeededMMXreg(MMX_GPR+_Rt_); + _addNeededMMXreg(MMX_GPR+_Rd_); + rtreg = _allocMMXreg(-1, MMX_GPR+_Rt_, MODE_READ); + rdreg = _allocMMXreg(-1, MMX_GPR+_Rd_, MODE_WRITE); + SetMMXstate(); + if( rtreg != rdreg ) MOVQRtoR(rdreg, rtreg); if( EEINST_ISSIGNEXT(_Rt_) && EEINST_HASLIVE1(_Rt_) ) { @@ -397,26 +269,16 @@ void recDSLL32_const() void recDSLL32s_(int info, int sa) { - int rtreg, rdreg; pxAssert( !(info & PROCESS_EE_XMM) ); - if( info & PROCESS_EE_MMX ) { - rtreg = EEREC_T; - rdreg = EEREC_D; + MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); + if ( sa != 0 ) + { + SHL32ItoR( EAX, sa ); } - else { - MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - if ( sa != 0 ) - { - SHL32ItoR( EAX, sa ); - } - MOV32ItoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], 0 ); - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EAX ); - return; - } - - if( rtreg != rdreg ) MOVQRtoR(rdreg, rtreg); - PSLLQItoR(rdreg, sa+32); + MOV32ItoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], 0 ); + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EAX ); + } void recDSLL32_(int info) @@ -434,25 +296,14 @@ void recDSRL32_const() void recDSRL32s_(int info, int sa) { - int rtreg, rdreg; pxAssert( !(info & PROCESS_EE_XMM) ); - if( info & PROCESS_EE_MMX ) { - rtreg = EEREC_T; - rdreg = EEREC_D; - } - else { - MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ); - if ( sa != 0 ) SHR32ItoR( EAX, sa ); - - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - if( EEINST_ISLIVE1(_Rd_) ) MOV32ItoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], 0 ); - else EEINST_RESETHASLIVE1(_Rd_); - return; - } + MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ); + if ( sa != 0 ) SHR32ItoR( EAX, sa ); - if( rtreg != rdreg ) MOVQRtoR(rdreg, rtreg); - PSRLQItoR(rdreg, sa+32); + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); + if( EEINST_ISLIVE1(_Rd_) ) MOV32ItoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], 0 ); + else EEINST_RESETHASLIVE1(_Rd_); } void recDSRL32_(int info) @@ -470,61 +321,16 @@ void recDSRA32_const() void recDSRA32s_(int info, int sa) { - int rtreg, rdreg, t0reg; pxAssert( !(info & PROCESS_EE_XMM) ); - if( info & PROCESS_EE_MMX ) { - rtreg = EEREC_T; - rdreg = EEREC_D; - } - else { - MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ); - CDQ( ); - if ( sa != 0 ) SAR32ItoR( EAX, sa ); + MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ] ); + CDQ( ); + if ( sa != 0 ) SAR32ItoR( EAX, sa ); + + MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); + if( EEINST_ISLIVE1(_Rd_) ) MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); + else EEINST_RESETHASLIVE1(_Rd_); - MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - if( EEINST_ISLIVE1(_Rd_) ) MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); - else EEINST_RESETHASLIVE1(_Rd_); - return; - } - - if( rtreg != rdreg ) MOVQRtoR(rdreg, rtreg); - - if( EEINST_ISSIGNEXT(_Rt_) && EEINST_HASLIVE1(_Rt_) ) { - PSRADItoR(rdreg, 31); - return; - } - - if( !EEINST_ISLIVE1(_Rd_) ) { - EEINST_RESETHASLIVE1(_Rd_); - if( sa ) PSRADItoR(rdreg, sa); - PUNPCKHDQRtoR(rdreg, rdreg); - return; - } - - t0reg = _allocMMXreg(-1, MMX_TEMP, 0); - MOVQRtoR(t0reg, rtreg); - - // it is a signed shift - if( sa ) { - PSRADItoR(rdreg, sa); - PSRADItoR(t0reg, 31); - - // take higher dword of rdreg and lower dword of t0reg - PUNPCKHDQRtoR(rdreg, t0reg); - _freeMMXreg(t0reg); - } - else { - // better timing - PSRADItoR(rdreg, 31); - - // take higher dword of rdreg and lower dword of t0reg - PUNPCKHDQRtoR(t0reg, rdreg); - - // swap - mmxregs[t0reg] = mmxregs[rdreg]; - mmxregs[rdreg].inuse = 0; - } } void recDSRA32_(int info) @@ -545,35 +351,7 @@ int recSetShiftV(int info, int* rsreg, int* rtreg, int* rdreg, int* rstemp, int { pxAssert( !(info & PROCESS_EE_XMM) ); - if( info & PROCESS_EE_MMX ) { - *rtreg = EEREC_T; - *rdreg = EEREC_D; - *rsreg = EEREC_S; - - // make sure to take only low 5 bits of *rsreg - if( !(g_pCurInstInfo->regs[_Rs_]&EEINST_LASTUSE) && EEINST_ISLIVE64(_Rs_)) { - *rstemp = _allocMMXreg(-1, MMX_TEMP, 0); - MOVQRtoR(*rstemp, *rsreg); - *rsreg = *rstemp; - } - else { - if( *rsreg != *rdreg ) { - _freeMMXreg(*rsreg); - mmxregs[*rsreg].inuse = 0; - } - } - - PANDMtoR(*rsreg, (u32)&s_sa[shift64?2:0]); - - if( EEREC_D == EEREC_S ) { - // need to be separate - int mmreg = _allocMMXreg(-1, MMX_TEMP, 0); - *rdreg = mmreg; - mmxregs[mmreg] = mmxregs[EEREC_S]; - mmxregs[EEREC_S].inuse = 0; - } - } - else if( forcemmx ) { + if( forcemmx ) { _addNeededMMXreg(MMX_GPR+_Rt_); _addNeededMMXreg(MMX_GPR+_Rd_); *rtreg = _allocMMXreg(-1, MMX_GPR+_Rt_, MODE_READ); @@ -596,45 +374,15 @@ int recSetShiftV(int info, int* rsreg, int* rtreg, int* rdreg, int* rstemp, int void recSetConstShiftV(int info, int* rsreg, int* rdreg, int* rstemp, int shift64) { - if( info & PROCESS_EE_MMX ) { - *rdreg = EEREC_D; - *rsreg = EEREC_S; + _addNeededMMXreg(MMX_GPR+_Rd_); + *rdreg = _allocMMXreg(-1, MMX_GPR+_Rd_, MODE_WRITE); + SetMMXstate(); - // make sure to take only low 5 bits of *rsreg - if( !(g_pCurInstInfo->regs[_Rs_]&EEINST_LASTUSE) && EEINST_ISLIVE64(_Rs_) ) { - *rstemp = _allocMMXreg(-1, MMX_TEMP, 0); - MOVQRtoR(*rstemp, *rsreg); - *rsreg = *rstemp; - } - else { - if( *rsreg != *rdreg ) { - _freeMMXreg(*rsreg); - mmxregs[*rsreg].inuse = 0; - } - } - - PANDMtoR(*rsreg, (u32)&s_sa[shift64?2:0]); - - - if( EEREC_D == EEREC_S ) { - // need to be separate - int mmreg = _allocMMXreg(-1, MMX_TEMP, 0); - *rdreg = mmreg; - mmxregs[mmreg] = mmxregs[EEREC_S]; - mmxregs[EEREC_S].inuse = 0; - } - } - else { - _addNeededMMXreg(MMX_GPR+_Rd_); - *rdreg = _allocMMXreg(-1, MMX_GPR+_Rd_, MODE_WRITE); - SetMMXstate(); - - *rstemp = _allocMMXreg(-1, MMX_TEMP, 0); - MOV32MtoR(EAX, (u32)&cpuRegs.GPR.r[_Rs_].UL[0]); - AND32ItoR(EAX, shift64?0x3f:0x1f); - MOVD32RtoMMX(*rstemp, EAX); - *rsreg = *rstemp; - } + *rstemp = _allocMMXreg(-1, MMX_TEMP, 0); + MOV32MtoR(EAX, (u32)&cpuRegs.GPR.r[_Rs_].UL[0]); + AND32ItoR(EAX, shift64?0x3f:0x1f); + MOVD32RtoMMX(*rstemp, EAX); + *rsreg = *rstemp; _flushConstReg(_Rt_); } @@ -650,10 +398,6 @@ void recMoveSignToRd(int info) EEINST_RESETHASLIVE1(_Rd_); MOV32RtoM( (int)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); } - - if( info & PROCESS_EE_MMX ) { - mmxregs[EEREC_D].inuse = 0; - } } //// SLLV @@ -670,8 +414,7 @@ void recSLLV_consts(int info) void recSLLV_constt(int info) { - if( (info & PROCESS_EE_MMX) && (info & PROCESS_EE_MODEWRITES) ) MOVD32MMXtoR(ECX, EEREC_S); - else MOV32MtoR( ECX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); + MOV32MtoR( ECX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); MOV32ItoR( EAX, g_cpuConstRegs[_Rt_].UL[0] ); AND32ItoR( ECX, 0x1f ); @@ -736,8 +479,7 @@ void recSRLV_consts(int info) void recSRLV_constt(int info) { - if( (info & PROCESS_EE_MMX) && (info&PROCESS_EE_MODEWRITES) ) MOVD32MMXtoR(ECX, EEREC_S); - else MOV32MtoR( ECX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); + MOV32MtoR( ECX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); MOV32ItoR( EAX, g_cpuConstRegs[_Rt_].UL[0] ); AND32ItoR( ECX, 0x1f ); @@ -802,8 +544,7 @@ void recSRAV_consts(int info) void recSRAV_constt(int info) { - if( (info & PROCESS_EE_MMX) && (info&PROCESS_EE_MODEWRITES) ) MOVD32MMXtoR(ECX, EEREC_S); - else MOV32MtoR( ECX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); + MOV32MtoR( ECX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); MOV32ItoR( EAX, g_cpuConstRegs[_Rt_].UL[0] ); AND32ItoR( ECX, 0x1f );