From b09295fc7c0eb08e3ea78e287a140f68ae070a28 Mon Sep 17 00:00:00 2001 From: Gregory Hainaut Date: Fri, 27 Nov 2015 09:08:34 +0100 Subject: [PATCH] core: use xRegister32 for _allocX86reg --- pcsx2/x86/iCore.cpp | 2 +- pcsx2/x86/iCore.h | 2 +- pcsx2/x86/iFPU.cpp | 16 ++++++------ pcsx2/x86/iFPUd.cpp | 10 ++++---- pcsx2/x86/iR3000A.cpp | 2 +- pcsx2/x86/iR3000Atables.cpp | 2 +- pcsx2/x86/ix86-32/iCore-32.cpp | 38 ++++++++++++++------------- pcsx2/x86/ix86-32/iR5900-32.cpp | 2 +- pcsx2/x86/ix86-32/iR5900Jump.cpp | 2 +- pcsx2/x86/sVU_Micro.h | 4 +-- pcsx2/x86/sVU_zerorec.cpp | 44 ++++++++++++++++---------------- 11 files changed, 63 insertions(+), 61 deletions(-) diff --git a/pcsx2/x86/iCore.cpp b/pcsx2/x86/iCore.cpp index 99336a2b59..d4f5414019 100644 --- a/pcsx2/x86/iCore.cpp +++ b/pcsx2/x86/iCore.cpp @@ -1021,7 +1021,7 @@ int _allocCheckFPUtoXMM(EEINST* pinst, int fpureg, int mode) int _allocCheckGPRtoX86(EEINST* pinst, int gprreg, int mode) { if( pinst->regs[gprreg] & EEINST_USED ) - return _allocX86reg(-1, X86TYPE_GPR, gprreg, mode); + return _allocX86reg(xEmptyReg, X86TYPE_GPR, gprreg, mode); return _checkX86reg(X86TYPE_GPR, gprreg, mode); } diff --git a/pcsx2/x86/iCore.h b/pcsx2/x86/iCore.h index 8a9701c98d..12b663ae86 100644 --- a/pcsx2/x86/iCore.h +++ b/pcsx2/x86/iCore.h @@ -121,7 +121,7 @@ extern _x86regs x86regs[iREGCNT_GPR], s_saveX86regs[iREGCNT_GPR]; uptr _x86GetAddr(int type, int reg); void _initX86regs(); int _getFreeX86reg(int mode); -int _allocX86reg(int x86reg, int type, int reg, int mode); +int _allocX86reg(x86Emitter::xRegister32 x86reg, int type, int reg, int mode); void _deleteX86reg(int type, int reg, int flush); int _checkX86reg(int type, int reg, int mode); void _addNeededX86reg(int type, int reg); diff --git a/pcsx2/x86/iFPU.cpp b/pcsx2/x86/iFPU.cpp index 7c1813c9ac..9208aaecb5 100644 --- a/pcsx2/x86/iFPU.cpp +++ b/pcsx2/x86/iFPU.cpp @@ -433,8 +433,8 @@ FPURECOMPILE_CONSTCODE(ABS_S, XMMINFO_WRITED|XMMINFO_READS); //------------------------------------------------------------------ void FPU_ADD_SUB(int regd, int regt, int issub) { - int tempecx = _allocX86reg(ECX, X86TYPE_TEMP, 0, 0); //receives regd - int temp2 = _allocX86reg(-1, X86TYPE_TEMP, 0, 0); //receives regt + int tempecx = _allocX86reg(ecx, X86TYPE_TEMP, 0, 0); //receives regd + int temp2 = _allocX86reg(xEmptyReg, X86TYPE_TEMP, 0, 0); //receives regt int xmmtemp = _allocTempXMMreg(XMMT_FPS, -1); //temporary for anding with regd/regt xMOVD(xRegister32(tempecx), xRegisterSSE(regd)); @@ -737,7 +737,7 @@ void recC_EQ_xmm(int info) break; default: Console.WriteLn(Color_Magenta, "recC_EQ_xmm: Default"); - tempReg = _allocX86reg(-1, X86TYPE_TEMP, 0, 0); + tempReg = _allocX86reg(xEmptyReg, X86TYPE_TEMP, 0, 0); xMOV(xRegister32(tempReg), ptr[&fpuRegs.fpr[_Fs_]]); xCMP(xRegister32(tempReg), ptr[&fpuRegs.fpr[_Ft_]]); @@ -816,7 +816,7 @@ void recC_LE_xmm(int info ) break; default: // Untested and incorrect, but this case is never reached AFAIK (cottonvibes) Console.WriteLn(Color_Magenta, "recC_LE_xmm: Default"); - tempReg = _allocX86reg(-1, X86TYPE_TEMP, 0, 0); + tempReg = _allocX86reg(xEmptyReg, X86TYPE_TEMP, 0, 0); xMOV(xRegister32(tempReg), ptr[&fpuRegs.fpr[_Fs_]]); xCMP(xRegister32(tempReg), ptr[&fpuRegs.fpr[_Ft_]]); @@ -891,7 +891,7 @@ void recC_LT_xmm(int info) break; default: Console.WriteLn(Color_Magenta, "recC_LT_xmm: Default"); - tempReg = _allocX86reg(-1, X86TYPE_TEMP, 0, 0); + tempReg = _allocX86reg(xEmptyReg, X86TYPE_TEMP, 0, 0); xMOV(xRegister32(tempReg), ptr[&fpuRegs.fpr[_Fs_]]); xCMP(xRegister32(tempReg), ptr[&fpuRegs.fpr[_Ft_]]); @@ -980,7 +980,7 @@ void recDIVhelper1(int regd, int regt) // Sets flags u8 *pjmp1, *pjmp2; u32 *ajmp32, *bjmp32; int t1reg = _allocTempXMMreg(XMMT_FPS, -1); - int tempReg = _allocX86reg(-1, X86TYPE_TEMP, 0, 0); + int tempReg = _allocX86reg(xEmptyReg, X86TYPE_TEMP, 0, 0); xAND(ptr32[&fpuRegs.fprc[31]], ~(FPUflagI|FPUflagD)); // Clear I and D flags @@ -1624,7 +1624,7 @@ void recSQRT_S_xmm(int info) else xMOVSSZX(xRegisterSSE(EEREC_D), ptr[&fpuRegs.fpr[_Ft_]]); if (CHECK_FPU_EXTRA_FLAGS) { - int tempReg = _allocX86reg(-1, X86TYPE_TEMP, 0, 0); + int tempReg = _allocX86reg(xEmptyReg, X86TYPE_TEMP, 0, 0); xAND(ptr32[&fpuRegs.fprc[31]], ~(FPUflagI|FPUflagD)); // Clear I and D flags @@ -1660,7 +1660,7 @@ void recRSQRThelper1(int regd, int t0reg) // Preforms the RSQRT function when re u32 *pjmp32; u8 *qjmp1, *qjmp2; int t1reg = _allocTempXMMreg(XMMT_FPS, -1); - int tempReg = _allocX86reg(-1, X86TYPE_TEMP, 0, 0); + int tempReg = _allocX86reg(xEmptyReg, X86TYPE_TEMP, 0, 0); xAND(ptr32[&fpuRegs.fprc[31]], ~(FPUflagI|FPUflagD)); // Clear I and D flags diff --git a/pcsx2/x86/iFPUd.cpp b/pcsx2/x86/iFPUd.cpp index ccc834bfd0..fd60ade533 100644 --- a/pcsx2/x86/iFPUd.cpp +++ b/pcsx2/x86/iFPUd.cpp @@ -344,8 +344,8 @@ FPURECOMPILE_CONSTCODE(ABS_S, XMMINFO_WRITED|XMMINFO_READS); //------------------------------------------------------------------ void FPU_ADD_SUB(int tempd, int tempt) //tempd and tempt are overwritten, they are floats { - int tempecx = _allocX86reg(ECX, X86TYPE_TEMP, 0, 0); //receives regd - int temp2 = _allocX86reg(-1, X86TYPE_TEMP, 0, 0); //receives regt + int tempecx = _allocX86reg(ecx, X86TYPE_TEMP, 0, 0); //receives regd + int temp2 = _allocX86reg(xEmptyReg, X86TYPE_TEMP, 0, 0); //receives regt int xmmtemp = _allocTempXMMreg(XMMT_FPS, -1); //temporary for anding with regd/regt xMOVD(xRegister32(tempecx), xRegisterSSE(tempd)); @@ -589,7 +589,7 @@ void recDIVhelper1(int regd, int regt) // Sets flags u8 *pjmp1, *pjmp2; u32 *ajmp32, *bjmp32; int t1reg = _allocTempXMMreg(XMMT_FPS, -1); - int tempReg = _allocX86reg(-1, X86TYPE_TEMP, 0, 0); + int tempReg = _allocX86reg(xEmptyReg, X86TYPE_TEMP, 0, 0); xAND(ptr32[&fpuRegs.fprc[31]], ~(FPUflagI|FPUflagD)); // Clear I and D flags @@ -924,7 +924,7 @@ void recSQRT_S_xmm(int info) { u8 *pjmp; int roundmodeFlag = 0; - int tempReg = _allocX86reg(-1, X86TYPE_TEMP, 0, 0); + int tempReg = _allocX86reg(xEmptyReg, X86TYPE_TEMP, 0, 0); int t1reg = _allocTempXMMreg(XMMT_FPS, -1); //Console.WriteLn("FPU: SQRT"); @@ -984,7 +984,7 @@ void recRSQRThelper1(int regd, int regt) // Preforms the RSQRT function when reg u8 *qjmp1, *qjmp2; u32 *pjmp32; int t1reg = _allocTempXMMreg(XMMT_FPS, -1); - int tempReg = _allocX86reg(-1, X86TYPE_TEMP, 0, 0); + int tempReg = _allocX86reg(xEmptyReg, X86TYPE_TEMP, 0, 0); xAND(ptr32[&fpuRegs.fprc[31]], ~(FPUflagI|FPUflagD)); // Clear I and D flags diff --git a/pcsx2/x86/iR3000A.cpp b/pcsx2/x86/iR3000A.cpp index 2533738ade..e55ce1327a 100644 --- a/pcsx2/x86/iR3000A.cpp +++ b/pcsx2/x86/iR3000A.cpp @@ -979,7 +979,7 @@ void psxSetBranchReg(u32 reg) psxbranch = 1; if( reg != 0xffffffff ) { - _allocX86reg(ESI, X86TYPE_PCWRITEBACK, 0, MODE_WRITE); + _allocX86reg(esi, X86TYPE_PCWRITEBACK, 0, MODE_WRITE); _psxMoveGPRtoR(esi, reg); psxRecompileNextInstruction(1); diff --git a/pcsx2/x86/iR3000Atables.cpp b/pcsx2/x86/iR3000Atables.cpp index b5a1d14e3e..f4e8f5ec47 100644 --- a/pcsx2/x86/iR3000Atables.cpp +++ b/pcsx2/x86/iR3000Atables.cpp @@ -948,7 +948,7 @@ void rpsxJR() void rpsxJALR() { // jalr Rs - _allocX86reg(ESI, X86TYPE_PCWRITEBACK, 0, MODE_WRITE); + _allocX86reg(esi, X86TYPE_PCWRITEBACK, 0, MODE_WRITE); _psxMoveGPRtoR(esi, _Rs_); if ( _Rd_ ) diff --git a/pcsx2/x86/ix86-32/iCore-32.cpp b/pcsx2/x86/ix86-32/iCore-32.cpp index 2d39868e75..d41c57aab0 100644 --- a/pcsx2/x86/ix86-32/iCore-32.cpp +++ b/pcsx2/x86/ix86-32/iCore-32.cpp @@ -243,11 +243,11 @@ void _flushConstRegs() } } -int _allocX86reg(int x86reg, int type, int reg, int mode) +int _allocX86reg(xRegister32 x86reg, int type, int reg, int mode) { uint i; pxAssertDev( reg >= 0 && reg < 32, "Register index out of bounds." ); - pxAssertDev( x86reg != esp.GetId() && x86reg != ebp.GetId(), "Allocation of ESP/EBP is not allowed!" ); + pxAssertDev( x86reg != esp && x86reg != ebp, "Allocation of ESP/EBP is not allowed!" ); // don't alloc EAX and ESP,EBP if MODE_NOFRAME int oldmode = mode; @@ -287,9 +287,9 @@ int _allocX86reg(int x86reg, int type, int reg, int mode) break; } - if( x86reg >= 0 ) { + if( !x86reg.IsEmpty() ) { // requested specific reg, so return that instead - if( i != (uint)x86reg ) { + if( i != (uint)x86reg.GetId() ) { if( x86regs[i].mode & MODE_READ ) readfromreg = i; mode |= x86regs[i].mode&MODE_WRITE; x86regs[i].inuse = 0; @@ -315,32 +315,32 @@ int _allocX86reg(int x86reg, int type, int reg, int mode) } } - if (x86reg == -1) - x86reg = _getFreeX86reg(oldmode); + if (x86reg.IsEmpty()) + x86reg = xRegister32(_getFreeX86reg(oldmode)); else _freeX86reg(x86reg); - x86regs[x86reg].type = type; - x86regs[x86reg].reg = reg; - x86regs[x86reg].mode = mode; - x86regs[x86reg].needed = 1; - x86regs[x86reg].inuse = 1; + x86regs[x86reg.GetId()].type = type; + x86regs[x86reg.GetId()].reg = reg; + x86regs[x86reg.GetId()].mode = mode; + x86regs[x86reg.GetId()].needed = 1; + x86regs[x86reg.GetId()].inuse = 1; if( mode & MODE_READ ) { if( readfromreg >= 0 ) - xMOV(xRegister32(x86reg), xRegister32(readfromreg)); + xMOV(x86reg, xRegister32(readfromreg)); else { if( type == X86TYPE_GPR ) { if( reg == 0 ) { - xXOR(xRegister32(x86reg), xRegister32(x86reg)); + xXOR(x86reg, x86reg); } else { _flushConstReg(reg); _deleteMMXreg(MMX_GPR+reg, 1); _deleteGPRtoXMMreg(reg, 1); - _eeMoveGPRtoR(xRegister32(x86reg), reg); + _eeMoveGPRtoR(x86reg, reg); _deleteMMXreg(MMX_GPR+reg, 0); _deleteGPRtoXMMreg(reg, 0); @@ -349,16 +349,18 @@ int _allocX86reg(int x86reg, int type, int reg, int mode) else { if( X86_ISVI(type) && reg < 16 ) { if( reg == 0 ) - xXOR(xRegister32(x86reg), xRegister32(x86reg)); + xXOR(x86reg, x86reg); else - xMOVZX(xRegister32(x86reg), ptr16[(u16*)(_x86GetAddr(type, reg))]); + xMOVZX(x86reg, ptr16[(u16*)(_x86GetAddr(type, reg))]); } - else xMOV(xRegister32(x86reg), ptr[(void*)(_x86GetAddr(type, reg))]); + else xMOV(x86reg, ptr[(void*)(_x86GetAddr(type, reg))]); } } } - return x86reg; + // Need to port all the code + // return x86reg; + return x86reg.GetId(); } int _checkX86reg(int type, int reg, int mode) diff --git a/pcsx2/x86/ix86-32/iR5900-32.cpp b/pcsx2/x86/ix86-32/iR5900-32.cpp index 121c6dc2a5..067b91f69c 100644 --- a/pcsx2/x86/ix86-32/iR5900-32.cpp +++ b/pcsx2/x86/ix86-32/iR5900-32.cpp @@ -963,7 +963,7 @@ void SetBranchReg( u32 reg ) // xMOV(ptr[&cpuRegs.pc], eax); // } // } - _allocX86reg(ESI, X86TYPE_PCWRITEBACK, 0, MODE_WRITE); + _allocX86reg(esi, X86TYPE_PCWRITEBACK, 0, MODE_WRITE); _eeMoveGPRtoR(esi, reg); if (EmuConfig.Gamefixes.GoemonTlbHack) { diff --git a/pcsx2/x86/ix86-32/iR5900Jump.cpp b/pcsx2/x86/ix86-32/iR5900Jump.cpp index 12dccbf160..1a4cc96976 100644 --- a/pcsx2/x86/ix86-32/iR5900Jump.cpp +++ b/pcsx2/x86/ix86-32/iR5900Jump.cpp @@ -95,7 +95,7 @@ void recJR() void recJALR() { int newpc = pc + 4; - _allocX86reg(ESI, X86TYPE_PCWRITEBACK, 0, MODE_WRITE); + _allocX86reg(esi, X86TYPE_PCWRITEBACK, 0, MODE_WRITE); _eeMoveGPRtoR(esi, _Rs_); if (EmuConfig.Gamefixes.GoemonTlbHack) { diff --git a/pcsx2/x86/sVU_Micro.h b/pcsx2/x86/sVU_Micro.h index 2a528f0980..633f3e4562 100644 --- a/pcsx2/x86/sVU_Micro.h +++ b/pcsx2/x86/sVU_Micro.h @@ -83,8 +83,8 @@ void VU_MERGE_REGS_SAFE(int dest, int src, int xyzw); } // use for allocating vi regs -#define ALLOCTEMPX86(mode) _allocX86reg(-1, X86TYPE_TEMP, 0, ((info&PROCESS_VU_SUPER)?0:MODE_NOFRAME)|mode) -#define ALLOCVI(vi, mode) _allocX86reg(-1, X86TYPE_VI|((VU==&VU1)?X86TYPE_VU1:0), vi, ((info&PROCESS_VU_SUPER)?0:MODE_NOFRAME)|mode) +#define ALLOCTEMPX86(mode) _allocX86reg(xEmptyReg, X86TYPE_TEMP, 0, ((info&PROCESS_VU_SUPER)?0:MODE_NOFRAME)|mode) +#define ALLOCVI(vi, mode) _allocX86reg(xEmptyReg, X86TYPE_VI|((VU==&VU1)?X86TYPE_VU1:0), vi, ((info&PROCESS_VU_SUPER)?0:MODE_NOFRAME)|mode) #define ADD_VI_NEEDED(vi) _addNeededX86reg(X86TYPE_VI|(VU==&VU1?X86TYPE_VU1:0), vi); #define SWAP(x, y) *(u32*)&y ^= *(u32*)&x ^= *(u32*)&y ^= *(u32*)&x; diff --git a/pcsx2/x86/sVU_zerorec.cpp b/pcsx2/x86/sVU_zerorec.cpp index c4b5e7c224..3f857990f0 100644 --- a/pcsx2/x86/sVU_zerorec.cpp +++ b/pcsx2/x86/sVU_zerorec.cpp @@ -2928,7 +2928,7 @@ void VuBaseBlock::Recompile() if (!x86regs[s_JumpX86].inuse) { // load - s_JumpX86 = _allocX86reg(-1, X86TYPE_VUJUMP, 0, MODE_READ); + s_JumpX86 = _allocX86reg(xEmptyReg, X86TYPE_VUJUMP, 0, MODE_READ); } x86regs[s_JumpX86].needed = 1; } @@ -3670,7 +3670,7 @@ void VuInstruction::Recompile(std::list::iterator& itinst, u32 vu int x86temp = -1; if (cacheq) - x86temp = _allocX86reg(-1, X86TYPE_TEMP, 0, 0); + x86temp = _allocX86reg(xEmptyReg, X86TYPE_TEMP, 0, 0); // new is written so flush old // if type & INST_Q_READ, already flushed @@ -3721,7 +3721,7 @@ void VuInstruction::Recompile(std::list::iterator& itinst, u32 vu if (regs[0].VIwrite & (1 << REG_P)) { - int x86temp = _allocX86reg(-1, X86TYPE_TEMP, 0, 0); + int x86temp = _allocX86reg(xEmptyReg, X86TYPE_TEMP, 0, 0); // new is written so flush old if (!(type & INST_P_READ) && s_recWriteP == 0) @@ -3847,7 +3847,7 @@ void VuInstruction::Recompile(std::list::iterator& itinst, u32 vu if (type & INST_CACHE_VI) { pxAssert(vicached >= 0); - int cachedreg = _allocX86reg(-1, X86TYPE_VI | (s_vu ? X86TYPE_VU1 : 0), vicached, MODE_READ); + int cachedreg = _allocX86reg(xEmptyReg, X86TYPE_VI | (s_vu ? X86TYPE_VU1 : 0), vicached, MODE_READ); xMOV(ptr[&s_VIBranchDelay], xRegister32(cachedreg)); } #endif @@ -3866,15 +3866,15 @@ void VuInstruction::Recompile(std::list::iterator& itinst, u32 vu // break; // } // -// oldreg = _allocX86reg(-1, X86TYPE_VI|(s_vu?X86TYPE_VU1:0), s_CacheVIReg, MODE_READ); -// s_CacheVIX86 = _allocX86reg(-1, X86TYPE_VITEMP, s_CacheVIReg, MODE_WRITE); +// oldreg = _allocX86reg(xEmptyReg, X86TYPE_VI|(s_vu?X86TYPE_VU1:0), s_CacheVIReg, MODE_READ); +// s_CacheVIX86 = _allocX86reg(xEmptyReg, X86TYPE_VITEMP, s_CacheVIReg, MODE_WRITE); // xMOV(xRegister32(s_CacheVIX86), xRegister32(oldreg)); // } // } // else if( pc == s_pCurBlock->endpc-8 && s_CacheVIReg >= 0 ) { // pxAssert( s_CacheVIX86 > 0 && x86regs[s_CacheVIX86].inuse && x86regs[s_CacheVIX86].reg == s_CacheVIReg && x86regs[s_CacheVIX86].type == X86TYPE_VITEMP ); // -// oldreg = _allocX86reg(-1, X86TYPE_VI|(s_vu?X86TYPE_VU1:0), s_CacheVIReg, MODE_READ); +// oldreg = _allocX86reg(xEmptyReg, X86TYPE_VI|(s_vu?X86TYPE_VU1:0), s_CacheVIReg, MODE_READ); // x86regs[s_CacheVIX86].needed = 1; // pxAssert( x86regs[oldreg].mode & MODE_WRITE ); // @@ -3978,7 +3978,7 @@ void recVUMI_IBQ_prep() itreg = _checkX86reg(X86TYPE_VI | (VU == &VU1 ? X86TYPE_VU1 : 0), _It_, MODE_READ); } - s_JumpX86 = _allocX86reg(-1, X86TYPE_VUJUMP, 0, MODE_WRITE); + s_JumpX86 = _allocX86reg(xEmptyReg, X86TYPE_VUJUMP, 0, MODE_WRITE); if (itreg >= 0) { @@ -3999,7 +3999,7 @@ void recVUMI_IBQ_prep() isreg = _checkX86reg(X86TYPE_VI | (VU == &VU1 ? X86TYPE_VU1 : 0), _Is_, MODE_READ); } - s_JumpX86 = _allocX86reg(-1, X86TYPE_VUJUMP, 0, MODE_WRITE); + s_JumpX86 = _allocX86reg(xEmptyReg, X86TYPE_VUJUMP, 0, MODE_WRITE); if (isreg >= 0) { @@ -4033,11 +4033,11 @@ void recVUMI_IBQ_prep() // allocate fsreg if (s_pCurInst->vicached >= 0 && s_pCurInst->vicached == (s8)_Is_) { - isreg = _allocX86reg(-1, X86TYPE_TEMP, 0, MODE_READ | MODE_WRITE); + isreg = _allocX86reg(xEmptyReg, X86TYPE_TEMP, 0, MODE_READ | MODE_WRITE); xMOV(xRegister32(isreg), ptr[(void*)(SuperVUGetVIAddr(_Is_, 1))]); } else - isreg = _allocX86reg(-1, X86TYPE_VI | (VU == &VU1 ? X86TYPE_VU1 : 0), _Is_, MODE_READ); + isreg = _allocX86reg(xEmptyReg, X86TYPE_VI | (VU == &VU1 ? X86TYPE_VU1 : 0), _Is_, MODE_READ); } } else @@ -4046,7 +4046,7 @@ void recVUMI_IBQ_prep() itreg = _checkX86reg(X86TYPE_VI | (VU == &VU1 ? X86TYPE_VU1 : 0), _It_, MODE_READ); } - s_JumpX86 = _allocX86reg(-1, X86TYPE_VUJUMP, 0, MODE_WRITE); + s_JumpX86 = _allocX86reg(xEmptyReg, X86TYPE_VUJUMP, 0, MODE_WRITE); if (isreg >= 0) { @@ -4062,7 +4062,7 @@ void recVUMI_IBQ_prep() } else { - isreg = _allocX86reg(-1, X86TYPE_VI | (VU == &VU1 ? X86TYPE_VU1 : 0), _Is_, MODE_READ); + isreg = _allocX86reg(xEmptyReg, X86TYPE_VI | (VU == &VU1 ? X86TYPE_VU1 : 0), _Is_, MODE_READ); xCMP(xRegister16(isreg), ptr[(void*)(SuperVUGetVIAddr(_It_, 1))]); } } @@ -4078,7 +4078,7 @@ void recVUMI_IBEQ(VURegs* vuu, s32 info) void recVUMI_IBGEZ(VURegs* vuu, s32 info) { int isreg; - s_JumpX86 = _allocX86reg(-1, X86TYPE_VUJUMP, 0, MODE_WRITE); + s_JumpX86 = _allocX86reg(xEmptyReg, X86TYPE_VUJUMP, 0, MODE_WRITE); #ifdef SUPERVU_VIBRANCHDELAY if (s_pCurInst->vicached >= 0 && s_pCurInst->vicached == (s8)_Is_) @@ -4108,7 +4108,7 @@ void recVUMI_IBGEZ(VURegs* vuu, s32 info) void recVUMI_IBGTZ(VURegs* vuu, s32 info) { int isreg; - s_JumpX86 = _allocX86reg(-1, X86TYPE_VUJUMP, 0, MODE_WRITE); + s_JumpX86 = _allocX86reg(xEmptyReg, X86TYPE_VUJUMP, 0, MODE_WRITE); #ifdef SUPERVU_VIBRANCHDELAY if (s_pCurInst->vicached >= 0 && s_pCurInst->vicached == (s8)_Is_) @@ -4137,7 +4137,7 @@ void recVUMI_IBGTZ(VURegs* vuu, s32 info) void recVUMI_IBLEZ(VURegs* vuu, s32 info) { int isreg; - s_JumpX86 = _allocX86reg(-1, X86TYPE_VUJUMP, 0, MODE_WRITE); + s_JumpX86 = _allocX86reg(xEmptyReg, X86TYPE_VUJUMP, 0, MODE_WRITE); #ifdef SUPERVU_VIBRANCHDELAY if (s_pCurInst->vicached >= 0 && s_pCurInst->vicached == (s8)_Is_) @@ -4166,7 +4166,7 @@ void recVUMI_IBLEZ(VURegs* vuu, s32 info) void recVUMI_IBLTZ(VURegs* vuu, s32 info) { int isreg; - s_JumpX86 = _allocX86reg(-1, X86TYPE_VUJUMP, 0, MODE_WRITE); + s_JumpX86 = _allocX86reg(xEmptyReg, X86TYPE_VUJUMP, 0, MODE_WRITE); #ifdef SUPERVU_VIBRANCHDELAY if (s_pCurInst->vicached >= 0 && s_pCurInst->vicached == (s8)_Is_) @@ -4214,7 +4214,7 @@ void recVUMI_B(VURegs* vuu, s32 info) if (s_pCurBlock->blocks.size() > 1) { - s_JumpX86 = _allocX86reg(-1, X86TYPE_VUJUMP, 0, MODE_WRITE); + s_JumpX86 = _allocX86reg(xEmptyReg, X86TYPE_VUJUMP, 0, MODE_WRITE); xMOV(xRegister32(s_JumpX86), 1); s_pCurBlock->pChildJumps[(s_pCurInst->type & INST_BRANCH_DELAY)?1:0] = (u32*)x86Ptr - 1; s_UnconditionalDelay = 1; @@ -4243,7 +4243,7 @@ void recVUMI_BAL(VURegs* vuu, s32 info) if (s_pCurBlock->blocks.size() > 1) { - s_JumpX86 = _allocX86reg(-1, X86TYPE_VUJUMP, 0, MODE_WRITE); + s_JumpX86 = _allocX86reg(xEmptyReg, X86TYPE_VUJUMP, 0, MODE_WRITE); xMOV(xRegister32(s_JumpX86), 1); s_pCurBlock->pChildJumps[(s_pCurInst->type & INST_BRANCH_DELAY)?1:0] = (u32*)x86Ptr - 1; s_UnconditionalDelay = 1; @@ -4254,7 +4254,7 @@ void recVUMI_BAL(VURegs* vuu, s32 info) void recVUMI_JR(VURegs* vuu, s32 info) { - int isreg = _allocX86reg(-1, X86TYPE_VI | (s_vu ? X86TYPE_VU1 : 0), _Is_, MODE_READ); + int isreg = _allocX86reg(xEmptyReg, X86TYPE_VI | (s_vu ? X86TYPE_VU1 : 0), _Is_, MODE_READ); xLEA(eax, ptr[xAddressReg(isreg) * (1<<3)]); //Mask the address to something valid @@ -4277,7 +4277,7 @@ void recVUMI_JALR(VURegs* vuu, s32 info) { _addNeededX86reg(X86TYPE_VI | (s_vu ? X86TYPE_VU1 : 0), _It_); - int isreg = _allocX86reg(-1, X86TYPE_VI | (s_vu ? X86TYPE_VU1 : 0), _Is_, MODE_READ); + int isreg = _allocX86reg(xEmptyReg, X86TYPE_VI | (s_vu ? X86TYPE_VU1 : 0), _Is_, MODE_READ); xLEA(eax, ptr[xAddressReg(isreg) * (1<<3)]); //Mask the address to something valid @@ -4324,7 +4324,7 @@ void recVUMI_XGKICK(VURegs *VU, int info) recVUMI_XGKICK_(VU); } - int isreg = _allocX86reg(ECX, X86TYPE_VI | (s_vu ? X86TYPE_VU1 : 0), _Is_, MODE_READ); + int isreg = _allocX86reg(ecx, X86TYPE_VI | (s_vu ? X86TYPE_VU1 : 0), _Is_, MODE_READ); _freeX86reg(isreg); // flush x86regs[isreg].inuse = 1; x86regs[isreg].type = X86TYPE_VITEMP;