mirror of https://github.com/PCSX2/pcsx2.git
Changed some more stuff to use the vif stat enum's; and some other minor changes...
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1671 96395faa-99c1-11dd-bbfe-3dabce05a288
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@ -96,12 +96,16 @@ PCSX2_ALIGNED16(u8 backVUmem [0x4000]);
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PCSX2_ALIGNED16(u8 cmpVUmem [0x4000]);
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static u32 runCount = 0;
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#define VU3 ((VURegs)*((VURegs*)cmpVUregs))
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#define fABS(aInt) (aInt & 0x7fffffff)
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//#define cmpU(uA, uB) (fABS(uA) != fABS(uB))
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#define cmpU(uA, uB) (uA != uB)
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#define cmpA Console::Error
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#define cmpB Console::WriteLn
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#define cmpPrint(cond) { \
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if (cond) { \
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cmpA("%s", params str1); \
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cmpA("%s", params str2); \
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mVUdebugNow = 1; \
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} \
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else { \
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cmpB("%s", params str1); \
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@ -163,12 +167,12 @@ namespace VU1micro
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for (int i = 0; i < 32; i++) {
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sprintf(str1, "VF%02d = {%f, %f, %f, %f}", i, VU3.VF[i].F[0], VU3.VF[i].F[1], VU3.VF[i].F[2], VU3.VF[i].F[3]);
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sprintf(str2, "VF%02d = {%f, %f, %f, %f}", i, VU1.VF[i].F[0], VU1.VF[i].F[1], VU1.VF[i].F[2], VU1.VF[i].F[3]);
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cmpPrint(((VU1.VF[i].UL[0] != VU3.VF[i].UL[0]) || (VU1.VF[i].UL[1] != VU3.VF[i].UL[1]) || (VU1.VF[i].UL[2] != VU3.VF[i].UL[2]) || (VU1.VF[i].UL[3] != VU3.VF[i].UL[3])));
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cmpPrint((cmpU(VU1.VF[i].UL[0], VU3.VF[i].UL[0]) || cmpU(VU1.VF[i].UL[1], VU3.VF[i].UL[1]) || cmpU(VU1.VF[i].UL[2], VU3.VF[i].UL[2]) || cmpU(VU1.VF[i].UL[3], VU3.VF[i].UL[3])));
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}
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sprintf(str1, "ACC = {%f, %f, %f, %f}", VU3.ACC.F[0], VU3.ACC.F[1], VU3.ACC.F[2], VU3.ACC.F[3]);
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sprintf(str2, "ACC = {%f, %f, %f, %f}", VU1.ACC.F[0], VU1.ACC.F[1], VU1.ACC.F[2], VU1.ACC.F[3]);
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cmpPrint(((VU1.ACC.F[0] != VU3.ACC.F[0]) || (VU1.ACC.F[1] != VU3.ACC.F[1]) || (VU1.ACC.F[2] != VU3.ACC.F[2]) || (VU1.ACC.F[3] != VU3.ACC.F[3])));
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cmpPrint((cmpU(VU1.ACC.UL[0], VU3.ACC.UL[0]) || cmpU(VU1.ACC.UL[1], VU3.ACC.UL[1]) || cmpU(VU1.ACC.UL[2], VU3.ACC.UL[2]) || cmpU(VU1.ACC.UL[3], VU3.ACC.UL[3])));
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for (int i = 0; i < 16; i++) {
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sprintf(str1, "VI%02d = % 8d ($%08x)", i, (s16)VU3.VI[i].UL, VU3.VI[i].UL);
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@ -228,7 +232,8 @@ namespace VU1micro
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SysPrintf("-----------------------------------------------\n\n");
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mVUdebugNow = 1;
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if (mVUdebugNow) {
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resetVUrec(1);
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memcpy_fast((u8*)&VU1, (u8*)backVUregs, sizeof(VURegs));
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memcpy_fast((u8*)VU1.Mem, (u8*)backVUmem, 0x4000);
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@ -239,6 +244,8 @@ namespace VU1micro
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Sleep(1000);
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}
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}
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}
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VUtestPause();
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FreezeXMMRegs(0);
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}
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@ -68,7 +68,7 @@ microVUt(void) mVUendProgram(mV, microFlagCycles* mFC, int isEbit) {
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if (isEbit || isVU1) { // Clear 'is busy' Flags
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AND32ItoM((uptr)&VU0.VI[REG_VPU_STAT].UL, (isVU1 ? ~0x100 : ~0x001)); // VBS0/VBS1 flag
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AND32ItoM((uptr)&mVU->regs->vifRegs->stat, ~0x4); // Clear VU 'is busy' signal for vif
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AND32ItoM((uptr)&mVU->regs->vifRegs->stat, ~VIF1_STAT_VEW); // Clear VU 'is busy' signal for vif
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}
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if (isEbit != 2) { // Save PC, and Jump to Exit Point
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@ -21,8 +21,6 @@
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//------------------------------------------------------------------
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// Declarations
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//------------------------------------------------------------------
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#define mVUgetCode (mVU->code)
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mVUop(mVU_UPPER_FD_00);
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mVUop(mVU_UPPER_FD_01);
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mVUop(mVU_UPPER_FD_10);
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@ -204,19 +202,19 @@ void (* mVU_UPPER_FD_11_TABLE [32])(mP) = {
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// Table Functions
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//------------------------------------------------------------------
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mVUop(mVU_UPPER_FD_00) { mVU_UPPER_FD_00_TABLE [((mVUgetCode >> 6) & 0x1f)](mX); }
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mVUop(mVU_UPPER_FD_01) { mVU_UPPER_FD_01_TABLE [((mVUgetCode >> 6) & 0x1f)](mX); }
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mVUop(mVU_UPPER_FD_10) { mVU_UPPER_FD_10_TABLE [((mVUgetCode >> 6) & 0x1f)](mX); }
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mVUop(mVU_UPPER_FD_11) { mVU_UPPER_FD_11_TABLE [((mVUgetCode >> 6) & 0x1f)](mX); }
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mVUop(mVULowerOP) { mVULowerOP_OPCODE [ (mVUgetCode & 0x3f) ](mX); }
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mVUop(mVULowerOP_T3_00) { mVULowerOP_T3_00_OPCODE [((mVUgetCode >> 6) & 0x1f)](mX); }
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mVUop(mVULowerOP_T3_01) { mVULowerOP_T3_01_OPCODE [((mVUgetCode >> 6) & 0x1f)](mX); }
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mVUop(mVULowerOP_T3_10) { mVULowerOP_T3_10_OPCODE [((mVUgetCode >> 6) & 0x1f)](mX); }
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mVUop(mVULowerOP_T3_11) { mVULowerOP_T3_11_OPCODE [((mVUgetCode >> 6) & 0x1f)](mX); }
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mVUop(mVUopU) { mVU_UPPER_OPCODE [(mVUgetCode & 0x3f)](mX); } // Gets Upper Opcode
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mVUop(mVUopL) { mVULOWER_OPCODE [(mVUgetCode >> 25)](mX); } // Gets Lower Opcode
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mVUop(mVU_UPPER_FD_00) { mVU_UPPER_FD_00_TABLE [((mVU->code >> 6) & 0x1f)](mX); }
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mVUop(mVU_UPPER_FD_01) { mVU_UPPER_FD_01_TABLE [((mVU->code >> 6) & 0x1f)](mX); }
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mVUop(mVU_UPPER_FD_10) { mVU_UPPER_FD_10_TABLE [((mVU->code >> 6) & 0x1f)](mX); }
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mVUop(mVU_UPPER_FD_11) { mVU_UPPER_FD_11_TABLE [((mVU->code >> 6) & 0x1f)](mX); }
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mVUop(mVULowerOP) { mVULowerOP_OPCODE [ (mVU->code & 0x3f) ](mX); }
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mVUop(mVULowerOP_T3_00) { mVULowerOP_T3_00_OPCODE [((mVU->code >> 6) & 0x1f)](mX); }
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mVUop(mVULowerOP_T3_01) { mVULowerOP_T3_01_OPCODE [((mVU->code >> 6) & 0x1f)](mX); }
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mVUop(mVULowerOP_T3_10) { mVULowerOP_T3_10_OPCODE [((mVU->code >> 6) & 0x1f)](mX); }
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mVUop(mVULowerOP_T3_11) { mVULowerOP_T3_11_OPCODE [((mVU->code >> 6) & 0x1f)](mX); }
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mVUop(mVUopU) { mVU_UPPER_OPCODE [ (mVU->code & 0x3f) ](mX); } // Gets Upper Opcode
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mVUop(mVUopL) { mVULOWER_OPCODE [ (mVU->code >> 25) ](mX); } // Gets Lower Opcode
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mVUop(mVUunknown) {
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pass2 { SysPrintf("microVU%d: Unknown Micro VU opcode called (%x) [%04x]\n", getIndex, mVUgetCode, xPC); }
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pass3 { mVUlog("Unknown", mVUgetCode); }
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pass2 { SysPrintf("microVU%d: Unknown Micro VU opcode called (%x) [%04x]\n", getIndex, mVU->code, xPC); }
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pass3 { mVUlog("Unknown", mVU->code); }
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}
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@ -2747,7 +2747,7 @@ static void SuperVURecompile()
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assert(pchild->blocks.size() == 0);
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AND32ItoM((uptr)&VU0.VI[ REG_VPU_STAT ].UL, s_vu ? ~0x100 : ~0x001); // E flag
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AND32ItoM((uptr)&VU->vifRegs->stat, ~0x4);
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AND32ItoM((uptr)&VU->vifRegs->stat, ~VIF1_STAT_VEW);
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MOV32ItoM((uptr)&VU->VI[REG_TPC], pchild->endpc);
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JMP32((uptr)SuperVUEndProgram - ((uptr)x86Ptr + 5));
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@ -3044,7 +3044,7 @@ void VuBaseBlock::Recompile()
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_freeXMMregs();
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_freeX86regs();
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AND32ItoM((uptr)&VU0.VI[ REG_VPU_STAT ].UL, s_vu ? ~0x100 : ~0x001); // E flag
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AND32ItoM((uptr)&VU->vifRegs->stat, ~0x4);
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AND32ItoM((uptr)&VU->vifRegs->stat, ~VIF1_STAT_VEW);
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if (!branch) MOV32ItoM((uptr)&VU->VI[REG_TPC], endpc);
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