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Changed some more stuff to use the vif stat enum's; and some other minor changes... 

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1671 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
cottonvibes 2009-08-22 19:34:59 +00:00
parent 44bb5cdbb5
commit b00c60c7e6
5 changed files with 39 additions and 34 deletions
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12
pcsx2/Hw.h
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@ -296,7 +296,7 @@ enum INTCIrqs
enum DMACIrqs enum DMACIrqs
{ {
DMAC_VIF0 = 0, DMAC_VIF0 = 0,
DMAC_VIF1, DMAC_VIF1,
DMAC_GIF, DMAC_GIF,
DMAC_FROM_IPU, DMAC_FROM_IPU,
@ -306,16 +306,16 @@ enum DMACIrqs
DMAC_SIF2, DMAC_SIF2,
DMAC_FROM_SPR, DMAC_FROM_SPR,
DMAC_TO_SPR, DMAC_TO_SPR,
DMAC_13 = 13, // Stall? DMAC_13 = 13, // Stall?
DMAC_14 = 14, // Transfer? DMAC_14 = 14, // Transfer?
DMAC_ERROR = 15, DMAC_ERROR = 15,
}; };
enum vif0_stat_flags enum vif0_stat_flags
{ {
VIF0_STAT_VPS_W = (1), VIF0_STAT_VPS_W = (1),
VIF0_STAT_VPS_D = (2), VIF0_STAT_VPS_D = (2),
VIF0_STAT_VPS_T = (3), VIF0_STAT_VPS_T = (3),
VIF0_STAT_VPS = (3), VIF0_STAT_VPS = (3),
VIF0_STAT_VEW = (1<<2), VIF0_STAT_VEW = (1<<2),
VIF0_STAT_MRK = (1<<6), VIF0_STAT_MRK = (1<<6),
@ -334,7 +334,7 @@ enum vif1_stat_flags
{ {
VIF1_STAT_VPS_W = (1), VIF1_STAT_VPS_W = (1),
VIF1_STAT_VPS_D = (2), VIF1_STAT_VPS_D = (2),
VIF1_STAT_VPS_T = (3), VIF1_STAT_VPS_T = (3),
VIF1_STAT_VPS = (3), VIF1_STAT_VPS = (3),
VIF1_STAT_VEW = (1<<2), VIF1_STAT_VEW = (1<<2),
VIF1_STAT_VGW = (1<<3), VIF1_STAT_VGW = (1<<3),

25
pcsx2/x86/iVU1micro.cpp
View File

@ -96,12 +96,16 @@ PCSX2_ALIGNED16(u8 backVUmem [0x4000]);
PCSX2_ALIGNED16(u8 cmpVUmem [0x4000]); PCSX2_ALIGNED16(u8 cmpVUmem [0x4000]);
static u32 runCount = 0; static u32 runCount = 0;
#define VU3 ((VURegs)*((VURegs*)cmpVUregs)) #define VU3 ((VURegs)*((VURegs*)cmpVUregs))
#define fABS(aInt) (aInt & 0x7fffffff)
//#define cmpU(uA, uB) (fABS(uA) != fABS(uB))
#define cmpU(uA, uB) (uA != uB)
#define cmpA Console::Error #define cmpA Console::Error
#define cmpB Console::WriteLn #define cmpB Console::WriteLn
#define cmpPrint(cond) { \ #define cmpPrint(cond) { \
if (cond) { \ if (cond) { \
cmpA("%s", params str1); \ cmpA("%s", params str1); \
cmpA("%s", params str2); \ cmpA("%s", params str2); \
mVUdebugNow = 1; \
} \ } \
else { \ else { \
cmpB("%s", params str1); \ cmpB("%s", params str1); \
@ -163,12 +167,12 @@ namespace VU1micro
for (int i = 0; i < 32; i++) { for (int i = 0; i < 32; i++) {
sprintf(str1, "VF%02d = {%f, %f, %f, %f}", i, VU3.VF[i].F[0], VU3.VF[i].F[1], VU3.VF[i].F[2], VU3.VF[i].F[3]); sprintf(str1, "VF%02d = {%f, %f, %f, %f}", i, VU3.VF[i].F[0], VU3.VF[i].F[1], VU3.VF[i].F[2], VU3.VF[i].F[3]);
sprintf(str2, "VF%02d = {%f, %f, %f, %f}", i, VU1.VF[i].F[0], VU1.VF[i].F[1], VU1.VF[i].F[2], VU1.VF[i].F[3]); sprintf(str2, "VF%02d = {%f, %f, %f, %f}", i, VU1.VF[i].F[0], VU1.VF[i].F[1], VU1.VF[i].F[2], VU1.VF[i].F[3]);
cmpPrint(((VU1.VF[i].UL[0] != VU3.VF[i].UL[0]) || (VU1.VF[i].UL[1] != VU3.VF[i].UL[1]) || (VU1.VF[i].UL[2] != VU3.VF[i].UL[2]) || (VU1.VF[i].UL[3] != VU3.VF[i].UL[3]))); cmpPrint((cmpU(VU1.VF[i].UL[0], VU3.VF[i].UL[0]) || cmpU(VU1.VF[i].UL[1], VU3.VF[i].UL[1]) || cmpU(VU1.VF[i].UL[2], VU3.VF[i].UL[2]) || cmpU(VU1.VF[i].UL[3], VU3.VF[i].UL[3])));
} }
sprintf(str1, "ACC = {%f, %f, %f, %f}", VU3.ACC.F[0], VU3.ACC.F[1], VU3.ACC.F[2], VU3.ACC.F[3]); sprintf(str1, "ACC = {%f, %f, %f, %f}", VU3.ACC.F[0], VU3.ACC.F[1], VU3.ACC.F[2], VU3.ACC.F[3]);
sprintf(str2, "ACC = {%f, %f, %f, %f}", VU1.ACC.F[0], VU1.ACC.F[1], VU1.ACC.F[2], VU1.ACC.F[3]); sprintf(str2, "ACC = {%f, %f, %f, %f}", VU1.ACC.F[0], VU1.ACC.F[1], VU1.ACC.F[2], VU1.ACC.F[3]);
cmpPrint(((VU1.ACC.F[0] != VU3.ACC.F[0]) || (VU1.ACC.F[1] != VU3.ACC.F[1]) || (VU1.ACC.F[2] != VU3.ACC.F[2]) || (VU1.ACC.F[3] != VU3.ACC.F[3]))); cmpPrint((cmpU(VU1.ACC.UL[0], VU3.ACC.UL[0]) || cmpU(VU1.ACC.UL[1], VU3.ACC.UL[1]) || cmpU(VU1.ACC.UL[2], VU3.ACC.UL[2]) || cmpU(VU1.ACC.UL[3], VU3.ACC.UL[3])));
for (int i = 0; i < 16; i++) { for (int i = 0; i < 16; i++) {
sprintf(str1, "VI%02d = % 8d ($%08x)", i, (s16)VU3.VI[i].UL, VU3.VI[i].UL); sprintf(str1, "VI%02d = % 8d ($%08x)", i, (s16)VU3.VI[i].UL, VU3.VI[i].UL);
@ -227,18 +231,21 @@ namespace VU1micro
cmpPrint((VU1.VI[REG_TPC].UL != VU3.VI[REG_TPC].UL)); cmpPrint((VU1.VI[REG_TPC].UL != VU3.VI[REG_TPC].UL));
SysPrintf("-----------------------------------------------\n\n"); SysPrintf("-----------------------------------------------\n\n");
if (mVUdebugNow) {
mVUdebugNow = 1; resetVUrec(1);
resetVUrec(1); memcpy_fast((u8*)&VU1, (u8*)backVUregs, sizeof(VURegs));
memcpy_fast((u8*)&VU1, (u8*)backVUregs, sizeof(VURegs)); memcpy_fast((u8*)VU1.Mem, (u8*)backVUmem, 0x4000);
memcpy_fast((u8*)VU1.Mem, (u8*)backVUmem, 0x4000);
runVUrec(VU1.VI[REG_TPC].UL, 300000 /*0x7fffffff*/, 1); runVUrec(VU1.VI[REG_TPC].UL, 300000 /*0x7fffffff*/, 1);
for (int i = 0; i < 10000000; i++) { for (int i = 0; i < 10000000; i++) {
Sleep(1000); Sleep(1000);
}
} }
} }
VUtestPause(); VUtestPause();
FreezeXMMRegs(0); FreezeXMMRegs(0);
} }

2
pcsx2/x86/microVU_Branch.inl
View File

@ -68,7 +68,7 @@ microVUt(void) mVUendProgram(mV, microFlagCycles* mFC, int isEbit) {
if (isEbit || isVU1) { // Clear 'is busy' Flags if (isEbit || isVU1) { // Clear 'is busy' Flags
AND32ItoM((uptr)&VU0.VI[REG_VPU_STAT].UL, (isVU1 ? ~0x100 : ~0x001)); // VBS0/VBS1 flag AND32ItoM((uptr)&VU0.VI[REG_VPU_STAT].UL, (isVU1 ? ~0x100 : ~0x001)); // VBS0/VBS1 flag
AND32ItoM((uptr)&mVU->regs->vifRegs->stat, ~0x4); // Clear VU 'is busy' signal for vif AND32ItoM((uptr)&mVU->regs->vifRegs->stat, ~VIF1_STAT_VEW); // Clear VU 'is busy' signal for vif
} }
if (isEbit != 2) { // Save PC, and Jump to Exit Point if (isEbit != 2) { // Save PC, and Jump to Exit Point

30
pcsx2/x86/microVU_Tables.inl
View File

@ -21,8 +21,6 @@
//------------------------------------------------------------------ //------------------------------------------------------------------
// Declarations // Declarations
//------------------------------------------------------------------ //------------------------------------------------------------------
#define mVUgetCode (mVU->code)
mVUop(mVU_UPPER_FD_00); mVUop(mVU_UPPER_FD_00);
mVUop(mVU_UPPER_FD_01); mVUop(mVU_UPPER_FD_01);
mVUop(mVU_UPPER_FD_10); mVUop(mVU_UPPER_FD_10);
@ -204,19 +202,19 @@ void (* mVU_UPPER_FD_11_TABLE [32])(mP) = {
// Table Functions // Table Functions
//------------------------------------------------------------------ //------------------------------------------------------------------
mVUop(mVU_UPPER_FD_00) { mVU_UPPER_FD_00_TABLE [((mVUgetCode >> 6) & 0x1f)](mX); } mVUop(mVU_UPPER_FD_00) { mVU_UPPER_FD_00_TABLE [((mVU->code >> 6) & 0x1f)](mX); }
mVUop(mVU_UPPER_FD_01) { mVU_UPPER_FD_01_TABLE [((mVUgetCode >> 6) & 0x1f)](mX); } mVUop(mVU_UPPER_FD_01) { mVU_UPPER_FD_01_TABLE [((mVU->code >> 6) & 0x1f)](mX); }
mVUop(mVU_UPPER_FD_10) { mVU_UPPER_FD_10_TABLE [((mVUgetCode >> 6) & 0x1f)](mX); } mVUop(mVU_UPPER_FD_10) { mVU_UPPER_FD_10_TABLE [((mVU->code >> 6) & 0x1f)](mX); }
mVUop(mVU_UPPER_FD_11) { mVU_UPPER_FD_11_TABLE [((mVUgetCode >> 6) & 0x1f)](mX); } mVUop(mVU_UPPER_FD_11) { mVU_UPPER_FD_11_TABLE [((mVU->code >> 6) & 0x1f)](mX); }
mVUop(mVULowerOP) { mVULowerOP_OPCODE [ (mVUgetCode & 0x3f) ](mX); } mVUop(mVULowerOP) { mVULowerOP_OPCODE [ (mVU->code & 0x3f) ](mX); }
mVUop(mVULowerOP_T3_00) { mVULowerOP_T3_00_OPCODE [((mVUgetCode >> 6) & 0x1f)](mX); } mVUop(mVULowerOP_T3_00) { mVULowerOP_T3_00_OPCODE [((mVU->code >> 6) & 0x1f)](mX); }
mVUop(mVULowerOP_T3_01) { mVULowerOP_T3_01_OPCODE [((mVUgetCode >> 6) & 0x1f)](mX); } mVUop(mVULowerOP_T3_01) { mVULowerOP_T3_01_OPCODE [((mVU->code >> 6) & 0x1f)](mX); }
mVUop(mVULowerOP_T3_10) { mVULowerOP_T3_10_OPCODE [((mVUgetCode >> 6) & 0x1f)](mX); } mVUop(mVULowerOP_T3_10) { mVULowerOP_T3_10_OPCODE [((mVU->code >> 6) & 0x1f)](mX); }
mVUop(mVULowerOP_T3_11) { mVULowerOP_T3_11_OPCODE [((mVUgetCode >> 6) & 0x1f)](mX); } mVUop(mVULowerOP_T3_11) { mVULowerOP_T3_11_OPCODE [((mVU->code >> 6) & 0x1f)](mX); }
mVUop(mVUopU) { mVU_UPPER_OPCODE [(mVUgetCode & 0x3f)](mX); } // Gets Upper Opcode mVUop(mVUopU) { mVU_UPPER_OPCODE [ (mVU->code & 0x3f) ](mX); } // Gets Upper Opcode
mVUop(mVUopL) { mVULOWER_OPCODE [(mVUgetCode >> 25)](mX); } // Gets Lower Opcode mVUop(mVUopL) { mVULOWER_OPCODE [ (mVU->code >> 25) ](mX); } // Gets Lower Opcode
mVUop(mVUunknown) { mVUop(mVUunknown) {
pass2 { SysPrintf("microVU%d: Unknown Micro VU opcode called (%x) [%04x]\n", getIndex, mVUgetCode, xPC); } pass2 { SysPrintf("microVU%d: Unknown Micro VU opcode called (%x) [%04x]\n", getIndex, mVU->code, xPC); }
pass3 { mVUlog("Unknown", mVUgetCode); } pass3 { mVUlog("Unknown", mVU->code); }
} }

4
pcsx2/x86/sVU_zerorec.cpp
View File

@ -2747,7 +2747,7 @@ static void SuperVURecompile()
assert(pchild->blocks.size() == 0); assert(pchild->blocks.size() == 0);
AND32ItoM((uptr)&VU0.VI[ REG_VPU_STAT ].UL, s_vu ? ~0x100 : ~0x001); // E flag AND32ItoM((uptr)&VU0.VI[ REG_VPU_STAT ].UL, s_vu ? ~0x100 : ~0x001); // E flag
AND32ItoM((uptr)&VU->vifRegs->stat, ~0x4); AND32ItoM((uptr)&VU->vifRegs->stat, ~VIF1_STAT_VEW);
MOV32ItoM((uptr)&VU->VI[REG_TPC], pchild->endpc); MOV32ItoM((uptr)&VU->VI[REG_TPC], pchild->endpc);
JMP32((uptr)SuperVUEndProgram - ((uptr)x86Ptr + 5)); JMP32((uptr)SuperVUEndProgram - ((uptr)x86Ptr + 5));
@ -3044,7 +3044,7 @@ void VuBaseBlock::Recompile()
_freeXMMregs(); _freeXMMregs();
_freeX86regs(); _freeX86regs();
AND32ItoM((uptr)&VU0.VI[ REG_VPU_STAT ].UL, s_vu ? ~0x100 : ~0x001); // E flag AND32ItoM((uptr)&VU0.VI[ REG_VPU_STAT ].UL, s_vu ? ~0x100 : ~0x001); // E flag
AND32ItoM((uptr)&VU->vifRegs->stat, ~0x4); AND32ItoM((uptr)&VU->vifRegs->stat, ~VIF1_STAT_VEW);
if (!branch) MOV32ItoM((uptr)&VU->VI[REG_TPC], endpc); if (!branch) MOV32ItoM((uptr)&VU->VI[REG_TPC], endpc);