mirror of https://github.com/PCSX2/pcsx2.git
these files aren't needed anymore
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@648 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
cottonvibes
parent
e2d583c7fe
commit
af2e99c196
|
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@ -1,202 +0,0 @@
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/* Pcsx2 - Pc Ps2 Emulator
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* Copyright (C) 2002-2009 Pcsx2 Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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||||
* the Free Software Foundation; either version 2 of the License, or
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||||
* (at your option) any later version.
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||||
*
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||||
* This program is distributed in the hope that it will be useful,
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||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
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||||
*
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||||
* You should have received a copy of the GNU General Public License
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||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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#include "PrecompiledHeader.h"
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#include "ix86.h"
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/**********************/
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/* 3DNOW instructions */
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/**********************/
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/* femms */
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void FEMMS( void )
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{
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write16( 0x0E0F );
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}
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void PFCMPEQMtoR( x86IntRegType to, uptr from )
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{
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write16( 0x0F0F );
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ModRM( 0, to, DISP32 );
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write32( from );
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write8( 0xB0 );
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}
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void PFCMPGTMtoR( x86IntRegType to, uptr from )
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{
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write16( 0x0F0F );
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ModRM( 0, to, DISP32 );
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write32( from );
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write8( 0xA0 );
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}
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void PFCMPGEMtoR( x86IntRegType to, uptr from )
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{
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write16( 0x0F0F );
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ModRM( 0, to, DISP32 );
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write32( from );
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write8( 0x90 );
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}
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void PFADDMtoR( x86IntRegType to, uptr from )
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{
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write16( 0x0F0F );
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ModRM( 0, to, DISP32 );
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write32( from );
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write8( 0x9E );
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}
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void PFADDRtoR( x86IntRegType to, x86IntRegType from )
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{
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write16( 0x0F0F );
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ModRM( 3, to, from );
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write8( 0x9E );
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}
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void PFSUBMtoR( x86IntRegType to, uptr from )
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{
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write16( 0x0F0F );
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ModRM( 0, to, DISP32 );
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write32( from );
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write8( 0x9A );
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}
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void PFSUBRtoR( x86IntRegType to, x86IntRegType from )
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{
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write16( 0x0F0F );
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ModRM( 3, to, from );
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write8( 0x9A );
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}
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void PFMULMtoR( x86IntRegType to, uptr from )
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{
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write16( 0x0F0F );
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ModRM( 0, to, DISP32 );
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write32( from );
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write8( 0xB4 );
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}
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void PFMULRtoR( x86IntRegType to, x86IntRegType from )
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{
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write16( 0x0F0F );
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ModRM( 3, to, from );
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write8( 0xB4 );
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}
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void PFRCPMtoR( x86IntRegType to, uptr from )
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{
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write16( 0x0F0F );
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ModRM( 0, to, DISP32 );
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write32( from );
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write8( 0x96 );
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}
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void PFRCPRtoR( x86IntRegType to, x86IntRegType from )
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{
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write16( 0x0F0F );
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ModRM( 3, to, from );
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write8( 0x96 );
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}
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void PFRCPIT1RtoR( x86IntRegType to, x86IntRegType from )
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{
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write16( 0x0F0F );
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ModRM( 3, to, from );
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write8( 0xA6 );
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}
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void PFRCPIT2RtoR( x86IntRegType to, x86IntRegType from )
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{
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write16( 0x0F0F );
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ModRM( 3, to, from );
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write8( 0xB6 );
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}
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void PFRSQRTRtoR( x86IntRegType to, x86IntRegType from )
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{
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write16( 0x0F0F );
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ModRM( 3, to, from );
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write8( 0x97 );
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}
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void PFRSQIT1RtoR( x86IntRegType to, x86IntRegType from )
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{
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write16( 0x0F0F );
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ModRM( 3, to, from );
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write8( 0xA7 );
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}
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void PF2IDMtoR( x86IntRegType to, uptr from )
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{
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write16( 0x0F0F );
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ModRM( 0, to, DISP32 );
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write32( from );
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write8( 0x1D );
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}
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void PF2IDRtoR( x86IntRegType to, x86IntRegType from )
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{
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write16( 0x0F0F );
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ModRM( 3, to, from );
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write8( 0x1D );
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}
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void PI2FDMtoR( x86IntRegType to, uptr from )
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{
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write16( 0x0F0F );
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ModRM( 0, to, DISP32 );
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write32( from );
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write8( 0x0D );
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}
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void PI2FDRtoR( x86IntRegType to, x86IntRegType from )
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{
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write16( 0x0F0F );
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ModRM( 3, to, from );
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write8( 0x0D );
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}
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void PFMAXMtoR( x86IntRegType to, uptr from )
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{
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write16( 0x0F0F );
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ModRM( 0, to, DISP32 );
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write32( from );
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write8( 0xA4 );
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}
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void PFMAXRtoR( x86IntRegType to, x86IntRegType from )
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{
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write16( 0x0F0F );
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ModRM( 3, to, from );
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write8( 0xA4 );
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}
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void PFMINMtoR( x86IntRegType to, uptr from )
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{
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write16( 0x0F0F );
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ModRM( 0, to, DISP32 );
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write32( from );
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write8( 0x94 );
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}
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void PFMINRtoR( x86IntRegType to, x86IntRegType from )
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{
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write16( 0x0F0F );
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ModRM( 3, to, from );
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write8( 0x94 );
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}
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@ -1,409 +0,0 @@
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/* Cpudetection lib
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* Copyright (C) 2002-2009 Pcsx2 Team
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*
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* This program is free software; you can redistribute it and/or modify
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||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
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||||
*
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||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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#include "PrecompiledHeader.h"
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#include "ix86.h"
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#include "Misc.h"
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#include "Threading.h"
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#include "RedtapeWindows.h"
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#if defined (_MSC_VER) && _MSC_VER >= 1400
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extern "C"
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{
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void __cpuid(int* CPUInfo, int InfoType);
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unsigned __int64 __rdtsc();
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# pragma intrinsic(__cpuid)
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# pragma intrinsic(__rdtsc)
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}
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#endif
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CAPABILITIES cpucaps;
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CPUINFO cpuinfo;
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#define cpuid(cmd,a,b,c,d) \
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__asm__ __volatile__("xchgl %%ebx, %1; cpuid; xchgl %%ebx, %1" \
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: "=a" (a), "=r" (b), "=c" (c), "=d" (d) : "0" (cmd), "c" (0))
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extern s32 iCpuId( u32 cmd, u32 *regs )
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{
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int flag=1;
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#if defined (_MSC_VER) && _MSC_VER >= 1400
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__asm
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{
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xor ecx, ecx; /* ecx should be zero for CPUID(4) */
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}
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__cpuid( (int*)regs, cmd );
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return 0;
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#elif defined (_MSC_VER)
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__asm
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{
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push ebx;
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push edi;
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pushfd;
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pop eax;
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mov edx, eax;
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xor eax, 1 << 21;
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push eax;
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popfd;
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pushfd;
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pop eax;
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xor eax, edx;
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mov flag, eax;
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}
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if ( ! flag )
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{
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return -1;
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}
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__asm
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{
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mov eax, cmd;
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xor ecx, ecx; /* ecx should be zero for CPUID(4) */
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cpuid;
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mov edi, [regs]
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mov [edi], eax;
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mov [edi+4], ebx;
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mov [edi+8], ecx;
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mov [edi+12], edx;
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pop edi;
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pop ebx;
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}
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return 0;
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#else
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// GCC Assembly Code -->
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// see if we can use cpuid
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__asm__ __volatile__ (
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"sub $0x18, %%esp\n"
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"pushf\n"
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"pop %%eax\n"
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||||
"mov %%eax, %%edx\n"
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"xor $0x200000, %%eax\n"
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||||
"push %%eax\n"
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"popf\n"
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||||
"pushf\n"
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||||
"pop %%eax\n"
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"xor %%edx, %%eax\n"
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||||
"mov %%eax, %0\n"
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||||
"add $0x18, %%esp\n"
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||||
"cmpl $0x0,%%eax\n"
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||||
"jne 1f\n"
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||||
"mov $0xffffffff, %%eax\n"
|
||||
"leave\n"
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||||
"ret\n"
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||||
"1:\n"
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||||
: "=r"(flag) :
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||||
);
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||||
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||||
cpuid(cmd, regs[0], regs[1], regs[2], regs[3]);
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||||
return 0;
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||||
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||||
#endif // _MSC_VER
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||||
}
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||||
|
||||
u64 GetCPUTick( void )
|
||||
{
|
||||
#if defined (_MSC_VER) && _MSC_VER >= 1400
|
||||
|
||||
return __rdtsc();
|
||||
|
||||
#elif defined(_WIN32)
|
||||
|
||||
__asm rdtsc;
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||||
|
||||
#else
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||||
|
||||
u32 _a, _d;
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||||
__asm__ __volatile__ ("rdtsc" : "=a"(_a), "=d"(_d));
|
||||
return (u64)_a | ((u64)_d << 32);
|
||||
|
||||
#endif
|
||||
}
|
||||
|
||||
// Note: This function doesn't support GCC/Linux. Looking online it seems the only
|
||||
// way to simulate the Micrsoft SEH model is to use unix signals, and the 'sigaction'
|
||||
// function specifically. Maybe a project for a linux developer at a later date. :)
|
||||
void cpudetectSSE3(void* pfnCallSSE3)
|
||||
{
|
||||
cpucaps.hasStreamingSIMD3Extensions = 1;
|
||||
|
||||
#ifdef _MSC_VER
|
||||
__try {
|
||||
((void (*)())pfnCallSSE3)();
|
||||
}
|
||||
__except(EXCEPTION_EXECUTE_HANDLER) {
|
||||
cpucaps.hasStreamingSIMD3Extensions = 0;
|
||||
}
|
||||
#else // linux
|
||||
|
||||
#ifdef PCSX2_FORCESSE3
|
||||
cpucaps.hasStreamingSIMD3Extensions = 1;
|
||||
#else
|
||||
// exception handling doesn't work, so disable for x86 builds of linux
|
||||
cpucaps.hasStreamingSIMD3Extensions = 0;
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
#if defined __LINUX__
|
||||
|
||||
#include <sys/time.h>
|
||||
#include <errno.h>
|
||||
|
||||
#endif
|
||||
|
||||
s64 CPUSpeedHz( unsigned int time )
|
||||
{
|
||||
s64 timeStart,
|
||||
timeStop;
|
||||
s64 startTick,
|
||||
endTick;
|
||||
s64 overhead;
|
||||
|
||||
if( ! cpucaps.hasTimeStampCounter )
|
||||
{
|
||||
return 0; //check if function is supported
|
||||
}
|
||||
|
||||
overhead = GetCPUTick() - GetCPUTick();
|
||||
|
||||
timeStart = timeGetTime( );
|
||||
while( timeGetTime( ) == timeStart )
|
||||
{
|
||||
timeStart = timeGetTime( );
|
||||
}
|
||||
for(;;)
|
||||
{
|
||||
timeStop = timeGetTime( );
|
||||
if ( ( timeStop - timeStart ) > 1 )
|
||||
{
|
||||
startTick = GetCPUTick( );
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
timeStart = timeStop;
|
||||
for(;;)
|
||||
{
|
||||
timeStop = timeGetTime( );
|
||||
if ( ( timeStop - timeStart ) > time )
|
||||
{
|
||||
endTick = GetCPUTick( );
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return (s64)( ( endTick - startTick ) + ( overhead ) );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
int arr[] = {
|
||||
0x65746e49, 0x2952286c, 0x726f4320, 0x4d542865,
|
||||
0x51203229,0x20646175,0x20555043,0x20202020 ,
|
||||
0x20202020,0x20402020,0x36362e32,0x7a4847
|
||||
};
|
||||
|
||||
void cpudetectInit()
|
||||
{
|
||||
u32 regs[ 4 ];
|
||||
u32 cmds;
|
||||
int cputype=0; // Cpu type
|
||||
//AMD 64 STUFF
|
||||
u32 x86_64_8BITBRANDID;
|
||||
u32 x86_64_12BITBRANDID;
|
||||
int num;
|
||||
char str[50];
|
||||
|
||||
memzero_obj( cpuinfo.x86ID );
|
||||
cpuinfo.x86Family = 0;
|
||||
cpuinfo.x86Model = 0;
|
||||
cpuinfo.x86PType = 0;
|
||||
cpuinfo.x86StepID = 0;
|
||||
cpuinfo.x86Flags = 0;
|
||||
cpuinfo.x86EFlags = 0;
|
||||
|
||||
if ( iCpuId( 0, regs ) == -1 ) return;
|
||||
|
||||
cmds = regs[ 0 ];
|
||||
((u32*)cpuinfo.x86ID)[ 0 ] = regs[ 1 ];
|
||||
((u32*)cpuinfo.x86ID)[ 1 ] = regs[ 3 ];
|
||||
((u32*)cpuinfo.x86ID)[ 2 ] = regs[ 2 ];
|
||||
|
||||
// Hack - prevents reg[2] & reg[3] from being optimized out of existance!
|
||||
num = sprintf(str, "\tx86Flags = %8.8x %8.8x\n", regs[3], regs[2]);
|
||||
|
||||
u32 LogicalCoresPerPhysicalCPU = 0;
|
||||
u32 PhysicalCoresPerPhysicalCPU = 1;
|
||||
|
||||
if ( cmds >= 0x00000001 )
|
||||
{
|
||||
if ( iCpuId( 0x00000001, regs ) != -1 )
|
||||
{
|
||||
cpuinfo.x86StepID = regs[ 0 ] & 0xf;
|
||||
cpuinfo.x86Model = (regs[ 0 ] >> 4) & 0xf;
|
||||
cpuinfo.x86Family = (regs[ 0 ] >> 8) & 0xf;
|
||||
cpuinfo.x86PType = (regs[ 0 ] >> 12) & 0x3;
|
||||
LogicalCoresPerPhysicalCPU = ( regs[1] >> 16 ) & 0xff;
|
||||
x86_64_8BITBRANDID = regs[1] & 0xff;
|
||||
cpuinfo.x86Flags = regs[ 3 ];
|
||||
cpuinfo.x86Flags2 = regs[ 2 ];
|
||||
}
|
||||
}
|
||||
/* detect multicore for intel cpu */
|
||||
if ((cmds >= 0x00000004) && !strcmp("GenuineIntel",cpuinfo.x86ID))
|
||||
{
|
||||
if ( iCpuId( 0x00000004, regs ) != -1 )
|
||||
{
|
||||
PhysicalCoresPerPhysicalCPU += ( regs[0] >> 26) & 0x3f;
|
||||
}
|
||||
}
|
||||
|
||||
if ( iCpuId( 0x80000000, regs ) != -1 )
|
||||
{
|
||||
cmds = regs[ 0 ];
|
||||
if ( cmds >= 0x80000001 )
|
||||
{
|
||||
if ( iCpuId( 0x80000001, regs ) != -1 )
|
||||
{
|
||||
x86_64_12BITBRANDID = regs[1] & 0xfff;
|
||||
cpuinfo.x86EFlags = regs[ 3 ];
|
||||
|
||||
}
|
||||
}
|
||||
/* detect multicore for amd cpu */
|
||||
if ((cmds >= 0x80000008) && !strcmp("AuthenticAMD",cpuinfo.x86ID))
|
||||
{
|
||||
if ( iCpuId( 0x80000008, regs ) != -1 )
|
||||
{
|
||||
PhysicalCoresPerPhysicalCPU += ( regs[2] ) & 0xff;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
switch(cpuinfo.x86PType)
|
||||
{
|
||||
case 0:
|
||||
strcpy( cpuinfo.x86Type, "Standard OEM");
|
||||
break;
|
||||
case 1:
|
||||
strcpy( cpuinfo.x86Type, "Overdrive");
|
||||
break;
|
||||
case 2:
|
||||
strcpy( cpuinfo.x86Type, "Dual");
|
||||
break;
|
||||
case 3:
|
||||
strcpy( cpuinfo.x86Type, "Reserved");
|
||||
break;
|
||||
default:
|
||||
strcpy( cpuinfo.x86Type, "Unknown");
|
||||
break;
|
||||
}
|
||||
if ( cpuinfo.x86ID[ 0 ] == 'G' ){ cputype=0;}//trick lines but if you know a way better ;p
|
||||
if ( cpuinfo.x86ID[ 0 ] == 'A' ){ cputype=1;}
|
||||
|
||||
memzero_obj( cpuinfo.x86Fam );
|
||||
iCpuId( 0x80000002, (u32*)cpuinfo.x86Fam);
|
||||
iCpuId( 0x80000003, (u32*)(cpuinfo.x86Fam+16));
|
||||
iCpuId( 0x80000004, (u32*)(cpuinfo.x86Fam+32));
|
||||
|
||||
//capabilities
|
||||
cpucaps.hasFloatingPointUnit = ( cpuinfo.x86Flags >> 0 ) & 1;
|
||||
cpucaps.hasVirtual8086ModeEnhancements = ( cpuinfo.x86Flags >> 1 ) & 1;
|
||||
cpucaps.hasDebuggingExtensions = ( cpuinfo.x86Flags >> 2 ) & 1;
|
||||
cpucaps.hasPageSizeExtensions = ( cpuinfo.x86Flags >> 3 ) & 1;
|
||||
cpucaps.hasTimeStampCounter = ( cpuinfo.x86Flags >> 4 ) & 1;
|
||||
cpucaps.hasModelSpecificRegisters = ( cpuinfo.x86Flags >> 5 ) & 1;
|
||||
cpucaps.hasPhysicalAddressExtension = ( cpuinfo.x86Flags >> 6 ) & 1;
|
||||
cpucaps.hasMachineCheckArchitecture = ( cpuinfo.x86Flags >> 7 ) & 1;
|
||||
cpucaps.hasCOMPXCHG8BInstruction = ( cpuinfo.x86Flags >> 8 ) & 1;
|
||||
cpucaps.hasAdvancedProgrammableInterruptController = ( cpuinfo.x86Flags >> 9 ) & 1;
|
||||
cpucaps.hasSEPFastSystemCall = ( cpuinfo.x86Flags >> 11 ) & 1;
|
||||
cpucaps.hasMemoryTypeRangeRegisters = ( cpuinfo.x86Flags >> 12 ) & 1;
|
||||
cpucaps.hasPTEGlobalFlag = ( cpuinfo.x86Flags >> 13 ) & 1;
|
||||
cpucaps.hasMachineCheckArchitecture = ( cpuinfo.x86Flags >> 14 ) & 1;
|
||||
cpucaps.hasConditionalMoveAndCompareInstructions = ( cpuinfo.x86Flags >> 15 ) & 1;
|
||||
cpucaps.hasFGPageAttributeTable = ( cpuinfo.x86Flags >> 16 ) & 1;
|
||||
cpucaps.has36bitPageSizeExtension = ( cpuinfo.x86Flags >> 17 ) & 1;
|
||||
cpucaps.hasProcessorSerialNumber = ( cpuinfo.x86Flags >> 18 ) & 1;
|
||||
cpucaps.hasCFLUSHInstruction = ( cpuinfo.x86Flags >> 19 ) & 1;
|
||||
cpucaps.hasDebugStore = ( cpuinfo.x86Flags >> 21 ) & 1;
|
||||
cpucaps.hasACPIThermalMonitorAndClockControl = ( cpuinfo.x86Flags >> 22 ) & 1;
|
||||
cpucaps.hasMultimediaExtensions = ( cpuinfo.x86Flags >> 23 ) & 1; //mmx
|
||||
cpucaps.hasFastStreamingSIMDExtensionsSaveRestore = ( cpuinfo.x86Flags >> 24 ) & 1;
|
||||
cpucaps.hasStreamingSIMDExtensions = ( cpuinfo.x86Flags >> 25 ) & 1; //sse
|
||||
cpucaps.hasStreamingSIMD2Extensions = ( cpuinfo.x86Flags >> 26 ) & 1; //sse2
|
||||
cpucaps.hasSelfSnoop = ( cpuinfo.x86Flags >> 27 ) & 1;
|
||||
cpucaps.hasMultiThreading = ( cpuinfo.x86Flags >> 28 ) & 1;
|
||||
cpucaps.hasThermalMonitor = ( cpuinfo.x86Flags >> 29 ) & 1;
|
||||
cpucaps.hasIntel64BitArchitecture = ( cpuinfo.x86Flags >> 30 ) & 1;
|
||||
//that is only for AMDs
|
||||
cpucaps.hasMultimediaExtensionsExt = ( cpuinfo.x86EFlags >> 22 ) & 1; //mmx2
|
||||
cpucaps.hasAMD64BitArchitecture = ( cpuinfo.x86EFlags >> 29 ) & 1; //64bit cpu
|
||||
cpucaps.has3DNOWInstructionExtensionsExt = ( cpuinfo.x86EFlags >> 30 ) & 1; //3dnow+
|
||||
cpucaps.has3DNOWInstructionExtensions = ( cpuinfo.x86EFlags >> 31 ) & 1; //3dnow
|
||||
|
||||
cpuinfo.cpuspeed = (u32)(CPUSpeedHz( 1000 ) / 1000000);
|
||||
|
||||
// --> SSE 4.1 detection <--
|
||||
// We don't care about the small subset of CPUs using SSE4 (which is also hard to
|
||||
// detect, in addition to being of limited use due to the abbreviated instruction set).
|
||||
// So we'll just leave it at SSE 4.1. SSE4 cpu detection is ignored.
|
||||
|
||||
cpucaps.hasStreamingSIMD4Extensions = ( cpuinfo.x86Flags2 >> 19 ) & 1; //sse4.1
|
||||
|
||||
// --> SSSE3 detection <--
|
||||
|
||||
cpucaps.hasSupplementalStreamingSIMD3Extensions = ( cpuinfo.x86Flags2 >> 9 ) & 1; //ssse3
|
||||
|
||||
// --> SSE3 detection <--
|
||||
// These instructions may not be recognized by some compilers, or may not have
|
||||
// intrinsic equivalents available. So we use our own ix86 emitter to generate
|
||||
// some code and run it that way. :)
|
||||
|
||||
u8* recSSE = (u8*)SysMmap( NULL, 0x1000 );
|
||||
if( recSSE != NULL )
|
||||
{
|
||||
x86SetPtr(recSSE);
|
||||
SSE3_MOVSLDUP_XMM_to_XMM(XMM0, XMM0);
|
||||
RET();
|
||||
cpudetectSSE3(recSSE);
|
||||
SysMunmap( recSSE, 0x1000 );
|
||||
}
|
||||
|
||||
//////////////////////////////////////
|
||||
// Core Counting!
|
||||
|
||||
if( !cpucaps.hasMultiThreading || LogicalCoresPerPhysicalCPU == 0 )
|
||||
LogicalCoresPerPhysicalCPU = 1;
|
||||
|
||||
// This will assign values into cpuinfo.LogicalCores and PhysicalCores
|
||||
Threading::CountLogicalCores( LogicalCoresPerPhysicalCPU, PhysicalCoresPerPhysicalCPU );
|
||||
}
|
||||
|
||||
|
|
@ -1,286 +0,0 @@
|
|||
/* Pcsx2 - Pc Ps2 Emulator
|
||||
* Copyright (C) 2002-2009 Pcsx2 Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
|
||||
*/
|
||||
|
||||
#include "PrecompiledHeader.h"
|
||||
#include "ix86.h"
|
||||
|
||||
/********************/
|
||||
/* FPU instructions */
|
||||
/********************/
|
||||
|
||||
/* fild m32 to fpu reg stack */
|
||||
void FILD32( u32 from )
|
||||
{
|
||||
write8( 0xDB );
|
||||
ModRM( 0, 0x0, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
/* fistp m32 from fpu reg stack */
|
||||
void FISTP32( u32 from )
|
||||
{
|
||||
write8( 0xDB );
|
||||
ModRM( 0, 0x3, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
/* fld m32 to fpu reg stack */
|
||||
void FLD32( u32 from )
|
||||
{
|
||||
write8( 0xD9 );
|
||||
ModRM( 0, 0x0, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
// fld st(i)
|
||||
void FLD(int st) { write16(0xc0d9+(st<<8)); }
|
||||
|
||||
void FLD1() { write16(0xe8d9); }
|
||||
void FLDL2E() { write16(0xead9); }
|
||||
|
||||
/* fst m32 from fpu reg stack */
|
||||
void FST32( u32 to )
|
||||
{
|
||||
write8( 0xD9 );
|
||||
ModRM( 0, 0x2, DISP32 );
|
||||
write32( MEMADDR(to, 4) );
|
||||
}
|
||||
|
||||
/* fstp m32 from fpu reg stack */
|
||||
void FSTP32( u32 to )
|
||||
{
|
||||
write8( 0xD9 );
|
||||
ModRM( 0, 0x3, DISP32 );
|
||||
write32( MEMADDR(to, 4) );
|
||||
}
|
||||
|
||||
// fstp st(i)
|
||||
void FSTP(int st) { write16(0xd8dd+(st<<8)); }
|
||||
|
||||
/* fldcw fpu control word from m16 */
|
||||
void FLDCW( u32 from )
|
||||
{
|
||||
write8( 0xD9 );
|
||||
ModRM( 0, 0x5, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
/* fnstcw fpu control word to m16 */
|
||||
void FNSTCW( u32 to )
|
||||
{
|
||||
write8( 0xD9 );
|
||||
ModRM( 0, 0x7, DISP32 );
|
||||
write32( MEMADDR(to, 4) );
|
||||
}
|
||||
|
||||
void FNSTSWtoAX( void )
|
||||
{
|
||||
write16( 0xE0DF );
|
||||
}
|
||||
|
||||
void FXAM()
|
||||
{
|
||||
write16(0xe5d9);
|
||||
}
|
||||
|
||||
void FDECSTP() { write16(0xf6d9); }
|
||||
void FRNDINT() { write16(0xfcd9); }
|
||||
void FXCH(int st) { write16(0xc8d9+(st<<8)); }
|
||||
void F2XM1() { write16(0xf0d9); }
|
||||
void FSCALE() { write16(0xfdd9); }
|
||||
|
||||
/* fadd ST(src) to fpu reg stack ST(0) */
|
||||
void FADD32Rto0( x86IntRegType src )
|
||||
{
|
||||
write8( 0xD8 );
|
||||
write8( 0xC0 + src );
|
||||
}
|
||||
|
||||
/* fadd ST(0) to fpu reg stack ST(src) */
|
||||
void FADD320toR( x86IntRegType src )
|
||||
{
|
||||
write8( 0xDC );
|
||||
write8( 0xC0 + src );
|
||||
}
|
||||
|
||||
/* fsub ST(src) to fpu reg stack ST(0) */
|
||||
void FSUB32Rto0( x86IntRegType src )
|
||||
{
|
||||
write8( 0xD8 );
|
||||
write8( 0xE0 + src );
|
||||
}
|
||||
|
||||
/* fsub ST(0) to fpu reg stack ST(src) */
|
||||
void FSUB320toR( x86IntRegType src )
|
||||
{
|
||||
write8( 0xDC );
|
||||
write8( 0xE8 + src );
|
||||
}
|
||||
|
||||
/* fsubp -> substract ST(0) from ST(1), store in ST(1) and POP stack */
|
||||
void FSUBP( void )
|
||||
{
|
||||
write8( 0xDE );
|
||||
write8( 0xE9 );
|
||||
}
|
||||
|
||||
/* fmul ST(src) to fpu reg stack ST(0) */
|
||||
void FMUL32Rto0( x86IntRegType src )
|
||||
{
|
||||
write8( 0xD8 );
|
||||
write8( 0xC8 + src );
|
||||
}
|
||||
|
||||
/* fmul ST(0) to fpu reg stack ST(src) */
|
||||
void FMUL320toR( x86IntRegType src )
|
||||
{
|
||||
write8( 0xDC );
|
||||
write8( 0xC8 + src );
|
||||
}
|
||||
|
||||
/* fdiv ST(src) to fpu reg stack ST(0) */
|
||||
void FDIV32Rto0( x86IntRegType src )
|
||||
{
|
||||
write8( 0xD8 );
|
||||
write8( 0xF0 + src );
|
||||
}
|
||||
|
||||
/* fdiv ST(0) to fpu reg stack ST(src) */
|
||||
void FDIV320toR( x86IntRegType src )
|
||||
{
|
||||
write8( 0xDC );
|
||||
write8( 0xF8 + src );
|
||||
}
|
||||
|
||||
void FDIV320toRP( x86IntRegType src )
|
||||
{
|
||||
write8( 0xDE );
|
||||
write8( 0xF8 + src );
|
||||
}
|
||||
|
||||
/* fadd m32 to fpu reg stack */
|
||||
void FADD32( u32 from )
|
||||
{
|
||||
write8( 0xD8 );
|
||||
ModRM( 0, 0x0, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
/* fsub m32 to fpu reg stack */
|
||||
void FSUB32( u32 from )
|
||||
{
|
||||
write8( 0xD8 );
|
||||
ModRM( 0, 0x4, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
/* fmul m32 to fpu reg stack */
|
||||
void FMUL32( u32 from )
|
||||
{
|
||||
write8( 0xD8 );
|
||||
ModRM( 0, 0x1, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
/* fdiv m32 to fpu reg stack */
|
||||
void FDIV32( u32 from )
|
||||
{
|
||||
write8( 0xD8 );
|
||||
ModRM( 0, 0x6, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
/* fabs fpu reg stack */
|
||||
void FABS( void )
|
||||
{
|
||||
write16( 0xE1D9 );
|
||||
}
|
||||
|
||||
/* fsqrt fpu reg stack */
|
||||
void FSQRT( void )
|
||||
{
|
||||
write16( 0xFAD9 );
|
||||
}
|
||||
|
||||
void FPATAN(void) { write16(0xf3d9); }
|
||||
void FSIN(void) { write16(0xfed9); }
|
||||
|
||||
/* fchs fpu reg stack */
|
||||
void FCHS( void )
|
||||
{
|
||||
write16( 0xE0D9 );
|
||||
}
|
||||
|
||||
/* fcomi st, st(i) */
|
||||
void FCOMI( x86IntRegType src )
|
||||
{
|
||||
write8( 0xDB );
|
||||
write8( 0xF0 + src );
|
||||
}
|
||||
|
||||
/* fcomip st, st(i) */
|
||||
void FCOMIP( x86IntRegType src )
|
||||
{
|
||||
write8( 0xDF );
|
||||
write8( 0xF0 + src );
|
||||
}
|
||||
|
||||
/* fucomi st, st(i) */
|
||||
void FUCOMI( x86IntRegType src )
|
||||
{
|
||||
write8( 0xDB );
|
||||
write8( 0xE8 + src );
|
||||
}
|
||||
|
||||
/* fucomip st, st(i) */
|
||||
void FUCOMIP( x86IntRegType src )
|
||||
{
|
||||
write8( 0xDF );
|
||||
write8( 0xE8 + src );
|
||||
}
|
||||
|
||||
/* fcom m32 to fpu reg stack */
|
||||
void FCOM32( u32 from )
|
||||
{
|
||||
write8( 0xD8 );
|
||||
ModRM( 0, 0x2, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
/* fcomp m32 to fpu reg stack */
|
||||
void FCOMP32( u32 from )
|
||||
{
|
||||
write8( 0xD8 );
|
||||
ModRM( 0, 0x3, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
#define FCMOV32( low, high ) \
|
||||
{ \
|
||||
write8( low ); \
|
||||
write8( high + from ); \
|
||||
}
|
||||
|
||||
void FCMOVB32( x86IntRegType from ) { FCMOV32( 0xDA, 0xC0 ); }
|
||||
void FCMOVE32( x86IntRegType from ) { FCMOV32( 0xDA, 0xC8 ); }
|
||||
void FCMOVBE32( x86IntRegType from ) { FCMOV32( 0xDA, 0xD0 ); }
|
||||
void FCMOVU32( x86IntRegType from ) { FCMOV32( 0xDA, 0xD8 ); }
|
||||
void FCMOVNB32( x86IntRegType from ) { FCMOV32( 0xDB, 0xC0 ); }
|
||||
void FCMOVNE32( x86IntRegType from ) { FCMOV32( 0xDB, 0xC8 ); }
|
||||
void FCMOVNBE32( x86IntRegType from ) { FCMOV32( 0xDB, 0xD0 ); }
|
||||
void FCMOVNU32( x86IntRegType from ) { FCMOV32( 0xDB, 0xD8 ); }
|
||||
|
|
@ -1,648 +0,0 @@
|
|||
/* Pcsx2 - Pc Ps2 Emulator
|
||||
* Copyright (C) 2002-2009 Pcsx2 Team
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
|
||||
*/
|
||||
|
||||
#include "PrecompiledHeader.h"
|
||||
#include "ix86.h"
|
||||
|
||||
/********************/
|
||||
/* MMX instructions */
|
||||
/********************/
|
||||
|
||||
// r64 = mm
|
||||
|
||||
/* movq m64 to r64 */
|
||||
void MOVQMtoR( x86MMXRegType to, uptr from )
|
||||
{
|
||||
write16( 0x6F0F );
|
||||
ModRM( 0, to, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
/* movq r64 to m64 */
|
||||
void MOVQRtoM( uptr to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0x7F0F );
|
||||
ModRM( 0, from, DISP32 );
|
||||
write32(MEMADDR(to, 4));
|
||||
}
|
||||
|
||||
/* pand r64 to r64 */
|
||||
void PANDRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0xDB0F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
void PANDNRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0xDF0F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
/* por r64 to r64 */
|
||||
void PORRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0xEB0F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
/* pxor r64 to r64 */
|
||||
void PXORRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0xEF0F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
/* psllq r64 to r64 */
|
||||
void PSLLQRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0xF30F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
/* psllq m64 to r64 */
|
||||
void PSLLQMtoR( x86MMXRegType to, uptr from )
|
||||
{
|
||||
write16( 0xF30F );
|
||||
ModRM( 0, to, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
/* psllq imm8 to r64 */
|
||||
void PSLLQItoR( x86MMXRegType to, u8 from )
|
||||
{
|
||||
write16( 0x730F );
|
||||
ModRM( 3, 6, to);
|
||||
write8( from );
|
||||
}
|
||||
|
||||
/* psrlq r64 to r64 */
|
||||
void PSRLQRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0xD30F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
/* psrlq m64 to r64 */
|
||||
void PSRLQMtoR( x86MMXRegType to, uptr from )
|
||||
{
|
||||
write16( 0xD30F );
|
||||
ModRM( 0, to, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
/* psrlq imm8 to r64 */
|
||||
void PSRLQItoR( x86MMXRegType to, u8 from )
|
||||
{
|
||||
write16( 0x730F );
|
||||
ModRM( 3, 2, to);
|
||||
write8( from );
|
||||
}
|
||||
|
||||
/* paddusb r64 to r64 */
|
||||
void PADDUSBRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0xDC0F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
/* paddusb m64 to r64 */
|
||||
void PADDUSBMtoR( x86MMXRegType to, uptr from )
|
||||
{
|
||||
write16( 0xDC0F );
|
||||
ModRM( 0, to, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
/* paddusw r64 to r64 */
|
||||
void PADDUSWRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0xDD0F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
/* paddusw m64 to r64 */
|
||||
void PADDUSWMtoR( x86MMXRegType to, uptr from )
|
||||
{
|
||||
write16( 0xDD0F );
|
||||
ModRM( 0, to, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
/* paddb r64 to r64 */
|
||||
void PADDBRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0xFC0F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
/* paddb m64 to r64 */
|
||||
void PADDBMtoR( x86MMXRegType to, uptr from )
|
||||
{
|
||||
write16( 0xFC0F );
|
||||
ModRM( 0, to, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
/* paddw r64 to r64 */
|
||||
void PADDWRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0xFD0F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
/* paddw m64 to r64 */
|
||||
void PADDWMtoR( x86MMXRegType to, uptr from )
|
||||
{
|
||||
write16( 0xFD0F );
|
||||
ModRM( 0, to, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
/* paddd r64 to r64 */
|
||||
void PADDDRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0xFE0F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
/* paddd m64 to r64 */
|
||||
void PADDDMtoR( x86MMXRegType to, uptr from )
|
||||
{
|
||||
write16( 0xFE0F );
|
||||
ModRM( 0, to, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
/* emms */
|
||||
void EMMS( void )
|
||||
{
|
||||
write16( 0x770F );
|
||||
}
|
||||
|
||||
void PADDSBRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0xEC0F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
void PADDSWRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0xED0F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
// paddq m64 to r64 (sse2 only?)
|
||||
void PADDQMtoR( x86MMXRegType to, uptr from )
|
||||
{
|
||||
write16( 0xD40F );
|
||||
ModRM( 0, to, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
// paddq r64 to r64 (sse2 only?)
|
||||
void PADDQRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0xD40F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
void PSUBSBRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0xE80F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
void PSUBSWRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0xE90F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
|
||||
void PSUBBRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0xF80F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
void PSUBWRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0xF90F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
void PSUBDRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0xFA0F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
void PSUBDMtoR( x86MMXRegType to, uptr from )
|
||||
{
|
||||
write16( 0xFA0F );
|
||||
ModRM( 0, to, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
void PSUBUSBRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0xD80F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
void PSUBUSWRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0xD90F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
// psubq m64 to r64 (sse2 only?)
|
||||
void PSUBQMtoR( x86MMXRegType to, uptr from )
|
||||
{
|
||||
write16( 0xFB0F );
|
||||
ModRM( 0, to, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
// psubq r64 to r64 (sse2 only?)
|
||||
void PSUBQRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0xFB0F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
// pmuludq m64 to r64 (sse2 only?)
|
||||
void PMULUDQMtoR( x86MMXRegType to, uptr from )
|
||||
{
|
||||
write16( 0xF40F );
|
||||
ModRM( 0, to, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
// pmuludq r64 to r64 (sse2 only?)
|
||||
void PMULUDQRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0xF40F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
void PCMPEQBRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0x740F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
void PCMPEQWRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0x750F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
void PCMPEQDRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0x760F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
void PCMPEQDMtoR( x86MMXRegType to, uptr from )
|
||||
{
|
||||
write16( 0x760F );
|
||||
ModRM( 0, to, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
void PCMPGTBRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0x640F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
void PCMPGTWRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0x650F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
void PCMPGTDRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0x660F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
void PCMPGTDMtoR( x86MMXRegType to, uptr from )
|
||||
{
|
||||
write16( 0x660F );
|
||||
ModRM( 0, to, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
void PSRLWItoR( x86MMXRegType to, u8 from )
|
||||
{
|
||||
write16( 0x710F );
|
||||
ModRM( 3, 2 , to );
|
||||
write8( from );
|
||||
}
|
||||
|
||||
void PSRLDItoR( x86MMXRegType to, u8 from )
|
||||
{
|
||||
write16( 0x720F );
|
||||
ModRM( 3, 2 , to );
|
||||
write8( from );
|
||||
}
|
||||
|
||||
void PSRLDRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0xD20F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
void PSLLWItoR( x86MMXRegType to, u8 from )
|
||||
{
|
||||
write16( 0x710F );
|
||||
ModRM( 3, 6 , to );
|
||||
write8( from );
|
||||
}
|
||||
|
||||
void PSLLDItoR( x86MMXRegType to, u8 from )
|
||||
{
|
||||
write16( 0x720F );
|
||||
ModRM( 3, 6 , to );
|
||||
write8( from );
|
||||
}
|
||||
|
||||
void PSLLDRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0xF20F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
void PSRAWItoR( x86MMXRegType to, u8 from )
|
||||
{
|
||||
write16( 0x710F );
|
||||
ModRM( 3, 4 , to );
|
||||
write8( from );
|
||||
}
|
||||
|
||||
void PSRADItoR( x86MMXRegType to, u8 from )
|
||||
{
|
||||
write16( 0x720F );
|
||||
ModRM( 3, 4 , to );
|
||||
write8( from );
|
||||
}
|
||||
|
||||
void PSRADRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0xE20F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
/* por m64 to r64 */
|
||||
void PORMtoR( x86MMXRegType to, uptr from )
|
||||
{
|
||||
write16( 0xEB0F );
|
||||
ModRM( 0, to, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
/* pxor m64 to r64 */
|
||||
void PXORMtoR( x86MMXRegType to, uptr from )
|
||||
{
|
||||
write16( 0xEF0F );
|
||||
ModRM( 0, to, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
/* pand m64 to r64 */
|
||||
void PANDMtoR( x86MMXRegType to, uptr from )
|
||||
{
|
||||
//u64 rip = (u64)x86Ptr + 7;
|
||||
write16( 0xDB0F );
|
||||
ModRM( 0, to, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
void PANDNMtoR( x86MMXRegType to, uptr from )
|
||||
{
|
||||
write16( 0xDF0F );
|
||||
ModRM( 0, to, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
void PUNPCKHDQRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0x6A0F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
void PUNPCKHDQMtoR( x86MMXRegType to, uptr from )
|
||||
{
|
||||
write16( 0x6A0F );
|
||||
ModRM( 0, to, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
void PUNPCKLDQRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0x620F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
void PUNPCKLDQMtoR( x86MMXRegType to, uptr from )
|
||||
{
|
||||
write16( 0x620F );
|
||||
ModRM( 0, to, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
void MOVQ64ItoR( x86MMXRegType reg, u64 i )
|
||||
{
|
||||
MOVQMtoR( reg, ( uptr )(x86Ptr) + 2 + 7 );
|
||||
JMP8( 8 );
|
||||
write64( i );
|
||||
}
|
||||
|
||||
void MOVQRtoR( x86MMXRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0x6F0F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
void MOVQRmtoROffset( x86MMXRegType to, x86IntRegType from, u32 offset )
|
||||
{
|
||||
write16( 0x6F0F );
|
||||
|
||||
if( offset < 128 ) {
|
||||
ModRM( 1, to, from );
|
||||
write8(offset);
|
||||
}
|
||||
else {
|
||||
ModRM( 2, to, from );
|
||||
write32(offset);
|
||||
}
|
||||
}
|
||||
|
||||
void MOVQRtoRmOffset( x86IntRegType to, x86MMXRegType from, u32 offset )
|
||||
{
|
||||
write16( 0x7F0F );
|
||||
|
||||
if( offset < 128 ) {
|
||||
ModRM( 1, from , to );
|
||||
write8(offset);
|
||||
}
|
||||
else {
|
||||
ModRM( 2, from, to );
|
||||
write32(offset);
|
||||
}
|
||||
}
|
||||
|
||||
/* movd m32 to r64 */
|
||||
void MOVDMtoMMX( x86MMXRegType to, uptr from )
|
||||
{
|
||||
write16( 0x6E0F );
|
||||
ModRM( 0, to, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
}
|
||||
|
||||
/* movd r64 to m32 */
|
||||
void MOVDMMXtoM( uptr to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0x7E0F );
|
||||
ModRM( 0, from, DISP32 );
|
||||
write32( MEMADDR(to, 4) );
|
||||
}
|
||||
|
||||
void MOVD32RtoMMX( x86MMXRegType to, x86IntRegType from )
|
||||
{
|
||||
write16( 0x6E0F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
void MOVD32RmtoMMX( x86MMXRegType to, x86IntRegType from )
|
||||
{
|
||||
write16( 0x6E0F );
|
||||
ModRM( 0, to, from );
|
||||
}
|
||||
|
||||
void MOVD32RmOffsettoMMX( x86MMXRegType to, x86IntRegType from, u32 offset )
|
||||
{
|
||||
write16( 0x6E0F );
|
||||
|
||||
if( offset < 128 ) {
|
||||
ModRM( 1, to, from );
|
||||
write8(offset);
|
||||
}
|
||||
else {
|
||||
ModRM( 2, to, from );
|
||||
write32(offset);
|
||||
}
|
||||
}
|
||||
|
||||
void MOVD32MMXtoR( x86IntRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0x7E0F );
|
||||
ModRM( 3, from, to );
|
||||
}
|
||||
|
||||
void MOVD32MMXtoRm( x86IntRegType to, x86MMXRegType from )
|
||||
{
|
||||
write16( 0x7E0F );
|
||||
ModRM( 0, from, to );
|
||||
if( to >= 4 ) {
|
||||
// no idea why
|
||||
assert( to == ESP );
|
||||
write8(0x24);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void MOVD32MMXtoRmOffset( x86IntRegType to, x86MMXRegType from, u32 offset )
|
||||
{
|
||||
write16( 0x7E0F );
|
||||
|
||||
if( offset < 128 ) {
|
||||
ModRM( 1, from, to );
|
||||
write8(offset);
|
||||
}
|
||||
else {
|
||||
ModRM( 2, from, to );
|
||||
write32(offset);
|
||||
}
|
||||
}
|
||||
|
||||
///* movd r32 to r64 */
|
||||
//void MOVD32MMXtoMMX( x86MMXRegType to, x86MMXRegType from )
|
||||
//{
|
||||
// write16( 0x6E0F );
|
||||
// ModRM( 3, to, from );
|
||||
//}
|
||||
//
|
||||
///* movq r64 to r32 */
|
||||
//void MOVD64MMXtoMMX( x86MMXRegType to, x86MMXRegType from )
|
||||
//{
|
||||
// write16( 0x7E0F );
|
||||
// ModRM( 3, from, to );
|
||||
//}
|
||||
|
||||
// untested
|
||||
void PACKSSWBMMXtoMMX(x86MMXRegType to, x86MMXRegType from)
|
||||
{
|
||||
write16( 0x630F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
void PACKSSDWMMXtoMMX(x86MMXRegType to, x86MMXRegType from)
|
||||
{
|
||||
write16( 0x6B0F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
void PMOVMSKBMMXtoR(x86IntRegType to, x86MMXRegType from)
|
||||
{
|
||||
write16( 0xD70F );
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
|
||||
void PINSRWRtoMMX( x86MMXRegType to, x86SSERegType from, u8 imm8 )
|
||||
{
|
||||
if (to > 7 || from > 7) Rex(1, to >> 3, 0, from >> 3);
|
||||
write16( 0xc40f );
|
||||
ModRM( 3, to, from );
|
||||
write8( imm8 );
|
||||
}
|
||||
|
||||
void PSHUFWRtoR(x86MMXRegType to, x86MMXRegType from, u8 imm8)
|
||||
{
|
||||
write16(0x700f);
|
||||
ModRM( 3, to, from );
|
||||
write8(imm8);
|
||||
}
|
||||
|
||||
void PSHUFWMtoR(x86MMXRegType to, uptr from, u8 imm8)
|
||||
{
|
||||
write16( 0x700f );
|
||||
ModRM( 0, to, DISP32 );
|
||||
write32( MEMADDR(from, 4) );
|
||||
write8(imm8);
|
||||
}
|
||||
|
||||
void MASKMOVQRtoR(x86MMXRegType to, x86MMXRegType from)
|
||||
{
|
||||
write16(0xf70f);
|
||||
ModRM( 3, to, from );
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
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Reference in New Issue