mirror of https://github.com/PCSX2/pcsx2.git
Fix IOP bltzal and bgezal opcodes
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@ -39,9 +39,9 @@ void psxBGEZ() // Branch if Rs >= 0
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void psxBGEZAL() // Branch if Rs >= 0 and link
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void psxBGEZAL() // Branch if Rs >= 0 and link
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{
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{
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_SetLink(31);
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if (_i32(_rRs_) >= 0)
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if (_i32(_rRs_) >= 0)
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{
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{
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_SetLink(31);
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doBranch(_BranchTarget_);
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doBranch(_BranchTarget_);
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}
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}
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}
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}
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@ -62,9 +62,9 @@ void psxBLTZ() // Branch if Rs < 0
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void psxBLTZAL() // Branch if Rs < 0 and link
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void psxBLTZAL() // Branch if Rs < 0 and link
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{
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{
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_SetLink(31);
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if (_i32(_rRs_) < 0)
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if (_i32(_rRs_) < 0)
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{
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{
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_SetLink(31);
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doBranch(_BranchTarget_);
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doBranch(_BranchTarget_);
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}
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}
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}
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}
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@ -1163,13 +1163,12 @@ void rpsxBLTZAL()
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_psxDeleteReg(31, 0);
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_psxDeleteReg(31, 0);
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_psxFlushAllUnused();
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_psxFlushAllUnused();
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PSX_SET_CONST(31);
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g_psxConstRegs[31] = psxpc + 4;
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if( PSX_IS_CONST1(_Rs_) ) {
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if( PSX_IS_CONST1(_Rs_) ) {
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if( (int)g_psxConstRegs[_Rs_] >= 0 )
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if( (int)g_psxConstRegs[_Rs_] >= 0 )
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branchTo = psxpc+4;
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branchTo = psxpc+4;
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else {
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PSX_SET_CONST(_Rt_);
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g_psxConstRegs[31] = psxpc+4;
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}
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psxRecompileNextInstruction(1);
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psxRecompileNextInstruction(1);
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psxSetBranchImm( branchTo );
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psxSetBranchImm( branchTo );
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@ -1181,7 +1180,6 @@ void rpsxBLTZAL()
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psxSaveBranchState();
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psxSaveBranchState();
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MOV32ItoM((uptr)&psxRegs.GPR.r[31], psxpc+4);
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psxRecompileNextInstruction(1);
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psxRecompileNextInstruction(1);
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psxSetBranchImm(psxpc);
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psxSetBranchImm(psxpc);
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@ -1205,11 +1203,12 @@ void rpsxBGEZAL()
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_psxDeleteReg(31, 0);
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_psxDeleteReg(31, 0);
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_psxFlushAllUnused();
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_psxFlushAllUnused();
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PSX_SET_CONST(31);
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g_psxConstRegs[31] = psxpc + 4;
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if( PSX_IS_CONST1(_Rs_) ) {
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if( PSX_IS_CONST1(_Rs_) ) {
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if( (int)g_psxConstRegs[_Rs_] < 0 )
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if( (int)g_psxConstRegs[_Rs_] < 0 )
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branchTo = psxpc+4;
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branchTo = psxpc+4;
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else
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MOV32ItoM((uptr)&psxRegs.GPR.r[31], psxpc+4);
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psxRecompileNextInstruction(1);
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psxRecompileNextInstruction(1);
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psxSetBranchImm( branchTo );
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psxSetBranchImm( branchTo );
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@ -1219,8 +1218,6 @@ void rpsxBGEZAL()
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CMP32ItoM((uptr)&psxRegs.GPR.r[_Rs_], 0);
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CMP32ItoM((uptr)&psxRegs.GPR.r[_Rs_], 0);
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u32* pjmp = JGE32(0);
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u32* pjmp = JGE32(0);
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MOV32ItoM((uptr)&psxRegs.GPR.r[31], psxpc+4);
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psxSaveBranchState();
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psxSaveBranchState();
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psxRecompileNextInstruction(1);
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psxRecompileNextInstruction(1);
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