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Emitter rewrite, Part 2 of 5: Converted SSE comparisons and SSE conversions to constructor-less structs. 

(also includes some header file prepwork for my next wxWidgets windows.h commit fix)

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@2069 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
Jake.Stine 2009-10-24 21:43:28 +00:00
parent beed14bfee
commit ada3d9ed8a
10 changed files with 260 additions and 147 deletions
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8
common/build/x86emitter/x86emitter.vcproj
View File

@ -332,10 +332,6 @@
<Filter <Filter
Name="Implement_Simd" Name="Implement_Simd"
> >
<File
RelativePath="..\..\include\x86emitter\implement\xmm\comparisons.h"
>
</File>
<File <File
RelativePath="..\..\include\x86emitter\implement\xmm\moremovs.h" RelativePath="..\..\include\x86emitter\implement\xmm\moremovs.h"
> >
@ -348,6 +344,10 @@
RelativePath="..\..\include\x86emitter\implement\simd_arithmetic.h" RelativePath="..\..\include\x86emitter\implement\simd_arithmetic.h"
> >
</File> </File>
<File
RelativePath="..\..\include\x86emitter\implement\simd_comparisons.h"
>
</File>
<File <File
RelativePath="..\..\include\x86emitter\implement\simd_helpers.h" RelativePath="..\..\include\x86emitter\implement\simd_helpers.h"
> >

95
common/include/x86emitter/implement/xmm/comparisons.h → common/include/x86emitter/implement/simd_comparisons.h
View File

@ -15,128 +15,111 @@
#pragma once #pragma once
namespace x86Emitter {
////////////////////////////////////////////////////////////////////////////////////////// struct xImplSimd_MinMax
//
template< u16 OpcodeSSE >
class SimdImpl_MinMax
{ {
public: const xImplSimd_DestRegSSE PS; // packed single precision
const SimdImpl_DestRegSSE<0x00,OpcodeSSE> PS; // packed single precision const xImplSimd_DestRegSSE PD; // packed double precision
const SimdImpl_DestRegSSE<0x66,OpcodeSSE> PD; // packed double precision const xImplSimd_DestRegSSE SS; // scalar single precision
const SimdImpl_DestRegSSE<0xf3,OpcodeSSE> SS; // scalar single precision const xImplSimd_DestRegSSE SD; // scalar double precision
const SimdImpl_DestRegSSE<0xf2,OpcodeSSE> SD; // scalar double precision
SimdImpl_MinMax() {} //GChow?
}; };
////////////////////////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////////////////////////////////////////////
// //
template< SSE2_ComparisonType CType > struct xImplSimd_Compare
class SimdImpl_Compare
{ {
protected: SSE2_ComparisonType CType;
template< u8 Prefix > struct Woot
{
__forceinline void operator()( const xRegisterSSE& to, const xRegisterSSE& from ) const { xOpWrite0F( Prefix, 0xc2, to, from ); xWrite8( CType ); }
__forceinline void operator()( const xRegisterSSE& to, const ModSibBase& from ) const { xOpWrite0F( Prefix, 0xc2, to, from ); xWrite8( CType ); }
Woot() {}
};
public: void PS( const xRegisterSSE& to, const xRegisterSSE& from ) const;
const Woot<0x00> PS; void PS( const xRegisterSSE& to, const ModSibBase& from ) const;
const Woot<0x66> PD;
const Woot<0xf3> SS; void PD( const xRegisterSSE& to, const xRegisterSSE& from ) const;
const Woot<0xf2> SD; void PD( const xRegisterSSE& to, const ModSibBase& from ) const;
SimdImpl_Compare() {} //GCWhat?
void SS( const xRegisterSSE& to, const xRegisterSSE& from ) const;
void SS( const xRegisterSSE& to, const ModSibBase& from ) const;
void SD( const xRegisterSSE& to, const xRegisterSSE& from ) const;
void SD( const xRegisterSSE& to, const ModSibBase& from ) const;
}; };
////////////////////////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////////////////////////////////////////////
// Compare scalar floating point values and set EFLAGS (Ordered or Unordered) // Compare scalar floating point values and set EFLAGS (Ordered or Unordered)
// //
template< bool Ordered > struct xImplSimd_COMI
class SimdImpl_COMI
{ {
protected: const xImplSimd_DestRegSSE SS;
static const u16 OpcodeSSE = Ordered ? 0x2f : 0x2e; const xImplSimd_DestRegSSE SD;
public:
const SimdImpl_DestRegSSE<0x00,OpcodeSSE> SS;
const SimdImpl_DestRegSSE<0x66,OpcodeSSE> SD;
SimdImpl_COMI() {}
}; };
////////////////////////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////////////////////////////////////////////
// //
class SimdImpl_PCompare struct xImplSimd_PCompare
{ {
public: public:
SimdImpl_PCompare() {}
// Compare packed bytes for equality. // Compare packed bytes for equality.
// If a data element in dest is equal to the corresponding date element src, the // If a data element in dest is equal to the corresponding date element src, the
// corresponding data element in dest is set to all 1s; otherwise, it is set to all 0s. // corresponding data element in dest is set to all 1s; otherwise, it is set to all 0s.
const SimdImpl_DestRegEither<0x66,0x74> EQB; const xImplSimd_DestRegEither EQB;
// Compare packed words for equality. // Compare packed words for equality.
// If a data element in dest is equal to the corresponding date element src, the // If a data element in dest is equal to the corresponding date element src, the
// corresponding data element in dest is set to all 1s; otherwise, it is set to all 0s. // corresponding data element in dest is set to all 1s; otherwise, it is set to all 0s.
const SimdImpl_DestRegEither<0x66,0x75> EQW; const xImplSimd_DestRegEither EQW;
// Compare packed doublewords [32-bits] for equality. // Compare packed doublewords [32-bits] for equality.
// If a data element in dest is equal to the corresponding date element src, the // If a data element in dest is equal to the corresponding date element src, the
// corresponding data element in dest is set to all 1s; otherwise, it is set to all 0s. // corresponding data element in dest is set to all 1s; otherwise, it is set to all 0s.
const SimdImpl_DestRegEither<0x66,0x76> EQD; const xImplSimd_DestRegEither EQD;
// Compare packed signed bytes for greater than. // Compare packed signed bytes for greater than.
// If a data element in dest is greater than the corresponding date element src, the // If a data element in dest is greater than the corresponding date element src, the
// corresponding data element in dest is set to all 1s; otherwise, it is set to all 0s. // corresponding data element in dest is set to all 1s; otherwise, it is set to all 0s.
const SimdImpl_DestRegEither<0x66,0x64> GTB; const xImplSimd_DestRegEither GTB;
// Compare packed signed words for greater than. // Compare packed signed words for greater than.
// If a data element in dest is greater than the corresponding date element src, the // If a data element in dest is greater than the corresponding date element src, the
// corresponding data element in dest is set to all 1s; otherwise, it is set to all 0s. // corresponding data element in dest is set to all 1s; otherwise, it is set to all 0s.
const SimdImpl_DestRegEither<0x66,0x65> GTW; const xImplSimd_DestRegEither GTW;
// Compare packed signed doublewords [32-bits] for greater than. // Compare packed signed doublewords [32-bits] for greater than.
// If a data element in dest is greater than the corresponding date element src, the // If a data element in dest is greater than the corresponding date element src, the
// corresponding data element in dest is set to all 1s; otherwise, it is set to all 0s. // corresponding data element in dest is set to all 1s; otherwise, it is set to all 0s.
const SimdImpl_DestRegEither<0x66,0x66> GTD; const xImplSimd_DestRegEither GTD;
}; };
////////////////////////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////////////////////////////////////////////
// //
template< u8 Opcode1, u16 Opcode2 > struct xImplSimd_PMinMax
class SimdImpl_PMinMax
{ {
public:
SimdImpl_PMinMax() {}
// Compare packed unsigned byte integers in dest to src and store packed min/max // Compare packed unsigned byte integers in dest to src and store packed min/max
// values in dest. // values in dest.
// Operation can be performed on either MMX or SSE operands. // Operation can be performed on either MMX or SSE operands.
const SimdImpl_DestRegEither<0x66,Opcode1> UB; const xImplSimd_DestRegEither UB;
// Compare packed signed word integers in dest to src and store packed min/max // Compare packed signed word integers in dest to src and store packed min/max
// values in dest. // values in dest.
// Operation can be performed on either MMX or SSE operands. // Operation can be performed on either MMX or SSE operands.
const SimdImpl_DestRegEither<0x66,Opcode1+0x10> SW; const xImplSimd_DestRegEither SW;
// [SSE-4.1] Compare packed signed byte integers in dest to src and store // [SSE-4.1] Compare packed signed byte integers in dest to src and store
// packed min/max values in dest. (SSE operands only) // packed min/max values in dest. (SSE operands only)
const SimdImpl_DestRegSSE<0x66,(Opcode2<<8)|0x38> SB; const xImplSimd_DestRegSSE SB;
// [SSE-4.1] Compare packed signed doubleword integers in dest to src and store // [SSE-4.1] Compare packed signed doubleword integers in dest to src and store
// packed min/max values in dest. (SSE operands only) // packed min/max values in dest. (SSE operands only)
const SimdImpl_DestRegSSE<0x66,((Opcode2+1)<<8)|0x38> SD; const xImplSimd_DestRegSSE SD;
// [SSE-4.1] Compare packed unsigned word integers in dest to src and store // [SSE-4.1] Compare packed unsigned word integers in dest to src and store
// packed min/max values in dest. (SSE operands only) // packed min/max values in dest. (SSE operands only)
const SimdImpl_DestRegSSE<0x66,((Opcode2+2)<<8)|0x38> UW; const xImplSimd_DestRegSSE UW;
// [SSE-4.1] Compare packed unsigned doubleword integers in dest to src and store // [SSE-4.1] Compare packed unsigned doubleword integers in dest to src and store
// packed min/max values in dest. (SSE operands only) // packed min/max values in dest. (SSE operands only)
const SimdImpl_DestRegSSE<0x66,((Opcode2+3)<<8)|0x38> UD; const xImplSimd_DestRegSSE UD;
}; };
} // end namespace x86Emitter

101
common/include/x86emitter/instructions.h
View File

@ -428,59 +428,81 @@ namespace x86Emitter
extern const Internal::SimdImpl_DestRegEither<0x66,0xeb> xPOR; extern const Internal::SimdImpl_DestRegEither<0x66,0xeb> xPOR;
extern const Internal::SimdImpl_DestRegEither<0x66,0xef> xPXOR; extern const Internal::SimdImpl_DestRegEither<0x66,0xef> xPXOR;
extern const Internal::SimdImpl_COMI<true> xCOMI;
extern const Internal::SimdImpl_COMI<false> xUCOMI;
extern const Internal::SimdImpl_MinMax<0x5f> xMAX;
extern const Internal::SimdImpl_MinMax<0x5d> xMIN;
extern const Internal::SimdImpl_Shuffle<0xc6> xSHUF; extern const Internal::SimdImpl_Shuffle<0xc6> xSHUF;
// ------------------------------------------------------------------------ // ------------------------------------------------------------------------
extern const Internal::SimdImpl_DestRegSSE<0x66,0x1738> xPTEST; extern const Internal::SimdImpl_DestRegSSE<0x66,0x1738> xPTEST;
extern const Internal::SimdImpl_Compare<SSE2_Equal> xCMPEQ; extern const xImplSimd_MinMax xMIN;
extern const Internal::SimdImpl_Compare<SSE2_Less> xCMPLT; extern const xImplSimd_MinMax xMAX;
extern const Internal::SimdImpl_Compare<SSE2_LessOrEqual> xCMPLE;
extern const Internal::SimdImpl_Compare<SSE2_Unordered> xCMPUNORD; extern const xImplSimd_Compare xCMPEQ, xCMPLT,
extern const Internal::SimdImpl_Compare<SSE2_NotEqual> xCMPNE; xCMPLE, xCMPUNORD,
extern const Internal::SimdImpl_Compare<SSE2_NotLess> xCMPNLT; xCMPNE, xCMPNLT,
extern const Internal::SimdImpl_Compare<SSE2_NotLessOrEqual> xCMPNLE; xCMPNLE,xCMPORD;
extern const Internal::SimdImpl_Compare<SSE2_Ordered> xCMPORD;
extern const xImplSimd_COMI xCOMI;
extern const xImplSimd_COMI xUCOMI;
extern const xImplSimd_PCompare xPCMP;
extern const xImplSimd_PMinMax xPMIN;
extern const xImplSimd_PMinMax xPMAX;
// ------------------------------------------------------------------------ // ------------------------------------------------------------------------
// OMG Evil. I went cross-eyed an hour ago doing this.
// //
extern const Internal::SimdImpl_DestRegStrict<0xf3,0xe6,xRegisterSSE,xRegisterSSE,u64> xCVTDQ2PD; //
extern const Internal::SimdImpl_DestRegStrict<0x00,0x5b,xRegisterSSE,xRegisterSSE,u128> xCVTDQ2PS; extern void xCVTDQ2PD( const xRegisterSSE& to, const xRegisterSSE& from );
extern void xCVTDQ2PD( const xRegisterSSE& to, const ModSib64& from );
extern void xCVTDQ2PS( const xRegisterSSE& to, const xRegisterSSE& from );
extern void xCVTDQ2PS( const xRegisterSSE& to, const ModSib128& from );
extern const Internal::SimdImpl_DestRegStrict<0xf2,0xe6,xRegisterSSE,xRegisterSSE,u128> xCVTPD2DQ; extern void xCVTPD2DQ( const xRegisterSSE& to, const xRegisterSSE& from );
extern const Internal::SimdImpl_DestRegStrict<0x66,0x2d,xRegisterMMX,xRegisterSSE,u128> xCVTPD2PI; extern void xCVTPD2DQ( const xRegisterSSE& to, const ModSib128& from );
extern const Internal::SimdImpl_DestRegStrict<0x66,0x5a,xRegisterSSE,xRegisterSSE,u128> xCVTPD2PS; extern void xCVTPD2PI( const xRegisterMMX& to, const xRegisterSSE& from );
extern void xCVTPD2PI( const xRegisterMMX& to, const ModSib128& from );
extern void xCVTPD2PS( const xRegisterSSE& to, const xRegisterSSE& from );
extern void xCVTPD2PS( const xRegisterSSE& to, const ModSib128& from );
extern const Internal::SimdImpl_DestRegStrict<0x66,0x2a,xRegisterSSE,xRegisterMMX,u64> xCVTPI2PD; extern void xCVTPI2PD( const xRegisterSSE& to, const xRegisterMMX& from );
extern const Internal::SimdImpl_DestRegStrict<0x00,0x2a,xRegisterSSE,xRegisterMMX,u64> xCVTPI2PS; extern void xCVTPI2PD( const xRegisterSSE& to, const ModSib64& from );
extern void xCVTPI2PS( const xRegisterSSE& to, const xRegisterMMX& from );
extern void xCVTPI2PS( const xRegisterSSE& to, const ModSib64& from );
extern const Internal::SimdImpl_DestRegStrict<0x66,0x5b,xRegisterSSE,xRegisterSSE,u128> xCVTPS2DQ; extern void xCVTPS2DQ( const xRegisterSSE& to, const xRegisterSSE& from );
extern const Internal::SimdImpl_DestRegStrict<0x00,0x5a,xRegisterSSE,xRegisterSSE,u64> xCVTPS2PD; extern void xCVTPS2DQ( const xRegisterSSE& to, const ModSib128& from );
extern const Internal::SimdImpl_DestRegStrict<0x00,0x2d,xRegisterMMX,xRegisterSSE,u64> xCVTPS2PI; extern void xCVTPS2PD( const xRegisterSSE& to, const xRegisterSSE& from );
extern void xCVTPS2PD( const xRegisterSSE& to, const ModSib64& from );
extern void xCVTPS2PI( const xRegisterMMX& to, const xRegisterSSE& from );
extern void xCVTPS2PI( const xRegisterMMX& to, const ModSib64& from );
extern const Internal::SimdImpl_DestRegStrict<0xf2,0x2d,xRegister32, xRegisterSSE,u64> xCVTSD2SI; extern void xCVTSD2SI( const xRegister32& to, const xRegisterSSE& from );
extern const Internal::SimdImpl_DestRegStrict<0xf2,0x5a,xRegisterSSE,xRegisterSSE,u64> xCVTSD2SS; extern void xCVTSD2SI( const xRegister32& to, const ModSib64& from );
extern const Internal::SimdImpl_DestRegStrict<0xf2,0x2a,xRegisterMMX,xRegister32, u32> xCVTSI2SD; extern void xCVTSD2SS( const xRegisterSSE& to, const xRegisterSSE& from );
extern const Internal::SimdImpl_DestRegStrict<0xf3,0x2a,xRegisterSSE,xRegister32, u32> xCVTSI2SS; extern void xCVTSD2SS( const xRegisterSSE& to, const ModSib64& from );
extern void xCVTSI2SD( const xRegisterMMX& to, const xRegister32& from );
extern void xCVTSI2SD( const xRegisterMMX& to, const ModSib32& from );
extern void xCVTSI2SS( const xRegisterSSE& to, const xRegister32& from );
extern void xCVTSI2SS( const xRegisterSSE& to, const ModSib32& from );
extern const Internal::SimdImpl_DestRegStrict<0xf3,0x5a,xRegisterSSE,xRegisterSSE,u32> xCVTSS2SD; extern void xCVTSS2SD( const xRegisterSSE& to, const xRegisterSSE& from );
extern const Internal::SimdImpl_DestRegStrict<0xf3,0x2d,xRegister32, xRegisterSSE,u32> xCVTSS2SI; extern void xCVTSS2SD( const xRegisterSSE& to, const ModSib32& from );
extern void xCVTSS2SI( const xRegister32& to, const xRegisterSSE& from );
extern void xCVTSS2SI( const xRegister32& to, const ModSib32& from );
extern const Internal::SimdImpl_DestRegStrict<0x66,0xe6,xRegisterSSE,xRegisterSSE,u128> xCVTTPD2DQ; extern void xCVTTPD2DQ( const xRegisterSSE& to, const xRegisterSSE& from );
extern const Internal::SimdImpl_DestRegStrict<0x66,0x2c,xRegisterMMX,xRegisterSSE,u128> xCVTTPD2PI; extern void xCVTTPD2DQ( const xRegisterSSE& to, const ModSib128& from );
extern const Internal::SimdImpl_DestRegStrict<0xf3,0x5b,xRegisterSSE,xRegisterSSE,u128> xCVTTPS2DQ; extern void xCVTTPD2PI( const xRegisterMMX& to, const xRegisterSSE& from );
extern const Internal::SimdImpl_DestRegStrict<0x00,0x2c,xRegisterMMX,xRegisterSSE,u64> xCVTTPS2PI; extern void xCVTTPD2PI( const xRegisterMMX& to, const ModSib128& from );
extern void xCVTTPS2DQ( const xRegisterSSE& to, const xRegisterSSE& from );
extern void xCVTTPS2DQ( const xRegisterSSE& to, const ModSib128& from );
extern void xCVTTPS2PI( const xRegisterMMX& to, const xRegisterSSE& from );
extern void xCVTTPS2PI( const xRegisterMMX& to, const ModSib64& from );
extern const Internal::SimdImpl_DestRegStrict<0xf2,0x2c,xRegister32, xRegisterSSE,u64> xCVTTSD2SI; extern void xCVTTSD2SI( const xRegister32& to, const xRegisterSSE& from );
extern const Internal::SimdImpl_DestRegStrict<0xf3,0x2c,xRegister32, xRegisterSSE,u32> xCVTTSS2SI; extern void xCVTTSD2SI( const xRegister32& to, const ModSib64& from );
extern void xCVTTSS2SI( const xRegister32& to, const xRegisterSSE& from );
extern void xCVTTSS2SI( const xRegister32& to, const ModSib32& from );
// ------------------------------------------------------------------------ // ------------------------------------------------------------------------
@ -502,11 +524,6 @@ namespace x86Emitter
extern const xImplSimd_DotProduct xDP; extern const xImplSimd_DotProduct xDP;
extern const xImplSimd_Round xROUND; extern const xImplSimd_Round xROUND;
extern const Internal::SimdImpl_PMinMax<0xde,0x3c> xPMAX;
extern const Internal::SimdImpl_PMinMax<0xda,0x38> xPMIN;
extern const Internal::SimdImpl_PCompare xPCMP;
extern const Internal::SimdImpl_PShuffle xPSHUF; extern const Internal::SimdImpl_PShuffle xPSHUF;
extern const Internal::SimdImpl_PUnpack xPUNPCK; extern const Internal::SimdImpl_PUnpack xPUNPCK;
extern const Internal::SimdImpl_Unpack xUNPCK; extern const Internal::SimdImpl_Unpack xUNPCK;

8
common/include/x86emitter/x86types.h
View File

@ -423,6 +423,12 @@ __forceinline void xWrite( T val )
} }
}; };
typedef ModSibStrict<u8> ModSib8;
typedef ModSibStrict<u16> ModSib16;
typedef ModSibStrict<u32> ModSib32;
typedef ModSibStrict<u64> ModSib64;
typedef ModSibStrict<u128> ModSib128;
////////////////////////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////////////////////////////////////////////
// xAddressIndexerBase - This is a static class which provisions our ptr[] syntax. // xAddressIndexerBase - This is a static class which provisions our ptr[] syntax.
// //
@ -696,7 +702,6 @@ __forceinline void xWrite( T val )
#include "implement/helpers.h" #include "implement/helpers.h"
#include "implement/simd_templated_helpers.h" #include "implement/simd_templated_helpers.h"
#include "implement/xmm/moremovs.h" #include "implement/xmm/moremovs.h"
#include "implement/xmm/comparisons.h"
#include "implement/xmm/shufflepack.h" #include "implement/xmm/shufflepack.h"
#include "implement/group1.h" #include "implement/group1.h"
#include "implement/group2.h" #include "implement/group2.h"
@ -731,5 +736,6 @@ __forceinline void xWrite( T val )
#include "implement/simd_helpers.h" #include "implement/simd_helpers.h"
#include "implement/simd_arithmetic.h" #include "implement/simd_arithmetic.h"
#include "implement/simd_comparisons.h"
#include "inlines.inl" #include "inlines.inl"

175
common/src/x86emitter/simd.cpp
View File

@ -90,11 +90,6 @@ const MovhlImplAll<0x12> xMOVL;
const MovhlImpl_RtoR<0x16> xMOVLH; const MovhlImpl_RtoR<0x16> xMOVLH;
const MovhlImpl_RtoR<0x12> xMOVHL; const MovhlImpl_RtoR<0x12> xMOVHL;
const SimdImpl_COMI<true> xCOMI;
const SimdImpl_COMI<false> xUCOMI;
const SimdImpl_MinMax<0x5f> xMAX;
const SimdImpl_MinMax<0x5d> xMIN;
const SimdImpl_Shuffle<0xc6> xSHUF; const SimdImpl_Shuffle<0xc6> xSHUF;
const SimdImpl_DestRegEither<0x66,0xdb> xPAND; const SimdImpl_DestRegEither<0x66,0xdb> xPAND;
@ -109,50 +104,65 @@ const SimdImpl_DestRegEither<0x66,0xef> xPXOR;
// to the following condition: (xmm2/m128 AND NOT xmm1) == 0; // to the following condition: (xmm2/m128 AND NOT xmm1) == 0;
const SimdImpl_DestRegSSE<0x66,0x1738> xPTEST; const SimdImpl_DestRegSSE<0x66,0x1738> xPTEST;
const SimdImpl_Compare<SSE2_Equal> xCMPEQ;
const SimdImpl_Compare<SSE2_Less> xCMPLT;
const SimdImpl_Compare<SSE2_LessOrEqual> xCMPLE;
const SimdImpl_Compare<SSE2_Unordered> xCMPUNORD;
const SimdImpl_Compare<SSE2_NotEqual> xCMPNE;
const SimdImpl_Compare<SSE2_NotLess> xCMPNLT;
const SimdImpl_Compare<SSE2_NotLessOrEqual> xCMPNLE;
const SimdImpl_Compare<SSE2_Ordered> xCMPORD;
// ------------------------------------------------------------------------ // ------------------------------------------------------------------------
// SSE Conversion Operations, as looney as they are. // SSE Conversion Operations, as looney as they are.
// //
// These enforce pointer strictness for Indirect forms, due to the otherwise completely confusing // These enforce pointer strictness for Indirect forms, due to the otherwise completely confusing
// nature of the functions. (so if a function expects an m32, you must use (u32*) or ptr32[]). // nature of the functions. (so if a function expects an m32, you must use (u32*) or ptr32[]).
// //
const SimdImpl_DestRegStrict<0xf3,0xe6,xRegisterSSE,xRegisterSSE,u64> xCVTDQ2PD;
const SimdImpl_DestRegStrict<0x00,0x5b,xRegisterSSE,xRegisterSSE,u128> xCVTDQ2PS;
const SimdImpl_DestRegStrict<0xf2,0xe6,xRegisterSSE,xRegisterSSE,u128> xCVTPD2DQ; __forceinline void xCVTDQ2PD( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf3, 0xe6 ); }
const SimdImpl_DestRegStrict<0x66,0x2d,xRegisterMMX,xRegisterSSE,u128> xCVTPD2PI; __forceinline void xCVTDQ2PD( const xRegisterSSE& to, const ModSib64& from ) { OpWriteSSE( 0xf3, 0xe6 ); }
const SimdImpl_DestRegStrict<0x66,0x5a,xRegisterSSE,xRegisterSSE,u128> xCVTPD2PS; __forceinline void xCVTDQ2PS( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0x00, 0x5b ); }
__forceinline void xCVTDQ2PS( const xRegisterSSE& to, const ModSib128& from ) { OpWriteSSE( 0x00, 0x5b ); }
const SimdImpl_DestRegStrict<0x66,0x2a,xRegisterSSE,xRegisterMMX,u64> xCVTPI2PD; __forceinline void xCVTPD2DQ( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf2, 0xe6 ); }
const SimdImpl_DestRegStrict<0x00,0x2a,xRegisterSSE,xRegisterMMX,u64> xCVTPI2PS; __forceinline void xCVTPD2DQ( const xRegisterSSE& to, const ModSib128& from ) { OpWriteSSE( 0xf2, 0xe6 ); }
__forceinline void xCVTPD2PI( const xRegisterMMX& to, const xRegisterSSE& from ) { OpWriteSSE( 0x66, 0x2d ); }
__forceinline void xCVTPD2PI( const xRegisterMMX& to, const ModSib128& from ) { OpWriteSSE( 0x66, 0x2d ); }
__forceinline void xCVTPD2PS( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0x66, 0x5a ); }
__forceinline void xCVTPD2PS( const xRegisterSSE& to, const ModSib128& from ) { OpWriteSSE( 0x66, 0x5a ); }
const SimdImpl_DestRegStrict<0x66,0x5b,xRegisterSSE,xRegisterSSE,u128> xCVTPS2DQ; __forceinline void xCVTPI2PD( const xRegisterSSE& to, const xRegisterMMX& from ) { OpWriteSSE( 0x66, 0x2a ); }
const SimdImpl_DestRegStrict<0x00,0x5a,xRegisterSSE,xRegisterSSE,u64> xCVTPS2PD; __forceinline void xCVTPI2PD( const xRegisterSSE& to, const ModSib64& from ) { OpWriteSSE( 0x66, 0x2a ); }
const SimdImpl_DestRegStrict<0x00,0x2d,xRegisterMMX,xRegisterSSE,u64> xCVTPS2PI; __forceinline void xCVTPI2PS( const xRegisterSSE& to, const xRegisterMMX& from ) { OpWriteSSE( 0x00, 0x2a ); }
__forceinline void xCVTPI2PS( const xRegisterSSE& to, const ModSib64& from ) { OpWriteSSE( 0x00, 0x2a ); }
const SimdImpl_DestRegStrict<0xf2,0x2d,xRegister32, xRegisterSSE,u64> xCVTSD2SI; __forceinline void xCVTPS2DQ( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0x66, 0x5b ); }
const SimdImpl_DestRegStrict<0xf2,0x5a,xRegisterSSE,xRegisterSSE,u64> xCVTSD2SS; __forceinline void xCVTPS2DQ( const xRegisterSSE& to, const ModSib128& from ) { OpWriteSSE( 0x66, 0x5b ); }
const SimdImpl_DestRegStrict<0xf2,0x2a,xRegisterMMX,xRegister32, u32> xCVTSI2SD; __forceinline void xCVTPS2PD( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0x00, 0x5a ); }
const SimdImpl_DestRegStrict<0xf3,0x2a,xRegisterSSE,xRegister32, u32> xCVTSI2SS; __forceinline void xCVTPS2PD( const xRegisterSSE& to, const ModSib64& from ) { OpWriteSSE( 0x00, 0x5a ); }
__forceinline void xCVTPS2PI( const xRegisterMMX& to, const xRegisterSSE& from ) { OpWriteSSE( 0x00, 0x2d ); }
__forceinline void xCVTPS2PI( const xRegisterMMX& to, const ModSib64& from ) { OpWriteSSE( 0x00, 0x2d ); }
const SimdImpl_DestRegStrict<0xf3,0x5a,xRegisterSSE,xRegisterSSE,u32> xCVTSS2SD; __forceinline void xCVTSD2SI( const xRegister32& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf2, 0x2d ); }
const SimdImpl_DestRegStrict<0xf3,0x2d,xRegister32, xRegisterSSE,u32> xCVTSS2SI; __forceinline void xCVTSD2SI( const xRegister32& to, const ModSib64& from ) { OpWriteSSE( 0xf2, 0x2d ); }
__forceinline void xCVTSD2SS( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf2, 0x5a ); }
__forceinline void xCVTSD2SS( const xRegisterSSE& to, const ModSib64& from ) { OpWriteSSE( 0xf2, 0x5a ); }
__forceinline void xCVTSI2SD( const xRegisterMMX& to, const xRegister32& from ) { OpWriteSSE( 0xf2, 0x2a ); }
__forceinline void xCVTSI2SD( const xRegisterMMX& to, const ModSib32& from ) { OpWriteSSE( 0xf2, 0x2a ); }
__forceinline void xCVTSI2SS( const xRegisterSSE& to, const xRegister32& from ) { OpWriteSSE( 0xf3, 0x2a ); }
__forceinline void xCVTSI2SS( const xRegisterSSE& to, const ModSib32& from ) { OpWriteSSE( 0xf3, 0x2a ); }
const SimdImpl_DestRegStrict<0x66,0xe6,xRegisterSSE,xRegisterSSE,u128> xCVTTPD2DQ; __forceinline void xCVTSS2SD( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf3, 0x5a ); }
const SimdImpl_DestRegStrict<0x66,0x2c,xRegisterMMX,xRegisterSSE,u128> xCVTTPD2PI; __forceinline void xCVTSS2SD( const xRegisterSSE& to, const ModSib32& from ) { OpWriteSSE( 0xf3, 0x5a ); }
const SimdImpl_DestRegStrict<0xf3,0x5b,xRegisterSSE,xRegisterSSE,u128> xCVTTPS2DQ; __forceinline void xCVTSS2SI( const xRegister32& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf3, 0x2d ); }
const SimdImpl_DestRegStrict<0x00,0x2c,xRegisterMMX,xRegisterSSE,u64> xCVTTPS2PI; __forceinline void xCVTSS2SI( const xRegister32& to, const ModSib32& from ) { OpWriteSSE( 0xf3, 0x2d ); }
__forceinline void xCVTTPD2DQ( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0x66, 0xe6 ); }
__forceinline void xCVTTPD2DQ( const xRegisterSSE& to, const ModSib128& from ) { OpWriteSSE( 0x66, 0xe6 ); }
__forceinline void xCVTTPD2PI( const xRegisterMMX& to, const xRegisterSSE& from ) { OpWriteSSE( 0x66, 0x2c ); }
__forceinline void xCVTTPD2PI( const xRegisterMMX& to, const ModSib128& from ) { OpWriteSSE( 0x66, 0x2c ); }
__forceinline void xCVTTPS2DQ( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf3, 0x5b ); }
__forceinline void xCVTTPS2DQ( const xRegisterSSE& to, const ModSib128& from ) { OpWriteSSE( 0xf3, 0x5b ); }
__forceinline void xCVTTPS2PI( const xRegisterMMX& to, const xRegisterSSE& from ) { OpWriteSSE( 0x00, 0x2c ); }
__forceinline void xCVTTPS2PI( const xRegisterMMX& to, const ModSib64& from ) { OpWriteSSE( 0x00, 0x2c ); }
__forceinline void xCVTTSD2SI( const xRegister32& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf2, 0x2c ); }
__forceinline void xCVTTSD2SI( const xRegister32& to, const ModSib64& from ) { OpWriteSSE( 0xf2, 0x2c ); }
__forceinline void xCVTTSS2SI( const xRegister32& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf3, 0x2c ); }
__forceinline void xCVTTSS2SI( const xRegister32& to, const ModSib32& from ) { OpWriteSSE( 0xf3, 0x2c ); }
const SimdImpl_DestRegStrict<0xf2,0x2c,xRegister32, xRegisterSSE,u64> xCVTTSD2SI;
const SimdImpl_DestRegStrict<0xf3,0x2c,xRegister32, xRegisterSSE,u32> xCVTTSS2SI;
// ------------------------------------------------------------------------ // ------------------------------------------------------------------------
@ -221,7 +231,6 @@ const xImplSimd_Shift xPSLL =
{ 0x66, 0xf3, 0x73, 6 }, // Q { 0x66, 0xf3, 0x73, 6 }, // Q
}; };
const xImplSimd_AddSub xPADD = const xImplSimd_AddSub xPADD =
{ {
{ 0x66, 0xdc+0x20 }, // B { 0x66, 0xdc+0x20 }, // B
@ -248,7 +257,6 @@ const xImplSimd_AddSub xPSUB =
{ 0x66, 0xd8+1 }, // USW { 0x66, 0xd8+1 }, // USW
}; };
const xImplSimd_PMul xPMUL = const xImplSimd_PMul xPMUL =
{ {
{ 0x66, 0xd5 }, // LW { 0x66, 0xd5 }, // LW
@ -326,9 +334,94 @@ const xImplSimd_Round xROUND =
{ 0x66,0x0b3a }, // SD { 0x66,0x0b3a }, // SD
}; };
const SimdImpl_PMinMax<0xde,0x3c> xPMAX; // =====================================================================================================
const SimdImpl_PMinMax<0xda,0x38> xPMIN; // SIMD Comparison Instructions
const SimdImpl_PCompare xPCMP; // =====================================================================================================
void xImplSimd_Compare::PS( const xRegisterSSE& to, const xRegisterSSE& from ) const { xOpWrite0F( 0x00, 0xc2, to, from, (u8)CType ); }
void xImplSimd_Compare::PS( const xRegisterSSE& to, const ModSibBase& from ) const { xOpWrite0F( 0x00, 0xc2, to, from, (u8)CType ); }
void xImplSimd_Compare::PD( const xRegisterSSE& to, const xRegisterSSE& from ) const { xOpWrite0F( 0x66, 0xc2, to, from, (u8)CType ); }
void xImplSimd_Compare::PD( const xRegisterSSE& to, const ModSibBase& from ) const { xOpWrite0F( 0x66, 0xc2, to, from, (u8)CType ); }
void xImplSimd_Compare::SS( const xRegisterSSE& to, const xRegisterSSE& from ) const { xOpWrite0F( 0xf3, 0xc2, to, from, (u8)CType ); }
void xImplSimd_Compare::SS( const xRegisterSSE& to, const ModSibBase& from ) const { xOpWrite0F( 0xf3, 0xc2, to, from, (u8)CType ); }
void xImplSimd_Compare::SD( const xRegisterSSE& to, const xRegisterSSE& from ) const { xOpWrite0F( 0xf2, 0xc2, to, from, (u8)CType ); }
void xImplSimd_Compare::SD( const xRegisterSSE& to, const ModSibBase& from ) const { xOpWrite0F( 0xf2, 0xc2, to, from, (u8)CType ); }
const xImplSimd_MinMax xMIN =
{
{ 0x00, 0x5d }, // PS
{ 0x66, 0x5d }, // PD
{ 0xf3, 0x5d }, // SS
{ 0xf2, 0x5d }, // SD
};
const xImplSimd_MinMax xMAX =
{
{ 0x00, 0x5f }, // PS
{ 0x66, 0x5f }, // PD
{ 0xf3, 0x5f }, // SS
{ 0xf2, 0x5f }, // SD
};
// [TODO] : Merge this into the xCMP class, so that they are notation as: xCMP.EQ
const xImplSimd_Compare xCMPEQ = { SSE2_Equal };
const xImplSimd_Compare xCMPLT = { SSE2_Less };
const xImplSimd_Compare xCMPLE = { SSE2_LessOrEqual };
const xImplSimd_Compare xCMPUNORD = { SSE2_LessOrEqual };
const xImplSimd_Compare xCMPNE = { SSE2_NotEqual };
const xImplSimd_Compare xCMPNLT = { SSE2_NotLess };
const xImplSimd_Compare xCMPNLE = { SSE2_NotLessOrEqual };
const xImplSimd_Compare xCMPORD = { SSE2_Ordered };
const xImplSimd_COMI xCOMI =
{
{ 0x00, 0x2f }, // SS
{ 0x66, 0x2f }, // SD
};
const xImplSimd_COMI xUCOMI =
{
{ 0x00, 0x2e }, // SS
{ 0x66, 0x2e }, // SD
};
const xImplSimd_PCompare xPCMP =
{
{ 0x66, 0x74 }, // EQB
{ 0x66, 0x75 }, // EQW
{ 0x66, 0x76 }, // EQD
{ 0x66, 0x64 }, // GTB
{ 0x66, 0x65 }, // GTW
{ 0x66, 0x66 }, // GTD
};
const xImplSimd_PMinMax xPMIN =
{
{ 0x66, 0xda }, // UB
{ 0x66, 0xea }, // SW
{ 0x66, 0x3838 }, // SB
{ 0x66, 0x3938 }, // SD
{ 0x66, 0x3a38 }, // UW
{ 0x66, 0x3b38 }, // UD
};
const xImplSimd_PMinMax xPMAX =
{
{ 0x66, 0xde }, // UB
{ 0x66, 0xee }, // SW
{ 0x66, 0x3c38 }, // SB
{ 0x66, 0x3d38 }, // SD
{ 0x66, 0x3e38 }, // UW
{ 0x66, 0x3f38 }, // UD
};
const SimdImpl_PShuffle xPSHUF; const SimdImpl_PShuffle xPSHUF;
const SimdImpl_PUnpack xPUNPCK; const SimdImpl_PUnpack xPUNPCK;
const SimdImpl_Unpack xUNPCK; const SimdImpl_Unpack xUNPCK;

3
pcsx2/System/PageFaultSource.h
View File

@ -65,7 +65,8 @@ extern void InstallSignalHandler();
#elif defined( _WIN32 ) #elif defined( _WIN32 )
extern int SysPageFaultExceptionFilter(EXCEPTION_POINTERS* eps); struct _EXCEPTION_POINTERS;
extern int SysPageFaultExceptionFilter(struct _EXCEPTION_POINTERS* eps);
# define PCSX2_PAGEFAULT_PROTECT __try # define PCSX2_PAGEFAULT_PROTECT __try
# define PCSX2_PAGEFAULT_EXCEPT __except(SysPageFaultExceptionFilter(GetExceptionInformation())) {} # define PCSX2_PAGEFAULT_EXCEPT __except(SysPageFaultExceptionFilter(GetExceptionInformation())) {}

4
pcsx2/System/SysCoreThread.cpp
View File

@ -29,6 +29,10 @@
#include "GS.h" #include "GS.h"
#ifdef __WXMSW__
# include <wx/msw/wrapwin.h>
#endif
static __threadlocal SysCoreThread* tls_coreThread = NULL; static __threadlocal SysCoreThread* tls_coreThread = NULL;
// -------------------------------------------------------------------------------------- // --------------------------------------------------------------------------------------

4
pcsx2/gui/AppMain.cpp
View File

@ -25,6 +25,10 @@
#include "Utilities/HashMap.h" #include "Utilities/HashMap.h"
#ifdef __WXMSW__
# include <wx/msw/wrapwin.h>
#endif
IMPLEMENT_APP(Pcsx2App) IMPLEMENT_APP(Pcsx2App)
DEFINE_EVENT_TYPE( pxEVT_SemaphorePing ); DEFINE_EVENT_TYPE( pxEVT_SemaphorePing );

4
pcsx2/gui/ConsoleLogger.cpp
View File

@ -23,6 +23,10 @@
#include <wx/file.h> #include <wx/file.h>
#include <wx/textfile.h> #include <wx/textfile.h>
#ifdef __WXMSW__
# include <wx/msw/wrapwin.h> // needed for OutputDebugStirng
#endif
BEGIN_DECLARE_EVENT_TYPES() BEGIN_DECLARE_EVENT_TYPES()
DECLARE_EVENT_TYPE(wxEVT_LOG_Write, -1) DECLARE_EVENT_TYPE(wxEVT_LOG_Write, -1)
DECLARE_EVENT_TYPE(wxEVT_LOG_Newline, -1) DECLARE_EVENT_TYPE(wxEVT_LOG_Newline, -1)

3
pcsx2/gui/Dialogs/ConfigurationDialog.cpp
View File

@ -25,7 +25,8 @@
#include <wx/listctrl.h> #include <wx/listctrl.h>
#ifdef __WXMSW__ #ifdef __WXMSW__
# include <commctrl.h> // needed for Vista icon spacing fix. # include <wx/msw/wrapwin.h> // needed for Vista icon spacing fix.
# include <commctrl.h>
#endif #endif
using namespace wxHelpers; using namespace wxHelpers;