GregMiscellaneous: zzogl-pg:

* Windows compilation fix
* Fix alpha value & mask value


git-svn-id: http://pcsx2.googlecode.com/svn/branches/GregMiscellaneous@3864 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
gregory.hainaut@gmail.com 2010-10-02 12:13:25 +00:00
parent 9c1618b2d0
commit ace7ddb1aa
2 changed files with 20 additions and 6 deletions

View File

@ -3152,7 +3152,7 @@ __forceinline void update_4pixels_sse2(u32* src, Tdst* basepage, u32 i_msk, u32
__m128i pixel_B = _mm_and_si128(pixels, _mm_load_si128((__m128i*)pixel_Bmask));
// shift the value
pixel_A = _mm_srli_epi32(pixel_A, 15);
pixel_A = _mm_srli_epi32(pixel_A, 16);
pixel_R = _mm_srli_epi32(pixel_R, 9);
pixel_G = _mm_srli_epi32(pixel_G, 6);
pixel_B = _mm_srli_epi32(pixel_B, 3);
@ -3249,7 +3249,7 @@ __forceinline void update_4pixels_sse2_bis(u32* src, u32* basepage, u32 i_msk, u
__m128i pixel_A = _mm_and_si128(pixels_0, pixel_mask_base);
// shift the value
pixel_A = _mm_srli_epi32(pixel_A, 15);
pixel_A = _mm_srli_epi32(pixel_A, 16);
pixel_R = _mm_srli_epi32(pixel_R, 9);
pixel_G = _mm_srli_epi32(pixel_G, 6);
pixel_B = _mm_srli_epi32(pixel_B, 3);
@ -3337,7 +3337,7 @@ void Resolve_32b(const void* psrc, int fbp, int fbw, int fbh, u32 fbm)
mask[1] = mask[0];
mask[2] = mask[0];
mask[3] = mask[0];
pix_mask = (imask<<16) & imask;
pix_mask = (imask<<16) | imask;
}
else
{
@ -3426,7 +3426,7 @@ void Resolve_32b(const void* psrc, int fbp, int fbw, int fbh, u32 fbm)
#ifdef ZEROGS_SSE2
Tdst* basepage;
// A bad hack for the moment
if(do_conversion) {
if(texture_16b) {
basepage = pPageOffset + (i_div + j) * 4096;
} else {
basepage = pPageOffset + (i_div + j) * 2048;
@ -3449,6 +3449,14 @@ void Resolve_32b(const void* psrc, int fbp, int fbw, int fbh, u32 fbm)
update_4pixels_sse2<size, pageTable, Tdst, do_conversion, 56>(src, basepage, i_msk, j, mask, imask);
update_4pixels_sse2<size, pageTable, Tdst, do_conversion, 60>(src, basepage, i_msk, j, mask, imask);
#else
Tdst* basepage;
// A bad hack for the moment
if(texture_16b) {
basepage = pPageOffset + (i_div + j) * 4096;
} else {
basepage = pPageOffset + (i_div + j) * 2048;
}
update_4pixels<size, pageTable, Tdst, do_conversion, 0>(src, basepage, i_msk, j, mask[0], imask);
update_4pixels<size, pageTable, Tdst, do_conversion, 4>(src, basepage, i_msk, j, mask[0], imask);
update_4pixels<size, pageTable, Tdst, do_conversion, 8>(src, basepage, i_msk, j, mask[0], imask);

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@ -663,7 +663,10 @@ extern "C" void __fastcall WriteCLUT_T16_I4_CSM1_sse2(u32* vm, u32* clut)
vm1 = _mm_shufflehi_epi16(vm1, 0x88);
vm1 = _mm_shufflelo_epi16(vm1, 0x88); // 14 12 14 12 10 8 10 8
vm0 = (__m128i)_mm_shuffle_ps((__m128)vm0, (__m128)vm1, 0x88); // 14 12 10 8 6 4 2 0
// Note: MSVC complains about direct c-cast...
// vm0 = (__m128i)_mm_shuffle_ps((__m128)vm0, (__m128)vm1, 0x88); // 14 12 10 8 6 4 2 0
__m128 vm0_f = (_mm_shuffle_ps((__m128&)vm0, (__m128&)vm1, 0x88)); // 14 12 10 8 6 4 2 0
vm0 = (__m128i&)vm0_f;
vm0 = _mm_shuffle_epi32(vm0, 0xD8); // 14 12 6 4 10 8 2 0
// *** Same jobs for vm2 and vm3
@ -672,7 +675,10 @@ extern "C" void __fastcall WriteCLUT_T16_I4_CSM1_sse2(u32* vm, u32* clut)
vm3 = _mm_shufflehi_epi16(vm3, 0x88);
vm3 = _mm_shufflelo_epi16(vm3, 0x88);
vm2 = (__m128i)_mm_shuffle_ps((__m128)vm2, (__m128)vm3, 0x88);
// Note: MSVC complains about direct c-cast...
// vm2 = (__m128i)_mm_shuffle_ps((__m128)vm2, (__m128)vm3, 0x88);
__m128 vm2_f = (_mm_shuffle_ps((__m128&)vm2, (__m128&)vm3, 0x88)); // 14 12 10 8 6 4 2 0
vm2 = (__m128i&)vm2_f;
vm2 = _mm_shuffle_epi32(vm2, 0xD8);
// Create a zero register.